MAX17576EVKITB [MAXIM]
5V Output-Voltage Application;型号: | MAX17576EVKITB |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | 5V Output-Voltage Application |
文件: | 总22页 (文件大小:1025K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
General Description
Benefits and Features
● Reduces External Components and Total Cost
The Himalaya series of voltage regulator ICs, power mod-
ules, and chargers enable cooler, smaller, and simpler power
supply solutions. The MAX17576, high-efficiency, high-
voltage, Himalaya synchronous step-down DC-DC converter
with integrated MOSFETs operates over an input voltage
range of 4.5V to 60V. The converter can deliver up to 4A cur-
rent. Output voltage is programmable from 0.9V up to 90%
• No Schottky-Synchronous Operation
• Internal Compensation for Any Output Voltage
• All-Ceramic Capacitors, Compact Layout
● Reduces Number of DC-DC Regulators to Stock
• Wide 4.5V to 60V Input
• Adjustable Output Voltage Range from 0.9V up to
of V . The feedback voltage regulation accuracy over -40°C
IN
90% of V
IN
to +125°C is ±0.9%. Built-in compensation across the output-
voltage range eliminates the need for external compensation
components.
• 100kHz to 2.2MHz Adjustable Switching Frequency
with External Clock Synchronization
● Reduces Power Dissipation
• Peak Efficiency of 94.8%
The MAX17576 features a peak-current-mode control
architecture. The device can operate either in constant-
frequency based pulse-width modulation (PWM) or pulse-
frequency modulation (PFM), or discontinuous-conduction
mode (DCM) control schemes. A programmable soft-start
feature allows users to reduce input inrush current. The
device also incorporates an output enable/undervoltage
lockout pin (EN/UVLO) that allows the user to turn on the
part at the desired input voltage level. The MAX17576
offers a low minimum on time that allows high switching
frequencies and a small solution size.
• PFM and DCM Modes Enable Enhanced
Light-Load Efficiency
• Auxiliary Bootstrap Supply (EXTVCC) for Improved
Efficiency
• 2.8µA Shutdown Current
● Operates Reliably in Adverse Industrial Environments
• Hiccup Mode Overload Protection and Auto-Retry
Startup
• Adjustable Soft-Start and Prebiased Power-Up
• Built-In Output-Voltage Monitoring with RESET
• Programmable EN/UVLO Threshold
• Monotonic Startup with Prebiased Output Voltage
• Overtemperature Protection
The MAX17576 is available in a 24-pin (4mm x 5mm)
TQFN package. Simulation models are available.
Applications
• Wide -40°C to +125°C Ambient Operating Tempera-
ture Range/-40°C to +150°C Junction Temperature
Range
● Industrial Control Power Supplies
● General Purpose Point-of-Load
● Distributed Supply Regulation
● Base Station Power Supplies
● Wall Transformer Regulation
● High-Voltage, Single-Board Systems
Ordering Information appears at end of data sheet.
Typical Application Circuit
V
IN
R3
59kΩ
(4.5V-60V)
C1
2 x 4.7μF
EN/UVLO
IN
BST
RT
C5
0.1μF
L1
5.6μH
V
OUT
3.3V, 4A
MODE/SYNC
LX
V
CC
C6
2.2μF
MAX17576
C3
2 x 47μF
R6
100kΩ
CF
SGND
FB
FB
R7
SS
C8
5600pF
EXTVCC
PGND
37.4kΩ
f
= 350kHz
SW
L = XAL6060-562ME
C3 = GRM32ER71A476ME15
RESET
19-100399; Rev 1; 9/20
MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Absolute Maximum Ratings
IN to PGND ...........................................................-0.3V to +65V
EN/UVLO to SGND...............................................-0.3V to +65V
PGND to SGND....................................................-0.3V to +0.3V
LX Total RMS Current ..................................................... ±5.6A
Output Short-Circuit Duration ................................. Continuous
LX to PGND..................................................-0.3V to V + 0.3V
IN
EXTVCC to SGND ................................................-0.3V to +26V
BST to PGND........................................................-0.3V to +70V
BST to LX.............................................................-0.3V to +6.5V
Continuous Power Dissipation (multilayer Board) (T = +70°C,
A
derate 41.7mW/°C above +70°C.).............................3333mW
Operating Temperature Range (Note 1)........... -40°C to +125°C
Junction Temperature ................................................... +150°C
Storage Temperature Range ........................... -65°C to +150°C
Lead Temperature (soldering, 10s) ............................... +300°C
Soldering Temperature (reflow) .................................... +260°C
BST to V
...........................................................-0.3V to +65V
CC
RESET, SS, MODE/SYNC,
V
, RT, CF to SGND......................................-0.3V to +6.5V
CC
FB to SGND .........................................................-0.3V to +1.5V
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any
other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Package Information
PACKAGE TYPE: 24 TQFN
Package Code
T2445+2C
21-0201
90-0083
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD (Note 2)
Junction to Ambient (θ
)
24°C/W
JA
Junction to Case (θ
)
1.8°C/W
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Note 1: Junction temperature greater than +125°C degrades operating lifetimes.
Note 2: Package thermal resistances were obtained using the MAX17576 evaluation kit with no airflow.
Maxim Integrated
│ 2
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Electrical Characteristics
(V = V
= 24V, R = 40.2KΩ (f
= 500kHz), C
= 2.2µF, V
= V
= V
= V
= 0V, V = 1V,
IN
EN/UVLO
RT
SW
VCC
SGND
PGND
MODE/SYNC
EXTVCC FB
LX = SS = CF = RESET = OPEN, V
to V = 5V, T = -40°C to 125°C, unless otherwise noted. Typical values are at T = +25°C.
BST
LX A A
All voltages are referenced to SGND, unless otherwise noted.) (Note 3)
PARAMETER
INPUT SUPPLY (IN)
Input Voltage Range
Input Shutdown Current
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
4.5
60
V
IN
I
V
= 0V (shutdown mode)
2.8
4.5
µA
IN-SH
EN/UVLO
MODE/SYNC = RT = open,
= 5V
61
µA
V
EXTVCC
I
Q_PFM
MODE/SYNC = open, V
= 5V
71
µA
EXTVCC
Input Quiescent Current
I
DCM Mode, V = 0.1V
LX
1.2
1.8
mA
Q_DCM
Normal switching mode,
I
14
mA
Q_PWM
f
= 500kHz, V = 0.8V
FB
SW
ENABLE/UVLO (EN)
EN/UVLO Threshold
EN/UVLO Threshold
EN/UVLO Threshold
EN Input Leakage Current
V
V
V
V
V
rising
falling
falling
1.19
1.215
1.09
0.8
1.26
V
V
ENR
EN/UVLO
EN/UVLO
EN/UVLO
EN/UVLO
V
1.068
1.131
ENF
EN-TRUESD
V
V
I
= 0V, T = +25°C
-50
0
+50
nA
EN
A
V
LDO
CC
1mA ≤ I
≤ 25mA
4.75
4.75
40
5
5
5.25
5.25
130
V
V
VCC
V
Output Voltage Range
V
CC
CC
6V ≤ V ≤ 60V; I
= 1mA
IN
VCC
V
V
Current Limit
Dropout
I
V
V
= 4.3V, V = 7V
65
mA
V
CC
VCC(MAX)
CC
IN
V
= 4.5V , I = 20mA
VCC
4.2
CC
CC-DO
IN
V
Rising
Falling
4.05
3.65
4.2
4.3
3.9
V
CC-UVR
V
UVLO
CC
V
3.8
V
CC-UVF
EXT LDO
EXTVCC Operating Voltage
Range
4.84
24
V
V
Rising
Falling
4.56
4.3
4.7
4.84
4.6
V
V
V
EXTVCC_R
EXTVCC Switchover Threshold
V
4.45
EXTVCC_F
EXTVCC Dropout
V
V
= 4.75V, I = 20mA
VCC
0.3
EXTVCC_DO
EXTVCC
EXTVCC Current Limit
V
= 4.5V, V
= 7V
40
85
160
mA
CC
EXTVCC
Maxim Integrated
│ 3
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Electrical Characteristics (continued)
(V = V
= 24V, R = 40.2KΩ (f
= 500kHz), C
= 2.2µF, V
= V
= V
= V
= 0V, V = 1V,
IN
EN/UVLO
RT
SW
VCC
SGND
PGND
MODE/SYNC
EXTVCC FB
LX = SS = CF = RESET = OPEN, V
to V = 5V, T = -40°C to 125°C, unless otherwise noted. Typical values are at T = +25°C.
BST
LX A A
All voltages are referenced to SGND, unless otherwise noted.) (Note 3)
PARAMETER
POWER MOSFETS
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
High-Side nMOS On-Resistance
Low-Side nMOS On-Resistance
R
I
I
= 0.3A ,sourcing
90
55
180
mΩ
mΩ
DS-ONH
LX
LX
R
= 0.3A , sinking
110
DS-ONL
T = 25°C, V = (V + 1V) to
PGND
A
LX
LX Leakage Current
I
-2
4.7
+2
5.3
µA
µA
V
LX_LKG
(V - 1V)
IN
SOFT-START (SS)
Soft-Start Current
FEEDBACK (FB)
I
V
= 0.5V
5
SS
SS
MODE/SYNC = SGND or
= V
FB Regulation Voltage
V
V
0.892
0.9
0.908
FB_REG
V
MODE/SYNC
CC
FB Regulation Voltage
FB Input Leakage Current
MODE/SYNC
MODE/SYNC = OPEN
0.892
0.916
0.934
+50
V
FB_REG
I
0 < V < 1V, T = 25°C
-50
nA
FB
FB
A
V
0.65
–
CC
MODE Threshold
V
V
= V (DCM Mode)
CC
V
M-DCM
MODE/SYNC
MODE Threshold
MODE Threshold
V
MODE/SYNC = OPEN (PFM Mode)
MODE/SYNC = SGND (PWM Mode)
V
/2
CC
V
V
M-PFM
V
0.75
M-PWM
SYNC Frequency Capture
Range
1.1 x
1.4 x
f
SW
f
set by R
kHz
SW
RT
f
SW
50
SYNC Pulse Width
ns
V
V
0.8
IL
SYNC Threshold
V
2.1
V
IH
CURRENT LIMIT
Peak Current Limit Threshold
I
5.5
6.1
6.5
7.2
7.5
A
A
PEAK-LIMIT
Runaway Current Limit
Threshold
I
RUNAWAY-
LIMIT
8.3
MODE/SYNC = OPEN or
= V
Valley Current-Limit Threshold
I
I
-0.25
0.75
0
+0.25
1.3
A
VALLEY-LIMIT
V
MODE/SYNC
CC
Valley Current-Limit Threshold
PFM Current-Limit Threshold
MODE/SYNC = SGND
MODE/SYNC = OPEN
-1.8
A
A
VALLEY-LIMIT
I
1
PFM
Maxim Integrated
│ 4
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Electrical Characteristics (continued)
(V = V
= 24V, R = 40.2KΩ (f
= 500kHz), C
= 2.2µF, V
= V
= V
= V
= 0V, V = 1V,
IN
EN/UVLO
RT
SW
VCC
SGND
PGND
MODE/SYNC
EXTVCC FB
LX = SS = CF = RESET = OPEN, V
to V = 5V, T = -40°C to 125°C, unless otherwise noted. Typical values are at T = +25°C.
BST
LX A A
All voltages are referenced to SGND, unless otherwise noted.) (Note 3)
PARAMETER SYMBOL CONDITIONS
MIN
TYP
MAX
UNITS
RT
R
R
R
R
= 40.2KΩ
475
460
1950
90
500
500
525
540
kHz
kHz
kHz
kHz
RT
RT
RT
RT
= OPEN
= 8.06KΩ
= 210KΩ
Switching Frequency
f
SW
2200
100
2450
110
V
Undervoltage Trip Level to
FB
V
0.56
0.58
0.65
V
FB_HICF
Cause HICCUP
HICCUP Timeout
Minimum On-Time
Minimum off-Time
LX Dead Time
32768
Cycles
ns
t
60
80
ON_MIN
t
140
160
ns
OFF_MIN
5
ns
RESET
RESET Output Level Low
V
I
= 10mA
400
mV
RESETL
RESET
RESET Output Leakage Current
I
T
= T = 25°C, V = 5.5V
RESET
-0.1
+0.1
µA
RESETLKG
A
J
FB Threshold for RESET
Deassertion
V
V
rising
falling
93.8
95
92
97.8
%
%
FB-OKR
FB
FB
FB Threshold for RESET
Assertion
V
V
90.5
94.6
FB-OKF
RESET De-Assertion Delay After
FB Reaches 95% Regulation
1024
Cycles
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
T
Temp rising
165
10
°C
°C
SHDNR
T
SHDNHY
Note 3: All Electrical Specifications are 100% production tested at T = +25°C. Specifications over the operating temperature range
A
are guaranteed by design and characterization
Maxim Integrated
│ 5
www.maximintegrated.com
MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics
(V = V
= 24V, V
= V
= 0V, C = 2 x 4.7μF, C
= 2.2μF, C
= 0.1μF, C = 5600pF, T = -40°C to +125°C,
BST SS A
IN
EN/UVLO
SGND
PGND
IN
VCC
unless otherwise noted. Typical values are at T = +25°C. All voltages are referenced to PGND, unless otherwise noted.)
A
EFFICIENCY vs. LOAD CURRENT
FIGURE 3 CIRUIT
EFFICIENCY vs. LOAD CURRENT
FIGURE 3 CIRUIT
EFFICIENCY vs. LOAD CURRENT
FIGURE 3 CIRUIT
toc01
toc02
toc03
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
100
90
80
70
60
50
40
30
20
10
0
V
= 60V
IN
VIN = 60V
VIN = 48V
V
= 60V
IN
VIN = 48V
VIN = 48V
VIN = 36V
VIN = 24V
IN = 12V
VIN = 6.5V
VIN = 36V
VIN = 24V
VIN = 12V
VIN = 6.5V
VIN = 36V
VIN = 24V
VIN = 12V
VIN = 6.5V
V
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
LOAD CURRENT (A)
0.001
0.010
0.100
1.000
4.000
0.010
0.100
LOAD CURRENT (A)
CONDITIONS: 5V OUTPUT, DCM MODE, fSW = 350kHz
1.000
4.000
LOAD CURRENT (A)
CONDITIONS: 5V OUTPUT, PFM MODE, fSW = 350kHz
CONDITIONS: 5V OUTPUT, PWM MODE, fSW = 350kHz
EFFICIENCY vs. LOAD CURRENT
EFFICIENCY vs. LOAD CURRENT
FIGURE 4 CIRUIT
FIGURE 4 CIRUIT
toc04
toc05
100
100
90
80
70
60
50
40
30
20
10
0
90
80
70
VIN = 60V
VIN = 48V
VIN = 36V
VIN = 60V
VIN = 48V
VIN = 36V
60
50
40
30
20
10
0
VIN = 24V
VIN = 12V
VIN = 4.5V
VIN = 24V
VIN = 12V
VIN = 4.5V
0.001
0.010
0.100
1.000
4.000
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
LOAD CURRENT (A)
LOAD CURRENT (A)
CONDITIONS: 3.3V OUTPUT, PFM MODE, fSW = 350kHz
CONDITIONS: 3.3V OUTPUT, PWM MODE, fSW = 350kHz
EFFICIENCY vs. LOAD CURRENT
LOAD AND LINE REGULATION
FIGURE 3 CIRCUIT
FIGURE 4 CIRUIT
toc06
toc07
5.03
5.02
5.01
5.00
4.99
4.98
100
90
80
70
60
50
40
30
20
10
0
VIN = 12V
VIN = 36V
VIN = 60V
VIN = 60V
VIN = 48V
VIN = 36V
VIN = 24V
VIN = 6.5V
VIN = 24V
VIN = 48V
VIN = 12V
VIN = 4.5V
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
LOAD CURRENT (A)
4.000
0.010
0.100
LOAD CURRENT (A)
CONDITIONS: 3.3V OUTPUT, DCM MODE, fSW = 350kHz
1.000
CONDITIONS: 5V OUTPUT, PWM MODE
Maxim Integrated
│ 6
www.maximintegrated.com
MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics (continued)
(V = V
= 24V, V
= V
= 0V, C = 2 x 4.7μF, C
= 2.2μF, C
= 0.1μF, C = 5600pF, T = -40°C to +125°C,
BST SS A
IN
EN/UVLO
SGND
PGND
IN
VCC
unless otherwise noted. Typical values are at T = +25°C. All voltages are referenced to PGND, unless otherwise noted.)
A
LOAD AND LINE REGULATION
FIGURE 3 CIRCUIT
LOAD AND LINE REGULATION
FIGURE 4 CIRCUIT
LOAD AND LINE REGULATION
FIGURE 3 CIRCUIT
toc09
toc10
toc08
5.15
5.10
5.05
5.00
4.95
3.33
3.32
3.31
3.30
3.29
3.28
5.03
5.02
5.01
5.00
4.99
4.98
VIN = 12V
VIN = 36V
VIN = 12V
VIN = 36V
VIN = 12V
VIN = 60V
VIN = 60V
VIN = 36V
VIN = 48V
VIN = 6.5V
VIN = 24V
VIN = 4.5V
VIN = 24V
VIN = 48V
VIN = 48V
VIN = 6.5V
VIN = 60V
VIN = 24V
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
LOAD CURRENT (A)
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
LOAD CURRENT (A)
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
LOAD CURRENT (A)
CONDITIONS: 5V OUTPUT, DCM MODE
CONDITIONS: 5V OUTPUT, PFM MODE
CONDITIONS: 3.3V OUTPUT, PWM MODE
LOAD AND LINE REGULATION
LOAD AND LINE REGULATION
FIGURE 4 CIRCUIT
FIGURE 4 CIRCUIT
toc11
toc12
3.44
3.35
3.33
3.31
3.29
3.27
3.25
3.42
VIN = 12V
VIN = 36V
3.40
VIN = 12V
VIN = 60V
3.38
VIN = 36V
VIN = 48V
3.36
3.34
3.32
3.30
3.28
VIN = 6.5V
VIN = 24V
VIN = 48V
VIN = 6.5V
VIN = 24V
VIN = 60V
3.26
3.24
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
LOAD CURRENT (A)
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
LOAD CURRENT (A)
CONDITIONS: 3.3V OUTPUT, PFM MODE
CONDITIONS: 3.3V OUTPUT, DCM MODE
SWITCHING FREQUENCY
SOFT-START/SHUTDOWN THROUGH EN/UVLO
vs. RT RESISTANCE
FIGURE 3 CIRCUIT
toc14
toc13
2400
2200
2000
1800
1600
1400
1200
1000
800
VEN/UVLO
5V/div
VOUT
IOUT
2V/div
2A/div
600
VRESET
400
5V/div
200
0
2ms/div
0
20 40 60 80 100 120 140 160 180 200
RRT (kΩ)
CONDITIONS: 5V OUTPUT, PWM MODE, 1.25Ω LOAD
RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
Maxim Integrated
│ 7
www.maximintegrated.com
MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics (continued)
(V = V
= 24V, V
= V
= 0V, C = 2 x 4.7μF, C
= 2.2μF, C
= 0.1μF, C = 5600pF, T = -40°C to +125°C,
BST SS A
IN
EN/UVLO
SGND
PGND
IN
VCC
unless otherwise noted. Typical values are at T = +25°C. All voltages are referenced to PGND, unless otherwise noted.)
A
SOFT-START WITH PREBIAS VOLTAGE OF 2.5V
SOFT-START/SHUTDOWN THROUGH EN/UVLO
FIGURE 3 CIRCUIT
FIGURE 3 CIRCUIT
toc15
toc16
VEN/UVLO
VEN/UVLO
5V/div
5V/div
VOU
T
VOU
T
2V/div
5V/div
2A/div
2V/div
VRESET
VRESET
5V/div
2A/div
ILX
ILX
2ms/div
2ms/div
CONDITIONS: 5V OUTPUT, PFM MODE, 250Ω LOAD
CONDITIONS: 5V OUTPUT, PWM MODE, 250Ω LOAD
RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
SOFT-START/SHUTDOWN THROUGH EN/UVLO
SOFT-START WITH PREBIAS VOLTAGE OF 1.65V
FIGURE 4 CIRCUIT
toc17
FIGURE 4 CIRCUIT
toc18
VEN/UVLO
VEN/UVLO
5V/div
2V/div
5V/div
VOU
T
VOU
T
1V/div
5V/div
2A/div
VRESET
IOUT
VRESET
2A/div
5V/div
ILX
2ms/div
2ms/div
CONDITIONS: 3.3V OUTPUT, PWM MODE, 165Ω LOAD
RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
CONDITIONS: 3.3V OUTPUT, PWM MODE, 0.825Ω LOAD
RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
STEADY STATE PERFORMANCE
SOFT-START/SHUTDOWN THROUGH EN/UVLO
FIGURE 3 CIRCUIT
toc20
FIGURE 4 CIRCUIT
toc19
VOUT(AC)
50mV/div
VEN/UVLO
5V/div
2V/div
VOUT
VLX
10V/div
5A/div
VRESET
ILX
5V/div
2A/div
ILX
2µs/div
2ms/div
CONDITIONS: 3.3V OUTPUT, PFM MODE, 165Ω LOAD
RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
CONDITIONS: 5V OUTPUT, PWM MODE, 4A LOAD
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics (continued)
(V = V
= 24V, V
= V
= 0V, C = 2 x 4.7μF, C
= 2.2μF, C
= 0.1μF, C = 5600pF, T = -40°C to +125°C,
BST SS A
IN
EN/UVLO
SGND
PGND
IN
VCC
unless otherwise noted. Typical values are at T = +25°C. All voltages are referenced to PGND, unless otherwise noted.)
A
STEADY STATE PERFORMANCE
FIGURE 3 CIRCUIT
STEADY STATE PERFORMANCE
FIGURE 3 CIRCUIT
STEADY STATE PERFORMANCE
FIGURE 3 CIRCUIT
toc22
toc23
toc21
VOUT(AC)
VOUT(AC)
VOUT(AC)
10mV/div
50mV/div
50mV/div
VLX
VLX
VLX
10V/div
0.5A/div
10V/div
2A/div
10V/div
1A/div
ILX
ILX
ILX
2µs/div
2µs/div
100µs/div
CONDITIONS: 5V OUTPUT, DCM MODE, 40mA LOAD
CONDITIONS: 5V OUTPUT, PWM MODE, NO LOAD
CONDITIONS: 5V OUTPUT, PFM MODE, 20mA LOAD
STEADY STATE PERFORMANCE
FIGURE 4 CIRCUIT
STEADY STATE PERFORMANCE
FIGURE 4 CIRCUIT
toc25
toc24
VOUT(AC)
VOUT(AC)
50mV/div
20mV/div
VLX
VLX
10V/div
5A/div
10V/div
2A/div
ILX
ILX
2µs/div
2µs/div
CONDITIONS: 3.3V OUTPUT, PWM MODE, NO LOAD
CONDITIONS: 3.3V OUTPUT, PWM MODE, 4A LOAD
STEADY-STATE PERFORMANCE
STEADY-STATE PERFORMANCE
FIGURE 4 CIRCUIT
FIGURE 4 CIRCUIT
toc26
toc27
VOUT(AC)
VOUT(AC)
10mV/div
50mV/div
VLX
10V/div
1A/div
VLX
10V/div
0.5A/div
ILX
ILX
40µs/div
CONDITIONS: 3.3V OUTPUT, PFM MODE, 20mA LOAD
2µs/div
CONDITIONS: 3.3V OUTPUT, DCM MODE, 40mA LOAD
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics (continued)
(V = V
= 24V, V
= V
= 0V, C = 2 x 4.7μF, C
= 2.2μF, C
= 0.1μF, C = 5600pF, T = -40°C to +125°C,
BST SS A
IN
EN/UVLO
SGND
PGND
IN
VCC
unless otherwise noted. Typical values are at T = +25°C. All voltages are referenced to PGND, unless otherwise noted.)
A
LOAD TRANSIENT BETWEEN 2A AND 4A
LOAD TRANSIENT BETWEEN 0A AND 2A
FIGURE 3 CIRCUIT
toc28
FIGURE 3 CIRCUIT
toc29
VOUT(AC)
VOUT(AC)
100mV/div
100mV/div
IOUT
IOUT
2A/div
1A/div
40µs/div
40µs/div
CONDITIONS: 5V OUTPUT, PWM MODE
CONDITIONS: 5V OUTPUT, PWM MODE
LOAD TRANSIENT BETWEEN 80mA AND 2A
LOAD TRANSIENT BETWEEN 50mA AND 2A
FIGURE 3 CIRCUIT
FIGURE 3 CIRCUIT
toc30
toc31
VOUT(AC)
100mV/div
VOUT(AC)
100mV/div
IOUT
IOUT
2A/div
2A/div
100µs/div
200µs/div
CONDITIONS: 5V OUTPUT, DCM MODE
CONDITIONS: 5V OUTPUT, PFM MODE
LOAD TRANSIENT BETWEEN 2A AND 4A
LOAD TRANSIENT BETWEEN 0A AND 2A
FIGURE 4 CIRCUIT
FIGURE 4 CIRCUIT
toc32
toc33
VOUT(AC)
VOUT(AC)
100mV/div
100mV/div
IOUT
IOUT
2A/div
1A/div
40µs/div
40µs/div
CONDITIONS: 3.3V OUTPUT, PWM MODE
CONDITIONS: 3.3V OUTPUT, PWM MODE
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Typical Operating Characteristics (continued)
(V = V
= 24V, V
= V
= 0V, C = 2 x 4.7μF, C
= 2.2μF, C
= 0.1μF, C = 5600pF, T = -40°C to +125°C,
BST SS A
IN
EN/UVLO
SGND
PGND
IN
VCC
unless otherwise noted. Typical values are at T = +25°C. All voltages are referenced to PGND, unless otherwise noted.)
A
LOAD TRANSIENT BETWEEN 80mA AND 2A
LOAD TRANSIENT BETWEEN 50mA AND 2A
OVERLOAD PROTECTION
FIGURE 3 CIRCUIT
FIGURE 4 CIRCUIT
FIGURE 4 CIRCUIT
toc34
toc36
toc35
VOUT(AC)
100mV/div
VOUT
VOUT(AC)
100mV/div
1V/div
ILX
IOUT
IOUT
2A/div
2A/div
1A/div
200µs/div
20ms/div
100µs/div
CONDITIONS: 3.3V OUTPUT, PFM MODE
CONDITIONS: 5V OUTPUT, PWM MODE
CONDITIONS: 3.3V OUTPUT, DCM MODE
BODE PLOT
FIGURE 4 CIRCUIT
EXTERNAL CLOCK SYNCHRONIZATION
BODE PLOT
FIGURE 3 CIRCUIT
FIGURE 3 CIRCUIT
toc38
toc39
toc37
60
40
20
0
120
80
60
40
20
0
120
80
PHASE
PHASE
VMODE/SYNC
VOUT(AC)
5V/div
40
40
100mV/div
0
0
GAIN
VLX
20V/div
5A/div
-20
-40
-60
-40
-80
-120
-20
-40
-60
-40
-80
-120
GAIN
GAIN CROSSOVER
GAIN CROSSOVER
FREQUENCY = 42.6kHz
FREQUENCY = 43.5kHz
IOUT
PHASE MARGIN = 66.4°
PHASE MARGIN = 67.4°
10µs/div
1k
10k
100k
1k
10k
100k
CONDITIONS: 5V OUTPUT, PWM MODE, 4A LOAD CURRENT,
fSW = 350kHz, EXTERNAL CLOCK FREQUENCY = 490kHz
FREQUENCY (Hz)
FREQUENCY (Hz)
CONDITIONS: 5V OUTPUT, 1.25Ω LOAD
CONDITIONS: 3.3V OUTPUT, 0.825Ω LOAD
MAX17576, 5V OUTPUT, 4A LOAD CURRENT
RADIATED EMI CURVE
toc41
70
60
50
CISPR32 CLASS B QP LIMIT
40
30
20
10
HORIZONTAL SCAN
VERTICAL SCAN
0
-10
1000
30
100
FREQUENCY (MHz)
TESTED ON MAX17576EVKITB# WITH
CIN7 = CIN9 = OPEN, L1 = SHORT
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Pin Configuration
TOP VIEW
24
23
22
21
20
+
EP
LX
PGND
PGND
NC
1
2
3
4
5
6
7
19 RT
18 FB
17 CF
MAX17576
16 SS
IN
15 MODE/SYNC
14 RESET
13 NC
IN
IN
8
9
10
11
12
24-PIN TQFN
(4mm × 5mm)
Pin Description
NAME
PIN
FUNCTION
1, 23, 24
LX
Switching Node Pins. Connect LX pins to the switching side of the inductor.
Power Ground Pins of the Converter. Connect externally to the power ground plane. Connect the
2, 3, 11
4, 8, 13
5–7, 9
PGND
NC
SGND and PGND pins together at the ground return path of the V
MAX17576 Evaluation Kit data sheet for a layout example
bypass capacitor. Refer to the
CC
No Connect. Keep these pins open.
Power-Supply Input Pins. The input supply range is from 4.5V to 60V. Connect the IN pins together.
Decouple to PGND with 2 x 4.7μF capacitors; place the capacitors close to the IN and PGND pins.
Refer to the MAX17576 EV kit data sheet for a layout example.
IN
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Pin Description (continued)
NAME
PIN
FUNCTION
Enable/Undervoltage Lockout Pin. Drive EN/UVLO high to enable the output. Connect to the
center of the resistor-divider between IN and SGND to set the input voltage at which the part
10
EN/UVLO
turns on. Connect to IN pins for always-on operation. Pull lower than V
converter.
for disabling the
ENF
5V LDO Output. Bypass V
with 2.2μF ceramic capacitor to SGND. LDO does not support the
CC
12
14
V
CC
external loading on V
.
CC
Open-Drain RESET Output. The RESET output is driven low if FB drops below 92% of its set value.
RESET goes high 1024 cycles after FB rises above 95% of its set value.
RESET
Mode Selection and External Clock Synchronization Input. MODE/SYNC Configures the MAX17576
to Operate either in PWM, PFM or DCM Modes of Operation. Leave MODE/SYNC unconnected for
PFM operation (pulse skipping at light loads). Connect MODE/SYNC to SGND for constant-frequency
MODE/
SYNC
15
PWM operation at all loads. Connect MODE/SYNC to V
for DCM operation.The device can be
CC
synchronized to an external clock using this pin. See the Mode Selection and External Frequency
Synchronization (MODE/SYNC) section for more details.
16
17
SS
CF
Soft-Start Input. Connect a capacitor from SS to SGND to set the soft-start time.
Internal Compensation Node. At switching frequencies lower than 500kHz, connect a capacitor from
CF to FB. Leave CF open if switching frequency is equal or more than 500kHz.
Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to
SGND to set the output voltage. See the Adjusting Output Voltage section for more details.
18
FB
RT
Switching Frequency Programming Input. Connect a resistor from RT to SGND to set the regulator’s
switching frequency between 100kHz and 2.2MHz. Leave RT open for the default 500kHz
frequency. See the Switching Frequency Selection (RT) section for more details.
19
External Power Supply Input for the Internal LDO. Applying a voltage between 4.84V and 24V at
EXTVCC pin will bypass the internal LDO and improve efficiency. Add a local bypassing capacitor of
0.1μF on the EXTVCC pin to SGND. Also, add a 4.7Ω resistor from the buck converter output node
20
EXTVCC
to the EXTVCC pin to limit V
bypass capacitor discharge current and to protect the EXTVCC pin
CC
from reaching its absolute maximum rating (-0.3V) during output short-circuit condition. Connect the
EXTVCC pin to SGND when the pin is not being used.
21
22
SGND
BST
Analog Ground.
Boost Flying Capacitor. Connect a 0.1μF ceramic capacitor between BST and LX.
Exposed Pad. Always connect EP to the SGND pin of the IC. Also, connect EP to a large SGND
plane with several thermal vias for best thermal performance. Refer to the MAX17576 EV kit data
sheet for an example of the correct method for EP connection and thermal vias.
—
EP
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Functional (or Block) Diagram
MAX17576
V
CC
LDO
SELECT
BST
EXTVCC
SGND
EXTVCC
LDO
INLDO
IN
THERMAL
SHUTDOWN
EN/UVLO
LX
CHIPEN
PWM/PFM/DCM
HICCUP LOGIC
V
ENR
HICCUP
RT
OSCILLATOR
PGND
CF
FB
CURRENT-SENSE
LOGIC
ERROR AMPLIFIER/
LOOP COMPENSATION
MODE
MODE-SELECTION
LOGIC
/SYNC
SLOPE
COMPENSATION
V
CC
SWITCHOVER
LOGIC
RESET
5µA
SS
FB
RESET
LOGIC
CHIPEN
HICCUP
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
external clock edges. The converter will operate in PWM
mode during synchronization operation.
Detailed Description
The MAX17576, high-efficiency, high-voltage, synchronous
step-down DC-DC converter with integrated MOSFETs
operates over a 4.5V to 60V input. The converter can deliv-
er up to 4A current. Output voltage is programmable from
When the external clock is applied on-fly then the mode
of operation will change to PWM from the initial state of
PFM/DCM/PWM. When the external clock is removed
on-fly then the internal oscillator frequency changes to
the RT set frequency and the converter will still continue
to operate in PWM mode. The minimum external clock
pulse-width high should be greater than 50ns. See the
MODE/SYNC section in the Electrical Characteristics
table for details.
0.9V up to 90% of V . The feedback voltage regulation
IN
accuracy over -40°C to +125°C is ±0.9%.
The device features a peak-current-mode control archi-
tecture. An internal transconductance error amplifier
produces an integrated error voltage at an internal node,
which sets the duty cycle using a PWM comparator, a
high-side current-sense amplifier, and a slope-compen-
sation generator. At each rising edge of the clock, the
high-side MOSFET turns on and remains on until either
the appropriate or maximum duty cycle is reached, or
the peak current limit is detected. During the high-side
MOSFET’s on-time, the inductor current ramps up. During
the second half of the switching cycle, the high-side
MOSFET turns off and the low-side MOSFET turns on.
The inductor releases the stored energy as its current
ramps down and provides current to the output.
PWM Mode Operation
In PWM mode, the inductor current is allowed to go negative.
PWM operation provides constant frequency operation at
all loads, and is useful in applications sensitive to switching
frequency. However, the PWM mode of operation gives
lower efficiency at light loads compared to PFM and DCM
modes of operation.
PFM Mode Operation
PFM mode of operation disables negative inductor cur-
rent and additionally skips pulses at light loads for high
efficiency. In PFM mode, the inductor current is forced to
The device can operate either in the pulse-width modu-
lation (PWM), pulse-frequency modulation (PFM), or
discontinuous-conduction mode (DCM) control schemes.
A programmable soft-start feature allows users to reduce
input inrush current. The device also incorporates an
output enable/undervoltage lockout pin (EN/UVLO) that
allows the user to turn on the part at the desired input volt-
age level. An open-drain RESET pin provides a delayed
power-good signal to the system upon achieving success-
ful regulation of the output voltage.
a fixed peak of I
(1A typ) every clock cycle until the
PFM
output rises to 102.3% of the nominal voltage. Once the
output reaches 102.3% of the nominal voltage, both the
high-side and low-side FETs are turned off and the device
enters hibernate operation until the load discharges
the output to 101.1% of the nominal voltage. Most of
the internal blocks are turned off in hibernate operation
to save quiescent current. After the output falls below
101.1% of the nominal voltage, the device comes out
of hibernate operation, turns on all internal blocks, and
again commences the process of delivering pulses of
energy to the output until it reaches 102.3% of the nomi-
nal output voltage. The advantage of the PFM mode is
higher efficiency at light loads because of lower quiescent
current drawn from supply. The trade-off is that the output-
voltage ripple is higher compared to PWM or DCM modes
of operation and switching frequency is not constant at
light loads.
Mode Selection and External Frequency
Synchronization (MODE/SYNC)
The logic state of the MODE/SYNC pin is latched when
V
CC
and EN/UVLO voltages exceed the respective UVLO
rising thresholds and all internal voltages are ready to
allow LX switching. If the MODE/SYNC pin is open at pow-
er-up, the device operates in PFM mode at light loads. If
the MODE/SYNC pin is grounded at power-up, the device
operates in constant-frequency PWM mode at all loads.
Finally, if the MODE/SYNC pin is connected to V
at
CC
power-up, the device operates in constant-frequency DCM
mode at light loads. State changes on the MODE/SYNC pin
are ignored during normal operation.
DCM Mode Operation
DCM mode of operation features constant frequency
operation down to lighter loads than PFM mode, by not
skipping pulses but only disabling negative inductor
current at light loads. DCM operation offers efficiency
performance that lies between PWM and PFM modes
at light loads. The output-voltage ripple in DCM mode is
comparable to PWM mode and relatively lower compared
to PFM mode at light loads.
The internal oscillator of the MAX17576 can be synchronized
to an external clock signal on the MODE/SYNC pin.
The external synchronization clock frequency must be
between 1.1 x f
and 1.4 x f , where f
is the fre-
SW
SW
SW
quency programmed by the RT resistor. When an external
clock is applied to MODE/SYNC pin, the internal oscilla-
tor frequency changes to external clock frequency (from
original frequency based on RT setting) after detecting 16
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
where R is in kΩ and f
is in kHz. Leaving the RT pin
Linear Regulator (V
The MAX17576 has two internal LDO (Low Dropout)
regulators which powers V . One LDO is powered from
input supply (IN) (INLDO) and the other LDO is powered
from EXTVCC (EXTVCC LDO). Only one of the two
LDOs is in operation at a time, depending on the volt-
age levels present at EXTVCC pin. If EXTVCC voltage
and EXTVCC)
RT
SW
CC
open causes the device to operate at the default switching
frequency of 500kHz. See Table 1 for RT resistor values
for a few common switching frequencies.
CC
Operating Input Voltage Range
The minimum and maximum operating input voltages for
a given output voltage should be calculated as follows:
is greater than
V
(4.7V typ), V
is powered
EXTVCC
CC
from EXTVCC. If EXTVCC is lower than V
is powered from input supply (IN). Powering V
EXTVCC increases efficiency at higher input voltages.
EXTVCC voltage should not exceed 24V.
, V
from
EXTVCC CC
V
+ I
× R
+R
DCR(MAX) DS_ONL(MAX)
(
)
)
(
OUT OUT(MAX)
CC
V
=
IN(MIN)
1− f
× t
(
)
SW(MAX)
OFF_MIN(MAX)
+ I
(
× R
− R
(
)
)
OUT(MAX)
DS_ONH(MAX)
DS_ONL(MAX)
Typical V
output voltage is 5V. Bypass V
to GND
CC
CC
V
OUT
with a 2.2μF ceramic capacitor. V
powers the inter-
CC
V
=
IN(MAX)
f
× t
ON_MIN(MAX)
nal blocks and the low-side MOSFET driver and re-
charges the external bootstrap capacitor. Both INLDO
and EXTVCC LDO can source up to 40mA for bias
requirements. The MAX17576 employs an undervoltage
lockout circuit that forces both the regulators off when
SW(MAX)
where:
V
= Steady-state output voltage
OUT
I
R
= Maximum load current
OUT(MAX)
V
CC
falls below V
. The regulators can be immedi-
CC-UVF
= Worst-case DC resistance of the inductor
DCR(MAX)
ately enabled again when V
goes above V
. The
CC
CC-UVR
f
t
= Maximum switching frequency
SW(MAX)
400mV UVLO hysteresis prevents chattering on power-
up/power-down.
= Worst-case minimum switch off-time
= Worst-case minimum switch on-time
= Worst-case on-state resistances and
OFF_MIN(MAX)
(160ns)
t
(80ns)
R
Add a local bypassing capacitor of 0.1μF on the EXTVCC
pin to SGND. Also, add a 4.7Ω resistor from the buck con-
verter output node to the EXTVCC pin to limit V
ON_MIN(MAX)
bypass
DS_ONH(MAX)
CC
high-side internal MOSFET
= Worst-case on-state resistances and
low-side external MOSFET
capacitor discharge current and to protect the EXTVCC
pin from reaching its absolute maximum rating (-0.3V)
during output short-circuit condition. In applications where
the buck converter output is connected to EXTVCC pin,
if the output is shorted to ground then the transfer from
EXTVCC LDO to INLDO happens seamlessly without any
impact on the normal functionality. Connect the EXTVCC
pin to SGND when the pin is not used.
R
DS_ONL(MAX)
Table 1. Switching Frequency vs.
RT Resistor
SWITCHING FREQUENCY (kHz)
RT RESISTOR (kΩ)
500
100
OPEN
210
Switching Frequency Selection (RT)
The switching frequency of the device can be programmed
from 100kHz to 2.2MHz by using a resistor connected from
200
102
350
59
the RT pin to SGND. The switching frequency (f ) is
SW
1000
2200
19.1
8.06
related to the resistor connected at the RT pin (R ) by
RT
the following equation:
3
21×10
R
=
−1.7
RT
f
SW
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
turns on with soft-start after the junction temperature
reduces by 10°C. Carefully evaluate the total power
dissipation (see the Power Dissipation section) to avoid
unwanted triggering of the thermal shutdown protection in
normal operation.
Overcurrent Protection/Hiccup Mode
The device is provided with a robust overcurrent protec-
tion scheme that protects the device under overload and
output short-circuit conditions. A cycle-by-cycle peak
current limit turns off the high-side MOSFET whenever
the high-side switch current exceeds an internal limit of
Application Information
I
6.5A (typ). A runaway current limit on the
PEAK-LIMIT
high-side switch current at I
7.2A (typ)
Input Capacitor Selection
RUNAWAY-LIMIT
protects the device under high input voltage, short-
circuit conditions when there is insufficient output voltage
available to restore the inductor current that was built
up during the on period of the step-down converter. One
occurrence of the runaway current limit triggers a hiccup
mode. In addition, if, due to a fault condition, feedback
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
The input capacitor RMS current requirement (I
defined by the following equation:
) is
RMS
V
×( V − V
IN OUT
)
voltage drops to V
any time after soft-start is
OUT
FB-HICF
I
= I
×
OUT(MAX )
RMS
complete, and hiccup mode is triggered. In hiccup mode,
the converter is protected by suspending switching for a
hiccup timeout period of 32,768 clock cycles of half the
programmed switching frequency. Once the hiccup time-
out period expires, soft-start is attempted again. Note that
when soft-start is attempted under overload condition, if
V
IN
where, I
is the maximum load current. I
has
RMS
OUT(MAX)
a maximum value when the input voltage equals twice
the output voltage (V = 2 x V ), so I
=
RMS(MAX)
IN
OUT
I
/2. Choose an input capacitor that exhibits less
OUT(MAX)
feedback voltage does not exceed V
, the device
FB-HICF
than +10°C temperature rise at the RMS input current for
optimal long-term reliability. Use low-ESR ceramic capacitors with
high-ripple-current capability at the input. X7R capacitors
are recommended in industrial applications for their
temperature stability. Calculate the input capacitance
using the following equation:
switches at half the programmed switching frequency for
the time duration of the programmed soft-start time and
1024 clock cycles. Hiccup mode of operation ensures low
power dissipation under output short-circuit conditions.
RESET Output
The device includes a RESET comparator to monitor
the status of the output voltage. The open-drain RESET
output requires an external pullup resistor. RESET goes
high (high impedance) 1024 switching cycles after the
I
×D×(1− D)
OUT(MAX)
C
=
IN
η× f
× ∆V
IN
SW
where D = V
/V is the duty ratio of the converter,
OUT IN
regulator output increases above V
(95% typ) of
FB-OKR
f
is the switching frequency, ΔV is the allowable input
SW
IN
the designed nominal regulated voltage. RESET goes
low when the regulator output voltage drops to below
voltage ripple, and η is the efficiency.
In applications where the source is located distant from
the device input, an electrolytic capacitor should be added
in parallel to the ceramic capacitor to provide necessary
damping for potential oscillations caused by the inductance
of the longer input power path and input ceramic capacitor.
V
(92% typ) of the set nominal output regulated
FB-OKF
voltage. RESET also goes low during thermal shutdown
or when the EN/UVLO pin goes below V
.
ENF
Prebiased Output
When the MAX17576 starts into a prebiased output, both
the high-side and the low-side switches are turned off so
that the converter does not sink current from the output.
High-side and low-side switches do not start switching
until the PWM comparator commands the first PWM
pulse, at which point switching commences. The output
voltage is then smoothly ramped up to the target value in
alignment with the internal reference.
Inductor Selection
Three key inductor parameters must be specified for
operation with the device: inductance value (L), inductor
saturation current (I
) and DC resistance (R
SAT
). The
DCR
switching frequency and output voltage determine the
inductor value as follows:
0.6× V
OUT
L =
Thermal Shutdown Protection
f
SW
Thermal shutdown protection limits total power dissipation in
the device. When the junction temperature of the device
exceeds +165°C, an on-chip thermal sensor shuts down
the device, allowing the device to cool. The MAX17576
Where V
and f
are nominal values and f
is in
OUT
SW
SW
Hz. Select an inductor whose value is nearest to the value
calculated by the previous formula.
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Select a low-loss inductor closest to the calculated value
with acceptable dimensions and having the lowest possible
Setting the Input Undervoltage-Lockout Level
The device offers an adjustable input undervoltage-lockout
level. Set the voltage at which the device turns on with
a resistive voltage-divider connected from IN to SGND.
Connect the center node of the divider to EN/UVLO. (see
Figure 1) Choose R1 to be 3.3MΩ and then calculate R2
as follows:
DC resistance. The saturation current rating (I
) of the
SAT
inductor must be high enough to ensure that saturation
can occur only above the peak current-limit value of I
PEAK-
6.5A (typ).
LIMIT
Output Capacitor Selection
X7R ceramic output capacitors are preferred due to their
stability over temperature in industrial applications. The
output capacitors are usually sized to support a step load
of 50% of the maximum output current in the application,
so the output voltage deviation is contained to 3% of the
output voltage change. The minimum required output
capacitance can be calculated as follows:
R1×1.215
R2 =
( V
−1.215)
INU
where V
is the voltage at which the device is required
INU
to turn on. Ensure that V
is higher than 0.8 x V
to
INU
OUT
avoid hiccup during slow power-up (slower than soft-start)
and power-down. If the EN/UVLO pin is driven from an
external signal source, a series resistance of minimum
1kΩ is recommended to be placed between the output pin
of signal source and the EN/UVLO pin to reduce voltage
ringing on the line.
ISTEP × tRESPONSE
1
2
C
=
×
OUT
∆VOUT
0.35
tRESPONSE
≅
fC
Loop Compensation
The device is internally loop compensated. However, if
the switching frequency is less than 500kHz, connect a
0402 capacitor C12 between the CF pin and the FB pin.
where I
is the load current step, t
is the
RESPONSE
is the allowable
STEP
response time of the controller, ΔV
output-voltage deviation, f is the target closed-loop
OUT
C
crossover frequency, and f
is the switching frequency.
Use Table 2 to select the value of C12.
SW
Select f to be 1/9th of f
if the switching frequency is
C
SW
less than or equal to 500kHz. If the switching frequency
Table 2. C12 Capacitor Value at Various
Switching Frequencies
is more than 500kHz, select f to be 55kHz. Actual derat-
C
ing of ceramic capacitors with DC bias voltage must be
considered while selecting the output capacitor. Derating
curves are available from all major ceramic capacitor
manufacturers.
SWITCHING FREQUENCY RANGE (kHz)
C12 (pF)
3.9
100–150
151–200
201–300
301–2200
2.2
Soft-Start Capacitor Selection
1
The device implements adjustable soft-start operation to
reduce inrush current. A capacitor connected from the SS
pin to SGND programs the soft-start time. The selected
OPEN
output capacitance (C
) and the output voltage (V
)
SEL
OUT
determine the minimum required soft-start capacitor as
follows:
IN
R1
−6
C
≥ 28×10 × C
× V
SEL OUT
SS
EN/UVLO
The soft-start time (t ) is related to the capacitor connected
SS
at SS (C ) by the following equation:
SS
R2
C
SS
t
=
SS
−6
5.55×10
For example, to program a 1ms soft-start time, a 5.6nF
capacitor should be connected from the SS pin to GND.
Figure 1. Setting the Input Undervoltage Lockout
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
The junction temperature of the device can be estimated
Adjusting Output Voltage
Set the output voltage with a resistive voltage-divider connected
from the positive terminal of the output capacitor (V
at any given maximum ambient temperature (T
from the following equation:
)
A_MAX
)
OUT
to SGND (see Figure 2). Connect the center node of
the divider to the FB pin. Use the following procedure to
choose the resistive voltage-divider values:
T
= T
+ θ ×P
A_MAX JA LOSS
(
)
J_MAX
If the application has a thermal-management system that
ensures that the exposed pad of the device is maintained
Calculate resistor R6 from the output to the FB pin as
follows:
at a given temperature (T
sinks, then the junction temperature of the device can be
estimated at any given maximum ambient temperature as:
) by using proper heat
EP_MAX
3
216×10
R6 =
f
× C
OUT_SEL
C
where R6 is in kΩ, crossover frequency f is in kHz,
T
= T
+ θ ×P
(
)
C
J_MAX
EP_MAX JC LOSS
C
is the actual derated capacitance of selected
OUT_SEL
output capacitor at DC-bias voltage in μF. Calculate resis-
tor R7 from the FB pin to SGND as follows:
Junction temperatures greater than +125°C degrades
operating lifetimes.
R6× 0.9
R7 =
PCB Layout Guidelines
(V
− 0.9)
All connections carrying pulsed currents must be very
short and as wide as possible. The inductance of these
connections must be kept to an absolute minimum due
to the high di/dt of the currents. Since inductance of a
current carrying loop is proportional to the area enclosed
by the loop, if the loop area is made very small,
inductance is reduced. Additionally, small-current loop
areas reduce radiated EMI.
OUT
R7 is in kΩ.
Power Dissipation
At a particular operating condition, the power losses that
lead to temperature rise of the part are estimated as follows:
1
2
P
= (P
×( −1)) − I
×R
DCR
)
LOSS
(
OUT
OUT
A ceramic input filter capacitor should be placed close
to the IN pins of the IC. This eliminates as much trace
inductance effects as possible and gives the IC a cleaner
η
P
= V
×I
OUT
OUT
OUT
Where P
is the output power, η is the efficiency of the
voltage supply. A bypass capacitor for the V
pin also
OUT
CC
converter and R
(see the Typical Operating Characteristics for more
is the DC resistance of the inductor
should be placed close to the pin to reduce effects of trace
impedance.
DCR
information on efficiency at typical operating conditions).
When routing the circuitry around the IC, the analog small-
signal ground and the power ground for switching currents
must be kept separate. They should be connected together
at a point where switching activity is at a minimum, typically the
For a typical multilayer board, the thermal performance
metrics for the package are given below:
θ
θ
= 24°C / W
= 1.8°C / W
JA
return terminal of the V
bypass capacitor. This helps
CC
keep the analog ground quiet. The ground plane should
be kept continuous/unbroken as far as possible. No trace
carrying high switching current should be placed directly
over any ground plane discontinuity.
JC
V
OUT
R6
PCB layout also affects the thermal performance of the
design. A number of thermal throughputs that connect to a
large ground plane should be provided under the exposed
pad of the part, for efficient heat dissipation.
FB
R7
For a sample layout that ensures first pass success,
refer to the MAX17576 evaluation kit layout available at
www.maximintegrated.com.
Figure 2. Adjusting Output Voltage
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Typical Application Circuits
V
IN
(6.5V–60V)
C2
C1
4.7μF
4.7μF
R3
59kΩ
EN/UVLO
IN
IN
IN
IN
BST
RT
C5
0.1μF
L1
V
OUT
MODE/SYNC
LX
LX
LX
CF
8.2μH
5V, 4A
V
CC
MAX17576
C3
22μF
C4
47μF
C6
2.2μF
C12
OPEN
SGND
R6
143kΩ
RESET
FB
PGND
PGND
PGND
EXTVCC
SS
R7
31.6kΩ
C8
5600pF
R5
4.7Ω
f
= 350kHz
SW
C9
0.1μF
L = XAL6060-822ME
C3 = 22μF/25V/X7R/1210 (MURATA GRM32ER71E226ME15)
C4 = 47μF/10V/X7R/1210 (MURATA GRM32ER71A476ME15)
C6 = 2.2μF/10V/X7R/0603 (MURATA GRM188R71A225KE15)
MODE/SYNC: 1. CONNECT TO SGND FOR PWM MODE
2. CONNECT TO V FOR DCM MODE
CC
3. LEAVE OPEN FOR PFM MODE
Figure 3. 5V Output Application Circuit
V
IN
(4.5V–60V)
C2
C1
4.7μF
4.7μF
R3
59kΩ
EN/UVLO
IN
IN
IN
IN
BST
RT
C5
0.1μF
L1
V
OUT
MODE/SYNC
LX
LX
LX
CF
5.6μH
3.3V, 4A
V
CC
MAX17576
C3
47μF
C4
47μF
C6
2.2μF
C12
R6
OPEN
SGND
100kΩ
RESET
FB
EXTVCC
PGND
PGND
PGND
R7
SS
37.4kΩ
C8
5600pF
f
= 350kHz
SW
L = XAL6060-562ME
C3 = C4 = 47μF/10V/X7R/1210 (MURATA GRM32ER71A476ME15)
C6 = 2.2μF/10V/X7R/0603 (MURATA GRM188R71A225KE15)
MODE/SYNC: 1. CONNECT TO SGND FOR PWM MODE
2. CONNECT TO V FOR DCM MODE
CC
3. LEAVE OPEN FOR PFM MODE
Figure 4. 3.3V Output Application Circuit
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Ordering Information
PART
PIN-PACKAGE
PACKAGE-SIZE
4mm x 5mm
MAX17576ATG+
MAX17576ATG+T
24-TQFN EP*
24-TQFN EP*
4mm x 5mm
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape-and-reel.
*EP = Exposed pad.
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MAX17576
4.5V to 60V, 4A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
9/18
Initial release
—
Updated General Description, Benefits and Features, Electrical Characteristics,
Pin Description, Functional Diagram, PFM Mode Operation, DCM Mode Operation,
Linear Regulator (V
and EXTVCC), Overcurrent Protection/Hiccup Mode, RESET
CC
1
9/20
1, 3–18, 21
Output, Output Capacitor Selection, Soft-Start Capacitor Selection, Setting the Input
Undervoltage-Lockout Level, and Ordering Information sections; updated TOC14–
TOC19, TOC37–TOC39, and added TOC40–TOC41
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2020 Maxim Integrated Products, Inc.
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