MAX20006 [MAXIM]
36V, 220kHz to 2.2MHz, 4A/6A/8A Fully Integrated Automotive Step-Down Converters;
| 型号： | MAX20006 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 36V, 220kHz to 2.2MHz, 4A/6A/8A Fully Integrated Automotive Step-Down Converters |
| 文件： | 总20页 (文件大小：757K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
General Description
Benefits and Features
● Multiple Functions for Small Size
The MAX20004/MAX20006/MAX20008 are small, synchro-
nous, automotive buck converter devices with integrated
high-side and low-side MOSFETs. The device family can
deliver up to 8A with input voltages from 3.5V to 36V, while
using only 25μA quiescent current at no load. Voltage qual-
ity can be monitored by observing the RESET signal. The
devices can operate in dropout by running at 98% duty
cycle, making them ideal for automotive applications.
• Operating V Range of 3.5V to 36V
IN
• 25µA Quiescent Current in Skip Mode
• Synchronous DC-DC Converter with
Integrated FETs
• 220kHz to 2.2MHz Adjustable Frequency
• Fixed 5ms Internal Soft-Start
• Programmable 1V to 10V Output, or 3.3V and
5.0V Fixed-Output Options Available
• 98% Duty-Cycle Operation with Low Dropout
• RESET Output
The devices offer fixed output voltages of 5V and 3.3V,
along with the ability to program the output voltage between
1V and 10V. Frequency is resistor programmable from
220kHz to 2.2MHz. The devices offer a forced fixed-fre-
quency PWM mode (FPWM) and skip mode with ultra-low
quiescent current. The devices can be factory programmed
to enable spread-spectrum switching to reduce EMI.
● High Precision
• ±2% Output-Voltage Accuracy
• Good Load-Transient Performance
● Robust for the Automotive Environment
• Current-Mode, Forced-PWM and Skip Operation
• Overtemperature and Short-Circuit Protection
• 3.5mm x 3.75mm 17-Pin FC2QFN
• -40°C to +125°C Operating Temperature Range
• 40V Load-Dump Tolerant
The MAX20004/MAX20006/MAX20008 are available in a
small, 3.5mm x 3.75mm, 17-pin FC2QFN package and use
very few external components.
Applications
● Point-of-Load (PoL) Applications in Automotive
• AEC-Q100 Qualified
● Distributed DC Power Systems
● Navigation and Radio Head Units
Ordering Information appears at end of data sheet.
Typical Application Circuit
12kΩ
SUPSW
FOSC
SUP
SYNC
C
4.7µF
IN1
C
0.1µF
IN2
R
RESET
20kΩ
BIAS
EN
RESET
OUT
BST
LX
C
BST
COMP
0.1µF
L
1µH
22kΩ
1nF
4.7pF
FB
V
OUT
C
BIAS
C
BIAS
OUT
2.2µF
PGND
GND
19-100239; Rev 8; 11/19
MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
Absolute Maximum Ratings
SUP, EN, SUPSW to PGND..................................-0.3V to +40V
Output Short-Circuit Duration....................................Continuous
LX to PGND (Note 1) ........................ -0.3V to (V
+ 0.3V)
Continuous Power Dissipation (T = +70°C)
SUPSW
A
BIAS, RESET to GND..........................................-0.3V to +6.0V
17-Pin FC2QFN (derate 29.4mW/°C > 70°C) .......... 2553mW
Operating Temperature Range......................... -40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature Range................................................+300°C
Soldering Temperature (reflow).......................................+260°C
FOSC, COMP to GND............................-0.3V to (V
SYNC, FB to GND..................................-0.3V to (V
+ 0.3V)
+ 0.3V)
BIAS
BIAS
GND to PGND......................................................-0.3V to +0.3V
OUT to PGND .......................................................-0.3V to +12V
BST to LX ...............................................................-0.3V to +6V
LX Continuous RMS Current ..................................................8A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Note 1: Self-protected from transient voltages exceeding these limits in circuit under normal operation.
Package Information
17 FC2QFN
Package Code
F173A3FY+1
21-100155
90-100056
Outline Number
Land Pattern Number
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θ
)
27°C/W
2.6°C/W
JA
Junction to Case (θ
)
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the EV kit. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V
= V
= V
= 14V. T = T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C under normal
SUP
SUPSW
EN
A
J
A
conditions, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
,
SUP
Supply Voltage Range
3.5
36
V
V
SUPSW
V
,
SUP
Supply Voltage Range
Supply Current
After startup
3.0
V
V
SUPSW
V
V
= 3.3V
= 5.0V
25
30
5
32
42
10
OUT
OUT
I
Skip mode, no load
µA
SUP
Shutdown Supply Current
BIAS Regulator Voltage
I
V
V
= 0V
µA
V
SHDN
EN
= V
= 6V to 40V I
< 10mA,
SUP
SUPSW
BIAS
OUT
V
5
3
BIAS
BIAS not switched over to V
BIAS Undervoltage
Lockout
V
V
rising
2.7
3.3
V
UVBIAS
BIAS
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MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
Electrical Characteristics (continued)
(V
= V
= V
= 14V. T = T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C under normal
SUP
SUPSW
EN
A
J
A
conditions, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
BIAS Undervoltage
Lockout
V
V
falling
2.5
2.9
V
UVBIAS
BIAS
Thermal-Shutdown
Temperature
T
T rising
175
15
°C
°C
SHDN
J
Thermal-Shutdown
Hysteresis
T
HYST
OUTPUT VOLTAGE
PWM-Mode Output
Voltage (Note 3)
V
V
V = 6V to 28V
4.9
4.9
5
5
5.1
5.15
3.37
3.4
V
V
V
OUT_5V
SUP = SUPSW
Skip-Mode Output Voltage
(Note 4)
V
Skip mode, no load, FB = BIAS
= 6V to 28V
SKIP_5V
PWM-Mode Output
Voltage
V
V
V
3.23
3.23
3.3
OUT_3.3V
SUP = SUPSW
Skip-Mode Output Voltage
(Note 4)
V
Skip mode, no load, FB = BIAS
3.3
0.6
V
SKIP_3.3V
V
= V
, 30mA < I
< 6A, PWM mode,
FB
BIAS
LOAD
Load Regulation
LN
LD
%
REG
5V
Line Regulation
V
= V
, 6V < V
< 36V, PWM mode
0.02
1.5
0.1
7
%/V
mA
µA
REG
FB
BIAS
SUPSW
BST Input Current
BST Input Current
I
High-side MOSFET on, V
- V = 5V
LX
BST_ON
BST
IBST_OFF High-side MOSFET off, V
- V = 5V
LX
BST
MAX20004 (4A)
5.25
7.5
8.75
12.5
17.5
LX Current Limit
I
MAX20006 (6A)
MAX20008 (8A)
10
A
LX
10.5
14
LX Rise Time (Note 4)
t
2
ns
%
LX_TR
Spread Spectrum
SS
Spread spectrum enabled
= 5V, I = 2A
±3
High-Side Switch
On-Resistance
R
HS
V
38
1
76
5
mΩ
µA
BIAS
LX
High-side MOSFET off, V
= 36V,
= 36V,
SUPSW
High-Side Switch Leakage
I
HS_LKG
V
= 0V, T = +25°C
A
LX
Low-Side Switch
On-Resistance
R
V
= 5V, I = 2A
18
36
mΩ
LS
BIAS
LX
Low-side MOSFET off, V
= 36V, T = +25°C
SUPSW
Low-Side Switch Leakage
FB Input Current
I
1
5
µA
nA
V
LS_LKG
V
LX
A
I
T
= +25°C
30
100
1.01
FB
A
FB connected to an external resistive divider,
6V < V < 36V
FB Regulation Voltage
V
FB
0.99
500
1.00
SUPSW
Transconductance
(from FB to COMP)
g
V
= 1V, V = 5V
BIAS
780
75
1000
µS
ns
m
FB
Minimum On-Time
(Note 4)
t
Load 500mA (Note 4)
ON_MIN
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MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
Electrical Characteristics (continued)
(V
= V
= V
= 14V. T = T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C under normal
SUP
SUPSW
EN
A
J
A
conditions, unless otherwise noted.) (Note 2)
PARAMETER
Maximum Duty Cycle
Oscillator Frequency
Oscillator Frequency
Soft-Start Time
SYMBOL
DC
CONDITIONS
MIN
97
TYP
98
MAX
UNITS
%
MAX
f
f
R
R
= 73.2kΩ
360
2.0
400
2.2
5
440
2.4
kHz
MHz
ms
SW1
SW2
FOSC
= 12kΩ
FOSC
t
SS
EN, SYNC
External Input Clock
Frequency
R
= 12kΩ (Note 5)
1.8
1.4
2.6
MHz
FOSC
SYNC High Threshold
SYNC Low Threshold
SYNC Leakage Current
EN High Threshold
EN Low Threshold
EN Hysteresis
V
V
V
SYNC_HI
V
0.4
1
SYNC_LO
I
T
= +25°C
0.1
µA
V
SYNC
A
A
V
2.4
EN_HI
V
0.6
2
V
EN_LO
V
0.2
0.1
V
EN_HYS
EN Leakage Current
I
T
= +25°C
µA
EN
RESET
UV Threshold
UV
Falling
89
91
3
93
%
%
ACC
UV Hysteresis
Hold Time (Note 6)
UV Debounce Time
OV Protection Threshold
OV Protection Threshold
Leakage Current
t
(Note 6)
0.2
25
ms
µs
%
HOLD1
t
DEB
OVP
Rising
Falling
104
107
105
110
THR
THF
OVP
%
I
V
in regulation, T = +25°C
A
1
µA
V
RST_LKG
OUT
Output Low Level
V
I
= 5mA
0.4
ROL
SINK
Note 2: All units are 100% production tested at T = +25˚C. All temperature limits are guaranteed by design.
A
Note 3: Device not in dropout condition.
Note 4: Guaranteed by design. Not production tested.
Note 5: Contact factory for SYNC frequency outside the specified range.
Note 6: Contact factory for additional options.
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MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
Typical Operating Characteristics
(V
= V
= 14V, V
= 14V, V
= 5V, V
= 0V, R
= 12kΩ, T = +25°C, unless otherwise noted.)
SUP
SUPSW
EN
OUT
FSYNC
FOSC
A
EFFICIENCY vs. LOAD CURRENT
EFFICIENCY vs. LOAD CURRENT
toc02
toc01
100
100
90
80
90
80
70
60
50
40
30
20
10
0
70
SKIP MODE
PWM MODE
SKIP MODE
60
PWM MODE
50
40
30
20
V
V
f
= 12V
V
V
f
= 12V
= 5V
= 400kHz
IN
IN
= 3.3V
OUT
10
OUT
= 400kHz
SW
SW
0
0.001
0.01
0.1
LOAD CURRENT (A)
1
10
0.001
0.01
0.1
LOAD CURRENT (A)
1
10
EFFICIENCY vs. LOAD CURRENT
EFFICIENCY vs. LOAD CURRENT
toc04
toc03
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
SKIP MODE
SKIP MODE
PWM MODE
PWM MODE
V
V
f
= 12V
= 5V
= 2.2MHz
V
V
f
= 12V
IN
IN
= 3.3V
OUT
OUT
= 2.2MHz
SW
SW
0.001
0.01
0.1
LOAD CURRENT (A)
1
10
0.001
0.01
0.1
LOAD CURRENT (A)
1
10
NO LOAD SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SHUTDOWN CURRENT vs. SUPPLY VOLTAGE
toc05
toc06
10
9
8
7
6
5
4
3
2
1
0
35
30
25
20
15
10
5
VEN = 0V
V
f
= 3.3V
= 2.2MHz
OUT
SW
SKIP MODE
0
6
9
12 15 18 21 24 27 30 33 36
SUPPLY VOLTAGE (V)
6
9
12 15 18 21 24 27 30 33 36
SUPPLY VOLTAGE (V)
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MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
Typical Operating Characteristics
(V
= V
= 14V, V
= 14V, V
= 5V, V
= 0V, R
= 12kΩ, T = +25°C, unless otherwise noted.)
SUP
SUPSW
EN
OUT
FSYNC
FOSC
A
SWITCHING FREQUENCY vs. RFOSC
SYNC FUNCTION
toc07
toc08
2500
2250
2000
1750
1500
1250
1000
750
5V/div
1V/div
V
LX
V
SYNC
500
250
0
10
30
50
70
90
110 130 150
200ns/div
R
(kΩ)
OSC
VBIAS vs. VSUP
DROPOUT VOLTAGE vs. IOUT
toc09
toc10
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
V
= 95% of V
SET
OUT
IOUT = 0.1A
VOUT = 3.3V
fSW= 2.2MHz
L = COILCRAFT XAL6030-102
V
= 3.3V
SET
IOUT = 6A
V
= 5V
SET
0
1
2
3
4
5
6
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
VSUP (V)
I
(A)
OUT
LOAD REGULATION
LOAD REGULATION
toc11
toc12
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
V
= 14V
VIN = 14V
SKIP MODE
IN
PWM MODE
400kHz
400kHz
2.2MHz
2.2MHz
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
IOUT (A)
I
(A)
OUT
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MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
Typical Operating Characteristics
(V
= V
= 14V, V
= 14V, V
= 5V, V
= 0V, R
= 12kΩ, T = +25°C, unless otherwise noted.)
SUP
SUPSW
EN
OUT
FSYNC
FOSC
A
ENABLE STARTUP BEHAVIOR
VOUT vs. VIN
toc14
toc13
5.05
5.04
5.03
5.02
5.01
5.00
4.99
V
= 14V
IN
PWM MODE
= 0A
I
5V/div
2V/div
LOAD
V
EN
400kHz
V
OUT
2A/div
5V/div
I
OUT
2.2MHz
V
RESET
4ms/div
6
12
18
24
30
36
V
(V)
IN
SHORT CIRCUIT AND RECOVERY
VIN STARTUP BEHAVIOR
toc15
toc16
10V/div
2V/div
2V/div
V
IN
V
OUT
10V/div
V
LX
V
OUT
2A/div
5V/div
I
OUT
I
OUT
20A/div
V
RESET
EN = V
IN
4ms/div
20ms/div
TJ_RISE vs. IOUT
TJ_RISE vs. IOUT
toc18
toc17
80
70
60
50
40
30
20
10
0
140
130
120
110
100
90
fSW = 400kHz
VIN = 14V
PWM MODE
TA = 25°C
f
V
= 2.2MHz
= 14V
SW
IN
PWM MODE
= 25°C
T
A
V
= 5V
OUT
80
70
V
= 3.3V
OUT
60
50
40
30
V
= 3.3V
V
= 5V
5
OUT
5
OUT
20
10
0
1
2
3
4
I
6
7
8
1
2
3
4
I
6
7
8
(A)
OUT
(A)
OUT
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MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
Pin Configuration
TOP VIEW
17
16
15
14
13
12
11
10
EN
OUT
RESET
BST
1
2
SUP
3
9
8
7
SUPSW
PGND
PGND
4
5
PGND
PGND
6
FC2QFN
3.5mm x 3.75mm
Pin Description
PIN
NAME
FUNCTION
Switching Regulator Output. OUT also provides power to the internal circuitry under certain conditions (see the
Linear Regulator Output (BIAS) section for details).
1
OUT
2
3
RESET
Open-Drain, Active-Low RESET Output. To obtain a logic signal, pullup RESET with an external resistor.
BST
High-Side Driver Supply. Connect a 0.1μF capacitor between LX and BST for proper operation.
4, 5,
7, 8
PGND
LX
Power Ground. Connect all PGND pins together.
6
Inductor Connection. Connect LX to the switched side of the inductor.
Internal High-Side Switch Supply Input. SUPSW provides power to the internal switch. Bypass SUPSW to
9
SUPSW PGND with 0.1μF and 4.7μF ceramic capacitors. Place the 0.1μF capacitor as close as possible to the SUPSW
and PGND pins, followed by the 4.7μF capacitor.
Voltage Supply Input. SUP supplies the internal linear regulator. Connect SUP directly to SUPSW as close as
possible to the IC. SUP and SUPSW are connected together internally.
10
11
SUP
SUP Voltage-Compatible Enable Input. Drive EN low to disable the device. Drive EN high to enable the device.
EN
For a safe startup, ensure that V
> 7.5V when EN is toggled high.
SUP
Connect SYNC to GND or leave unconnected to enable skip-mode operation under light loads. Connect SYNC
to BIAS or to an external clock to enable fixed-frequency forced-PWM-mode operation. When driving SYNC
externally, do not exceed the BIAS or OUT voltage.
12
SYNC
Linear Regulator Output. BIAS supplies the internal circuitry. Bypass with a minimum 2.2 µF ceramic capacitor
13
14
BIAS
GND
to ground. The BIAS pin can transition from 5V to V
after startup.
OUT
Analog Ground
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MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
Pin Description (continued)
PIN
NAME
FUNCTION
Error-Amplifier Output. Connect an RC network from COMP to GND for stable operation. See the
Compensation Network section for more details.
15
COMP
Feedback Input. Connect an external resistive divider from OUT to FB and GND to set the output voltage.
Connect FB to BIAS to set the output voltage to 5V or 3.3V.
16
17
FB
Resistor-Programmable Switching Frequency Setting Control Input. Connect a resistor from FOSC to GND to
set the switching frequency.
FOSC
Internal Block Diagram
CURRENT-SENSE
AMP
MAX20004
SUPSW
MAX20006
MAX20008
SKIP CURRENT
COMP
BST
LX
CLK
PEAK CURRENT
COMP
RAMP
GENERATOR
LX
CONTROL LOGIC
BIAS
∑
PWM
COMP
PGND
COMP
VREF
ERROR
AMP
FPWM CLK
SOFT-START
GENERATOR
PGOOD
COMP
ZX
COMP
PGND
OUT
FB
POK
FEEDBACK
SELECT
SYNC
FOSC
SUP
CLK
OTP
TRIMBITS
OSC
POK
BIAS LDO
FPWM
BIAS
VOLTAGE
REFERENCE
V
REF
RESET
MAIN
CONTROL
LOGIC
EN
GND
SEL
GND
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MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
The input voltage at which the device enters dropout can
be approximated as:
Detailed Description
The MAX20004/MAX20006/MAX2008 are 4A, 6A, and
8A current-mode step-down converters, respectively,
with integrated high-side and low-side MOSFETs. The
low-side MOSFET enables fixed-frequency FPWM opera-
tion in light-load applications. The devices operate with
3.5V to 36V input voltages, while using only 25μA (typ)
quiescent current at no load. The switching frequency
is resistor programmable from 220kHz to 2.2MHz and
can be synchronized to an external clock. The devices’
output voltage is available as fixed 5V or 3.3V, or adjust-
able between 1V and 10V. The wide input voltage range,
along with the ability to operate at 99% duty cycle during
undervoltage transients, make these devices ideal for
automotive applications.
VOUT
VSUP
=
+ IOUT ×RHS
0.98
where R
is the high-side switch on-resistance, which
HS
should also include the inductor DC resistance for better
accuracy.
Linear Regulator Output (BIAS)
The devices include a 5V linear regulator (V
) that
BIAS
provides power to the internal circuit blocks. Connect
a 2.2μF ceramic capacitor from BIAS to GND. Under
certain conditions, the BIAS regulator turns off and the
BIAS pin switches to OUT (i.e., switches over) after
startup to increase efficiency. For IC versions that are
factory trimmed for 3.3V fixed output, BIAS switches to
OUT under light load conditions in skip mode only. For IC
versions that are factory trimmed for 5V fixed output, the
BIAS pin switches to OUT after startup regardless of load
or skip/PWM mode. In any case, BIAS only switches over
if OUT is between 2.8V and 5.6V. In summary, BIAS can
transition from 5V to VOUT after startup depending on
load, mode and IC version.
In light-load applications, a logic input (SYNC) allows
the devices to operate either in skip mode for reduced
current consumption, or fixed-frequency FPWM mode
to eliminate frequency variation and help minimize EMI.
Protection features include cycle-by-cycle current limit,
and thermal shutdown with automatic recovery.
Thermal Considerations
The devices are available in 4A, 6A, or 8A versions; how-
ever, the average output-current capability is dependent on
several factors. Some of the key factors include the maxi-
Soft-Start
mum ambient temperature (T
), switching frequency
The devices include a fixed, internal soft-start. Soft-start
limits startup inrush current by forcing the output voltage
to ramp up towards its regulation point.
A(MAX)
(f ), and the number of layers and the size of the PCB.
SW
See the Typical Operating Characteristics for a guideline.
Wide Input Voltage Range
The devices include two separate supply inputs (SUP and
SUPSW) specified for a wide 3.5V to 36V input voltage
Reset Output (RESET)
The devices feature an open-drain reset output (RESET).
RESET asserts when V
drops below the specified
OUT
range. V
provides power to the device and V
falling threshold. RESET deasserts when V
rises
SUP
SUPSW
OUT
provides power to the internal switch. When the device is
operating with a 3.5V input supply, conditions such as cold
crank can cause the voltage at the SUP and SUPSW pins
to drop below the programmed output voltage. Under such
conditions, the devices operate in a high duty-cycle mode
to facilitate minimum dropout from input to output.
above the specified rising threshold after the specified
hold time. Connect RESET to the output or I/O voltage
of choice (within pin voltage limits) with a pullup resistor.
Synchronization Input (SYNC)
SYNC is a logic-level input used for operating-mode
selection and frequency control. Connecting SYNC to
BIAS or to an external clock enables forced fixed-frequen-
cy (FPWM) operation. Connecting SYNC to GND enables
automatic skip-mode operation for light load efficiency.
The external clock frequency at SYNC can be higher or
lower than the internal clock by 20%. If the external clock
frequency is greater than 120% of the internal clock, con-
tact the factory to verify the design. The devices synchro-
nize to the external clock in two cycles. When the external
clock signal at SYNC is absent for more than two clock
cycles, the devices use the internal clock. There is a diode
Maximum Duty-Cycle Operation
The devices have an effective maximum duty cycle of 98%
(typ). The IC continuously monitors the time between low-
side FET switching cycles in both PWM and skip modes.
Whenever the low-side FET has not switched for more than
13.5µs (typ), the low-side FET is forced on for 150ns (typ)
to refresh the BST capacitor. The input voltage at which
the device enters dropout changes depending on the input
voltage, output voltage, switching frequency, load current,
and the efficiency of the design.
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between SYNC and BIAS, so it is important when driving
SYNC with an external source that the voltage be less
than or equal to BIAS (or OUT in the case of switchover).
If this cannot be guaranteed, place a series resistor in-line
with SYNC ≥ 20kΩ to limit the input current. If EN is low,
BIAS is turned off so a voltage should not be present on
SYNC without the series resistor.
graph in the Typical Operating Characteristics section or
the following equation:
29,600
RFOSC
=
−1.48
fSW
where f
is in kHz and RFOSC is in kΩ. For example, a
SW
400kHz switching frequency is set with R
= 72.5kΩ.
System Enable (EN)
FOSC
An enable control input (EN) activates the devices from
their low-power shutdown mode. EN is compatible with
inputs from automotive battery level down to 3.5V.
Higher frequencies allow designs with lower inductor
values and less output capacitance at the expense of
reduced efficiency and higher EMI.
EN turns on the internal linear (BIAS) regulator. Once
Thermal-Shutdown Protection
V
BIAS
is above the internal lockout threshold (V
=
UVBIAS
Thermal shutdown protects the device from excessive
operating temperature. When the junction temperature
exceeds the specified threshold, an internal sensor shuts
down the internal bias regulator and the step-down con-
verter, allowing the IC to cool. The sensor turns the IC on
again after the junction temperature cools by the specified
hysteresis.
3V (typ)), the converter activates and the output voltage
ramps up with the programmed soft-start time.
A logic-low at EN shuts down the device. During shut-
down, the BIAS regulator and gate drivers turn off.
Shutdown is the lowest power state and reduces the
quiescent current to 5μA (typ). Drive EN high to bring the
device out of shutdown.
Current Limit/Short-Circuit Protection
For safe startup, ensure that V
> 7.5V when EN is
SUP
The devices feature a current limit that protects them
against short-circuit and overload conditions at the out-
put. In the event of a short-circuit or overload condition,
the high-side MOSFET remains on until the inductor
current reaches the specified LX current-limit threshold.
The converter then turns the high-side MOSFET off and
the low-side MOSFET on to allow the inductor current to
ramp down. Once the inductor current crosses below the
current-limit threshold, the converter turns on the high-
side MOSFET again. This cycle repeats until the short or
overload condition is removed.
toggled high. In all applications, BIAS capacitance guide-
lines must be followed to ensure safe operation of the IC.
Note: In all applications, BIAS must start from < 0.3V or
> 1.6V during startup.
Spread-Spectrum Option
The devices can be ordered with spread spectrum
enabled. See the Ordering Information/Selector Guide
section. When the spread spectrum is factory enabled,
the operating frequency is varied ±3% centered on FOSC.
The modulation signal is a triangular wave with a fre-
quency of 4.5kHz at 2.2MHz.
A hard short is detected when the output voltage falls
below 50% of the target while in current limit. If this
occurs, hiccup mode activates, and the output turns off
for four times the soft-start time. The output then enters
soft-start and powers back up. This repeats indefinitely
while the short circuit is present. Hiccup mode is disabled
during soft-start.
For operations at FOSC values other than 2.2MHz, the
modulation signal scales proportionally (e.g., at 400kHz,
the modulation frequency reduces by 0.4MHz/2.2MHz).
The internal spread spectrum is disabled if the devices
are synchronized to an external clock. However, the
devices do not filter the input clock on the SYNC pin and
pass any modulation (including spread spectrum) present
driving the external clock.
Overvoltage Protection
If the output voltage exceeds the OV protection rising
threshold, the high-side MOSFET turns off and the low-
side MOSFET turns on. Normal operation resumes when
Internal Oscillator (FOSC)
The switching frequency (f ) is set by a resistor
SW
the output voltage goes below the falling OV threshold.
(R
) connected from FOSC to GND. To determine
FOSC
the approximate value of RFOSC for a given fSW, use the
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Forced-PWM and Skip Modes
Applications Information
In forced-PWM (FPWM) mode, the devices switch at a
constant frequency with variable on-time. In skip mode,
the converter’s switching frequency is load-dependent.
At higher load current, the switching frequency becomes
fixed and operation is similar to PWM mode. Skip mode
helps improve efficiency in light-load applications by
allowing switching only when the output voltage falls
below a set threshold. Since the effective switching
frequency is lower in skip mode at light load, gate charge
and switching losses are lower and efficiency is increased.
Maximum Output Current
While there are device versions that supply up to 8A,
there are many factors that may limit the average output
current to less than the maximum. The devices can be
thermally limited based on the selected f , number of
SW
PCB layers, PCB size, and the maximum ambient tem-
perature. See the Typical Operating Characteristics sec-
tion for guidance on the maximum average current. For a
more precise value, the θ needs to be measured in the
JA
application environment.
Inductor Selection
Three key parameters must be considered when select-
ing an inductor: inductance value (L), inductor saturation
Setting the Output Voltage
Connect FB to BIAS for a fixed 5V or 3.3V output volt-
age. To set the output to other voltages between 1V and
10V, connect a resistive divider from output (OUT) to FB
current (I
), and DC resistance (R
SAT
). The devises
DCR
are designed to operate with the ratio of inductor peak-
to-peak AC current to DC average current (LIR) between
15% and 30% (typ). The switching frequency, input volt-
age, and output voltage then determine the inductor value
as follows:
(Figure 1). Select R
(FB to GND resistor) less than or
FB2
equal to 100kΩ. Calculate R
the following equation:
(OUT to FB resistor) with
FB1
V
OUT
R
= R
−1
FB2
FB1
V
V
− V
× V
OUT OUT
(
)
FB
SUP
L
=
MIN1
V
× f
× I × 30%
MAX
SUP
SW
where V
is the feedback regulation voltage. See the
FB
Electrical Characteristics table.
where V
and V
are typical values (so that effi-
OUT
SUP
Add a capacitor, C , as shown to compensate the pole
ciency is optimum for typical conditions) and IMAX is 4A
FB1
formed by the divider resistance and FB pin capacitance
for MAX20004, 6A for MAX20006, and 8A for MAX20008,
as follows:
and f
is the switching frequency set by R
Note
SW
FOSC.
RFB2
that IMAX is the maximum rated output current for the
device, not the maximum load current in the application.
CFB1 = 10pf ×
RFB1
The next equation ensures that the internal compensating
slope is greater than 50% of the inductor current down slope:
Note: Applications that use a resistor divider to set
output voltages below 4.5V should use IC versions
that are factory trimmed for 3.3V fixed output voltage
to ensure full output current capability.
m2
m ≥
2
where m is the internal compensating slope and m2 is the
sensed inductor current down-slope as follows:
VOUT
V
OUT
m2 =
×RCS
L
where R
and 0.21 for MAX20008.
is 0.38 for MAX20004, 0.28 for MAX20006,
CS
R
R
FB1
FB2
C
FB1
FB
V
fSW
m = 1.35
×
µs 2.2MHz
Solving for L and using a 1.3 multiplier to account for
tolerances in the system:
R
CS
L
= V
×
OUT
×1.3
MIN2
2×m
Figure 1. Adjustable Output-Voltage Setting
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To satisfy both L
larger of the two as follows:
and L
, L must be set to the
MIN2 MIN
input capacitance and ESR required for a specified input
voltage ripple using the following equations:
MIN1
∆V
ESR
L
= max L
, L
MIN1 MIN2
(
)
ESRIN
=
MIN
∆IL
2
IOUT
+
The maximum nominal inductor value recommended is 2
times the chosen value from the above formula:
where:
and:
V
− VOUT × V
OUT
(
)
SUP
∆IL
=
LMAX = 2×LMIN
VSUP × fSW ×L
Select a nominal inductor value based on the following
formula:
IOUT ×D 1− D
(
)
CIN
=
LMIN < LNOM < LMAX
∆VQ × fSW
The best choice of inductor is usually the standard induc-
V
tor value closest to L
.
NOM
OUT
D =
VSUPSW
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input due to high speed switching.
where:
I
is the maximum output current and D is the duty
OUT
cycle.
Place a 0.1μF capacitor as close as possible to the
SUPSW and PGND pins, followed by a 4.7μF (or larger)
ceramic capacitor. A bulk capacitor with higher ESR
(such as an electrolytic capacitor) is normally required as
well to lower the Q of the front-end circuit and provide the
remaining capacitance needed to minimize input voltage
ripple.
Output Capacitor
The output filter capacitor must have enough capacitance
and sufficiently low ESR to meet output-ripple require-
ments. In addition, the output capacitance must be high
enough to maintain the output voltage within specification
while the control loop responds to load changes.
The input capacitor RMS current requirement (I
defined by the following equation:
) is
When using high-capacitance, low-ESR capacitors, the
filter capacitor’s ESR dominates the output-voltage ripple,
so the size of the output capacitor depends largely on the
maximum ESR allowed to meet the output-voltage ripple
specifications as follows:
RMS
VOUT × V
− VOUT
(
)
SUP
IRMS = ILOAD(MAX)
×
VSUP
V
= ESR× ∆I
L
RIPPLE(P−P)
I
has a maximum value when the input voltage
RMS
equals twice the output voltage:
When using low-ESR (e.g. ceramic) output capacitors,
size is usually determined by the capacitance required
to maintain the output voltage within specification during
load transients and can be estimated as follows:
VSUP = 2× VOUT
therefore:
∆I
I
LOAD MAX
COUT =
(
)
I
=
∆V × 2π × fC
RMS
2
where ∆I is the load change, ∆V is the allowed voltage
droop, and f is the loop crossover frequency, which can
Choose an input capacitor that exhibits less than +10°C
self-heating temperature rise at the RMS input current for
optimal long-term reliability.
C
be assumed to be the lesser of f /10 or 100kHz. Any
SW
calculations involving C
should consider capacitance
OUT
The input-voltage ripple is composed of ∆V (caused by
Q
tolerance, temperature, and voltage derating.
the capacitor discharge) and ∆V
(caused by the ESR
ESR
of the capacitor). Use low-ESR ceramic capacitors with
high ripple-current capability at the input. Calculate the
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V
V
V
V
OUT
REF
ERR
COMP
+
C(s)
M(s)
-
V
FB
F(s)
Figure 2. Control System
A simplified condition for stability is that the denominator
of the transfer function never equals zero. Accordingly,
the loop transfer function should never equal -1, which
correspondingly means that the phase must not equal
-180 degrees when the magnitude equals 1. In addition,
the loop gain should be much less than zero when the
phase equals -180 degrees. The frequency at which the
magnitude of the loop gain equals 1 (or 0dB) is defined as
Compensation Network
The devices use a transconductance amplifier for external
frequency compensation. The compensation network in
conjunction with the output capacitance primarily deter-
mine the loop stability and response. The inductor and the
output capacitor are chosen based on performance, size,
and cost. The compensation network is used to optimize
the loop stability and response.
the crossover frequency (f ). The difference between the
c
The converter uses a peak current mode control scheme
that regulates the output voltage by forcing the required
peak current through the external inductor. The devices
use the voltage drop across the high-side MOSFET to
sense inductor current. Current-mode control eliminates
the double pole in the feedback loop caused by the induc-
tor and output capacitor, resulting in a smaller phase shift
and requiring less elaborate error-amplifier compensation
than voltage-mode control.
loop phase at the crossover frequency and -180 degrees
is defined as the phase margin. The phase margin rep-
resents the additional loop phase lag that must occur at
the crossover frequency for the system to be unstable.
In addition to stability, phase margin is also related to
the transient response of the system. Insufficient phase
margin causes overshoot and ringing, whereas excessive
phase margin causes slow response.
The goal of the system is to have a high crossover fre-
quency, so there is adequate gain to regulate against load
transients and other variations in the relevant frequency
range, while maintaining adequate phase margin to guard
against instability, overshoot, and ringing. In practice,
these are fundamentally conflicting criteria that must be
managed along with other design goals. According to
sampling theory, the crossover frequency cannot exceed
one half the switching frequency. In practice, noise and
phase margin considerations limit crossover frequency to
below one tenth the switching frequency with a practical
limit of approximately 100kHz.
The final control system can be modeled according to
Figure 2 from which the following transfer function is
derived:
VOUT(s)
VREF
C(s)M(s)
=
1+ F(s)C(s)M(s)
where M(s), C(s) and F(s) are the modulator, compensator
and feedback transfer functions, respectively, V is the
OUT
regulated output voltage and V
is the internal voltage
REF
reference. The product of the modulator, compensator and
feedback transfer functions is typically referred to as the
loop transfer function.
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The modulator control (COMP) to output transfer function
of a current-mode buck regulator can be approximated
as follows:
V
OUT
s
ωz_esr
1+
VOUT
s
( )
ROUT
RCS
=
×
g
m
2
VCOMP
s
( )
s
s
s
COMP
1+
1+
+
2
ωp_load
ωnQ
ωn
V
REF
The first term is the DC gain, which is the quotient of the
equivalent load resistance (R ) and the current-sense
R
C
C
C
C
F
OUT
gain (R ). The numerator is the zero due to the output
CS
capacitance (C
) and its equivalent series resistance
OUT
(R
), which occurs at the following frequency:
ESR
1
fz_esr =
2π ×RESR × COUT
Figure 3. Compensation Network
The first term in the denominator is the pole due to the
load resistance and output capacitance, and occurs at the
following frequency:
where G and R (1.5MΩ typ) are the transconductance
EA
EA
1
and output resistance of the error amplifier, respectively, and
the frequency of the poles and zeros are approximately as
follows:
fpload =
2π ×ROUT × COUT
The last term in the denominator is the sampling double
pole, which occurs at 1/2 of the switching frequency
1
fz_comp =
2π ×RC × CC
(f /2). The sampling double pole typically occurs at
SW
1
high frequency relative to the crossover frequency and
can generally be ignored if there is adequate slope com-
pensation (i.e., low Q). In the typical application, where
the ESR is very low due to ceramic output capacitors,
the ESR zero also occurs at high frequency and can be
ignored as well. In these cases, the transfer function
simplifies to the low-frequency dominate pole model as
follows:
fp1_comp =
2π ×REA × CC
1
fp2_comp =
2π ×RC × CF
VOUT
s
( )
ROUT
RCS
1
=
×
VCOMP
s
( )
s
1+
Compensation resistor, R , primarily determines the com-
C
ωp_load
pensator gain and, thus, crossover frequency, while the
separation of the compensator zero and high-frequency
pole determine the phase margin. The high-frequency
compensator pole is used to cancel the ESR zero or, in
the case of very high ESR zero frequency, limit the band-
width for noise immunity. The low frequency compensator
pole is then placed to achieve adequate phase margin
and response, typically at the load pole frequency. The
The type 2 compensation network (Figure 3) introduces
a zero, a low-frequency pole, and a high frequency pole
according to the simplified transfer function below:
s
ωz_comp
1+
VCOMP
s
( )
s
= GEA × REA
×
VERR
s
s
( )
selection of C , therefore, becomes a tradeoff between
1+
1+
C
ωp1_comp
ωp2_comp
phase margin and response.The complete loop transfer
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function is the product of the product of the modulator,
compensator, and feedback transfer functions as follows:
Setting the compensator zero frequency equal to the load
pole frequency and solving for R yields:
C
1
1
=
VREF ROUT
2π ×RC × CC 2π ×ROUT × COUT
F(s)C(s)M(s) =
×
× GEA ×REA
VOUT RCS
s
s
1+
1+
2π × COUT ×RCS × VOUT × fC
ωz_esr
ωz_comp
RC
=
s
×
VREF × GEA
s
s
1+
1+
1+
ωp_load
ωp1_comp
ωp2_comp
The above leads to an alternative equation for C as
C
follows:
ROUT × COUT
The goal of compensation design is to reduce the loop
transfer function to an approximate single-pole system
with -20dB/decade gain slope and 90 degrees phase
margin at the crossover frequency. To achieve this, the
compensator zero is used to cancel the load pole, and
the compensator high frequency pole is used to cancel
the ESR zero. Assuming these cancellations, the loop
transfer function reduces to the following:
CC
=
RC
Finally, setting the high-frequency compensator pole
equal to the minimum of the ESR zero frequency or 1/2
the switching frequency and solving for C yields:
F
1
fSW
2
1
= Min
,
2π ×RC × CF
2π ×RESR × COUT
VREF ROUT
F(s)C(s)M(s) =
×
1
,
VOUT RCS
CF
=
fSW
2
1
1
s
2π ×RC ×Min
× GEA ×REA
×
2π ×RESR × COUT
1+
ωp1_comp
The above equation leads to the following compensation
design procedure:
To derive the compensation components, the magnitude
of the loop gain at the crossover frequency is set equal to
1) Select a crossover frequency equal to one tenth of
the switching frequency (f /10) or 100kHz, which-
ever is lower.
SW
1 and solved for C as follows (assuming the magnitude of
C
the compensator pole at the crossover frequency is >>1):
2) Calculate and select the compensation resistor, R .
VREF ROUT
C
×
× GEA ×REA
VOUT RCS
3) Calculate and select the compensation capacitor, C .
C
1
4) Calculate and select compensation capacitor C .
F
×
= 1
2π × fC ×REA × CC
(
)
5) Evaluate the gain and phase of the final loop transfer
function at the crossover frequency and adjust cross-
over frequency and/or compensation as required.
VREF ×ROUT × GEA
2π × fC × VOUT ×RCS
CC
=
6) Verify the final design with transient line/load response
testing and gain-phase measurements and adjust as
required.
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4) Use a contiguous copper GND plane on the layer
next to the IC to provide an image plane and shield
the entire circuit. GND should also be poured around
the entire circuit on the top side. Use a single GND:
do not separate or isolate PGND and GND connec-
tions with separate planes or copper areas. Ensure
that all heat-dissipating components have adequate
connections to copper for cooling. Use multiple vias
to interconnect GND planes/areas for low impedance
and maximum heat dissipation. Place vias at the GND
terminals of the IC, input/output/bypass capacitors,
and other components.
PCB Layout Guidelines
Careful PCB layout is critical for stability, low-noise/
EMI and overall performance. Use a multilayer board
whenever possible for better noise immunity and power
dissipation. See Figure 4 for the following guidelines for
good PCB layout:
1) Use the correct footprint for the IC and place as
many copper planes as possible under the IC foot-
print to ensure efficient heat transfer.
2) Place the ceramic input bypass capacitors (C and
BP
C ) as close as possible to the SUPSW and PGND
IN
pins on the same side as the IC. Use low-impedance
connections (no vias or other discontinuities) be-
5) Place the compensation network (CF, CC, RC) near
the COMP pin so that the ground connections are as
short as possible to the GND pin. Keep high frequency
signals away from these components.
tween the capacitors and IC pins. C should be
BP
located closest to the IC and should have very good
high-frequency performance (small package size,
low inductance, and high. Use flexible terminations
or other technologies instead of series capacitors
for these functions if failure modes are a concern.
This approach provides the best EMI rejection and
minimizes internal noise on the device, which can
degrade performance.
6) Place the oscillator set resistor (RF) near the FSET
pin so that the ground connection is as short as
possible to the GND pin. Keep high-frequency signals
away from this component.
7) Place the feedback resistor-divider (if used) near
the IC and route the feedback and OUT connections
away from the inductor and LX node and other noisy
signals.
3) Place the inductor (L), output capacitors (C
),
OUT
boost capacitor (C
) and BIAS capacitor (C ) on
BST
B
the same side as the IC in such a way as to minimize
the area enclosed by the current loops. Place the
inductor (L) as close as possible to the IC LX pin and
minimize the area of the LX node. Place the output
capacitors (COUT) near the inductor and the ground
side of COUT near the CIN ground connection so as
to minimize the current the loop area. Place the BIAS
capacitor (CB) next to the BIAS pin.
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CC
RC
CF
CB
RF
VIN
CBST
CBP
CIN
LX
COUT
COUT
VOUT
Figure 4. Simplified Layout Example
Maxim Integrated
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MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
Ordering Information/Selector Guide
V
MAXIMUM
OPERATING
CURRENT (A)
OUT
V
T
(ms)
SPREAD
SPECTRUM
OUT
HOLD
PART
(EXTERNAL RESISTOR-
DIVIDER) (V)
(FB TIED TO BIAS)
MAX20004AFOA/VY+
MAX20004AFOB/VY+
MAX20004AFOC/VY+
MAX20004AFOD/VY+
MAX20006AFOA/VY+
MAX20006AFOB/VY+
MAX20006AFOC/VY+
MAX20006AFOD/VY+
MAX20008AFOA/VY+
MAX20008AFOB/VY+
MAX20008AFOC/VY+
MAX20008AFOD/VY+
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
4.5–10
1–10
4
4
4
4
6
6
6
6
8
8
8
8
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
Off
Off
On
On
Off
Off
On
On
Off
Off
On
On
4.5–10
1–10
4.5–10
1–10
4.5–10
1–10
4.5–10
1–10
4.5–10
1–10
For variants with different options, contact factory.
/V Denotes an automotive-qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
Chip Information
PROCESS: BiCMOS
Maxim Integrated
│ 19
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MAX20004/MAX20006/
MAX20008
36V, 220kHz to 2.2MHz, 4A/6A/8A
Fully Integrated Automotive
Step-Down Converters
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
3/18
Initial release
—
Removed future product status from MAX20006AFOA/VY+ and
MAX20008AFOC/VY+ variants in the Ordering Information/Selector Guide table
1
2
5/18
8/18
19
Updated the Package Information table, and Reset Output (RESET), Setting
the Output Voltage, Output Capacitor, and Compensation Network sections
; reformatted the Typical Operating Characteristics charts; replaced TOC17
and TOC18; and removed future product designation from MAX2006AFOB/
VY+, MAX2006AFOB/VY+, MAX2006AFOB/VY+, MAX2006AFOB/VY+,
MAX2006AFOB/VY+, and MAX2006AFOB/VY+
2, 5–7, 10
12–16, 19
Removed future product status from MAX20004AFOA/VY+, MAX20004AFOB/
VY+, MAX20004AFOC/VY+, and MAX20004AFOD/VY+ variants in the Ordering
Information/Selector Guide table
3
4
5
11/18
1/19
1/19
19
2
Updated land pattern number in Package Information table
Updated thermal resistance values in Package Information table and added V
OUT
2, 19
(external resistor-divider) column to Ordering Information/Selector Guide table
6
2/19
Added “automotive” to product description
1–19
7
8
9/19
Updated Typical Application Circuit, Pin Description, and Detailed Description
Updated Pin Description, and Detailed Description
1, 8, 11
8, 11
11/19
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2018 Maxim Integrated Products, Inc.
│ 20
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