MAX2118UTL+ [MAXIM]
Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs;
| 型号： | MAX2118UTL+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Complete DBS Direct-Conversion Tuner ICs with Monolithic VCOs |
| 文件： | 总16页 (文件大小：264K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2433; Rev 4; 7/08
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
6/MAX218
General Description
Features
♦ Fully Integrated VCOs
The MAX2116/MAX2118 family of low-cost direct-
conversion tuner ICs are designed for use in digital
direct broadcast satellite (DBS) television applications,
professional VSAT systems, and two-way Internet
through satellite applications. These devices set the
standard for integration and performance, significantly
reducing the required RF know-how for design imple-
mentation. Uniquely architected, the MAX2116/MAX2118
simplify direct main board and tuner module designs.
♦ Supports 1Mbaud to 45Mbaud, 850MHz to
2175MHz Operation
♦ 4MHz to 33MHz Tunable LP Filters
♦ Complete Synthesizer with I2C Interface
♦ Analog RF VGA and Digital Baseband VGA
♦ Multiple I2C Addresses for Multituner
Applications
♦ Single-Ended (MAX2116) and Differential
The MAX2116/MAX2118 devices directly convert L-
band signals to baseband using a broadband I/Q
downconverter. The operating frequency range extends
from 850MHz to 2175MHz.
(MAX2118) I/Q Interface
Ordering Information
Each IC includes an LNA with gain control, I and Q
downconverting mixers, and baseband lowpass filters
gain and cutoff frequency control. Together, the RF and
baseband variable gain amplifiers provide more than
79dB of gain control range.
PART
TEMP RANGE
0°C to +85°C
0°C to +85°C
0°C to +85°C
0°C to +85°C
PIN-PACKAGE
40 TQFN-EP*
40 TQFN-EP*
40 TQFN-EP*
40 TQFN-EP*
MAX2116UTL
MAX2116UTL+
MAX2118UTL
MAX2118UTL+
The devices include fully monolithic VCOs, as well as a
complete frequency synthesizer. Additionally, an on-
chip crystal oscillator is provided along with a buffered
output for driving additional tuners and demodulators.
Synthesizer programming and device configuration are
accomplished with a 2-wire serial interface. For multi-
tuner applications, each device can be configured to
have one of eight possible 2-wire interface addresses.
*EP = Exposed paddle.
+Denotes a lead-free/RoHS-compliant package.
Pin Configuration/
Functional Diagram
Simplifying the interface to low-voltage CMOS demodu-
lators, the MAX2116/MAX2118 incorporate two 2.85V
regulated outputs for pulling up open-drain interface
connections, thus preventing noisy 3V rails from cor-
rupting the sensitive analog signal of the tuners.
40
39
38
37
36
35
34
33
32
31
The MAX2116/MAX2118 devices are the most versatile
family of DBS products available. With both single-
ended and differential baseband outputs, these
devices are compatible with virtually all QPSK/8-PSK
demodulators. The tuners are available in a very small
(6mm x 6mm) 40-pin thin QFN package.
IDC-
IDC+
VCCDIG
SCL
1
2
30
29
28
27
26
25
24
23
22
21
DC OFFSET
CORRECTION
LPF BW
CONTROL
DAC
INTERFACE LOGIC
AND CONTROL
GC2
VCCRF1
RFIN-
RFIN+
N.C.
VREG2
SDA
3
DIV2/
DIV4
4
Applications
AS1
5
DVB
MAX2118
N.C.
6
DSS (U.S.)
/N
/R
GC1
XTALOUT
CNTOUT
XTAL-
XTAL+
7
PFD
VSAT
VOLTAGE
REGULATOR
VREG1
N.C.
8
Internet Through Satellite
CP
9
PAD
10
11
12
13
14
15
16
17
18
19
20
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND...........................................................-0.3V to +5.5V
Continuous Power Dissipation (T = +85°C)
A
All Other Pins to GND.................................-0.3V to (V + 0.3V)
RFIN+ to RFIN-, XTL+ to XTL-, IDC+ to IDC-,
QDC+ to QDC- ................................................................... 2.0V
CNTOUT, XTALOUT, CPOUT, VREG1/2,
I/QOUT to GND Short-Circuit Duration.................................10s
40-Pin Thin QFN (derate 23.3mW/°C above +85°C) .... 1.86W
Operating Temperature Range ..............................0°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ............................-65°C to +160°C
Soldering Temperature (10s) ..........................................+300°C
CC
Continuous Current (any pin other than V
or GND) .......10mA
CC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +4.75V to +5.25V, V
= 0V, V = +0.75V; no AC signal applied, default register settings, T = 0°C to +85°C, unless other-
GC1 A
GND
wise noted. Typical values are at V = +5V, T = +25°C, unless otherwise noted.) (Note 1)
CC
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY
6/MAX218
Supply Voltage
Supply Current
4.75
5.25
265
V
LO locked at 2175MHz
195
mA
ANALOG GAIN CONTROL INPUT—GC1
Usable Voltage Range
0.75
-50
2.6
V
Input Current
0.75V < V
< 2.6V (Note 2)
+50
µA
GC1
BASEBAND OUTPUTS— IOUT, QOUT (MAX2116)
Nominal Output Voltage Swing
Output Clipping Voltage
DC Output Voltage
R
= 1kΩ // 10pF (Note 3)
0.8
2
V
V
LOAD
P-P
P-P
V
1.2
BASEBAND OUTPUTS— IOUT , QOUT (MAX2118)
Bit DL = high
Bit DL = low
1
0.59
2
R
= 2kΩ // 10pF
LOAD
Nominal Output Voltage Swing
V
V
P-P
(differential) (Note 3)
Output Clipping Voltage
Common-Mode Voltage
DC Offset Voltage
P-P
V
0.65
-50
0.75
0
0.85
+50
mV
ANALOG OUTPUT— VREG1, VREG2
Output Voltage
2.7
2.85
3.05
3
V
Source Current
Each output
mA
STATIC CONTROL INPUTS—AS2, AS1, AS0
Input Voltage High
4
V
V
Input Voltage Low
0.5
Input Current
-50
+50
µA
SYNTHESIZER DC PARAMETERS
Bits CP1 = 0, CP0 = 0
Bits CP1 = 0, CP0 = 1
Bits CP1 = 1, CP0 = 0
Bits CP1 = 1, CP0 = 1
35
70
50
68
100
200
400
136
272
544
Charge Pump Source/Sink Current
µA
140
280
2
_______________________________________________________________________________________
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
6/MAX218
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +4.75V to +5.25V, V
= 0V, V = +0.75V; no AC signal applied, default register settings, T = 0°C to +85°C, unless other-
GC1 A
GND
wise noted. Typical values are at V = +5V, T = +25°C, unless otherwise noted.) (Note 1)
CC
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Charge Pump Off-Leakage Current
-10
+10
nA
Charge-pump positive-to-negative current
matching of 10ꢀ
V
0.6
-
CC
Charge Pump Output Voltage Compliance
0.4
V
I2C INTERFACE—SDA, SCL
Clock Rate
400
1.5
kHz
V
Input Logic Level Low
Input Logic Level High
Input Hysteresis
2.3
-10
V
0.2
0.6
3
V
Input Current
+10
µA
V
Output Logic Level Low
VTUNE ADC
6mA sink current
Resolution
Bits
V
Input Voltage Range
(Note 4)
0
V
CC
V
0.70
-
V
0.65
-
V
-
CC
CC
CC
110 to 111
101 to 110
0.60
3.14
2.15
1.47
1.01
0.70
0.48
2.8
2.97
2.03
1.38
0.94
0.65
0.44
100 to 101
ADC read bits
1.91
1.29
0.87
0.60
0.40
ADC Reference Ladder Trip Point
V
011 to 100
010 to 011
001 to 010
000 to 001
AC ELECTRICAL CHARACTERISTICS
(MAX2116/MAX2118 EV kits, V
= +4.75V to +5.25V, GC1 and GC2 set for maximum gain, V
= 0, V
= V
= 800mV
QOUT P-P
CC
GND
IOUT
(MAX2116), loaded with 1kΩ V
= 1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, f
= V
= 590mV
differential (DL = 0, MAX2118), V
= V
= 1V
differential (DL
IOUT
QOUT
P-P
IOUT
QOUT
P-P
= 2175MHz. For default register values, see the
RFIN
Serial Interface and Control Registers section. T = +25°C to +85°C. Typical values are at V
= +5V, T = +25°C, unless otherwise
A
CC
A
noted.) (Note 1)
PARAMETER
RF FRONT END
CONDITIONS
MIN
TYP
MAX
2175
-72
UNITS
RF Input Frequency Range
T
= 0°C to +85°C (Note 7)
850
MHz
A
V
= 0.75V (max gain),
GC1
bits GC2(4) - GC2(0) = 00000 (max gain),
for output ≥ 800mV
-77
16
Input Carrier Levels Necessary to Produce
P-P
800mV
at I/Q Baseband Outputs
dBm
P-P
V
= 2.6V (min gain),
GC1
(MAX2116)
bits GC2(4) - GC2(0) = 11111 (min gain),
for output ≤ 800mV
3
P-P
_______________________________________________________________________________________
3
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2116/MAX2118 EV kits, V
= +4.75V to +5.25V, GC1 and GC2 set for maximum gain, V
= 0, V
= V
= 800mV
QOUT P-P
CC
GND
IOUT
(MAX2116), loaded with 1kΩ V
= 1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, f
= V
= 590mV
differential (DL = 0, MAX2118), V
= V
= 1V
differential (DL
IOUT
QOUT
P-P
IOUT
QOUT
P-P
= 2175MHz. For default register values, see the
RFIN
Serial Interface and Control Registers section. T = +25°C to +85°C. Typical values are at V
= +5V, T = +25°C, unless otherwise
A
CC
A
noted.) (Note 1)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
= 0.75V (max gain), bit DL = 1,
GC1
bits GC2(4) - GC2(0) = 00000 (max gain)
for output ≥ 800mV
-77
-72
Input Carrier Levels Necessary to Produce
P-P
1V
(Differential) at I/Q Baseband Outputs
dBm
P-P
V
= 2.6V (min gain), bit DL = 1,
GC1
(MAX2118)
bits GC2(4) - GC2(0) = 11111 (min gain),
for output ≤ 800mV
3
16
-77
16
P-P
V
= 0.75V (max gain), bit DL = 0,
GC1
bits GC2(4) - GC2(0) = 00000 (max gain),
for output ≥ 800mV
-72
Input Carrier Levels Necessary to Produce
P-P
6/MAX218
590mV
(Differential) at I/Q Baseband
dBm
P-P
V
= 2.6V (min gain), bit DL = 0,
GC1
Outputs (MAX2118)
bits GC2(4) - GC2(0) = 11111 (min gain),
for output ≤ 800mV
3
P-P
RF Gain Control (GC1) Range
0.75V < V
< 2.6V
60
19
69
24
10
22
dB
dB
GC1
Baseband Gain Control (GC2) Range
Bits GC2(4) - GC2(0) = 00000 to 11111
IIP3
IIP2
(Note 5)
(Note 6)
dBm
dBm
V
= 0.75V (max gain), bits GC2(4) -
GC1
NF
10.5
dB
GC2(0) = 00000 (max gain)
Minimum RF Input Return Loss
Maximum LO Leakage at RFIN
75Ω input source, 850MHz < f
< 2175MHz
13.5
-80
dB
RFIN
850MHz < f < 2175MHz (Note 7)
LO
-63
dBm
Unwanted in 850MHz to 2175MHz band
(Note 7)
33
30
50
LO-Generated RFIN Second Harmonic
Rejection
dB
Unwanted = 2250MHz
45
Unwanted above 2250MHz
6dB/oct
BASEBAND OUTPUTS
Baseband I/Q Output Impedance
Baseband Highpass -3dB Point
Quadrature Phase Error
Single ended, real Z
30
Ω
Hz
OUT
0.1µF capacitors at IDC , QDC
125kHz baseband test tone
125kHz baseband test tone
Baseband -3dB cutoff frequency
Fc = 4MHz
850
4
Degrees
dB
Quadrature Gain Error
1.2
33
Baseband Lowpass BW Range
4
MHz
ꢀ
-5.5
-10
+5.5
+10
LP Filter BW Accuracy
Fc = 33MHz (Note 7)
ꢀ
Ratio of In-Filter-Band to Out-of-Filter-Band
Noise
f
= 100Hz to 22.5MHz,
INBAND
25
dB
f
= 87.5MHz to 112.5MHz
OUTBAND
4
_______________________________________________________________________________________
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
6/MAX218
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2116/MAX2118 EV kits, V
= +4.75V to +5.25V, GC1 and GC2 set for maximum gain, V
= 0, V
= V
= 800mV
QOUT P-P
CC
GND
IOUT
(MAX2116), loaded with 1kΩ V
= 1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, f
= V
= 590mV
differential (DL = 0, MAX2118), V
= V
= 1V
differential (DL
IOUT
QOUT
P-P
IOUT
QOUT
P-P
= 2175MHz. For default register values, see the
RFIN
Serial Interface and Control Registers section. T = +25°C to +85°C. Typical values are at V
= +5V, T = +25°C, unless otherwise
A
CC
A
noted.) (Note 1)
PARAMETER
VCO PERFORMANCE
CONDITIONS
MIN
TYP
MAX
UNITS
VCO Tuning Range
VCO Tuning Gain
VCO 0 to VCO 7 coverage
2250
4500
MHz
Worst case, any VCO, any tuning voltage
500
-75
-99
MHz/V
10kHz offset
Bit DIV2 = 1,
= 2175MHz
LO Phase Noise Referred to Mixer LO Port
dBc/Hz
MHz
f
LO
100kHz offset
SYNTHESIZER PERFORMANCE
Phase Detector Comparison Frequency
Reference Divide Range
0.15
2
2
128
RF Divide Range
256
0.75
32768
1.5
Level at XTALOUT
4MHz to 27MHz, driving 10pF
1
V
P-P
PLL-Referred Phase Noise Floor
XTAL Frequency Range
-143
dBc/Hz
MHz
4
27
Note 1: Parameters are production tested at T = +25°C and +85°C; limits called out at 0°C are guaranteed by design and charac-
A
terization and are not production tested.
Note 2: GCI gain control is guaranteed over this voltage range. 0.75V corresponds to maximum gain and 2.6V corresponds to
minimum gain.
Note 3: RF front-end specification met at this output level.
Note 4: The VTUNE ADC transfer curve has been tailored to that of the VCO tuning curve.
Note 5: Input IP3 test conditions: VGC1 set to provide 800mV
(MAX2116), 1V
differential (MAX2118, DL = high), 0.59V
dif-
P-P
P-P
P-P
ferential (MAX2118 DL = low) baseband output when mixing down a -25dBm tone at 2175MHz to 5MHz baseband, with
VGC2 = 00000. Two tones at -18dBm each are applied at f -100MHz and f -195MHz; IM3 tone at 5MHz is measured at
LO
LO
baseband but is referred to RF input.
Note 6: Input IP2 test conditions: VGC1 set to provide 800 mV
(MAX2116), 1V
differential (MAX2118, DL = high), 0.59V
dif-
P-P
P-P
P-P
ferential (MAX2118 DL = low) baseband output when mixing down a -25dBm tone at 2175MHz to 5MHz baseband, with
VGC2 = 0.75V. Two tones at -25dBm each are applied at f = 925MHz and f = 1245MHz; IM2 tone at f - 5MHz is mea-
RF
RF
LO
sured at baseband but is referred to RF input.
Note 7: These parameters are guaranteed by design and characterization, and are not production tested.
_______________________________________________________________________________________
5
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
Typical Operating Characteristics
(MAX2116/MAX2118 EV kits, V
= +4.75V to +5.25V, GC1 and GC2 set for maximum gain, V
= 0, V
= V
= 800mV
CC
GND
IOUT
QOUT P-P
(MAX2116), loaded with 1kΩ V
= V
= 590mV
differential (DL = 0, MAX2118), V
= V
= 1V
differential (DL =
IOUT
QOUT
P-P
IOUT
QOUT
P-P
1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, f
= 2175MHz. For default register values, see the Serial
RFIN
Interface and Control Registers section. T = 0°C to +85°C. Typical values are at V = +5V, T = +25°C, unless otherwise noted.)
A
CC
A
3RD HARMONIC vs. FUNDAMENTAL
TONE BASEBAND OUTPUT
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
BASEBAND I/Q PHASE ERROR
vs. LO FREQUENCY
0
-10
-20
-30
-40
-50
-60
-70
240
230
220
210
200
190
180
170
160
100
FUNDAMENTAL TONE AT 7MHz,
3RD HARMONIC AT 21MHz,
RELATIVE TO FUNDAMENTAL
98
96
94
92
90
88
86
84
82
80
+85°C
+25°C
0°C
6/MAX218
800
900 1000 1100 1200 1300 1400
4.75
4.85
4.95
5.05
5.15
5.25
500
900
1300
1700
2100
2500
100
8
FUNDAMENTAL TONE BASEBAND OUTPUT (mV
)
SUPPLY VOLTAGE (V)
LO FREQUENCY (MHz)
P-P
BASEBAND I/Q PHASE ERROR
vs. BASEBAND FREQUENCY
BASEBAND I/Q AMPLITUDE MATCHING
vs. BASEBAND FREQUENCY
BASEBAND FREQUENCY RESPONSE
5
-5
100
98
96
94
92
90
88
86
84
82
80
1.0
0.8
f
= 4MHz, M = 2, FDAC = 59
f
= 4MHz, M = 2, FDAC = 59
XTL
XTL
(f = 25MHz)
(f = 25MHz)
f
= 22MHz
C
C
C
0.6
-15
-25
-35
-45
-55
-65
0.4
0.2
0
-0.8
-0.6
-0.4
-0.2
-1.0
0.1
1.0
10
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
BASEBAND FREQUENCY (MHz)
BASEBAND FREQUENCY (MHz)
BASEBAND FREQUENCY (MHz)
BASEBAND FILTER 3dB FREQUENCY
vs. FDAC
BASEBAND FILTER 3dB FREQUENCY
vs. FDAC AND TEMPERATURE
VREG1, VREG2: V
vs. I
OUT
OUT
3.0
2.5
2.0
1.5
1.0
0.5
0
50
45
40
35
30
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
f
= 4MHz, M = 2
f
= 4MHz, M = 2
XTL
XTL
+85°C
+25°C
0°C
+25°C
0°C
+85°C
0
0
0
1
2
3
4
5
6
7
25
125
0
20
40
60
80
100
120
0
50
75
100
I
(mA)
FDAC (DECIMAL)
FDAC (DECIMAL)
OUT
6
_______________________________________________________________________________________
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
6/MAX218
Typical Operating Characteristics (continued)
(MAX2116/MAX2118 EV kits, V
= +4.75V to +5.25V, GC1 and GC2 set for maximum gain, V
= 0, V
= V
= 800mV
QOUT P-P
CC
GND
IOUT
(MAX2116), loaded with 1kΩ V
= V
= 590mV
differential (DL = 0, MAX2118), V
= V
= 1V
differential (DL =
IOUT
QOUT
P-P
IOUT
QOUT
P-P
1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, f
= 2175MHz. For default register values, see the Serial
RFIN
Interface and Control Registers section. T = 0°C to +85°C. Typical values are at V = +5V, T = +25°C, unless otherwise noted.)
A
CC
A
RF INPUT POWER vs. GC1
(BASEBAND OUTPUT = 800mV
NOISE FIGURE vs. LO FREQUENCY
BASEBAND GAIN vs. GC2
)
P-P
12.0
10
0
0
-5
GC1 = 0.75V, GC2 = 0
GC1 = 1.86V, RFIN = -40dBm,
f
LO
f
BB
= 1550MHz, f
= 1MHz
= 20MHz,
CBB
11.5
11.0
10.5
10.0
9.5
-10
-20
-30
-40
-50
-60
-70
-80
+85°C
-10
-15
-20
-25
+25°C
0°C
FROM TOP TO BOTTOM:
GC2 = 30, 25, 20, 15, 10, 5, 0
9.0
900 1100 1300 1500 1700 1900 2100 2300
LO FREQUENCY (MHz)
0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50
GC1 (V)
0
5
10
15
20
25
30
35
GC2 (DECIMAL)
NOISE FIGURE vs. GC2
IIP3 vs. LO FREQUENCY
IIP2 vs. GC2
13.5
13.0
12.5
12.0
11.5
11.0
10.5
10.0
17
15
13
11
9
26.0
25.5
25.0
24.5
24.0
23.5
23.0
22.5
22.0
21.5
21.0
GC1 = 0.75V, f = 1500MHz
LO
GC1 ADJUSTED FOR FULL-SCALE BASEBAND
OUTPUT WITH P = -25dBm. FROM TOP
TO BOTTOM: GC2 = 0, 5, 10, 15, 20, 25, 30
GC1 = 0.75V, f = 2175MHz
LO
RFIN
7
5
3
1
-1
0
5
10
15
20
25
30
35
925 1125 1325 1525 1725 1925 2125 2325
LO FREQUENCY (MHz)
0
5
10
15
20
25
30
GC2
GC2 (DECIMAL)
RF INPUT RETURN LOSS
vs. FREQUENCY
V
vs. VCO FREQUENCY
VCO_4: V
vs. VCO FREQUENCY
TUNE
TUNE
21
20
19
18
17
16
15
14
13
12
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
Z = 75Ω
FROM TOP TO BOTTOM:
TEMPERATURE = +85°C, +55°C,
+25°C, 0°C
0
500
1000
1500
2000
2500
3000
2100 2600 3100 3600 4100 4600 5100 5600
VCO FREQUENCY (MHz)
3250 3350 3450 3550 3650 3750 3850
VCO FREQUENCY (MHz)
FREQUENCY (MHz)
_______________________________________________________________________________________
7
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
Typical Operating Characteristics (continued)
(MAX2116/MAX2118 EV kits, V
= +4.75V to +5.25V, GC1 and GC2 set for maximum gain, V
= 0, V
= V
= 800mV
QOUT P-P
CC
GND
IOUT
(MAX2116), loaded with 1kΩ V
= V
= 590mV
differential (DL = 0, MAX2118), V
= V
= 1V
differential (DL =
IOUT
QOUT
P-P
IOUT
QOUT
P-P
1, MAX2118), loaded with differential 2kΩ. Baseband LPF BW = 33MHz, f
= 2175MHz. For default register values, see the Serial
RFIN
Interface and Control Registers section. T = 0°C to +85°C. Typical values are at V = +5V, T = +25°C, unless otherwise noted.)
A
CC
A
PHASE NOISE AT 10kHz OFFSET
vs. FREQUENCY
VCO (0-3) KV vs. V
VCO (4-7) KV vs. V
TUNE
TUNE
350
300
250
200
150
100
50
525
-70
f
= 1MHz
COMP
FROM TOP TO BOTTOM:
VCO3, VCO2, VCO1, VCO0
FROM TOP TO BOTTOM:
VCO7, VCO6, VCO5, VCO4
-72
-74
-76
-78
-80
-82
-84
-86
-88
-90
475
425
375
325
275
225
175
125
75
25
6/MAX218
0
0.4
1.0
1.6
2.2
2.8
3.4
4.0
0.4
1.0
1.6
2.2
2.8
3.4
4.0
925
1175
1425
1675
1925
2175
V
TUNE
(V)
V
TUNE
(V)
FREQUENCY (MHz)
LO-TO-RFIN LEAKAGE
vs. FREQUENCY
PHASE NOISE vs. OFFSET
-60
-50
f
f
= 2175MHz
LO
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
= 1MHz
COMP
-70
-80
-90
-100
-110
-120
925
1175
1425
1675
1925
2175
1
10
OFFSET FREQUENCY (kHz)
100
FREQUENCY (MHz)
8
_______________________________________________________________________________________
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
6/MAX218
Pin Description
PIN
NAME
FUNCTION
I-Channel Baseband DC Offset Correction. Connect a 0.1µF ceramic chip capacitor from IDC-
to IDC+.
1, 2
IDC-, IDC+
DC Power Supply for LNA and First-Stage RF VGA. Connect to a 5V 5ꢀ low-noise supply.
Bypass with a 1nF capacitor directly to GND. Do not share vias.
3
4
5
VCCRF1
RFIN-
75Ω RF-Inverting Input. Working in conjunction with RFIN+ for differential input. Terminate with
22pF capacitor in series with a 75Ω resistor to GND for single-ended input.
75Ω RF Noninverting Input. Working in conjunction with RFIN- for differential input. Connect to
source through a 22pF series capacitor.
RFIN+
6, 9, 11, 25,
31
N.C.
No Connection. Pin should be connected directly to GND.
Gain Control Input for RF Front End. High-impedance analog input with an operating range of
0.75V to 2.6V. VGC1 = 0.75V corresponds to maximum gain.
7
8, 28
10
GC1
2.85V Linear Regulator. Used for terminating open-drain interfaces from demodulator. Each
regulator can source 3mA.
VREG1, VREG2
PAD
Ground. Direct connection to exposed pad. Can be used to check exposed pad continuity to
ground.
DC Power Supply for LO Circuits. Connect to a 5V 5ꢀ low-noise supply. Bypass with a 1nF
capacitor directly to GND. Do not share vias.
12
VCCLO
DC Power Supply for VCO Circuits. Connect to a 5V 5ꢀ low-noise supply. See the
Applications Information section for more details.
13
14
VCCVCO
LOFLT
LO Internal Regulator Bypass. Bypass with a 0.22µF ceramic chip capacitor to GND.
2
I C Address Select Control. See Table 1 and Table 2. These pins are internally pullup
to V . For logic high, leave these pins open.
CC
15, 26, 32
AS2, AS1, AS0
16
17
18
VTUNE
CPOUT
IFLT
High Impedance VCO Tune Input
Charge-Pump Output
Test Pin. For normal operation, connect IFLT to ground.
DC Power Supply for Charge Pump and XTAL Oscillator Circuits. Connect to a 5V 5ꢀ low-
noise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias.
19
20
VCCCPX
CFLT
Bypass for Internal Crystal Oscillator Bias. Bypass with a 0.22uF ceramic chip capacitor to
GND.
21, 22
23
XTL+, XTAL-
CNTOUT
Crystal Oscillator Interface. See Typical Operating Circuit.
Test Pin. Must be left open.
24
XTALOUT
SDA, SCL
Crystal Oscillator Buffer Output. Requires a 10nF DC-blocking capacitor.
I2C Data and Clock Interface. See the Applications Information section for details.
27, 29
DC Power Supply for Digital Circuits. Connect to a 5V 5ꢀ low-noise supply. Bypass with a 1nF
capacitor directly to GND. Do not share vias.
30
33
VCCDIG
N.C. (MAX2116) No Connection. Pin should be connected directly to GND.
QOUT- (MAX2118) Inverting Baseband Quadrature Output
_______________________________________________________________________________________
9
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
Pin Description (continued)
PIN
NAME
FUNCTION
Noninverting Baseband Quadrature Output
34
QOUT+
DC Power Supply for Baseband Circuits. Connect to a 5V 5ꢀ low-noise supply. Bypass with a
1nF capacitor directly to GND. Do not share vias.
35
VCCBB
N.C. (MAX2116) No Connection. Pin should be connected directly to GND.
IOUT - (MAX2118) Inverting Baseband In-Phase Output
36
37
38
IOUT/IOUT+
Noninverting Baseband In-Phase Output
DC Power Supply for RF Circuits and Second-Stage RF VGA Circuits. Connect to a 5V 5ꢀ low-
noise supply. Bypass with a 1nF capacitor directly to GND. Do not share vias.
VCCRF2
Q-Channel Baseband DC Offset Correction. Connect a 0.1µF ceramic chip capacitor from
QDC- to QDC+.
39, 40
—
QDC+, QDC-
Exposed Pad
Ground
6/MAX218
Detailed Description
Applications Information
The MAX2116/MAX2118 downconvert RF signals in the
850MHz to 2175MHz range directly to baseband I/Q sig-
nals. They are targeted for digital DBS tuner applications.
However, the MAX2116/MAX2118 are applicable to any
system requiring a broadband I/Q downconversion.
VCCVCO (Pin 13) Bypass
Adequate filtering of the VCC connection to the
VCCVCO supply pin is critical to achieve low phase noise
performance. See the Typical Operating Circuit.
Baseband LPFs
The MAX2116/MAX2118 include programmable on-
chip 7th-order Butterworth lowpass filters. The filter
bandwidth is adjusted by setting two internal registers
(M, FDAC). The M counter should be set such that the
crystal frequency divided by M is between 1MHz and
2.5MHz. The FDAC register is then used to fine tune the
bandwidth. The -3dB cutoff frequency is determined by
the following equation:
Internally, the MAX2116/MAX2118 consist of a broad-
band front-end LNA and variable gain stage, quadrature
downconverter, monolithic broadband VCOs, complete
frequency synthesizer, crystal reference oscillator and
buffer amplifier, programmable baseband lowpass fil-
ters, high-linearity I and Q baseband amplifiers, and off-
set correction amplifiers.
The MAX2116/MAX2118 feature a front-end VGA dynam-
ic range in excess of 60dB. Additionally, the baseband
VGA provides in excess of 19dB of additional gain con-
trol. The VSWR at RFIN is unaffected by the VGA setting.
✕
✕
f(3dB) = f
/ M (4 + 0.145 FDAC)
XTAL
where M and FDAC are decimals.
The MAX2116/MAX2118 include completely monolithic
VCOs to cover the entire 850MHz to 2175MHz frequen-
cy range. The complete frequency range is covered
within a 5V tuning range, thus eliminating the need for
costly 30V supplies and varactor diodes. The VCO
architecture also eliminates problems associated with
frequency pulling with high receive input signal levels.
The filter can be adjusted from approximately 4MHz to
33MHz. Total device supply current is dependent on
the filter BW setting, with increasing current commensu-
rate with increasing 3dB BW.
I/Q Output Voltage Level
The MAX2116 I/Q outputs are single-ended and opti-
mized for a nominal output voltage drive of 800mV
.
P-P
Output clipping levels are typically 2V
.
P-P
The MAX2118 I/Q outputs are differential, with two pos-
sible nominal output voltage levels. The nominal output
voltage swing is set through the DL bit Byte 04 (see
register table description). With DL = low, the nominal
output voltage swing is 590mV
differential; DL = high
P-P
10 ______________________________________________________________________________________
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
6/MAX218
boosts the baseband output gain by 4.5dB, thus allow-
ing the output voltage swing of 1V . Output clipping
higher frequency crystals (>20MHz). Recommended
values are between 2kΩ and 5kΩ.
P-P
differential.
levels are typically 2V
P-P
Serial Interface and
Control Registers
Programming Bits
The MAX2116/MAX2118 conform to the Philips I2C stan-
dard, 400kbps (fast mode), and operate as a slave.
DC Offset Compensation IDC and QDC
The baseband highpass response is set through a capac-
itor connected between IDC+ and IDC- for the I channel
and QDC+ and QDC- for the Q channel. The 3dB high-
pass bandwidth is determined by the following equation:
✕
F3dB (highpass in Hz) = 1 / (11.75kΩ C), C in farads
The MAX2116/MAX2118 have eight read and write
addresses, which are determined by the logic state of the
three address-select pins (AS2, AS1, and AS0). In all
cases, the MSB is transmitted and read first (see Tables
1, 2, 3).
To reduce the potential for baseband spurious pickup,
keep the connection between the DC compensation
capacitors and the IDC and QDC pins as short as
possible by placing the capacitors as close to the
device as manufacturing allows.
Programming Bit Definition
VREG1 and VREG2
The MAX2116/MAX2118 include two 2.85V voltage reg-
ulator outputs, with a maximum source current rating of
3mA each. These outputs ease the interface to low-volt-
age demodulators by providing a clean pullup termina-
tion for open-drain/collector outputs. VREG1 is located
by the GC1 input control, with VREG2 conveniently
located between the 2-wire interface control pins.
Byte 00 (Default = 03)
Bit DIV2 controls the VCO frequency divider. High level
= divide-by-2 enabled; low level = divide-by-4 enabled.
Default is DIV2 = 0 (divide-by-4 enabled).
Bits N(14)–N(8) are the 7 upper bits of the 15-bit pro-
grammable N divider, with the default value of N = 950.
The overall VCO divide ratio is:
13
5
4
3
214 N(14) + 2
N(13) … +2 N(5) + 2 N(4) + 2
✕
✕
✕
✕
✕
VCO Selection
The MAX2116/MAX2118 include eight fully monolithic
VCOs to cover the entire 850MHz to 2175MHz range.
Maxim has a detailed application note that describes
the operation of the VCO system and proper selection
of the desired VCO. This application note is available by
request from Maxim.
N(3) … + 20 N(0)
✕
Byte 01 (Default = B6)
Bits N(7)–N(0) are the 8 lower bits of the 15-bit pro-
grammable N divider.
Crystal Output Buffer (XTALOUT)
The on-chip crystal oscillator circuit has been designed
for operation from 4MHz to 27MHz. The crystal output
buffer amplifier is designed to nominally deliver
between 0.75V
and 1.5V . However, it might be
P-P
P-P
necessary to add a resistor between the XTALOUT pin
and ground to increase the signal swing when using
Table 1. MAX2116/MAX2118 Write Address Byte
AS2
Low
Low
Low
Low
High
High
High
High
AS1
Low
Low
High
High
Low
Low
High
High
AS0
Low
High
Low
High
Low
High
Low
High
MSB
ADDRESS BYTE
LSB
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
______________________________________________________________________________________ 11
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
Table 2. MAX2116/MAX2118 Read Address Byte
AS2
Low
Low
Low
Low
High
High
High
High
AS1
Low
Low
High
High
Low
Low
High
High
AS0
Low
High
Low
High
Low
High
Low
High
MSB
ADDRESS BYTE
LSB
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
Table 3. MAX2116/MAX2118 Control Register Bytes
RESET
VALUE
WRITE TO MODE
ADDR-H
MSB
CONTROL BYTE
LSB
6/MAX218
C0
C2
C4
C6
C8
CA
CC
CE
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
Address
—
N High
N Low
03
00
01
DIV2
N7
N14
N6
N13
N5
N12
N4
N11
N3
N10
N2
N9
N1
N8
N0
B6
R and CP and
VCO
3D
02
R2
R1
R0
CP1
CP0
OSC2
OSC1
OSC0
I/Q Filter DAC
LPF Divider DAC
GC2 and Diag
7F
02
1F
03
04
05
X0
ADL
D2
F6
ADE
D1
F5
DL
D0
F4
M4
G4
F3
M3
G3
F2
M2
G2
F1
M1
G1
F0
M0
G0
6
0
✕
Byte 02 (Default = 3D)
FDAC = 2
F(6) + ... +2 F(0). (Default FDAC = 127.)
Bits R2, R1, and R0 are the reference divider bits.
The overall reference divide ratio R = 2 x 2 (4 x R2 + 2 x R1 + R0)
with the default value of R = 4 (R2 = 0, R1 = 0, R0 = 1).
Byte 04 (Default = 02)
Bit ADL is the VCO ADC latch-enable bit. ADL = 1
latches ADC value (ADL = 0, default).
,
Bits CP1, CP0 control the charge pump current, with
the default value of 400µA (Table 4).
Bit ADE enables VCO tune voltage DAC read. ADE = 1
enables ADC read (ADE = 0, default).
Bits OSC2, OSC1, and OSC0 control which of the eight
on-chip VCOs is activated. Default is VCO 5 (101)
(Table 5).
Bit DL sets the differential output drive level for the
MAX2118 (default, DL = 0) (Table 6). This bit is unused
for the MAX2116.
Byte 03 (Default = 7F)
Bits M(4)–M(0) set the value of M counter of lowpass fil-
ter BW control.
Bit X(0) is unused; default = 0.
4
3
0
✕
✕
Bits F(6)–F(0) set the value of FDAC for the baseband
lowpass filter -3dB cutoff frequency. (see the Baseband
LPFs section).
M = 2 M(4) + 2
M(3) + ... +2 M(0). (Default M = 2.)
12 ______________________________________________________________________________________
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
6/MAX218
2
I C Read Status Bits
Bit PWR high indicates power has been cycled, and the
MAX2116/MAX2118 registers have been reset to
default values. A stop condition while in read mode
resets this bit.
Table 4. Charge Pump Current Setting
(Byte 02)
CP1
CP0
CHARGE PUMP CURRENT (µA)
0
0
1
1
0
1
0
1
50
100
Bits ADC(2), ADC(1), and ADC(0) represent a 3-bit
ADC conversion of the VCO tune voltage used for VCO
and charge pump current selection and calibration.
200
400 (default)
Bits F(6)–F(0) are a 7-bit representation of the LPF DAC
current.
Serial Interface Functional Description
Table 5. On-Chip VCO Selection (Byte 02)
Register Map
This is the standard I2C protocol. The write/read/
address bytes are dependent on the states of pins
AS0/AS1/AS2.
VCO
BAND
OSC2
OSC1
OSC0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
Write Operation
The first byte is the device address plus the direction
bit (R/W = 0).
2
3
The second byte contains the internal address com-
mand of the first address to be accessed.
4
5 (Default)
The third byte is written to the internal register directed
by the command address byte.
6
7
The following bytes (if any) are written into successive
internal registers.
The transfer lasts until stop conditions are encountered.
The MAX2116 acknowledges every byte transfer.
Table 6. MAX2118 Output Drive Level
Selection (Byte 04)
Read Operation
When an address is sent, the MAX2116 sends back
first the status byte and then the I/Q DAC byte.
IOUT , QOUT OUTPUT VOLTAGE LEVEL
DL
(DIFFERENTIAL) (V
)
P-P
0
1
0.59
1.0
Example: Write registers 0 to 3 with 0E, D8, 26 (Table 9).
Example: Read from status registers. Sending an ACK
terminates slave transmit mode (Table 10).
BYTE 05 (default = 1F)
Bits D(2), D(1), and D(0) control diagnostic features
(Table 7).
Bits G(4)–G(0) controls the gain of the baseband VGA.
The BB gain is minimum at 11111 and the BB gain is
maximum at 00000. Default is minimum gain setting of
11111 (Table 8).
______________________________________________________________________________________ 13
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
Table 7.Diagnostic Functions (Byte 05)
D2
0
D1
0
D0
0
DIAGNOSTIC FUNCTIONS
Normal operation
0
0
1
Force charge pump source current
Force charge pump sink current
Force charge pump High-Z state
Unused
0
1
0
0
1
1
1
0
0
1
0
1
N divider output frequency at CNTOUT pin and filter DAC output at IFILT pin
R divider output frequency at CNTOUT pin and GC2 DAC output at IFILT pin
M divider output frequency at CNTOUT pin
1
1
0
1
1
1
Table 8. Baseband Gain Setting (Byte 5)
RESET
VAL
READ FROM MODE
ADDR-H
MSB
LSB
6/MAX218
C1
C3
C5
C7
C9
CB
CD
CF
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
Address
—
Status Info
00
00
—
—
0
0
PWR
F6
0
ADC2
F4
ADC1
F3
ADC0
F2
0
0
I/Q Filter DAC
F5
F1
F0
Table 9. Example 1
Register Address
00
DATA
0E
DATA
D8
DATA
26
Start Device Address Write ACK
ACK
ACK
ACK
ACK
ACK
STOP
Table 10. Example 2
DAC
D8
ACK/
NACK
Start Device Address Read ACK
Status Register 00
STOP
Package Information
Chip Information
TRANSISTOR COUNT: 10,935
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
40 TQFN
T4066-3
21-0141
14 ______________________________________________________________________________________
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
6/MAX218
Typical Operating Circuit
V
CC
V
CC
V
CC
40
39
38
37
36
35
(MAX2118)
34
33
32
(MAX2118)
31
V
CC
1
2
30
29
28
27
26
25
24
23
22
21
DC OFFSET
CORRECTION
LPF BW
CONTROL
SCL
SDA
V
CC
DAC
INTERFACE LOGIC
AND CONTROL
GC2
3
DIV2/
DIV4
4
V
CC
5
RFIN
MAX2118
6
/N
/R
GC1
7
XTALOUT
PFD
VOLTAGE
REGULATOR
8
CP
9
10
11
12
13
14
15
16
17
18
19
20
V
CC
V
CC
V
CC
V
CC
LOOP FILTER
______________________________________________________________________________________ 15
Complete DBS Direct-Conversion Tuner ICs
with Monolithic VCOs
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
4
7/08
Widened RF input frequency range for new application
1, 3, 4, 5, 10, 11
6/MAX218
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2008 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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