MAX22502EATC+ [MAXIM]
100Mbps Full-Duplex RS-485/RS-422 Transceiver for Long Cables;
| 型号： | MAX22502EATC+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 100Mbps Full-Duplex RS-485/RS-422 Transceiver for Long Cables |
| 文件： | 总19页 (文件大小：1150K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
General Description
Benefits and Features
● High-Speed Operation Over Long Distances
The MAX22502E full-duplex, ESD-protected, RS-485/
RS-422 transceiver is optimized for high-speed (up to
100Mbps) communication over long cables.This transceiver
features larger receiver hysteresis for high noise rejection
and improved signal integrity. Integrated preemphasis
circuitry extends the distance, and increases the data rate,
of reliable communication by reducing inter-symbol
interference (ISI) caused by long cables when supplied with
5V. Integrated hot-swap protection and a fail-safe receiver
ensure a logic-high on the receiver output when input signals
are shorted or open for longer than 10μs (typ).
• Up to 100Mbps Data Rate
• Integrated Preemphasis Extends Cable Length
• High Receiver Sensitivity
• Wide Receiver Bandwidth
• Symmetrical Receiver Thresholds
● Integrated Protection Increases Robustness
• -15V to +15V Common Mode Range
• ±15kV ESD Protection (Human Body Model)
• ±7kV IEC61000-4-2 Air-Gap ESD Protection
• ±6kV IEC61000-4-2 Contact Discharge
ESD Protection
The MAX22502E is available in a 12-pin TDFN-EP (3mm
x 3mm) package and operates over the -40°C to +125°C
ambient temperature range.
• Driver Outputs are Short-Circuit Protected
● Flexibility for Many Different Applications
• 3V to 5.5V Supply Range
Applications
● Motion Control
• Low Voltage Logic Supply Down to 1.6V
• Low 5µA (max) Shutdown Current
• Available in 12-pin TDFN (3mm x 3mm) Package
• -40°C to +125°C Operating Temperature Range
● Encoder Interfaces
● Field Bus Networks
● Industrial Control Systems
● Backplane Busses
Ordering Information appears at end of data sheet.
Simplified Block Diagram
VL
VCC
B
A
RO
RE
R
SHUTDOWN
D
DE
DI
Y
Z
PSET
MAX22502E
GND
19-100135; Rev 1; 4/19
MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Absolute Maximum Ratings
CC
RE, DE, DI, VL ....................................................-0.3 V to +6 V
RO .............................................................-0.3 V to (V + 0.3) V
PSET ......................................................-0.3 V to (V
A, B, Y, Z ................................................................-15V to +15V
Short-Circuit Duration (RO, Y, Z) to GND
V
........................................................................-0.3 V to +6 V
Continuous Power Dissipation (Multilayer Board (derate
24.4mW/°C above +70°C))........................................1951mW
Operating Temperature Range ........................ -40°C to +125°C
Junction Temperature .....................................................+150°C
Storage Temperature Range ........................... -65°C to +150°C
Reflow Temperature ........................................................+300°C
L
+ 0.3) V
CC
Continuous Power Dissipation (Single Layer Board
(derate 15.9mW/°C above +70°C)) ...........................1269mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
12 TDFN-EP
PACKAGE CODE
TD1233+1C
Outline Number
21-0664
90-0397
Land Pattern Number
Thermal Resistance, Single-Layer Board:
Junction to Ambient (θ
)
63°C/W
8°C/W
JA
Junction to Case (θ
)
JC
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θ
)
41°C/W
8°C/W
JA
Junction to Case (θ
)
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Electrical Characteristics
(V
= 3V to 5.5V, V = 1.6V to V , V ≤ V , T = T
to T , unless otherwise noted (Notes 1, 2) )
MAX
CC
L
CC
L
CC
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER
Preemphasis disabled
Preemphasis enabled
3.0
4.5
5.5
5.5
Supply Voltage
V
I
V
CC
5
Supply Current
12.7
16.5
mA
DE = high, RE = low, no load
DE = low, RE = high
CC
Shutdown Supply Current
Logic Supply Voltage
Logic Supply Current
DRIVER
I
5
µA
V
SHDN
V
1.6
V
CC
L
I
No load on RO
16.4
23
µA
L
R = 54Ω
1.5
2.0
L
Differential Driver Output
V
Figure 1, Figure 2
V
OD
R = 100Ω
L
Preemphasis
enabled, 4.5V ≤ V
5.5V (Note 3)
R = 54Ω
1.33
1.37
1.37
1.41
1.41
L
Differential Driver Preemphasis
Ratio
D
≤
CC
V/V
PRE
R = 100Ω
1.33
L
Change in Magnitude of Differential
Output Voltage
ΔV
R = 54Ω, Figure 1 (Note 4)
0.2
3
V
V
V
OD
L
Driver Common-Mode Output
Voltage
R = 54Ω, Normal mode and preemphasis,
L
V
V
/2
OC
CC
Figure 1
Change In Magnitude of
Common-Mode Voltage
ΔV
R = 100Ω or 54Ω, Figure 1 (Note 4)
0.2
OC
L
Single-Ended Driver Output High
Single-Ended Driver Output Low
Differential Output Capacitance
V
Y or Z output
Y or Z output
I
I
= -20mA
= +20mA
2.2
V
V
OH
OUT
V
C
0.8
OL
OUT
50
pF
DE = RE = high, f = 4MHz
OD
Driver Short-Circuit Output
Current
|I
|
-15V ≤ V
≤ +15V
250
mA
OST
OUT
RECEIVER
V
V
= +12V
= -7V
+1100
DE = GND, V
GND, +3.6V or 5.5V
=
IN
CC
Input Current (A and B)
I
μA
A,B
-1000
IN
Between A and B, DE = GND,
f = 2MHz
Differential Input Capacitance
C
50
pF
V
A,B
Common Mode Voltage Range
V
-15
+15
CM
Receiver Differential Threshold
High
V
-15V ≤ V
-15V ≤ V
≤ +15V
≤ +15V
+50
+200
mV
TH_H
CM
Receiver Differential Threshold
Low
V
-200
-50
mV
TH_L
CM
V
< t
= 0V, time from last transition is
CM
Receiver Input Hysteresis
ΔV
250
mV
mV
TH
D_FS
Differential Input Fail-Safe Level
V
-15V ≤ V
≤ +15V
-50
+50
TH_FS
CM
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Electrical Characteristics (continued)
(V
= 3V to 5.5V, V = 1.6V to V , V ≤ V , T = T
to T , unless otherwise noted (Notes 1, 2) )
MAX
CC
L
CC
L
CC
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LOGIC INTERFACE (RE, RO, DE, DI)
2/3 x
Input Voltage High
V
V
DE, DI, RE
DE, DI, RE
IH
V
L
Input Voltage Low
Input Current
V
I
1/3 x V
+2
V
IL
L
-2
μA
kΩ
DI and DE, RE (after first transition)
DE, RE
IN
Input Impedance on First Transition
RO Output Voltage High
R
10
IN_FT
RE = GND, (V - V ) > 200mV,
A
B
V
V - 0.4
L
V
V
OH
I
= -1mA
OUT
RE = GND, (V - V ) < -200mV,
A
B
RO Output Low Voltage
V
0.4
+1
OL
I
= +1mA
OUT
Three-State Output Current at
Receiver
I
-1
μA
RE = high, 0 ≤ V
≤ V
L
OZR
RO
PROTECTION
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
T
+160
10
°C
°C
SH
T
SH_HYS
Human Body Model
±15
±7
ESD Protection (A and B Pins)
ESD Protection (All Other Pins)
IEC61000-4-2 Air Gap Discharge to GND
IEC61000-4-2 Contact Discharge to GND
Human Body Model
kV
kV
±6
±2
Electrical Characteristics - Switching
(V
= 3V to 5.5V, V = 1.6V to V , V ≤ V , T = T
to T
, unless otherwise noted (Note 1, 2) )
MAX
CC
L
CC
L
CC
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DRIVER (Note 5)
t
t
R = 54Ω, C = 50pF, Figures 3, 4
20
20
DPLH
DPHL
L
L
Driver Propagation Delay
ns
R = 54Ω, C = 50pF, Figures 3, 4
L
L
|t
– t
|,
DPLH
DPHL
R = 54Ω, C = 50pF,
Figure 3, Figure 4
(Note 6)
V = V
,
L
L
L
CC
1.2
1.6
V
≥ 3V
CC
Differential Driver Output Skew
t
ns
DSKEW
|t
- t
|,
DPLH DPHL
R = 54Ω, C = 50pF,
V does not
L
equal V
L
L
Figure 3, Figure 4
CC
(Note 6)
Driver Differential Output Rise
and Fall Time
t
, t
R = 54Ω, C = 50pF, Figure 4 (Note 6)
3
ns
HL LH
L
L
Data Rate
DR
100
Mbps
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Electrical Characteristics - Switching (continued)
(V
= 3V to 5.5V, V = 1.6V to V , V ≤ V , T = T
to T
, unless otherwise noted (Note 1, 2) )
CC
L
CC
L
CC
A
MIN
MAX
PARAMETER
SYMBOL
CONDITIONS
R = 500Ω, C = 50pF, Figure 5, Figure 6
MIN
TYP
MAX
30
UNITS
ns
Driver Enable to Output High
Driver Enable to Output Low
Driver Disable Time from Low
Driver Disable Time from High
t
DZH
L
L
t
R = 500Ω, C = 50pF, Figure 5, Figure 6
30
ns
DZL
DLZ
DHZ
L
L
t
R = 500Ω, C = 50pF, Figure 5, Figure 6
30
ns
L
L
t
R = 500Ω, C = 50pF, Figure 5, Figure 6
30
ns
L
L
Driver Enable from Shutdown to
Output High
t
R = 1kΩ, C = 15pF, Figure 5, Figure 6
100
100
µs
µs
DZH(SHDN)
L
L
Driver Enable from Shutdown to
Output Low
t
R = 1kΩ, C = 15pF, Figure 5, Figure 6
L L
DZL(SHDN)
Time to Shutdown
t
(Note 7, Note 8)
50
10
800
16
ns
ns
μs
SHDN
R
R
= 4kΩ
13
1
4.5V ≤ V
≤ 5.5V,
PSET
PSET
CC
Driver Preemphasis Interval
t
PRE
Figure 2
= 400kΩ
0.8
1.2
RECEIVER (Note 5)
Delay to Fail-Safe Operation
t
10
µs
ns
D_FS
RPLH
RPHL
t
C = 15pF, Figure 7, Figure 8
20
20
L
Receiver Propagation Delay
Receiver Output Skew
t
C = 15pF, Figure 7, Figure 8
L
|t
- t
|, C = 15pF, Figure 7,
RPHL RPLH L
t
2.5
ns
RSKEW
Figure 8
Data Rate
DR
100
30
30
30
30
Mbps
ns
Receiver Enable to Output High
Receiver Enable to Output Low
Receiver Disable Time from Low
Receiver Disable Time from High
t
R = 1kΩ, C = 15pF, Figure 9
L L
RZH
t
R = 1kΩ, C = 15pF, Figure 9
ns
RZL
RLZ
RHZ
L
L
t
R = 1kΩ, C = 15pF, Figure 9
ns
L
L
t
R = 1kΩ, C = 15pF, Figure 9
ns
L
L
Receiver Enable from Shutdown
to Output High
t
R = 1kΩ, C = 15pF, Figure 9
100
μs
RZH (SHDN)
L
L
Receiver Enable from Shutdown
to Output Low
t
R = 1kΩ, C = 15pF, Figure 9
100
800
μs
RZL (SHDN)
L
L
Time to Shutdown
t
(Note 7, Note 8)
50
ns
SHDN
Note 1: All devices are 100% production tested at T = +25°C. Specifications for all temperature limits are guaranteed by design.
A
Note 2: All currents into the device are positive; all currents out of the device are negative. All voltages are referenced to device
ground, unless otherwise noted.
Note 3: V
is the differential voltage between Y and Z during the preemphasis interval and is the differential voltage when
ODP
preemphasis is disabled. V
= D
x V
.
ODP
PRE
OD
Note 4: ΔV
and ΔV
are the changes in V
and V , respectively, when the DI input changes state.
OD
OC
OD OC
Note 5: Capacitive load includes test probe and fixture capacitance.
Note 6: Not production tested. Guaranteed by design.
Note 7: Shutdown is enabled by driving RE high and DE low. The device is guaranteed to have entered shutdown after t
elapsed.
has
SHDN
Note 8: The timing parameter refers to the driver or receiver enable delay, when the device has exited the initial hot-swap protect
state and is in normal operating mode.
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Y
Z
RL
2
VOD
VODP
RL
2
VOC
Figure 1. Driver DC Test Load
Y OR Z
Z OR Y
VODP
VOD
50%
tPRE
Preemphasis enabled
V
ODP = DPRE x VOD
Figure 2. Driver Preemphasis Timing
VCC
DE
Y
Z
VOD
VODP
RL
CL
Figure 3. Driver Timing Test Circuit
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
f = 1MHz, tLH = 3ns, tHL = 3ns
VL
0
DI
50%
tDPLH
50%
tDPHL
Z
Y
VOD
VOD = (VY - VZ)
VO
0
90%
90%
10%
VOD
10%
-VO
tHL
tLH
tDSKEW = |tDPLH - tDPHL
|
Figure 4. Driver Propagation Delays
Y
DI
VL
0V
GND OR VL
OUT
Z
CL
RL
50%
DE
tDZH, tDZH(SHDN)
0.25V
V
OH
GENERATOR
50%
50
OUT
0V
tDHZ
Figure 5. Driver Enable and Disable Times (t
, t
)
DZH DHZ
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
VCC
RL
Y
Z
DI
VL
GND OR VL
OUT
CL
50%
DE
0V
tDZL, tDZL(SHDN)
tDLZ
VL
50%
0.25V
VOL
GENERATOR
50Ω
OUT
Figure 6. Driver Enable and Disable Times (t
, t
)
DZL DLZ
A
B
RO
R
ATE
VID
Figure 7. Receiver Propagation Delay Test Circuit
A
B
+1V
-1V
VOH
tRPLH
tRPHL
RO
50%
50%
VOL
tRSKEW = |tRPHL – tRPLH|
Figure 8. Receiver Propagation Delays
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
RL
S1
S3
+1.5V
-1.5V
1kΩ
VL
RO
VIO
R
S2
CL
15pF
GENERATOR
50Ω
VL
VL
0V
RE
RO
RE
50%
50%
0V
tRZH, tRZH(SHDN)
t
RZL, tRZL(SHDN)
S1 OPEN
S2 CLOSED
S3 = +1.5V
S1 CLOSED
S2 OPEN
S3 = -1.5V
VOH
0V
VOH
VOL
50%
RO
50%
VL
0V
VL
0V
RE
RE
50%
50%
S1 CLOSED
S2 OPEN
S3 = -1.5V
S1 OPEN
S2 CLOSED
S3 = +1.5V
tRHZ
tRLZ
VOH
0V
VL
0.25V
RO
RO
0.25V
VOL
Figure 9. Receiver Enable and Disable Times
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Typical Operating Characteristics
V
= 5V, VL = V , 60Ω termination between Y and Z, T = 25°C, unless otherwise noted.
CC A
CC
SUPPLY CURRENT vs. DATA RATE
(PREEMPHASIS ENABLED)
SUPPLY CURRENT vs. DATA RATE
(PREEMPHASIS DISABLED)
toc01
toc02
150
150
SQUARE WAVE ON DI (50% DUTY CYCLE)
PSET RESISTOR ADJUSTED FOR EACH
DATA RATE
SQUARE WAVE ON DI (50% DUTY CYCLE)
125
100
75
50
25
0
125
VCC = 5V, 54Ω Load
100
54Ω Load
75
VCC = 3.3V, 54Ω Load
50
VCC = 5V, No Load
VCC = 3.3V, No Load
25
No Load
0
0.1
1
10
100
0.01
0.1
1
10
100
DATA RATE (Mbps)
DATA RATE (Mbps)
RO OUTPUT VOLTAGE HIGH
vs. LOAD CURRENT
RO OUTPUT VOLTAGE LOW
vs. LOAD CURRENT
toc03
toc04
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
5.5
5.0
4.5
4.0
3.5
3.0
2.5
(VA - VB) > +200mV
(VA - VB) < -200mV
VCC = 3.3V
VCC = 5V
VCC = 3.3V
VCC = 5V
0
10
20
30
40
50
0
-10
-20
-30
-40
-50
SINK CURRENT (mA)
SOURCE CURRENT (mA)
DRIVER OUTPUT VOLTAGE LOW
vs. LOAD CURRENT
toc07
DIFFERENTIAL DRIVER OUTPUT VOLTAGE
DIFFERENTIAL DRIVER OUTPUT VOLTAGE
vs. LOAD CURRENT
vs. TEMPERATURE
toc05
toc06
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
6
5
4
3
2
1
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
DI = GND
VCC = 5V
VCC = 5V
VCC = 3.3V
VCC = 3.3V
VCC = 3.3V
VCC = 5V
RL = 54Ω
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (ºC)
0
25
50
75
100
0
25
50
75
100
125
150
LOAD CURRENT (mA)
SINK CURRENT (mA)
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Typical Operating Characteristics (continued)
V
= 5V, VL = V , 60Ω termination between Y and Z, T = 25°C, unless otherwise noted.
CC
CC A
DRIVER OUTPUT VOLTAGE HIGH
vs. LOAD CURRENT
DRIVER OUTPUT LEAKAGE CURRENT
vs. OUTPUT VOLTAGE
toc08
toc09
5.0
400
DI = VCC
DE = GND
300
4.5
4.0
3.5
3.0
2.5
2.0
200
VCC = 5V
VCC = 3.3V
100
0
-100
-200
-300
-400
VCC = 3.3V
VCC = 5V
0
-25
-50
-75
-100
-125
-150
-15
-10
-5
0
5
10
15
SOURCE CURRENT (mA)
SOURCE CURRENT (mA)
DRIVER PROPAGATION DELAY
vs. TEMPERATURE
DRIVER PROPAGATION DELAY SKEW
vs. TEMPERATURE
toc11
toc10
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
20
18
16
14
12
10
8
RL = 54Ω
RL = 54Ω
CL = 50pF
CL = 50pF
VCC = 3.3V, tDPHL
VCC = 3.3V, tDPLH
VCC = 3.3V
6
4
VCC = 5V, tDPHL
2
VCC = 5V, tDPLH
-40 -25 -10
VCC = 5V
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (ºC)
5
20 35 50 65 80 95 110 125
TEMPERATURE (ºC)
RECEIVER PROPAGATION DELAY
vs. TEMPERATURE
DRIVER PREMPHASIS
toc13
toc12
20
18
16
14
12
10
8
VCC = 3.3V, tRPHL
VCC = 3.3V, tRPLH
DI
5V/div
VCC = 5V, tRPHL
VCC = 5V, tRPLH
VY-VZ
2V/div
6
4
2
RL = 54Ω, CL = 10pF, RPSET = 8kΩ
CL = 15pF
0
0
1
0
1
1
0
1
0
0
1
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (ºC)
20ns/div
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Pin Configuration
TOP VIEW
12 11 10
9
8
7
MAX22502E
+
1
2
3
4
5
6
TDFN-EP
3mm x 3mm
Pin Description
MAX22502E
PIN
NAME
FUNCTION
to ground with a 0.1μF ceramic capacitor as close to the device as possible.
1
V
Supply Input. Bypass V
CC
CC
Logic Supply Input. V defines the interface logic levels on DE, DI, and RO. Apply a voltage between
L
2
V
1.6V to 5.5V to V . Ensure that V ≤ V
for normal operation. Bypass V to ground with a 0.1μF
L
L
L
CC L
capacitor as close to the device as possible.
3
4
RO
Receiver Output. See the Receiving Function Table for more information.
Receiver Enable. Set RE high to disable the receiver and tri-state RO. The device is in low-power
shutdown when RE = high and DE = low.
RE
5
6
DE
DI
Driver Output Enable. Set DE high to enable driver. Set DE low to three-state the driver output.
Driver Input. See the Transmitting Function Table for more information.
Preemphasis Select Control Input. Connect a resistor from PSET to GND to select the preemphasis
7
PSET
duration. See the Layout Recommendations in the Applications Information section for more information.
To disable preemphasis, connect PSET to GND or V
.
CC
8
GND
Y
Ground
9
Noninverting Driver Output
Inverting Driver Output
10
11
12
Z
B
Inverting Receiver Input
A
Noninverting Receiver Input
Maxim Integrated
│ 12
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Functional Diagrams
Transmitting Function Table
INPUTS
OUTPUTS
DE
1
DI
1
Y
Z
RE
X
1
0
X
1
0
0
1
0
0
X
X
High Impedance
High Impedance
1
0
Shutdown. Y and Z are high-impedance
X = Don't care
Receiving Function Table
INPUTS
OUTPUTS
DE
(V - V )
Time from Last A-B Transition
RO
RE
A
B
0
X
X
≥ V
Always
1
TH_H
Indeterminate
RO is latched to previous value
0
V
< (V - V ) < V
< t
> t
TH_L
A
B
TH_H
D_FS
0
X
X
X
1
-50mV < (V - V ) < +50mV
1
A
B
D_FS
0
≤ V
Always
0
TH_L
0
Open/Shorted
> t
D_FS
X
1
1
X
X
High Impedance
1
0
X
Shutdown. RO is high-impedance
X = Don’t care
Full-Duplex Point-to-Point Application Circuit
5V
5V
3.3V
3.3V
VL
VCC
VCC
VL
DE
RE
RO
B
A
Z
Y
DI
R
120Ω
120Ω
120Ω
120Ω
D
PSET
DE
DI
Y
Z
A
B
RO
D
R
RE
PSET
MAX22502E
MAX22502E
GND
GND
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│ 13
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
If DI switches back to a logic-low state before the
preemphasis interval ends, the differential output switches
Detailed Description
The MAX22502E ESD-protected RS-485/RS-422
transceiver is optimized for high-speed, full-duplex
communications over long cables. This transceiver
features integrated hot-swap functionality to eliminate
false transitions on the driver during power-up or during
a hot-plug event. Fail-safe receiver inputs guarantee a
logic-high on the receiver output when inputs are shorted
or open for longer than 10µs (typ).
directly from the 'strong' V
high to a 'strong' low
ODP
(-V
).
ODP
Driver behavior is similar when the DI input changes from a
logic-high to a logic-low. When this occurs, the differential
output is pulled low to -V
until the end of the preemphasis
ODP
interval, at which point V - V = -V
.
Y
Z
ODP
Preemphasis Setting
Receiver Threshold Voltages
Connect a resistor (R
) between PSET and GND to
PSET
set the preemphasis time interval on the MAX22502E.
An optimum preemphasis interval ranges from 1 to 1.5
unit intervals (bit time). Use the following equation to
calculate the resistance needed on PSET to achieve a 1.2
preemphasis interval:
The MAX22502E receiver features a large threshold
hysteresis of 250mV (typ) for increased differential noise
rejection.
Additionally, the receiver features symmetrical threshold
voltages. Symmetric thresholds have the advantage that
recovered data at the RO output does not have duty cycle
distortion.Typically, fail-safereceivers, whichhaveunipolar
(non-symmetric)thresholds,showsomedutycycledistortion
at high signal attenuation due to long cable lengths.
9
R
= 400x10 /DR
PSET
where DR is the data rate and 1Mbps ≤ DR ≤ 100Mbps.
Preemphasis only minimally degrades the jitter on the eye
diagram when using short cables, making it reasonable to
permanently enable preemphasis on systems where cable
lengths may vary or change. Figure 10 and Figure 11
are eye diagrams taken at 100Mbps over a 10m cat5e
cable. Note that the eye varies only slightly as preemphasis
is enabled or disabled.
Preemphasis
When powered by 5V, the MAX22502E features integrated
driver preemphasis circuitry, which strongly improves
signal integrity at high data rates over long distances
by reducing intersymbol interference (ISI) caused by
long cables. Preemphasis is set by connecting a resistor
Figure 12 and Figure 13 show the driver eye diagrams
over a long cable length. The MAX22502E was used as
the driver and the eye diagrams were taken at the receiver
input after a length of 100m cat5e cable. Figure 12
showsthesignalatthereceiverwhenthedriverpreemphasis
is disabled. Figure 13 shows the receiver signal when
preemphasis is enabled.
(R
) between PSET and ground.
PSET
Long cables attenuate the high-frequency content of
transmitted signals due to the cable's limited bandwidth.
This causes signal/pulse distortion at the receiving end,
resulting in ISI. ISI causes jitter in data and clock recovery
circuits. ISI can be visualized by considering the following
cases: If a series of ones (1s) is transmitted, followed by a
zero (0), the transmission-line voltage has risen to a high
value by the end of the string of ones. It takes longer for
the signal to move toward the '0' state because the starting
voltage on the line is so far from the zero crossing.
Similarly, if a data pattern has a string of zeros followed
by a one and then another zero, the one-to-zero transition
starts from a voltage that is much closer to the zero crossing
Fail-Safe Functionality
The MAX22502E features fail-safe receiver inputs,
guaranteeing a logic-high on the receiver output (RO)
when the receiver inputs are shorted or open for longer
than 10μs (typ). When the differential receiver input
voltage is less than 50mV for more than 10μs (typ), RO is
logic-high. For example, in the case of a terminated bus
with all transmitters disabled, the receiver’s differential
input voltage is pulled to 0V by the termination resistor,
(V - V = 0) and it takes much less time for the signal to
Y
Z
reach the zero crossing.
so (V - V = 0V) > -50mV and RO is guaranteed to be a
A
B
Preemphasis reduces ISI by boosting the differential
signal amplitude at every transition edge, counteracting the
high frequency attenuation of the cable. When the DI input
changes from a logic low to a logic high, the differential
logic-high after 10μs (typ).
Driver Single-Ended Operation
The Y and Z outputs on the MAX22502E can be used
in the standard differential operating mode or as single-
ended outputs. Because the driver outputs swing rail-to-
rail, they can also be used as individual standard TTL
logic outputs.
output (V - V ) is driven high to V . At the end of
Y
Z
ODP
the preemphasis interval, the differential voltage returns
to a lower level (V ). The preemphasis differential high
OD
voltage (V
) is typically 1.37 times the V
voltage.
ODP
OD
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│ 14
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Figure 11. Eye Diagram, 100Mbps Over 10m Cat5e Cable,
Figure 10. Eye Diagram, 100Mbps Over 10m Cat5e Cable,
Preemphasis Enabled, V
= V = 5V
Preemphasis Disabled, V
= V = 5V
CC
L
CC
L
Figure 12. Eye Diagram, 50Mbps Over 100m Cat5e Cable,
Figure 13. Eye Diagram, 50Mbps Over 100m Cat5e Cable,
Preemphasis Enabled, V = V = 5V
Preemphasis Disabled, V
= V = 5V
CC
L
CC
L
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Hot-Swap Capability
Driver Output Protection
The DE and RE enable inputs feature hot-swap functionality.
Two mechanisms prevent excessive output current and
power dissipation caused by faults or by bus contention. The
first, a current limit on the output stage provides immediate
protection against short circuits over the whole common-
mode voltage range. The second, a thermal-shutdown
circuit, forces the driver outputs into a high-impedance
state if the die temperature exceeds +160°C (typ).
At each input there are two NMOS devices, M1 and M2
(Figure 14). When V
ramps from zero, an internal
CC
10ms timer turns on M2 and sets the SR latch, which also
turns on M1. Transistors M2, a 500μA current sink, and
M1, a 100μA current sink, pull DE to GND through a 5kΩ
resistor. M2 is designed to pull DE to the disabled state
against an external parasitic capacitance up to 100pF that
can drive DE high. After 10μs, the timer deactivates M2
while M1 remains on, holding DE low against three-state
leakages that can drive DE high. M1 remains on until an
external source overcomes the required input current.
At this time, the SR latch resets and M1 turns off. When
M1 turns off, DE reverts to a standard, high-impedance
Low-Power Shutdown Mode
The MAX22502E features low-power shutdown mode to
reduce supply current when the transceiver is not needed.
Pull the RE input high and the DE input low to put the
device in low-power shutdown mode. If the inputs are
in this state for at least 800ns, the part is guaranteed to
enter shutdown. The MAX22502E draws 5μA (max) of
supply current when the device is in shutdown.
CMOS input. Whenever V
swap input is reset.
drops below 1V, the hot-
CC
The RE and DE inputs can be driven simultaneously. The
MAX22502E is guaranteed not to enter shutdown if RE is
high and DE is low for less than 50ns.
There is a complimentary circuit for RE that uses two
PMOS devices to pull RE to V
.
CC
V
CC
10µs
TIMER
TIMER
5k
DE
DE
(HOT-SWAP)
100µA
500µA
Figure 14. Simplified Structure of the Driver Enable (DE) Pin
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│ 16
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Network Topology
Applications Information
The MAX22502E transceiver is designed for high-speed
bidirectional RS-485/RS-422 data communications.
Multidrop networks can cause impedance discontinuities
which affect signal integrity. Maxim recommends using
a point-to-point network topology, instead of a multidrop
topology, when communicating with high data rates.
Terminate the transmission line at both ends with the
cable’s characteristic impedance to reduce reflections.
Powering the MAX22502E
No particular power supply sequencing is required for
the MAX22502 V
and V supplies during power-up.
CC
L
However, ensure that V ≤ V
for normal operation.
L
CC
Layout Recommendations
Ensurethatthepreemphasissetresistor(R
close to the PSET and GND pins in order to minimize
interference by other signals. Minimize the trace length
to the PSET resistor. Additionally, place a ground plane
)islocated
PSET
under R
and surround it with ground connections/
PSET
traces to minimize interference from the A and B switching
signals. See Figure 15.
Figure 15. Sample PSET Resistor Placement
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│ 17
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Ordering Information
PACKAGE
CODE
PART
PREEMPHASIS
LOGIC SUPPLY
PIN-PACKAGE
MAX22502EATC+
Y
Y
Y
Y
TDFN12-EP*
TDFN12-EP*
TD1233+1C
TD1233+1C
MAX22502EATC+T
+Denotes a lead (Pb)-free/RoHS-compliant package.
*EP = Exposed Pad
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│ 18
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MAX22502E
100Mbps Full-Duplex RS-485/RS-422
Transceiver for Long Cables
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
8/17
Initial release
—
14, 17
8
4/19
Corrected part references in the text
Corrected typo in Figure 8
.1
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2019 Maxim Integrated Products, Inc.
│ 19
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