MAX3012EUP-T [MAXIM]
Interface Circuit, BICMOS, PDSO20, 4.40 MM, MO-153AC, TSSOP-20;
| 型号： | MAX3012EUP-T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Interface Circuit, BICMOS, PDSO20, 4.40 MM, MO-153AC, TSSOP-20 信息通信管理 光电二极管 |
| 文件： | 总25页 (文件大小：970K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MAX3000E/MAX3001E/
MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
General Description
Features
The MAX3000E/MAX3001E/MAX3002–MAX3012
8-channel level translators provide the level shifting nec-
essary to allow data transfer in a multivoltage system.
♦ Guaranteed Data Rate Options
230kbps (MAX3000E)
4Mbps (MAX3001E)
20Mbps (MAX3002–MAX3012)
Externally applied voltages, V and V , set the logic lev-
CC
L
els on either side of the device. Logic signals present on
♦ Bidirectional Level Translation Without Using a
Directional Pin (MAX3000E/MAX3001E/MAX3002/
MAX3003)
the V side of the device appear as a higher voltage logic
L
signal on the V side of the device, and vice-versa.
CC
The MAX3000E/MAX3001E/MAX3002/MAX3003 use an
architecture specifically designed to be bidirectional
without the use of a directional pin.
♦ Unidirectional Level Translation
(MAX3004–MAX3012)
♦ Operation Down to +1.2V on V
L
The MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012
♦
1ꢀkV EꢁD Protection on ꢂ/O V
Lines
CC
feature an EN input that, when low, reduces the V
and
CC
(MAX3000E/MAX3001E)
V supply currents to < 2µA. The MAX3000E/MAX3001E
L
♦ Ultra-Low 0.1µA ꢁupply Current in ꢁhutdown
♦ Low Quiescent Current (< 10µA)
also have 1ꢀ5V EꢁS protection on the ꢂ/ꢃ V
side for
CC
greater protection in applications that route signals
externally. The MAX3000E operates at a guaranteed data
rate of 2305bps. The MAX3001E operates at a guaranteed
data rate of 4Mbps. The MAX3002–MAX3012 operate at a
guaranteed data rate of 20Mbps over the entire specified
operating voltage range.
♦ UCꢁP, TQFN, and TꢁꢁOP Packages
Ordering Information
PART
TEMP RANGE
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
PꢂN-PACKAGE
20 TꢁꢁꢃP
The MAX3000E/MAX3001E/MAX3002–MAX3012 accept
MAX3000EEUP
MAX3000EEBP-T
V voltages from +1.2V to +ꢀ.ꢀV and V
voltages from
L
CC
4 x ꢀ UCꢁP
+1.6ꢀV to +ꢀ.ꢀV, ma5ing them ideal for data transfer
between low-voltage AꢁꢂCs/PLSs and higher voltage
systems. The MAX3000E/MAX3001E/MAX3002–
MAX3012 are available in 20-bump UCꢁP™, 20-pin
TQFN (ꢀmm x ꢀmm), and 20-pin TꢁꢁꢃP pac5ages.
Ordering ꢂnformation continued at end of data sheet.
Note: All devices operate over the -40°C to +8ꢀ°C operating
temperature range.
Typical Operating Circuit
Applications
CMꢃꢁ Logic-Level Translation
+1.8V
+3.3V
Cellphones
ꢁPꢂ™ and MꢂCRꢃWꢂRE™ Level Translation
Low-Voltage AꢁꢂC Level Translation
ꢁmart Card Readers
V
V
CC
L
Cellphone Cradles
Portable Pꢃꢁ ꢁystems
EN
MAX3000E
MAX3001E
MAX3002–
MAX3012
Portable Communication Sevices
Low-Cost ꢁerial ꢂnterfaces
GPꢁ
+1.8V
SYSTEM
CONTROLLER
+3.3V
SYSTEM
DATA
I/O V
I/O V
DATA
L_
CC_
Telecommunications Equipment
GND
UCꢁP is a trademar5 of Maxim ꢂntegrated Products, ꢂnc.
ꢁPꢂ is a trademar5 of Motorola, ꢂnc.
MꢂCRꢃWꢂRE is a trademar5 of National ꢁemiconductor.
Pin Configurations and Functional Diagrams appear at end
of data sheet.
For pricing, delivery, and ordering information, please contact Maxim Direct
19-2672; Rev 5; 8/08
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
ABꢁOLUTE MAXꢂMUM RATꢂNGꢁ
(All voltages referenced to GNS.)
ꢃperating Temperature Ranges
V
V
ꢂ/ꢃ V
...........................................................................-0.3V to +6V
MAX3001EAUP..............................................-40°C to +12ꢀ°C
MAX300_EE_P.................................................-40°C to +8ꢀ°C
MAX30_ _E_P ..................................................-40°C to +8ꢀ°C
Junction Temperature......................................................+1ꢀ0°C
ꢁtorage Temperature Range.............................-6ꢀ°C to +1ꢀ0°C
Lead Temperature (soldering, 10s) .................................+300°C
CC
-0.3V to +6V
L...........................................................................................
......................................................-0.3V to (V
+ 0.3V)
CC_
CC
ꢂ/ꢃ V ...........................................................-0.3V to (V + 0.3V)
EN, EN A/B ...............................................................-0.3V to +6V
ꢁhort-Circuit Suration ꢂ/ꢃ V , ꢂ/ꢃ V to GNS .......Continuous
L_
L
L_
CC_
Continuous Power Sissipation (T = +70°C)
A
20-Pin TꢁꢁꢃP (derate 7.0mW/°C above +70°C) .........ꢀꢀ9mW
20-Bump UCꢁP (derate 10mW/°C above +70°C) .......800mW
20-Pin ꢀmm x ꢀmm TQFN
(derate 20.0mW/°C above +70°C) .....................................1667mW
ꢁtresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRꢂCAL CHARACTERꢂꢁTꢂCꢁ
(V
= +1.6ꢀV to +ꢀ.ꢀV, V = +1.2V to V , EN = V (MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012), EN A/B = V or 0
CC
L
CC
L
L
(MAX3003), T = T
to T
. Typical values are at V
= +1.6ꢀV, V = +1.2V, and T = +2ꢀ°C.) (Notes 1, 2)
A
MꢂN
MAX
CC
L
A
PARAMETER
POWER ꢁUPPLꢂEꢁ
V ꢁupply Range
ꢁYMBOL
CONDꢂTꢂONꢁ
MꢂN
TYP
MAX
UNꢂTꢁ
V
1.2
V
CC
V
V
L
L
V
ꢁupply Range
V
1.6ꢀ
ꢀ.ꢀ0
CC
CC
ꢂ/ꢃ V _ = 0, ꢂ/ꢃ V _ = 0
CC
L
or ꢂ/ꢃ V _ = V , ꢂ/ꢃ V _ = V ,
MAX3000E/MAX3002–MAX3012
0.1
0.1
0.1
0.1
10
CC
CC
L
L
ꢁupply Current from V
ꢁupply Current from V
ꢂ
µA
µA
CC
QVCC
ꢂ/ꢃ V _ = 0, ꢂ/ꢃ V _ = 0
CC
L
or ꢂ/ꢃ V _ = V , ꢂ/ꢃ V _ = V ,
ꢀ0
10
ꢀ0
CC
CC
L
L
MAX3001E
ꢂ/ꢃ V _ = 0, ꢂ/ꢃ V _ = 0
CC
L
or ꢂ/ꢃ V _ = V , ꢂ/ꢃ V _ = V ,
CC
CC
L
L
MAX3000E/MAX3002–MAX3012
ꢂ
L
QVL
ꢂ/ꢃ V _ = 0, ꢂ/ꢃ V _ = 0
CC
L
or ꢂ/ꢃ V _ = V , ꢂ/ꢃ V _ = V ,
CC
CC
L
L
MAX3001E
T
A
= +2ꢀ°C, EN = 0,
MAX3000E/MAX3001E/MAX3002/
MAX3004–MAX3012
0.1
0.1
0.1
0.1
2
2
2
2
V
ꢁhutdown ꢁupply Current
ꢂ
µA
µA
CC
ꢁHSN-VCC
T
A
= +2ꢀ°C, EN A/B = 0,
MAX3003
T
A
= +2ꢀ°C, EN = 0,
MAX3000E/MAX3001E/MAX3002/
MAX3004–MAX3012
V ꢁhutdown ꢁupply Current
ꢂ
ꢁHSN-VL
L
T
A
= +2ꢀ°C, EN A/B = 0,
MAX3003
2
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
ELECTRꢂCAL CHARACTERꢂꢁTꢂCꢁ (continued)
(V
= +1.6ꢀV to +ꢀ.ꢀV, V = +1.2V to V , EN = V (MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012), EN A/B = V or 0
CC
L
CC
L
L
(MAX3003), T = T
to T
. Typical values are at V
= +1.6ꢀV, V = +1.2V, and T = +2ꢀ°C.) (Notes 1, 2)
A
MꢂN
MAX
CC
L
A
PARAMETER
ꢁYMBOL
CONDꢂTꢂONꢁ
MꢂN
TYP
MAX
UNꢂTꢁ
T
A
= +2ꢀ°C, EN = 0,
MAX3000E/MAX3001E/MAX3002/
MAX3004–MAX3012
0.1
2
ꢂ/ꢃ V _ Three-ꢁtate ꢃutput
CC
Lea5age Current
µA
µA
T
A
= +2ꢀ°C, EN A/B = 0,
0.1
0.1
2
2
MAX3003
ꢂ/ꢃ V _ Three-ꢁtate ꢃutput
L
Lea5age Current
EN A/B = 0, MAX3003
EN = 0,
ꢂ/ꢃ V _ Pulldown Resistance
L
MAX3000E/MAX3001E/MAX3002/
MAX3004–MAX3012
4.ꢀ9
8.30
1
5Ω
Suring ꢁhutdown
EN or EN A/B ꢂnput Lea5age Current
T
A
= +2ꢀ°C
µA
LOGꢂC-LEVEL THREꢁHOLDꢁ
ꢂ/ꢃ V _ ꢂnput-Voltage High
L
Threshold
V
2/3 x V
V
V
V
V
V
V
V
V
V
V
ꢂHL
L
ꢂ/ꢃ V _ ꢂnput-Voltage Low
L
Threshold
V
1/3 x V
ꢂLL
L
ꢂ/ꢃ V _ ꢂnput-Voltage High
CC
Threshold
V
2/3 x V
CC
ꢂHC
ꢂ/ꢃ V _ ꢂnput-Voltage Low
CC
Threshold
V
1/3 x V
CC
ꢂLC
EN, EN A/B ꢂnput-Voltage High
Threshold
V
V - 0.4
L
ꢂH
EN, EN A/B ꢂnput-Voltage Low
Threshold
V
0.4
V - 0.4
ꢂL
ꢂ/ꢃ V _ source current = 20µA, ꢂ/ꢃ V _ ≥
L
CC
ꢂ/ꢃ V _ ꢃutput-Voltage High
V
ꢃHL
L
L
V
- 0.4V
CC
ꢂ/ꢃ V _ sin5 current = 20µA,
L
ꢂ/ꢃ V _ ꢃutput-Voltage Low
V
0.4
0.4
L
ꢃLL
ꢂ/ꢃ V _ ≤ 0.4V
CC
ꢂ/ꢃ V
source current = 20µA, ꢂ/ꢃ V _ ≥
L
CC_
ꢂ/ꢃ V _ ꢃutput-Voltage High
V
V
- 0.4
CC
CC
ꢃHC
V - 0.4V
L
ꢂ/ꢃ V
sin5 current = 20µA,
CC
ꢂ/ꢃ V _ ꢃutput-Voltage Low
CC
V
ꢃLC
ꢂ/ꢃ V _ ≤ 0.4V
L
EꢁD PROTECTꢂON
Human Body Model,
MAX3000E/MAX3001E
ꢂ/ꢃ V
_
1ꢀ
5V
CC
Maxim Integrated
3
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
TꢂMꢂNG CHARACTERꢂꢁTꢂCꢁ
(V
= +1.6ꢀV to +ꢀ.ꢀV, V = +1.2V to V , EN = V (MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012), EN A/B = V or 0
CC
L
CC
L
L
(MAX3003), T = T
to T
. Typical values are at V
= +1.6ꢀV, V = +1.2V, and T = +2ꢀ°C.) (Notes 1, 2)
A
MꢂN
MAX
CC
L
A
PARAMETER
ꢁYMBOL
CONDꢂTꢂONꢁ
MꢂN
TYP
MAX
UNꢂTꢁ
R = ꢀ0Ω, C
Figures 1a, 1b
= ꢀ0pF, MAX3000E,
= ꢀ0pF, MAX3001E,
= ꢀ0pF,
VCC
ꢁ
VCC
400
800
1200
R = ꢀ0Ω, C
ꢁ
VCC
ꢂ/ꢃ V _ Rise Time
t
2ꢀ
ꢀ0
1ꢀ
ns
ns
ns
ns
ns
ns
CC
RVCC
Figures 1a, 1b
R = ꢀ0Ω, C
ꢁ
MAX3002–MAX3012, Figures 1a, 1b
R = ꢀ0Ω, C
Figures 1a, 1b
= ꢀ0pF, MAX3000E,
= ꢀ0pF, MAX3001E,
= ꢀ0pF,
VCC
ꢁ
VCC
400
400
400
800
2ꢀ
1200
ꢀ0
R = ꢀ0Ω, C
ꢁ
VCC
ꢂ/ꢃ V _ Fall Time
t
FVCC
CC
Figures 1a, 1b
R = ꢀ0Ω, C
ꢁ
1ꢀ
MAX3002–MAX3012, Figures 1a, 1b
R = ꢀ0Ω, C = ꢀ0pF, MAX3000E,
ꢁ
VL
800
2ꢀ
1200
ꢀ0
Figures 2a, 2b
R = ꢀ0Ω, C = ꢀ0pF, MAX3001E,
ꢁ
VL
ꢂ/ꢃ V _ Rise Time
t
RVL
L
Figures 2a, 2b
R = ꢀ0Ω, C = 1ꢀpF,
ꢁ
VL
1ꢀ
MAX3002–MAX3012, Figures 2a, 2b
R = ꢀ0Ω, C = ꢀ0pF, MAX3000E,
ꢁ
VL
800
2ꢀ
1200
6ꢀ
Figures 2a, 2b
R = ꢀ0Ω, C = ꢀ0pF, MAX3001E,
ꢁ
VL
ꢂ/ꢃ V _ Fall Time
L
t
FVL
Figures 2a, 2b
R = ꢀ0Ω, C = 1ꢀpF,
ꢁ
VL
1ꢀ
MAX3002–MAX3012, Figures 2a, 2b
R = ꢀ0Ω, C
= ꢀ0pF, MAX3000E,
= ꢀ0pF, MAX3001E,
= ꢀ0pF,
VCC
ꢁ
VCC
1000
ꢀ0
Figures 1a, 1b
Propagation Selay
(Sriving ꢂ/ꢃ V _)
L
R = ꢀ0Ω, C
ꢁ
VCC
ꢂ/ꢃ
ꢂ/ꢃ
VL-VCC
Figures 1a, 1b
R = ꢀ0Ω, C
ꢁ
20
MAX3002–MAX3012, Figures 1a, 1b
R = ꢀ0Ω, C = ꢀ0pF, MAX3000E,
ꢁ
VL
1000
ꢀ0
Figures 2a, 2b
Propagation Selay
R = ꢀ0Ω, C = ꢀ0pF, MAX3001E,
ꢁ
VL
VCC-VL
(Sriving ꢂ/ꢃ V _)
Figures 2a, 2b
CC
R = ꢀ0Ω, C = 1ꢀpF,
MAX3002–MAX3012, Figures 2a, 2b
ꢁ
VL
20
Note 1: All units are 100% production tested at T = +2ꢀ°C. Limits over the operating temperature range are guaranteed by design
A
and not production tested.
Note 2: For mal operation, ensure that V < V . Suring power-up, V > V does not damage the device.
L
CC
L
CC
4
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
TꢂMꢂNG CHARACTERꢂꢁTꢂCꢁ (continued)
(V
= +1.6ꢀV to +ꢀ.ꢀV, V = +1.2V to V , EN = V (MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012), EN A/B = V or 0
CC
L
CC
L
L
(MAX3003), T = T
to T
. Typical values are at V
= +1.6ꢀV, V = +1.2V, and T = +2ꢀ°C.) (Notes 1, 2)
A
MꢂN
MAX
CC
L
A
PARAMETER
ꢁYMBOL
CONDꢂTꢂONꢁ
MꢂN
TYP
MAX
UNꢂTꢁ
R = ꢀ0Ω, C
MAX3000E
= ꢀ0pF, C = ꢀ0pF,
VL
ꢁ
VCC
VCC
VCC
ꢀ00
R = ꢀ0Ω, C
= ꢀ0pF, C = ꢀ0pF,
VL
ꢁ
Channel-to-Channel ꢁ5ew
t
10
ꢀ
ns
ns
ꢁKEW
MAX3001E
R = ꢀ0Ω, C
= ꢀ0pF, C = 1ꢀpF,
VL
ꢁ
MAX3002–MAX3012
R = ꢀ0Ω, C = ꢀ0pF, C = ꢀ0pF,
A
ꢁ
VCC
VL
800
30
10
2
ΔT = +20°C, MAX3000E (Note 3)
R = ꢀ0Ω, C
ꢁ
= ꢀ0pF, C = ꢀ0pF,
VL
VCC
Part-to-Part ꢁ5ew
t
PPꢁKEW
ΔT = +20°C, MAX3001E (Note 3)
A
R = ꢀ0Ω, C
ꢁ
= ꢀ0pF, C = 1ꢀpF,
VL
VCC
ΔT = +20°C, MAX3002–MAX3012 (Note 3)
A
Propagation Selay from
C
VCC
= ꢀ0pF, MAX3000E/MAX3001E,
t
µs
µs
EN-VCC
ꢂ/ꢃ V to ꢂ/ꢃ V
after EN
CC_
MAX3002–MAX3012, Figure 3
L_
C
VL
= ꢀ0pF, MAX3000E/MAX3001E/
2
2
Propagation Selay from
ꢂ/ꢃ V to ꢂ/ꢃ V after EN
MAX3002/MAX3004–MAX3012, Figure 4
t
EN-VL
CC_
L_
C
VL
= 1ꢀpF, MAX3003, Figure 4
R = ꢀ0Ω, C
MAX3000E
= ꢀ0pF, C = ꢀ0pF,
VL
ꢁ
VCC
VCC
VCC
230
4
5bps
R = ꢀ0Ω, C
= ꢀ0pF, C = ꢀ0pF,
VL
ꢁ
Maximum Sata Rate
MAX3001E
Mbps
R = ꢀ0Ω, C
= ꢀ0pF, C = 1ꢀpF,
VL
ꢁ
20
MAX3002–MAX3012
Note 3: V
from device 1 must equal V
of device 2; V from device 1 must equal V of device 2.
CC L L
CC
Maxim Integrated
5
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
TꢂMꢂNG CHARACTERꢂꢁTꢂCꢁ—MAX3002–MAX3012
(V
= +1.6ꢀV to +ꢀ.ꢀV, V = +1.2V to V , EN = V (MAX3002/MAX3004–MAX3012), EN A/B = V or 0 (MAX3003), T = T
to
MꢂN
CC
L
CC
L
L
A
T
MAX.
) (Notes 1, 2)
PARAMETER
+1.2V ≤ V ≤ V ≤ +3.3V
ꢁYMBOL
CONDꢂTꢂONꢁ
MꢂN
TYP
MAX
UNꢂTꢁ
L
CC
ꢂ/ꢃ V _ Rise Time
t
1ꢀ
1ꢀ
1ꢀ
1ꢀ
1ꢀ
1ꢀ
ꢀ
ns
ns
ns
ns
CC
RVCC
ꢂ/ꢃ V _ Fall Time
t
FVCC
CC
ꢂ/ꢃ V _ Rise Time
t
RVL
L
ꢂ/ꢃ V _ Fall Time
L
t
FVL
ꢂ/ꢃ
ꢂ/ꢃ
Sriving ꢂ/ꢃ V _
L
VL-VCC
VCC-VL
ꢁKEW
Propagation Selay
ns
Sriving ꢂ/ꢃ V
_
CC
Each translator equally loaded
Channel-to-Channel ꢁ5ew
Maximum Sata Rate
t
ns
20
3ꢀ
30
Mbps
+2.ꢀV ≤ V ≤ V
≤ +3.3V
L
CC
ꢂ/ꢃ V _ Rise Time
t
8.ꢀ
8.ꢀ
8.ꢀ
8.ꢀ
8.ꢀ
8.ꢀ
10
ns
ns
ns
ns
CC
RVCC
ꢂ/ꢃ V _ Fall Time
t
FVCC
CC
ꢂ/ꢃ V _ Rise Time
t
RVL
L
ꢂ/ꢃ V _ Fall Time
L
t
FVL
ꢂ/ꢃ
ꢂ/ꢃ
Sriving ꢂ/ꢃ V _
L
VL-VCC
VCC-VL
ꢁKEW
Propagation Selay
ns
Sriving ꢂ/ꢃ V
_
CC
Channel-to-Channel ꢁ5ew
Maximum Sata Rate
t
Each translator equally loaded
ns
Mbps
+1.8V ≤ V ≤ V
≤ +2.ꢀV
L
CC
ꢂ/ꢃ V _ Rise Time
t
10
10
10
10
1ꢀ
10
ꢀ
ns
ns
ns
ns
CC
RVCC
ꢂ/ꢃ V _ Fall Time
t
FVCC
CC
ꢂ/ꢃ V _ Rise Time
t
RVL
L
ꢂ/ꢃ V _ Fall Time
L
t
FVL
ꢂ/ꢃ
ꢂ/ꢃ
Sriving ꢂ/ꢃ V _
L
VL-VCC
VCC-VL
ꢁKEW
Propagation Selay
ns
Sriving ꢂ/ꢃ V
_
CC
Channel-to-Channel ꢁ5ew
Maximum Sata Rate
t
Each translator equally loaded
ns
Mbps
6
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
Typical Operating Characteristics
(T = +2ꢀ°C, unless otherwise noted.)
A
V SUPPLY CURRENT vs. SUPPLY VOLTAGE
V
SUPPLY CURRENT vs. SUPPLY VOLTAGE
V SUPPLY CURRENT vs. TEMPERATURE
L
L
CC
(DRIVING I/O V , V = 1.8V)
(DRIVING I/O V , V = 1.8V)
(DRIVING I/O V , V = 3.3V, V = 1.8V)
L
L
L
L
CC CC L
600
500
400
300
200
100
0
10,000
8000
6000
4000
2000
0
2000
1500
1000
500
0
DATA RATE = 20Mbps
DATA RATE = 20Mbps
DATA RATE = 20Mbps
DATA RATE = 4Mbps
DATA RATE = 4Mbps
DATA RATE = 4Mbps
DATA RATE = 230kbps
DATA RATE = 230kbps
DATA RATE = 230kbps
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
-40
-15
10
35
60
85
TEMPERATURE (°C)
V SUPPLY CURRENT vs. CAPACITIVE LOAD ON
L
V
SUPPLY CURRENT vs. TEMPERATURE
CC
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
(DRIVING I/O V , V = 3.3V, V = 1.8V)
CC
L
CC
L
CC CC
L
100
80
60
40
20
0
2500
2000
1500
1000
500
DATA RATE = 20Mbps
DATA RATE = 20Mbps
DATA RATE = 4Mbps
DATA RATE = 4Mbps
DATA RATE = 230kbps
DATA RATE = 230kbps
0
10 20 30 40 50 60 70 80 90 100
CAPACITIVE LOAD (pF)
-40
-15
10
35
60
85
TEMPERATURE (°C)
MAX3000E
V
SUPPLY CURRENT vs. CAPACITIVE LOAD ON
RISE/FALL TIME vs. CAPACITIVE LOAD ON
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
CC
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
CC
L
CC
L
CC
L
CC
L
2000
1500
1000
500
0
7000
6000
5000
4000
3000
2000
1000
0
DATA RATE = 20Mbps
t
LH
t
HL
DATA RATE = 4Mbps
DATA RATE = 230kbps
DATA RATE = 230kbps
10 20 30 40 50 60 70 80 90 100
CAPACITIVE LOAD (pF)
10 20 30 40 50 60 70 80 90 100
CAPACITIVE LOAD (pF)
Maxim Integrated
7
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
Typical Operating Characteristics (continued)
(T = +2ꢀ°C, unless otherwise noted.)
A
MAX3002–MAX3012
MAX3001E
RISE/FALL TIME vs. CAPACITIVE LOAD ON
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
RISE/FALL TIME vs. CAPACITIVE LOAD ON
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
CC
L
CC
L
CC
L
CC
L
60
50
40
30
20
10
0
8
6
4
2
0
t
LH
t
LH
t
HL
t
HL
DATA RATE = 20Mbps
30 40 50
DATA RATE = 4Mbps
10
20
10 20 30 40 50 60 70 80 90 100
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
MAX3001E
MAX3000E
RISE/FALL TIME vs. CAPACITIVE LOAD ON
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
RISE/FALL TIME vs. CAPACITIVE LOAD ON
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
L
CC CC
L
L
CC CC
L
60
50
40
30
20
10
0
2000
t
LH
t
HL
1500
1000
500
0
t
HL
t
LH
DATA RATE = 4Mbps
DATA RATE = 230kbps
60
30 40
50
90 100
10 20 30 40 50 60 70 80 90 100
CAPACITIVE LOAD (pF)
10 20
70 80
CAPACITIVE LOAD (pF)
MAX3002–MAX3012
RISE/FALL TIME vs. CAPACITIVE LOAD ON
MAX3000E
PROPAGATION DELAY vs. CAPACITIVE LOAD ON
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
L
CC CC
L
CC
L
CC
L
4
3
2
1
500
400
300
200
100
0
t
PLH
t
HL
t
PHL
t
LH
DATA RATE = 20Mbps
DATA RATE = 230kbps
10
15
20
25
30
10 20 30 40 50 60 70 80 90 100
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
8
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
Typical Operating Characteristics (continued)
(T = +2ꢀ°C, unless otherwise noted.)
A
MAX3002–MAX3012
MAX3001E
MAX3000E
PROPAGATION DELAY vs. CAPACITIVE LOAD ON
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
PROPAGATION DELAY vs. CAPACITIVE LOAD ON
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
PROPAGATION DELAY vs. CAPACITIVE LOAD ON
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
CC
L
CC
L
CC
L
CC
L
L
CC CC
L
12
10
8
600
500
400
300
200
100
0
30
25
20
15
10
5
t
PHL
t
PLH
t
PLH
t
PLH
6
4
t
PHL
t
PHL
2
DATA RATE = 20Mbps
DATA RATE = 230kbps
DATA RATE = 4Mbps
40
0
0
10
15
20
25
30
10 20 30 40 50 60 70 80 90 100
CAPACITIVE LOAD (pF)
10
20
30
50
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
MAX3001E
MAX3002–MAX3012
PROPAGATION DELAY vs. CAPACITIVE LOAD ON
PROPAGATION DELAY vs. CAPACITIVE LOAD ON
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
I/O V (DRIVING I/O V , V = 3.3V, V = 1.8V)
L
CC CC
L
L
CC CC
L
15
12
9
5
4
3
2
1
0
t
PHL
t
PHL
6
t
PLH
t
PLH
3
DATA RATE = 4Mbps
40
DATA RATE = 20Mbps
0
10
20
30
50
10
15
20
25
30
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
MAX3001E RAIL-TO-RAIL DRIVING
MAX3000E RAIL-TO-RAIL DRIVING
(DRIVING I/O V , V = 3.3V, V = 1.8V,
MAX3002–MAX3012 RAIL-TO-RAIL DRIVING
(DRIVING I/O V , V = 3.3V, V = 1.8V,
(DRIVING I/O V , V = 3.3V, V = 1.8V,
L
CC
L
L
CC
L
L
CC
L
CV = 50pF, DATA RATE = 4Mbps)
CV = 50pF, DATA RATE = 230kbps)
CV = 50pF, DATA RATE = 20Mbps)
CC
CC
CC
MAX3000E/01E/02-12 toc20
MAX3000E/01E/02-12 toc19
MAX3000E/01E/02-12 toc21
I/O V
I/O V
I/O V
L_
L_
L_
1V/div
1V/div
1V/div
GND
GND
GND
I/O V
I/O V
I/O V
CC_
CC_
CC_
2V/div
2V/div
2V/div
GND
GND
GND
40ns/div
1μs/div
10ns/div
Maxim Integrated
9
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
-in Description
MAX3000E/MAX3001E/MAX3002
PꢂN
NAME
FUNCTꢂON
TꢁꢁOP
UCꢁP
B1
TQFN
1
2
3
4
ꢀ
6
7
8
9
19
20
1
ꢂ/ꢃ V 1
ꢂnput/ꢃutput 1, Referenced to V
L
L
A1
V
Logic ꢂnput Voltage, +1.2V ≤ V ≤ V . Bypass V to GNS with a 0.1µF capacitor.
CC L
L
L
ꢂnput/ꢃutput 2, Referenced to V
ꢂnput/ꢃutput 3, Referenced to V
ꢂnput/ꢃutput 4, Referenced to V
ꢂnput/ꢃutput ꢀ, Referenced to V
ꢂnput/ꢃutput 6, Referenced to V
ꢂnput/ꢃutput 7, Referenced to V
ꢂnput/ꢃutput 8, Referenced to V
A2
ꢂ/ꢃ V 2
L
L
L
L
L
L
L
L
B2
2
ꢂ/ꢃ V 3
L
A3
3
ꢂ/ꢃ V 4
L
B3
4
ꢂ/ꢃ V ꢀ
L
A4
ꢀ
ꢂ/ꢃ V 6
L
B4
6
ꢂ/ꢃ V 7
L
Aꢀ
7
ꢂ/ꢃ V 8
L
Enable ꢂnput. ꢂf EN is pulled low, ꢂ/ꢃ V 1 to ꢂ/ꢃ V 8 are in three-state, while ꢂ/ꢃ V 1
CC
CC
L
to ꢂ/ꢃ V 8 have internal 65Ω pulldown resistors. Srive EN high (V ) for normal
10
Bꢀ
8
EN
L
L
operation.
11
12
13
14
1ꢀ
16
17
18
Cꢀ
Sꢀ
C4
S4
C3
S3
C2
S2
9
GNS
Ground
10
11
12
13
14
1ꢀ
16
ꢂ/ꢃ V
ꢂ/ꢃ V
ꢂ/ꢃ V
ꢂ/ꢃ V
ꢂ/ꢃ V
ꢂ/ꢃ V
ꢂ/ꢃ V
8
7
6
ꢀ
4
3
2
ꢂnput/ꢃutput 8, Referenced to V
ꢂnput/ꢃutput 7, Referenced to V
ꢂnput/ꢃutput 6, Referenced to V
ꢂnput/ꢃutput ꢀ, Referenced to V
ꢂnput/ꢃutput 4, Referenced to V
ꢂnput/ꢃutput 3, Referenced to V
ꢂnput/ꢃutput 2, Referenced to V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
19
S1
17
V
V
ꢂnput Voltage, +1.6ꢀV ≤ V
≤ +ꢀ.ꢀV. Bypass V to GNS with a 0.1µF capacitor.
CC
CC
CC
CC
20
—
C1
—
18
EP
ꢂ/ꢃ V
1
ꢂnput/ꢃutput 1, Referenced to V
Exposed Pad. Connect to GNS.
CC
CC
EP
10
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
-in Description (continued)
MAX3003
PꢂN
UCꢁP
B1
NAME
ꢂ/ꢃ V 1A
FUNCTꢂON
TꢁꢁOP
TQFN
1
2
3
4
ꢀ
6
7
8
9
19
20
1
ꢂnput/ꢃutput 1A, Referenced to V
L
L
A1
V
Logic ꢂnput Voltage, +1.2V ≤ V ≤ V . Bypass V to GNS with a 0.1µF capacitor.
L
L
CC
L
A2
ꢂ/ꢃ V 2A
ꢂnput/ꢃutput 2A, Referenced to V
L
L
L
L
L
L
L
L
B2
2
ꢂ/ꢃ V 3A
ꢂnput/ꢃutput 3A, Referenced to V
ꢂnput/ꢃutput 4A, Referenced to V
ꢂnput/ꢃutput 1B, Referenced to V
ꢂnput/ꢃutput 2B, Referenced to V
ꢂnput/ꢃutput 3B, Referenced to V
ꢂnput/ꢃutput 4B, Referenced to V
L
A3
3
ꢂ/ꢃ V 4A
L
B3
4
ꢂ/ꢃ V 1B
L
A4
ꢀ
ꢂ/ꢃ V 2B
L
B4
6
ꢂ/ꢃ V 3B
L
Aꢀ
7
ꢂ/ꢃ V 4B
L
Enable ꢂnput. ꢂf EN A/B is pulled low, channels 1B through 4B are active, and channels
10
Bꢀ
8
EN A/B
GNS
1A through 4A are in three-state. ꢂf EN A/B is driven high to V , channels 1A through 4A
L
are active, and channels 1B through 4B are in three-state.
11
12
13
14
1ꢀ
16
17
18
Cꢀ
Sꢀ
C4
S4
C3
S3
C2
S2
9
Ground
10
11
12
13
14
1ꢀ
16
ꢂ/ꢃ V 4B ꢂnput/ꢃutput 4B, Referenced to V
CC
CC
CC
CC
CC
CC
CC
CC
ꢂ/ꢃ V 3B ꢂnput/ꢃutput 3B, Referenced to V
CC
ꢂ/ꢃ V 2B ꢂnput/ꢃutput 2B, Referenced to V
CC
ꢂ/ꢃ V 1B ꢂnput/ꢃutput 1B, Referenced to V
CC
ꢂ/ꢃ V 4A ꢂnput/ꢃutput 4A, Referenced to V
CC
ꢂ/ꢃ V 3A ꢂnput/ꢃutput 3A, Referenced to V
CC
ꢂ/ꢃ V 2A ꢂnput/ꢃutput 2A, Referenced to V
CC
19
S1
17
V
V
ꢂnput Voltage, +1.6ꢀV ≤ V
≤ +ꢀ.ꢀV. Bypass V
to GNS with a 0.1µF capacitor.
CC
CC
CC
CC
20
—
C1
—
18
EP
ꢂ/ꢃ V 1A ꢂnput/ꢃutput 1A, Referenced to V
CC CC
EP
Exposed Pad. Connect to GNS.
Maxim Integrated
11
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
-in Description (continued)
MAX3004–MAX3012
NAME
FUNCTꢂON (Note 1)
< +ꢀ.ꢀV. Bypass V to GNS with a 0.1µF capacitor.
V
V
ꢂnput Voltage, +1.6ꢀV < V
CC CC
CC
CC
V
Logic ꢂnput Voltage, +1.2V ≤ V ≤ V . Bypass V to GNS with a 0.1µF capacitor.
L CC L
L
GNS
Ground
EN
Enable ꢂnput. ꢂf EN is pulled low, ꢃV 1–ꢃV 8 are in three-state, while ꢂV 1–ꢂV 8 have 65Ω pulldown
CC
CC
L
L
(MAX3004)
resistors. Srive EN high (V ) for normal operation.
L
EN
Enable ꢂnput. ꢂf EN is pulled low, ꢂV 1 and ꢃV 2–ꢃV 8 are in three-state, while ꢃV 1 and ꢂV 2–ꢂV 8 have
CC CC CC L L L
(MAX300ꢀ)
65Ω pulldown resistors. Srive EN high (V ) for normal operation.
L
EN
Enable ꢂnput. ꢂf EN is pulled low, ꢂV 1, ꢂV 2, and ꢃV 3–ꢃV 8 are in three-state, while ꢃV 1, ꢃV 2, and
CC CC CC CC L L
(MAX3006)
ꢂV 3–ꢂV 8 have 65Ω pulldown resistors. Srive EN high (V ) for normal operation.
L L L
EN
Enable ꢂnput. ꢂf EN is pulled low, ꢂV 1, ꢂV 2, ꢂV 3, and ꢃV 4–ꢃV 8 are in three-state, while ꢃV 1,
CC CC CC CC CC L
(MAX3007)
ꢃV 2, ꢃV 3, and ꢂV 4–ꢂV 8 have 65Ω pulldown resistors. Srive EN high (V ) for normal operation.
L L L L L
EN
Enable ꢂnput. ꢂf EN is pulled low, ꢂV 1–ꢂV 4 and ꢃV ꢀ–ꢃV 8 are in three-state, while ꢃV 1–ꢃV 4 and
CC CC CC CC L L
(MAX3008)
ꢂV ꢀ–ꢂV 8 have 65Ω pulldown resistors. Srive EN high (V ) for normal operation.
L L L
EN
Enable ꢂnput. ꢂf EN is pulled low, ꢂV 1–ꢂV ꢀ, ꢃV 6, ꢃV 7, and ꢃV 8 are in three-state, while
CC CC CC CC CC
(MAX3009)
ꢃV 1–ꢃV ꢀ, ꢂV 6, ꢂV 7, and ꢂV 8 have 65Ω pulldown resistors. Srive EN high (V ) for normal operation.
L L L L L L
EN
Enable ꢂnput. ꢂf EN is pulled low, ꢂV 1–ꢂV 6, ꢃV 7, and ꢃV 8 are in three-state, while ꢃV 1–ꢃV 6, ꢂV 7,
CC CC CC CC L L L
(MAX3010)
and ꢂV 8 have 65Ω pulldown resistors. Srive EN high (V ) for normal operation.
L L
EN
Enable ꢂnput. ꢂf EN is pulled low, ꢂV 1–ꢂV 7 and ꢃV 8 are in three-state, while ꢃV 1–ꢃV 7 and ꢂV 8 have
CC CC CC L L L
(MAX3011)
65Ω pulldown resistors. Srive EN high (V ) for normal operation.
L
EN
Enable ꢂnput. ꢂf EN is pulled low, ꢂV 1–ꢂV 8 are in three-state, while ꢃV 1–ꢃV 8 have 65Ω pulldown
CC CC L L
(MAX3012)
resistors. Srive EN high (V ) for normal operation.
L
ꢂV 1–ꢂV 8
ꢂnputs Referenced to V , Numbers 1 to 8
L
L
L
ꢃV 1–ꢃV 8
ꢃutputs Referenced to V , Numbers 1 to 8
L
L
L
ꢂV 1–ꢂV
8
CC
ꢂnputs Referenced to V , Numbers 1 to 8
CC
CC
ꢃV 1–ꢃV
8
CC
ꢃutputs Referenced to V , Numbers 1 to 8
CC
CC
Note 1: For specific pin numbers, see the Pin Configurations.
12
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
______________________________________________Test Circuits/Timing Diagrams
t
≤ 3ns
RISE/FALL
I/O V
90%
50%
L
V
L
V
CC
MAX3000E/MAX3001E/
MAX3002/MAX3003
EN
10%
I/O
VL-VCC
I/O
VL-VCC
I/O V
L
I/O V
CC
I/O V
90%
CC
R
S
C
VCC
SOURCE
50%
10%
t
t
RVCC
FVCC
Figure 1a. Sriving ꢂ/ꢃ V
Figure 1b. Timing for Sriving ꢂ/ꢃ V
L
L
t
≤ 3ns
RISE/FALL
I/O V
90%
50%
CC
V
L
V
CC
MAX3000E/MAX3001E/
MAX3002/MAX3003
EN
10%
I/O
VCC-VL
I/O
VCC-VL
R
S
I/O V
L
I/O V
90%
L
SOURCE
C
VL
I/O V
CC
50%
10%
t
t
RVL
FVL
Figure 2a. Sriving ꢂ/ꢃ V
Figure 2b. Timing for Sriving ꢂ/ꢃ V
CC
CC
Maxim Integrated
13
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
_________________________________Test Circuits/Timing Diagrams (continued)
V
0
V
L
EN
EN
MAX3000E/MAX3001E/
MAX3002/MAX3003
t'
SOURCE
EN-VCC
L
I/O V
CC
I/O V
L
I/O V
L
0
V
L
C
VCC
V
CC
V
CC
2
I/O V
CC
V
L
EN
EN
MAX3000E/MAX3001E/
MAX3002/MAX3003
t"
SOURCE
I/O V
EN-VCC
0
V
L
I/O V
L
I/O V
CC
L
0
V
L
C
VCC
V
0
CC
V
CC
2
I/O V
CC
t
IS WHICHEVER IS LARGER BETWEEN t'
AND t"
EN-VCC EN-VCC
EN-VCC
Figure 3. Propagation Selay from ꢂ/ꢃ V to ꢂ/ꢃ V
L
After EN
CC
V
L
EN
EN
MAX3000E/MAX3001E/
MAX3002/MAX3003
t'
SOURCE
EN-VL
0
V
CC
I/O V
CC
I/O V
CC
I/O V
L
0
V
CC
C
VL
V
L
V
2
L
I/O V
L
0
V
L
EN
EN
MAX3000E/MAX3001E/
MAX3002/MAX3003
t"
EN-VL
SOURCE
I/O V
0
V
CC
I/O V
CC
I/O V
CC
V
L
0
C
VL
CC
V
0
L
V
2
L
I/O V
L
t
IS WHICHEVER IS LARGER BETWEEN t'
AND t"
EN-VL EN-VL
EN-VL
Figure 4. Prgation Selay from ꢂ/ꢃ V
to ꢂ/ꢃ V After EN
L
CC
14
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
state except when there is a transition on any of the
Detailed Description
translators on the input side, either ꢂ/ꢃ V or ꢂ/ꢃ V
.
L
CC
The MAX3000E/MAX3001E/MAX3002–MAX3012 logic-
level translators provide the level shifting necessary to
allow data transfer in a multivoltage system. Externally
When there is such a transition, the accelerator stages
become active, charging (discharging) the capacitances
at the ꢂ/ꢃs. Sue to its bidirectional nature, both stages
become active during the one-shot pulse. This can lead
to some current feeding into the external source that is
driving the translator. However, this behavior helps to
speed up the transition on the driven side.
applied voltages, V
and V , set the logic levels on
L
CC
either side of the device. Logic signals present on the
V side of the device appear as a higher voltage logic
L
signal on the V
side of the device, and vice-versa.
CC
The MAX3000E/MAX3001E/MAX3002/MAX3003 are
bidirectional level translators allowing data translation in
For proper full-speed operation, the output current
of a device that drives the inputs of the MAX3000E/
MAX3001E/MAX3002–MAX3012 should meet the fol-
lowing requirements:
either direction (V ↔ V ) on any single data line.
L
CC
These devices use an architecture specifically
designed to be bidirectional without the use of a direc-
tion pin. The MAX3004–MAX3012 unidirectional level
• MAX3000E (2305bps):
translators level shift data in one direction (V → V
or
L
CC
i > 1mA, R
< 15Ω
drv
V
→
V ) on any single data line. The
CC
L
• MAX3001E (4Mbps):
i > 107 x V x (C + 10pF)
MAX3000E/MAX3001E/ MAX3002–MAX3012 accept V
L
from +1.2V to +ꢀ.ꢀV. All devices have V
ranging
CC
from +1.6ꢀV to +ꢀ.ꢀV, ma5ing them ideal for data trans-
fer between low-voltage AꢁꢂCs/PLSs and higher volt-
age systems.
• MAX3002–MAX3012 (20Mbps):
i > 108 x V x (C + 10pF)
where i is the driver output current, V is the logic-supply
The MAX3000E/MAX3001E/MAX3002/MAX3004–
MAX3012 feature an output enable mode that reduces
voltage (i.e., V or V ) and C is the parasitic capaci-
L
CC
tance of the signal line.
V
supply current to less than 2µA, and V supply
L
CC
ꢁnable Output Mode (ꢁN, ꢁN A/B)
current to less than 2µA when in shutdown. The
MAX3000E/MAX3001E have 1ꢀ5V EꢁS protection on
The MAX3000E/MAX3001E/MAX3002 and the MAX3004–
MAX3012 feature an EN input, and the MAX3003 has an
EN A/B input. Pull EN low to set the MAX3000E/
the V
side for greater protection in applications that
CC
route signals externally. The MAX3000E operates at a
guaranteed data rate of 2305bps; the MAX3001E oper-
ates at a guaranteed data rate of 4Mbps and the
MAX3002–MAX3012 are guaranteed with a data rate of
20Mbps of operation over the entire specified operating
voltage range.
MAX3001E/MAX3002/MAX3004–MAX3012s’ ꢂ/ꢃ V
1
CC
through ꢂ/ꢃ V 8 in three-state output mode, while ꢂ/ꢃ
CC
V 1 through ꢂ/ꢃ V 8 have internal 65Ω pulldown resistors.
L
L
Srive EN to logic-high (V ) for normal operation. The
L
MAX3003 is intended for bus multiplexing or bus switch-
ing applications. Srive EN A/B low to place channels 1B
through 4B in active mode, while channels 1A through
4A are in three-state mode. Srive EN A/B to logic-high
Level Translation
For proper operation, ensure that +1.6ꢀV ≤ V
≤ +ꢀ.ꢀV,
CC
+1.2V ≤ V ≤ +ꢀ.ꢀV, and V ≤ V . Suring power-up
L
L
CC
(V ) to enable channels 1A through 4A, while channels
L
1B through 4B remain in three-state mode.
sequencing, V ≥ V
Suring power-supply sequencing, when V
and V is powering up, up to 10mA current can be
sourced to each load on the V side, yet the device does
does not damage the device.
L
CC
is floating
CC
15ꢀV ꢁED -rotection
As with all Maxim devices, EꢁS-protection structures
are incorporated on all pins to protect against electro-
static discharges encountered during handling and
L
L
not latch up.
The maximum data rate also depends heavily on the
load capacitance (see the Typical ꢃperating
Characteristics), output impedance of the driver, and
the operational voltage range (see the Timing
Characteristics table).
assembly. The ꢂ/ꢃ V
lines have extra protection
CC
against static discharge. Maxim’s engineers have
developed state-of-the-art structures to protect these
pins against EꢁS of 1ꢀ5V without damage. The EꢁS
structures withstand high EꢁS in all states: normal
operation, three-state output mode, and powered
down. After an EꢁS event, Maxim’s E versions 5eep
wor5ing without latchup, whereas competing products
can latch and must be powered down to remove
latchup.
Input Driver Requirements
The MAX3001E/MAX3002–MAX3012 architecture is
based on a one-shot accelerator output stage. ꢁee
Figure ꢀ. Aelerator output stages are always in three-
Maxim Integrated
15
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
V
L
V
CC
I/O V TO I/O V
L_
PATH
CC_
P
ONE-SHOT
6kΩ
I/O V
I/O V
L
CC
N
ONE-SHOT
P
ONE-SHOT
6kΩ
I/O V
TO I/O V PATH
L_
CC_
N
ONE-SHOT
Figure ꢀ. MAX3001E/MAX3002–MAX3012 ꢁimplified Functional Siagram (1 ꢂ/ꢃ Line)
EꢁS protection can be tested in various ways. The
ꢂ/ꢃ V lines of the MAX3000E/MAX3001E are char-
I
IN
CC
acterized for protection to 1ꢀ5V using the Human
Body Model.
ꢁED Test Conditions
EꢁS performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
V
/ 6kΩ
TH_IN
Human Body Model
Figure 7a shows the Human Body Model and Figure 7b
shows the current waveform it generates when dis-
charged into a low impedance. This model consists of a
100pF capacitor charged to the EꢁS voltage of interest,
which is then discharged into the test device through a
1.ꢀ5Ω resistor.
0
V
IN
V
TH_IN
V
S
-(V - V
S
) / 6kΩ
TH_IN
WHERE V = V OR V
L
S
CC
Machine Model
The Machine Model for EꢁS tests all pins using a
200pF storage capacitor and zero discharge resis-
tance. ꢂts objective is to emulate the stress caused by
contact that occurs with handling and assembly during
manufacturing. ꢃf course, all pins require this protec-
tion during manufacturing, not just inputs and outputs.
Therefore, after PCB assembly, the Machine Model is
less relevao ꢂ/ꢃ ports.
Figure 6. Typical ꢂ vs. V
ꢂN
ꢂN
16
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
Unidirectional vs. Bidirectional Level
Applications Information
Translator
-owerꢂEupply Decoupling
The MAX3000E/MAX3001E/MAX3002/MAX3003 bidi-
rectional translators can operate as a unidirectional
device to translate signals without inversion. The
MAX3004–MAX3012 unidirecitional level translators,
To reduce ripple and the chance of transmitting incor-
rect data, bypass V and V
to ground with a 0.1µF
L
CC
capacitor. To ensure full 1ꢀ5V EꢁS protection, bypass
to ground with a 1µF capacitor. Place all capaci-
V
CC
level-shift data in one direction (V → V
or V → V
CC L)
L
CC
tors as close to the power-supply inputs as possible.
on any single data line (see the ꢃrdering ꢂnformation.)
These devices provide the smallest solution (UCꢁP
pac5age) for unidirectional level translation without
inversion.
2
I C Level Translation
For ꢂ2C level translation for ꢂ2C applications, please refer
to the MAX3372E–MAX3379E/MAX3390E–MAX3393E
datasheet.
Maxim Integrated
17
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
R 1MΩ
R 1500Ω
D
C
I
100%
90%
P
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
r
CHARGE-CURRENT- DISCHARGE
LIMIT RESISTOR
RESISTANCE
AMPERES
HIGH-
VOLTAGE
DC
36.8%
DEVICE
UNDER
TEST
C
100pF
STORAGE
CAPACITOR
S
10%
0
SOURCE
TIME
0
t
RL
t
DL
CURRENT WAVEFORM
Figure 7a. Human Body EꢁS Test Model
Figure 7b. Human Body Current Waveform
Eelector Guide
EꢁD PROTECTꢂON
(kV)
PART
EN
EN A/B
Tx/Rx*
DATA RATE
MAX3000E
MAX3001E
MAX3002
MAX3003
MAX3004
MAX300ꢀ
MAX3006
MAX3007
MAX3008
MAX3009
MAX3010
MAX3011
MAX3012
√
√
√
—
√
√
√
√
√
√
√
√
√
—
—
—
√
8/8
8/8
8/8
8/8
8/0
7/1
6/2
ꢀ/3
4/4
3/ꢀ
2/6
1/7
0/8
2305bps
1ꢀ
1ꢀ
2
4Mbps
**
**
**
**
**
**
**
**
**
**
**
2
—
—
—
—
—
—
—
—
—
2
2
2
2
2
2
2
2
2
*Tx = V → V ; Rx = V
→ V
L
CC
CC
L
**ꢁee Table 1.
Table 1. Data Rate
MAX3002–MAX3012
GUARANTEED DATA RATE
(Mbps)
V
L
↔ V (V)
CC
1.2 ↔ ꢀ.ꢀ
1.2 ↔ 3.3
2.ꢀ ↔ 3.3
1.8 ↔ 2.ꢀ
1.2 ↔ 2.ꢀ
1.2 ↔ 1.8
40
20
3ꢀ
30
20
20
18
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
MAX3000ꢁ/MAX3001ꢁ/MAX3002 Functional Diagram
V
L
V
CC
EN
MAX3000E/
MAX3001E/MAX3002
I/O V 1
L
I/O V
I/O V
1
2
CC
I/O V 2
L
CC
I/O V 3
L
I/O V
I/O V
3
4
CC
I/O V 4
L
CC
I/O V
I/O V
5
6
I/O V 5
L
CC
I/O V 6
L
CC
I/O V 7
L
I/O V
I/O V
7
8
CC
I/O V 8
L
CC
GND
Maxim Integrated
19
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
MAX3003 Functional Diagram
V
L
V
CC
EN A/B
MAX3003
I/O V 1A
L
I/O V 1A
CC
I/O V 2A
L
I/O V 2A
CC
I/O V 3A
L
I/O V 3A
CC
I/O V 4A
L
I/O V 4A
CC
I/O V 1B
CC
I/O V 1B
L
I/O V 2B
L
I/O V 2B
CC
I/O V 3B
L
I/O V 3B
CC
I/O V 4B
I/O V 4B
CC
L
GND
20
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
-in Configurations
MAX3000E/MAX3001E/MAX3002
MAX3004–MAX3012
MAX3003
1
2
3
4
5
1
2
3
4
5
D
C
D
C
V
I/O V
2
3
I/O V
4
5
I/O V
6
7
I/O V 8
CC
V
I/O V 2A I/O V 4A I/O V 2B I/O V 4B
CC CC CC CC
CC
CC
CC
CC
CC
CC
I/O V
1
I/O V
I/O V
I/O V
GND
I/O V 1A I/O V 3A I/O V 1B I/O V 3B
GND
CC
CC
CC
CC
CC
CC
CC
B
A
B
A
I/O V 1
L
I/O V 3
L
I/O V 5
L
I/O V 7
L
EN
I/O V 1A
L
I/O V 3A
L
I/O V 1B
L
I/O V 3B
L
EN A/B
V
L
I/O V 2
L
I/O V 4
L
I/O V 6
L
I/O V 8
L
V
L
I/O V 2A
L
I/O V 4A
L
I/O V 2B
L
I/O V 4B
L
20 UCꢁP (Bottom View)
20 UCꢁP (Bottom View)
MAX3000E/MAX3001E/MAX3002
MAX3003
TOP VIEW
I/O V
1
I/O V 1A
CC
I/O V 1
1
2
20
19
18
17
I/O V 1A
1
2
20
19
18
17
CC
L
L
V
V
V
V
CC
L
CC
L
I/O V 2
L
I/O V 2A
L
I/O V
I/O V
2
3
4
5
6
7
8
I/O V 2A
CC
3
3
CC
CC
CC
CC
CC
I/O V 3
L
I/O V 3A
L
I/O V 3A
CC
4
4
I/O V 4
L
I/O V 4A
L
5
16 I/O V
15 I/O V
5
16 I/O V 4A
CC
I/O V 5
L
I/O V 1B
L
6
6
15 I/O V 1B
CC
I/O V
14
I/O V 2B
14
I/O V 6
L
I/O V 2B
L
7
7
CC
I/O V 7
L
I/O V 3B
L
8
13 I/O V
12 I/O V
11 GND
8
13 I/O V 3B
CC
CC
CC
I/O V 8
L
I/O V 4B
L
9
9
12 I/O V 4B
CC
EN
EN A/B
10
10
11 GND
TꢁꢁOP
TꢁꢁOP
TOP VIEW
I/O V 2
L
1
2
3
4
5
I/O V 2A
1
2
3
4
5
15 I/O V
14 I/O V
13 I/O V
12 I/O V
3
CC
4
CC
5
CC
6
CC
7
CC
15 I/O V 3A
CC
L
I/O V 3
L
I/O V 3A
L
14 I/O V 4A
CC
MAX3000E/
MAX3001E/
MAX3002
MAX3003
13 I/O V 1B
CC
I/O V 4
L
I/O V 4A
L
12 I/O V 2B
CC
I/O V 5
L
I/O V 1B
L
*EXPOSED PADDLE
*EXPOSED PADDLE
11
11
I/O V
I/O V 3B
CC
I/O V 6
L
I/O V 2B
L
ꢀmm ✕ ꢀmm THꢂN QFN
ꢀmm ✕ ꢀmm THꢂN QFN
Maxim Integrated
21
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
-in Configurations (continued)
TOP VIEW
MAX3004
MAX3005
MAX3006
O V
1
I V
1
I V
1
2
I V 1
1
2
20
19
18
17
O V 1
1
2
20
19
18
17
O V 1
1
2
20
19
18
17
CC
CC
CC
L
L
L
V
V
V
V
V
L
V
CC
L
CC
L
CC
I V 2
L
I V 2
L
O V 2
L
O V
O V
2
3
4
5
6
7
8
O V
O V
2
I V
3
3
3
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
I V 3
L
I V 3
L
I V 3
L
3
4
5
6
7
8
O V
3
4
4
4
CC
CC
CC
CC
I V 4
L
I V 4
L
I V 4
L
5
16 O V
15 O V
5
16 O V
15 O V
5
16 O V
15 O V
4
5
6
7
8
I V 5
L
I V 5
L
I V 5
L
6
6
6
O V
14
O V
14
O V
14
I V 6
L
I V 6
L
I V 6
L
7
7
7
I V 7
L
I V 7
L
I V 7
L
8
13 O V
12 O V
8
13 O V
12 O V
8
13 O V
12 O V
CC
CC
CC
CC
CC
CC
I V 8
L
I V 8
L
I V 8
L
9
9
9
EN
EN
EN
10
11 GND
10
11 GND
10
11 GND
TꢁꢁOP
TꢁꢁOP
TꢁꢁOP
MAX3007
MAX3008
MAX3009
I V
1
I V
1
I V 1
CC
O V 1
L
1
2
20
19
18
17
O V 1
L
1
2
20
19
18
17
O V 1
L
1
2
20
19
18
17
CC
CC
V
V
CC
V
V
CC
V
L
V
CC
L
L
O V 2
L
O V 2
L
O V 2
L
I V
I V
2
3
I V
I V
2
CC
3
CC
4
CC
I V
I V
2
CC
3
CC
4
CC
5
CC
3
3
3
CC
O V 3
L
O V 3
L
O V 3
L
4
4
4
CC
I V 4
L
O V 4
L
O V 4
L
5
16 O V
15 O V
4
5
16 I V
5
16 I V
15 I V
CC
CC
CC
I V 5
L
I V 5
L
O V 5
L
6
5
6
7
8
6
15 O V
5
6
CC
CC
O V
14
O V
14
6
7
8
O V
6
I V 6
L
I V 6
L
I V 6
L
7
7
7
14
CC
CC
CC
I V 7
L
I V 7
L
I V 7
L
8
13 O V
12 O V
8
13 O V
12 O V
8
13 O V
12 O V
7
8
CC
CC
CC
CC
I V 8
L
I V 8
L
I V 8
L
9
9
9
EN
EN
EN
10
11 GND
10
11 GND
10
11 GND
TꢁꢁOP
TꢁꢁOP
TꢁꢁOP
22
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
-in Configurations (continued)
TOP VIEW
MAX3010
MAX3011
MAX3012
I V
1
I V
1
I V
1
O V 1
1
2
20
19
18
17
O V 1
1
2
20
19
18
17
O V 1
1
2
20
19
18
17
CC
CC
CC
L
L
L
V
L
V
CC
V
L
V
CC
V
L
V
CC
O V 2
L
O V 2
L
O V 2
L
I V
I V
2
3
4
5
6
I V
I V
2
3
4
5
6
7
I V
I V
2
3
4
5
6
7
8
3
3
3
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
O V 3
L
O V 3
L
O V 3
L
4
4
4
O V 4
L
O V 4
L
O V 4
L
5
16 I V
15 I V
5
16 I V
15 I V
5
16 I V
15 I V
O V 5
L
O V 5
L
O V 5
L
6
6
6
I V
14
I V
14
I V
14
O V 6
L
O V 6
L
O V 6
L
7
7
7
I V 7
L
O V 7
L
O V 7
L
8
13 O V
12 O V
7
8
13 I V
8
13 I V
12 I V
CC
CC
CC
CC
CC
I V 8
L
I V 8
L
O V 8
L
9
8
9
12 O V
8
9
CC
EN
EN
EN
10
11 GND
10
11 GND
10
11 GND
TꢁꢁOP
TꢁꢁOP
TꢁꢁOP
Ordering Information (continued)
PART
MAX3001EEUP
TEMP RANGE
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
PꢂN-PACKAGE
20 TꢁꢁꢃP
PART
TEMP RANGE
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
PꢂN-PACKAGE
20 TꢁꢁꢃP
4 x ꢀ UCꢁP
20 TꢁꢁꢃP
4 x ꢀ UCꢁP
20 TꢁꢁꢃP
4 x ꢀ UCꢁP
20 TꢁꢁꢃP
4 x ꢀ UCꢁP
20 TꢁꢁꢃP
4 x ꢀ UCꢁP
20 TꢁꢁꢃP
4 x ꢀ UCꢁP
MAX3007EUP
MAX3007EBP-T*
MAX3008EUP
MAX3008EBP-T*
MAX3009EUP
MAX3009EBP-T*
MAX3010EUP
MAX3010EBP-T*
MAX3011EUP
MAX3011EBP-T*
MAX3012EUP
MAX3012EBP-T*
MAX3001EEBP-T*
MAX3001EETP
MAX3001EAUP
MAX3002EUP
MAX3002EBP-T*
MAX3002ETP
4 x ꢀ UCꢁP
20 TQFN
-40°C to +12ꢀ°C 20 TꢁꢁꢃP
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
-40°C to +8ꢀ°C
20 TꢁꢁꢃP
4 x ꢀ UCꢁP
20 TQFN
MAX3003EUP
MAX3003EBP-T*
MAX3003ETP
20 TꢁꢁꢃP
4 x ꢀ UCꢁP
20 TQFN
MAX3004EUP
MAX3004EBP-T*
MAX300ꢀEUP
MAX300ꢀEBP-T*
MAX3006EUP
MAX3006EBP-T*
20 TꢁꢁꢃP
4 x ꢀ UCꢁP
20 TꢁꢁꢃP
4 x ꢀ UCꢁP
20 TꢁꢁꢃP
4 x ꢀ UCꢁP
*Future product—contact factory for availability.
-T = Tape-and-reel pac5age.
Chip Information
TRANꢁꢂꢁTꢃR CꢃUNT: 1184
PRꢃCEꢁꢁ: BiCMꢃꢁ
Maxim Integrated
23
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
-acꢀage Information
For the latest pac5age outline information and land patterns, go to www.maxim-ic.com/packages.
PACKAGE TYPE
20 TꢁꢁꢃP
PACKAGE CODE
U20-3
DOCUMENT NO.
21-0066
20 TQFN
T20ꢀꢀ-4
21-0140
4 x ꢀ UCꢁP
B20-1
21-009ꢀ
24
Maxim Integrated
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, 15ꢀV ꢁEDꢂ-rotected, 0.1µA,
35Mbps, 8ꢂChannel Level Translators
Revision History
REVꢂꢁꢂON
NUMBER
REVꢂꢁꢂON
DATE
PAGEꢁ
CHANGED
DEꢁCRꢂPTꢂON
1, 2, 3, 10, 11, 1ꢀ,
16, 21, 23–26
4
ꢀ
12/06
8/08
Added TQFN pac5ages
Changed pin description and pac5age drawing
1, 10, 11, 23
Maxim cannot me responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserveright to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
25
The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
©
2008 Maxim Integrated
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