MAX3028EBC-T [MAXIM]
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| 型号： | MAX3028EBC-T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 暂无描述 转换器 电平转换器 |
| 文件： | 总21页 (文件大小：850K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-3266; Rev 1; 8/04
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
General Description
Features
♦ 100Mbps Guaranteed Data Rate
The MAX13013–MAX13017/MAX3023–MAX3028 single-/
dual-/quad-level translators provide the level shifting
necessary to allow 100Mbps data transfer in a multivolt-
♦ Bidirectional Level Translation
MAX13013 (Single)
MAX13014 (Dual)
MAX3023 (Quad)
age system. Externally applied voltages, V
and V , set
L
CC
the logic levels on either side of the device. Logic signals
present on the V side of the device appear as a higher
♦ Unidirectional Level Translation
L
MAX13015/MAX13016/MAX13017 (Dual)
MAX3024–MAX3028 (Quad)
voltage logic signal on the V
side of the device, and
CC
vice-versa.
♦ V Operation Down to +1.2V
L
The MAX13013 single-, the MAX13014–MAX13017
dual-, and the MAX3023–MAX3028 (UCSP™ package)
quad-level translators feature an enable (EN) input. The
MAX3023–MAX3028 (TSSOP package) quad-level
translators feature EN and EN inputs. When disabled,
each device places all inputs/outputs on both sides in
♦ Ultra-Low 0.1µA Supply Current When Disabled
♦ Low-Quiescent Current (0.1µA)
♦ UCSP, SC70, SOT23, and TSSOP Packages
Pin Configurations
tri-state and reduces the V
supply current to 0.03µA,
CC
and the V supply current to 0.1µA. These devices oper-
TOP VIEW
L
1
2
3
ate at a guaranteed 100Mbps data rate for V > 1.8V.
L
A
V
1
2
3
6
5
4
EN
CC
The MAX13013–MAX13017/MAX3023–MAX3028 accept
V
CC
I/O V
1
GND
CC
a +1.65V to +3.6V V
voltage and a +1.2V to (V
-
CC
CC
MAX13013
0.4V) V voltage, making them ideal for data transfer
L
GND
V
L
MAX13013
between low-voltage ASICs/programmable logic
devices (PLDs) and higher voltage systems. The
MAX13013 is available in 3 x 2 UCSP and 6-pin SC70
packages. The MAX13014–MAX13017 are available in
3 x 3 UCSP and 8-pin SOT23 packages. The
MAX3023–MAX3028 are available in 4 x 3 UCSP and
14-pin TSSOP packages. All devices operate over the
extended -40°C to +85°C temperature range.
B
V
L
I/O V 1
L
EN
I/O V
1
I/O V 1
L
CC
3 x 2 UCSP
TOP VIEW
(BUMPS ON BOTTOM OF DIE)
SC70
Typical Operating Circuit
+1.8V
+3.3V
Applications
0.1µF
0.1µF
CMOS Logic-Level Translation
Low-Voltage ASIC Level Translation
Cell Phones
V
L
V
CC
+1.8V
SYSTEM
CONTROLLER
+3.3V
SYSTEM
MAX13014
SPI™, MICROWIRE™ Level Translation
Portable POS Systems
CLK
DATA
I/O V 1
I/O V
1
CLK
DATA
L
CC
I/O V 2
I/O V 2
CC
L
GND
GND
GND
Portable Communication Devices
GPS
Telecommunications Equipment
Ordering Information/Selector Guide
NUMBER OF
→ V
TRANSLATORS TRANSLATORS
Number of
→ V
PACKAGE
CODE
TOP
MARK
V
L
V
CC
PART
TEMP RANGE
PIN-PACKAGE
EN EN
CC
L
MAX13013EXT
-40°C to +85°C
6 SC70
—
ACD
1
1
✓
—
Pin Configurations continued at end of data sheet.
Ordering Information/Selector Guide continued at end of
data sheet.
MICROWIRE is a trademark of National Semiconductor Corp.
SPI is a trademark of Motorola, Inc.
UCSP is a trademark of Maxim Integrated Products, Inc.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
ABSOLUTE MAXIMUM RATINGS
All voltages are referenced to GND.
6-Bump UCSP (derate 3.9mW/°C above +70°C).........308mW
V
V
I/O V
...........................................................................-0.3V to +4V
8-Bump UCSP (derate 4.7mW/°C above +70°C).........379mW
8-Pin SOT23 (derate 9.1mW/°C above +70°C)............727mW
12-Bump UCSP (derate 6.5mW/°C above +70°C) ...518.8mW
14-Pin TSSOP (derate 9.1mW/°C above +70°C) .........727mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
CC
-0.3V to +4V
L...........................................................................................
......................................................-0.3V to (V
+ 0.3V)
CC_
CC
I/O V ...........................................................-0.3V to (V + 0.3V)
EN, EN...........................................................-0.3V to (V + 0.3V)
Short-Circuit Duration I/O V
L_
L
L
,
L_
I/O V
to GND ....................................................Continuous
CC_
Continuous Power Dissipation (T = +70°C)
A
6-Pin SC70 (derate 3.1mW/°C above +70°C)..............245mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= +1.65V to +3.6V, V = +1.2V to (V - 0.4V), EN = V , EN = open (MAX3023–MAX3028 TSSOP package only), C ≤ 15pF,
CC
L
to T
CC
L
IOVL
C
IOVCC
≤ 40pF, T = T
. Typical values are at T = +25°C.) (Notes 1, 2)
A
MIN
MAX A
PARAMETER
POWER SUPPLY
V Supply Range
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
1.2
V - 0.4
CC
V
V
L
L
V
Supply Range
V
1.65
3.60
CC
CC
I/O V _ = 0, I/O V _ = 0
CC
L
Supply Current from V
IQV
0.1
0.2
1
µA
CC
L
CC
or I/O V _ = V , I/O V _ = V
CC
CC
L
L
L
I/O V _ = 0, I/O V _ = 0
CC
L
2
100
1
or I/O V _ = V , I/O V _ = V
CC
CC
L
Supply Current from V
IQV
µA
L
I/O V _ = 0, I/O V _ = 0
CC
L
or I/O V _ = V , I/O V _ = V ,
10
CC
CC
CC
- 0.2V
L
L
V < V
L
V
Tri-state Output-Mode
CC
I
T
A
= +25°C, EN = 0
0.03
µA
µA
TS-VCC
Supply Current
T
T
= +25°C, EN = 0
0.1
1
0.2
2
A
V Tri-state Output-Mode Supply
L
Current (MAX13013–MAX13017)
I
TS-VL
TS-VL
= +25°C, EN = 0, V = V
- 0.2V
CC
A
L
V Tri-state Output-Mode Supply
L
Current (MAX3023–MAX3028
TSSOP Package Only)
T
T
= +25°C, EN = 0
50
55
70
74
A
I
µA
µA
= +25°C, EN = 0, V = V - 0.2V
A
L
CC
T
T
= +25°C, EN = 0
0.15
20
A
I/O Tri-state Output-Mode
Leakage Current
= +25°C, EN = 0, V = V - 0.2V
A
L
CC
2
_______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
ELECTRICAL CHARACTERISTICS (continued)
(V
= +1.65V to +3.6V, V = +1.2V to (V - 0.4V), EN = V , EN = open (MAX3023–MAX3028 TSSOP package only), C ≤ 15pF,
CC
L
to T
CC
L
IOVL
C
IOVCC
≤ 40pF, T = T
. Typical values are at T = +25°C.) (Notes 1, 2)
A
MIN
MAX A
PARAMETER
LOGIC-LEVEL THRESHOLDS
I/O V _ Input-Voltage High
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
2/3 x V
V
V
L
IHL
L
I/O V _ Input-Voltage Low
V
1/3 x V
L
ILL
L
Pullup Resistance on I/O V _
120
75
Ω
L
Pulldown Resistance on I/O V _
L
Ω
2/3 x V
I/O V _ Input-Voltage High
CC
V
V
CC
IHC
I/O V _ Input-Voltage Low
V
1/3 x V
V
CC
ILC
CC
Pullup Resistance on I/O V
_
2.5
2.5
kΩ
kΩ
V
CC
Pulldown Resistance on I/O V
EN, EN Input-Voltage High
EN, EN Input-Voltage Low
EN Input Current
_
CC
V
2/3 x V
IH
L
V
1/3 x V
+5
V
IL
L
MAX13013–MAX13017
-5
µA
kΩ
Pullup Resistance on EN
MAX3023–MAX3028
46
62
62
81
Pulldown Resistance on EN
MAX3023–MAX3028, TSSOP package only
46
81
kΩ
2/3 x V
I/O V _ Output-Voltage High
L
V
I/O V source current = 20µA
L
V
V
V
V
L
OHL
I/O V _ Output-Voltage Low
V
I/O V sink current = 20µA
1/3 x V
L
OLL
L
L
2/3 x V
I/O V _ Output-Voltage High
V
I/O V
source current = 20µA
sink current = 20µA
CC
CC
OHC
CC
CC
I/O V _ Output-Voltage Low
V
I/O V
1/3 x V
CC
CC
OLC
_______________________________________________________________________________________
3
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
TIMING CHARACTERISTICS
(V
= +1.65V to +3.6V, V = +1.2V to (V
- 0.4V), EN = V , EN = open (MAX3023–MAX3028 TSSOP package only), C ≤ 15pF,
IOVL
CC
L
CC
L
C
IOVCC
≤ 40pF, T = T
to T
. Typical values are at T = +25°C.) (Notes 1, 2)
MAX A
A
MIN
PARAMETER
SYMBOL
CONDITIONS
= 15pF, Figure 1
MIN
TYP
MAX
2.5
3
UNITS
C
C
C
C
C
C
IOVCC
IOVCC
IOVCC
IOVCC
IOVCC
IOVCC
I/O V _ Rise Time
t
ns
= 20pF, Figure 1
= 40pF, Figure 1
= 15pF, Figure 1
= 20pF, Figure 1
= 40pF, Figure 1
CC
RVCC
4
2.5
3
I/O V _ Fall Time
t
ns
CC
FVCC
4
I/O V _ One-Shot Output Impedance
18.5
2.5
2.5
12.5
6.5
6
Ω
ns
ns
Ω
CC
I/O V _ Rise Time
t
C
C
= 15pF, Figure 2
= 15pF, Figure 2
L
RVL
IOVL
IOVL
I/O V _ Fall Time
t
FVL
L
I/O V _ One-Shot Output Impedance
L
Propagation Delay, Driving I/O V _
I/O
I/O
C
C
= 15pF, Figure 1
ns
ns
L
VL-VCC
VCC-VL
IOVCC
Propagation Delay, Driving I/O V
_
CC
= 15pF, Figure 2
IOVL
C
= 15pF, C
= 2.5V, V = 1.8V
L
= 15pF,
IOVCC
IOVL
Part-to-Part Skew (Note 3)
t
4
ns
ns
PPSKEW
V
CC
Propagation Delay from
t
C
C
= 15pF, Figure 3
IOVCC
1000
1000
EN-VCC
I/O V _ to I/O V _ after Enable
L
CC
Propagation Delay from
I/O V _ to I/O V _ after Enable
t
= 15pF, Figure 4
ns
EN-VL
IOVL
CC
L
C
C
= 15pF, C
= 15pF, C
= 15pF, V > 1.8V
100
80
IOVCC
IOVL
L
Maximum Data Rate
Mbps
= 15pF, V > 1.2V
IOVCC
IOVL
L
Note 1: V must be less than or equal to V
- 0.4V during normal operation. However, V can be greater than V
during startup
L
CC
L
CC
and shutdown conditions.
Note 2: All units are 100% production tested at T = +25°C. Limits over the operating temperature range are guaranteed by design
A
and not production tested.
Note 3: Not production tested. Guaranteed by design.
4
_______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Typical Operating Characteristics
(Data rate = 100Mbps, V
= 3.3V, V = 1.8V, T = +25°C, unless otherwise noted.)
CC
L
A
V SUPPLY CURRENT
L
vs. SUPPLY VOLTAGE
V
SUPPLY CURRENT
V SUPPLY CURRENT
L
vs. SUPPLY VOLTAGE
CC
vs. SUPPLY VOLTAGE
0.6
25
20
15
10
5
1.0
0.8
0.6
0.4
0.2
0
0.5
0.4
0.3
0.2
0.1
0
DRIVING I/O V
V = 1.8V
DRIVING I/O V
DRIVING I/O V
L_
L_
L_
V = 1.8V
V = 1.2V
L
C
L
L
= 15pF
C
= 15pF
C
= 15pF
IOVCC
IOVCC
IOVCC
0
1.5
-40
0
2.0
2.5
3.0
3.5
4.0
85
40
2.0
-40
0
2.5
V
3.0
3.5
4.0
85
40
2.0
2.5
V
3.0
3.5
4.0
V
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
CC
CC
CC
V
SUPPLY CURRENT
V
SUPPLY CURRENT
CC
V SUPPLY CURRENT
L
vs. TEMPERATURE
CC
vs. SUPPLY VOLTAGE
vs. TEMPERATURE
25
20
15
10
5
16
15
14
13
12
11
10
4.0
3.6
3.2
2.8
2.4
2.0
DRIVING I/O V
CC_
C
= 15pF
IOVL
DRIVING I/O V
V = 1.2V
L_
L
C
DRIVING I/O V
CC_
= 15pF
IOVCC
C
= 15pF
IOVL
0
1.5
2.0
2.5
3.0
3.5
4.0
-15
10
35
60
-15
10
35
60
V
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
CC
TEMPERATURE (°C)
V SUPPLY CURRENT
RISE/FALL TIME
V
SUPPLY CURRENT
L
CC
vs. CAPACITIVE LOAD ON I/O V
vs. CAPACITIVE LOAD ON I/O V
vs. CAPACITIVE LOAD ON I/O V
CC_
CC_
CC_
1.0
0.8
0.6
0.4
0.2
0
1.5
1.2
0.9
0.6
0.3
0
25
22
19
16
13
10
t
RISE
t
FALL
DRIVING I/O V
L_
DRIVING I/O V
10
DRIVING I/O V
L_
L_
0
10
20
30
40
20
30
10
20
30
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
_______________________________________________________________________________________
5
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Typical Operating Characteristics (continued)
(Data rate = 100Mbps, V
= 3.3V, V = 1.8V, T = +25°C, unless otherwise noted.)
CC
L
A
RISE/FALL TIME
vs. CAPACITIVE LOAD ON I/O V
PROPAGATION DELAY
vs. CAPACITIVE LOAD ON I/O V
PROPAGATION DELAY
vs. CAPACITIVE LOAD ON I/O V
L_
CC_
L_
1.2
1.0
0.8
0.6
0.4
0.2
0
5
4
3
2
1
0
5
4
3
2
1
0
DRIVING I/O V
L_
DRIVING I/O V
CC_
t
RISE
t
PLH
t
PLH
t
FALL
t
PHL
DRIVING I/O V
5
t
CC_
PHL
0
10
15
20
0
10
20
30
40
0
5
10
15
20
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
TYPICAL I/O V DRIVING
L_
t
vs. TEMPERATURE
t
vs. TEMPERATURE
EN-VCC
(C
EN-VL
(C
IOVCC
= 40pF)
= 15pF)
(C
IOVL
= 15pF)
IOVCC
MAX13013 toc15
250
230
210
190
170
150
100
80
60
40
20
0
2V/div
2V/div
-40
-15
10
35
60
85
-40
-15
10
35
60
85
4ns/div
TEMPERATURE (°C)
TEMPERATURE (°C)
TYPICAL I/O V
DRIVING
TYPICAL I/O V DRIVING
TYPICAL I/O V
DRIVING
= 15pF)
IOVL
MAX13013 toc18
CC_
L_
CC_
(C
IOVL
= 15pF)
(V = 1.65V, V = 1.2V, C
= 40pF)
(V = 1.65V, V = 1.2V, C
CC
L
IOVCC
CC
L
MAX13013 toc16
MAX13013 toc17
1V/div
1V/div
2V/div
2V/div
1V/div
1V/div
4ns/div
4ns/div
4ns/div
6
_______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Pin Description—MAX13013/MAX13014/
MAX3023 (Bidirectional Devices)
PIN
MAX3023
MAX13013
MAX13014
NAME
FUNCTION
4 x 3
UCSP
3 x 2
UCSP
B2
3 x 3
UCSP
TSSOP
SC70
SOT23
1
2
A1
4
7
6
A2
I/O V 1 Input/Output 1, Referenced to V
L
L
L
B2
—
—
A3
I/O V 2 Input/Output 2, Referenced to V
L
V Input Voltage, +1.2V ≤ V ≤ V
with a 0.1µF capacitor.
- 0.4V Bypass V to GND
. L
L
L
CC
3
A2
5
B1
8
A1
V
L
4
5
6
—
B3
A3
—
—
—
—
—
—
—
—
—
—
—
—
N.C.
No Connection
I/O V 3 Input/Output 3, Referenced to V
L
L
I/O V 4 Input/Output 4, Referenced to V
L
L
Active-High Enable Input. If EN is pulled low, all inputs/outputs
are in tristate. Drive EN high (V ) for normal operation.
7
A4
6
B3
5
B1
EN
L
Active-Low Enable Input. If EN is pulled high (V ), all inputs/
L
8
—
—
—
—
—
EN
outputs are in tri-state. Drive EN low for normal operation
(MAX3023 TSSOP package only).
9
B4
C4
C3
—
—
2
—
—
—
—
4
—
—
I/O V
4
3
Input/Output 4, Referenced to V
Input/Output 3, Referenced to V
Ground
CC
CC
10
11
I/O V
CC
CC
A3
B3
GND
V
Input Voltage, +1.65V ≤ V ≤ +3.6V. Bypass V
to GND
CC
CC
CC
12
C2
1
A1
1
C1
V
CC
with a 0.1µF capacitor.
13
14
C1
B1
—
3
—
3
2
C3
C2
I/O V
I/O V
2
1
Input/Output 2, Referenced to V
Input/Output 1, Referenced to V
CC
CC
A2
CC
CC
Pin Description—MAX13015/MAX13016/MAX13017/
MAX3024–MAX3028 (Unidirectional Devices)
NAME
FUNCTION (Note 4)
V
V
Input Voltage, +1.65V ≤ V
≤ +3.6V. Bypass V
to GND with a 0.1µF capacitor.
CC
CC
CC
CC
V
V Input Voltage, +1.2V ≤ V ≤ V - 0.4V. Bypass V to GND with a 0.1µF capacitor.
L
L
L
CC
L
GND
Ground
Active-High Enable Input. If EN is pulled low, all inputs/outputs are in tri-state. Drive EN high (V ) for normal
L
operation.
EN
Active-Low Enable Input (MAX3024–MAX3028 TSSOP Package Only). If EN is pulled high (V ), all
inputs/outputs are in tri-state. Drive EN low for normal operation.
L
EN
I V 1–I V 4
Inputs Referenced to V , Numbers 1 to 4
L
L
L
O V 1–O V 4
Outputs Referenced to V , Numbers 1 to 4
L
L
L
I V 1–I V
4
CC
Inputs Referenced to V , Numbers 1 to 4
CC
CC
O V 1–O V
4
CC
Outputs Referenced to V , Numbers 1 to 4
CC
CC
Note 4: For specific pin numbers, see the Pin Configurations for more information.
_______________________________________________________________________________________
7
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Test Circuits/Timing Diagrams
t
≤ 3ns
RISE/FALL
I/O V
L_
90%
50%
V
L
V
CC
MAX13013
10%
EN
I/O
VL-VCC
I/O
VL-VCC
I/O V
CC_
I/O V
L_
C
IOVCC
I/O V
CC_
90%
50%
SOURCE
10%
t
t
RVCC
FVCC
Figure 1. Driving I/O V Test Circuit and Timing
L_
t
≤ 3ns
RISE/FALL
I/O V
CC_
90%
V
L
V
CC
50%
10%
MAX13013
EN
I/O
VCC-VL
I/O
VCC-VL
I/O V
CC_
I/O V
L_
I/O V
C
IOVL_
L_
90%
50%
10%
SOURCE
t
t
RVL
FVL
Figure 2. Driving I/O V
Test Circuit and Timing
CC_
8
_______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Test Circuits/Timing Diagrams (continued)
V
L
EN
EN
MAX13013
t'
EN-VCC
0
V
0
I/O V
CC_
SOURCE
L
I/O V
L_
I/O V
L_
1MΩ
C
IOVCC
V
L
V
0
CC
V
CC
/ 2
I/O V
CC_
V
CC
V
EN
L
EN
1MΩ
MAX13013
t"
EN-VCC
0
V
0
SOURCE
L
I/O V
L_
I/O V
L_
I/O V
CC_
C
IOVCC
V
0
I/O V
CC
CC_
V
CC
/ 2
t
IS WHICH EVER IS LARGER BETWEEN t'
AND t"
EN-VCC
.
EN-VCC
EN-VCC
Figure 3. Propagation Delay from I/O V to I/O V
L_
After EN
CC_
V
L
EN
EN
MAX13013
t'
EN-VL
0
V
0
SOURCE
CC
I/O V
CC_
I/O V
L_
I/O V
CC_
C
IOVL
V
CC
100kΩ
V
0
L
V / 2
L
I/O V
L_
V
EN
L
EN
V
L
MAX13013
t"
EN-VL
0
V
0
100kΩ
SOURCE
CC
L
I/O V
CC_
I/O V
CC_
I/O V
L_
C
IOVL
V
0
I/O V
L_
V / 2
L
t
IS WHICH EVER IS LARGER BETWEEN t'
AND t"
EN-VCC
.
EN-VCC
EN-VCC
Figure 4. Propagation Delay from I/O V
to I/O V After EN
L_
CC_
_______________________________________________________________________________________
9
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
During power-supply sequencing, when V
is floating
CC
Detailed Description
and V is powering up, up to 40mA current can be
L
The MAX13013–MAX13017/MAX3023–MAX3028 logic-
level translators provide the level shifting necessary to
allow 100Mbps data transfer in a multivoltage system.
sourced to each load on the V side, without the device
L
latching up. The maximum data rate depends heavily on
the load capacitance (see the Typical Operating
Characteristics Rise/Fall Time graph), output impedance
of the driver, and the operating voltage range (Table 1).
Externally applied voltages, V
and V , set the logic
L
CC
levels on either side of the device. Logic signals pre-
sent on the V side of the device appear as a higher-
L
voltage logic signal on the V
side of the device, and
CC
Input Driver Requirements
The MAX13013–MAX13017/MAX3023–MAX3028 archi-
tecture is based on a one-shot accelerator output stage
(see Figure 5). Accelerator output stages are in tri-state
mode except when there is a transition on any of the
vice-versa. The MAX13013/MAX13014/MAX3023 bidi-
rectional level translators allow data translation in either
direction (V ↔V ) on any single data line. The
L
CC
MAX13015/MAX13016/MAX13017/MAX3024–MAX3028
unidirectional level translators, level shift data in one
translators on the input side, either I/O V or I/O V
.
L_
CC_
direction (V → V
or V →V ) on any single data
CC L
L
CC
A short pulse is then generated during which the accel-
erator output stages become active and charge/dis-
charge the capacitances at the I/Os. Due to the
architecture, both sides become active during the one-
shot pulse. This can lead to some current feeding into
the external source that is driving the translator.
However, this behavior simply helps to speed up the
transition on the driven side.
line. The MAX13013–MAX13017/MAX3023–MAX3028
accept V from +1.2V to (V - 0.4V) and operate with
L
CC
V
from +1.65V to +3.6V, making them ideal for data
transfer between low-voltage ASICs/PLDs and higher
voltage systems.
CC
When in tri-state mode, the MAX13013–MAX13017/
MAX3023–MAX3028 reduce the V
supply current to
CC
0.03µA, and the V supply current to 0.1µA. These
L
devices operate at a guaranteed data rate of 100Mbps
Table 1. Data Rate
for V > 1.8V.
L
V (V)
L
GUARANTEED DATA RATE (Mbps)
Level Translation
For proper operation, ensure that +1.65V ≤ V ≤ +3.6V,
V < 1.8
L
80
CC
V
≥ 1.8
100
L
and +1.2V ≤ V ≤ V
- 0.4V. During power-up
does not damage the device.
CC
L
CC
sequencing, V ≥ V
L
V
L
V
CC
I/O V TO I/O V
PATH
L_
CC_
P
ONE-SHOT
4kΩ
I/O V
I/O V
L
CC
N
ONE-SHOT
P
ONE-SHOT
150Ω
I/O V
TO I/O V PATH
L_
CC_
N
ONE-SHOT
Figure 5. Simplified Functional Diagram (One I/O Line)
10 ______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
For proper operation, the driver has to meet the follow-
Table 2. MAX3023–MAX3028 (TSSOP
Package) Operating Mode
ing conditions: less than 25Ω output impedance and
greater than 20mA peak output current capability.
Figure 6 shows a graph of typical input current versus
input voltage.
EN
EN
0
OPERATING MODE
0
Both I/O V _ and I/O V _ are in tri-state.
L
CC
Output Load Requirements
The MAX13013–MAX13017/MAX3023–MAX3028 I/O are
designed to drive CMOS inputs. Do not load the I/O lines
with a resistive load less than 25kΩ. Also, do not place an
RC circuit at the input of these devices to slow down the
edges. If a slower rise/fall time is required, refer to the
MAX3000E/MAX3001E logic-level-translators data sheet.
V
0
Normal operation.
L
0
V
L
Both I/O V _ and I/O V _ are in tri-state.
L CC
V
L
V
L
Both I/O V _ and I/O V _ are in tri-state.
L CC
Applications Information
Power-Supply Decoupling
For I2C™ level translation, refer to the MAX3372E-
MAX3379E/MAX3390E–MAX3393E data sheet.
To reduce ripple and the chance of introducing data
errors, bypass V and V
to ground with a 0.1µF
CC
L
Enable Inputs
The MAX13013 single-, the MAX13014–MAX13017 dual-
and the MAX3023–MAX3028 (UCSP package) quad-level
translators feature an EN input. The MAX3023–MAX3028
(TSSOP package) quad-level translators feature both EN
and EN inputs (see Table 2 for operating mode). Note
that the MAX3023–MAX3028 (TSSOP package) have
internal pullup and pulldown circuitry on EN and EN,
ceramic capacitor. Place all capacitors as close to the
power-supply inputs as possible.
Unidirectional vs. Bidirectional Level
Translator
The MAX13013/MAX13014/MAX3023 bidirectional
translators can operate as a unidirectional device to
translate signals without inversion. The MAX13015/
MAX13016/MAX13017/MAX3024–MAX3028 unidirec-
tional level translators, level shift data in one direction
respectively. If left unconnected, EN is pulled up to V
L
and EN is pulled down to GND.
(V → V
or V →V ) on any single data line (see the
CC L
L
CC
Ordering Information). These devices provide the
smallest solution (UCSP package) for unidirectional
level translation without inversion.
I
IN
UCSP Applications Information
V
/ R
TH_IN IN
*
For the latest application details on UCSP construction,
dimensions, tape carrier information, PC board tech-
niques, bump-pad layout, and recommended reflow tem-
perature profiles, as well as the latest information on
reliability testing results, go to Maxim’s web site at
www.maxim-ic.com/ucsp to find the Application Note:
UCSP—A Wafer-Level Chip-Scale Package.
0
V
IN
V
TH_IN
V
S
-(V - V
S
) /
WHERE V = V OR V
TH_IN
S
CC
L
R
*
IN
*R = 4kΩ WHEN DRIVING V SIDE; R = 150Ω WHEN DRIVING V SIDE.
IN
L
IN
CC
Figure 6. Typical I vs. V
IN
IN
2
I C is a trademark of Philips Corp.
2
Purchase of I C components from Maxim Integrated Products, Inc. or one of its sublicensed Associated Companies, conveys a license
2
2
2
under the Philips I C Patent Rights to use these components in an I C system, provided that the system conforms to the I C Standard
Specification as defined by Philips.
______________________________________________________________________________________ 11
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Pin Configurations (continued)
1
2
3
TOP VIEW
A
V
1
2
3
4
8
7
6
5
V
L
CC
I/O V 1
L
I/O V 2
L
V
L
I/O V
1
I/O V 1
L
CC
B
MAX13014
I/O V
2
I/O V 2
L
CC
GND
EN
GND
EN
C
MAX13014
I/O V
1
I/O V 2
CC
V
CC
CC
SOT23
UCSP
(BUMPS ON BOTTOM OF DIE)
1
2
3
A
V
1
2
3
4
8
7
6
5
V
L
CC
I V 1
L
I V 2
L
V
L
O V
CC
1
I V 1
L
B
MAX13015
O V
CC
2
I V 2
L
GND
EN
GND
EN
C
MAX13015
O V
CC
1
O V 2
CC
V
CC
SOT23
UCSP
(BUMPS ON BOTTOM OF DIE)
1
2
3
A
V
1
8
7
6
5
V
L
CC
I V 2
L
O V 1
L
V
L
I V
1
2
3
4
O V 1
L
CC
CC
B
MAX13016
O V
2
I V 2
L
GND
EN
GND
EN
C
MAX13016
I V
CC
1
O V 2
CC
V
CC
SOT23
UCSP
(BUMPS ON BOTTOM OF DIE)
1
2
3
A
V
1
2
3
4
8
7
6
5
V
L
CC
O V 1
L
O V 2
L
V
L
I V
1
O V 1
L
CC
CC
B
MAX13017
I V
2
O V 2
L
GND
EN
GND
EN
C
MAX13017
I V
CC
1
I V 2
CC
V
CC
SOT23
UCSP
(BUMPS ON BOTTOM OF DIE)
12 ______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Pin Configurations (continued)
1
2
3
4
TOP VIEW
I/O V 1
L
1
2
3
4
5
6
7
14 I/O V
13 I/O V
1
2
CC
A
B
C
MAX3023
I/O V 2
L
I/O V 1
L
V
I/O V 4
L
EN
CC
L
V
12 V
CC
L
MAX3023
N.C.
I/O V 3
11 GND
10 I/O V
I/O V
1
I/O V 2
L
I/O V 3
L
I/O V
4
3
CC
CC
CC
3
4
L
CC
I/O V 4
L
9
8
I/O V
EN
CC
I/O V
2
V
CC
GND
I/O V
CC
EN
UCSP
(BUMPS ON BOTTOM OF DIE)
TSSOP
1
2
3
4
I V 1
L
1
2
3
4
5
6
7
14 O V
13 O V
1
2
CC
A
B
C
MAX3024
I V 2
L
I V 1
L
V
L
I V 4
L
EN
CC
V
12
V
CC
L
MAX3024
N.C.
I V 3
11 GND
O V
1
I V 2
L
I V 3
L
O V
4
3
CC
CC
10 O V
3
4
L
CC
I V 4
L
9
8
O V
EN
CC
O V
CC
2
V
CC
GND
O V
CC
EN
UCSP
(BUMPS ON BOTTOM OF DIE)
TSSOP
1
2
3
4
O V 1
L
1
2
3
4
5
6
7
14 I V 1
CC
A
B
C
MAX3025
I V 2
L
13 O V
2
O V 1
L
V
L
I V 4
L
EN
CC
V
L
12
V
CC
MAX3025
N.C.
I V 3
11 GND
I V
1
I V 2
L
I V 3
L
O V
4
3
CC
CC
10 O V
3
4
L
CC
I V 4
L
9
8
O V
EN
CC
O V
2
V
CC
GND
O V
CC
CC
EN
UCSP
(BUMPS ON BOTTOM OF DIE)
TSSOP
______________________________________________________________________________________ 13
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Pin Configurations (continued)
1
2
3
4
TOP VIEW
O V 1
L
1
2
3
4
5
6
7
14 I V
13 I V
1
2
CC
A
B
C
MAX3026
O V 2
L
O V 1
L
V
L
I V 4
L
EN
CC
V
L
12
V
CC
MAX3026
N.C.
I V 3
11 GND
I V
1
2
O V 2
L
I V 3
L
O V
4
3
CC
CC
CC
10 O V
3
L
CC
I V 4
L
9
8
O V
EN
4
CC
I V
V
CC
GND
O V
CC
EN
UCSP
(BUMPS ON BOTTOM OF DIE)
TSSOP
1
2
3
4
O V 1
L
1
14 I V
13 I V
1
2
CC
A
B
C
MAX3027
O V 2
L
2
3
4
5
6
7
O V 1
L
V
L
I V 4
L
EN
CC
V
L
12
11 GND
10 I V
V
CC
MAX3027
N.C.
O V 3
I V
1
2
O V 2
L
O V 3
L
O V
4
CC
CC
CC
3
L
CC
I V 4
L
9
8
O V 4
CC
I V
V
CC
GND
I V
CC
3
EN
EN
UCSP
(BUMPS ON BOTTOM OF DIE)
TSSOP
1
2
3
4
O V 1
L
1
14 I V
13 I V
1
2
CC
A
B
C
MAX3028
O V 2
L
2
3
4
5
6
7
O V 1
L
V
L
O V 4
L
EN
CC
V
12
V
CC
L
MAX3028
N.C.
O V 3
11 GND
I V
1
2
O V 2
L
O V 3
L
I V
4
3
CC
CC
CC
10 I V
3
4
L
CC
O V 4
L
9
8
I V
EN
CC
I V
V
CC
GND
I V
CC
EN
UCSP
(BUMPS ON BOTTOM OF DIE)
TSSOP
14 ______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Ordering Information/Selector Guide (continued)
NUMBER OF
→ V
TRANSLATORS TRANSLATORS
Number of
→ V
PACKAGE
CODE
TOP
MARK
V
L
V
CC
PART
TEMP RANGE
PIN-PACKAGE
EN EN
CC
L
MAX13013EBT-T
MAX13014EKA
MAX13014EBL-T
MAX13015EKA*
MAX13015EBL-T*
MAX13016EKA*
MAX13016EBL-T*
MAX13017EKA*
MAX13017EBL-T*
MAX3023EUD
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
3 x 2 UCSP-6
8 SOT23
B6-1
—
ADF
AEKB
AEN
AEKC
AEO
AEKD
AEP
AEKE
AEQ
—
1
2
2
2
2
1
1
0
0
4
4
4
4
3
3
2
2
1
1
0
0
1
2
2
0
0
1
1
2
2
4
4
0
0
1
1
2
2
3
3
4
4
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
—
—
—
—
—
—
—
—
—
✓
3 x 3 UCSP-9
8 SOT23
B9-2
—
3 x 3 UCSP-9
8 SOT23
B9-2
—
3 x 3 UCSP-9
8 SOT23
B9-2
—
3 x 3 UCSP-9
14 TSSOP
B9-2
—
MAX3023EBC-T
MAX3024EUD*
MAX3024EBC-T*
MAX3025EUD*
MAX3025EBC-T*
MAX3026EUD*
MAX3026EBC-T*
MAX3027EUD*
MAX3027EBC-T*
MAX3028EUD*
MAX3028EBC-T*
4 x 3 UCSP-12
14 TSSOP
B12-1
—
ABW
—
—
✓
4 x 3 UCSP-12
14 TSSOP
B12-1
—
ABX
—
—
✓
4 x 3 UCSP-12
14 TSSOP
B12-1
—
ABY
—
—
✓
4 x 3 UCSP-12
14 TSSOP
B12-1
—
ABZ
—
—
✓
4 x 3 UCSP-12
14 TSSOP
B12-1
—
ACA
—
—
✓
4 x 3 UCSP-12
B12-1
ACB
—
*Future product—contact factory for availability.
Chip Information
TRANSISTOR COUNT:
MAX13013: 261
MAX13014–MAX13017: 444
MAX3023–MAX3028: 791
PROCESS: BiCMOS
______________________________________________________________________________________ 15
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
16 ______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, 3x2 UCSP
1
21-0097
G
1
______________________________________________________________________________________ 17
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
SEE DETAIL "A"
SYMBOL
MIN
MAX
e
b
A
0.90
0.00
0.90
0.28
0.09
2.80
2.60
1.50
0.30
1.45
0.15
1.30
0.45
0.20
3.00
3.00
1.75
0.60
C
L
A1
A2
b
C
D
E
C
C
L
E1
L
E
E1
L
0.25 BSC.
L2
e
PIN 1
I.D. DOT
(SEE NOTE 6)
0.65 BSC.
1.95 REF.
0∞
e1
0
8∞
e1
D
C
C
L
L2
A2
A
GAUGE PLANE
A1
SEATING PLANE
C
0
L
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF
HEEL OF THE LEAD PARALLEL TO SEATING PLANE C.
DETAIL "A"
3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR.
4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING.
5. COPLANARITY 4 MILS. MAX.
6. PIN 1 I.D. DOT IS 0.3 MM ÿ MIN. LOCATED ABOVE PIN 1.
PROPRIETARY INFORMATION
TITLE:
7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD
BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP.
PACKAGE OUTLINE, SOT-23, 8L BODY
8. MEETS JEDEC MO178.
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0078
D
1
18 ______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, 3x3 UCSP
1
21-0093
I
1
______________________________________________________________________________________ 19
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
20 ______________________________________________________________________________________
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, 4x3 UCSP
1
21-0104
F
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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is a registered trademark of Maxim Integrated Products.
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