MAX32600 [MAXIM]
Wellness Measurement Microcontroller;
| 型号： | MAX32600 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Wellness Measurement Microcontroller 微控制器 |
| 文件： | 总35页 (文件大小：606K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX32600
Wellness Measurement Microcontroller
General Description
Benefits and Features
● Integrated AFE Enables Precision Wellness
The MAX32600 microcontroller is based on the
®
®
industry-standard ARM Cortex -M3 32-bit RISC core
operating at up to 24MHz. It includes 256KB of flash
memory, 32KB of SRAM, a 2KB instruction cache,
and integrated high-performance analog peripherals.
The MAX32600 is available in the following package
options: 192-ball, 12mm x 12mm CTBGA; 120-ball,
7mm x 7mm CTBGA; and 108-ball, 5.4mm x 4.3mm WLP.
Measurements with Minimal Discretes
• 16-Bit ADC with Input Mux and PGA
• Up to 500ksps Conversion Rate
• PGA with Gain of 1, 2, 4, and 8 and Bypass Mode
• Differential 8:1 or Single-Ended 16:1 Input Mux
• Internal Mux Inputs for Measuring V
DDA3
• Internal or External Voltage Reference
• Programmable Buffers for ADC and DACs
• Two 12-Bit DACs and Two 8-Bit DACs
• Four Operational Amplifiers
• Four Low-Power Comparators
• Four Uncommitted SPST Analog Switches
• Four Ground Switches
Applications
● Wearable Medical Devices
● Pulse Oximetry Measurement
● Galvanic Skin Response Measurement
● Blood Glucose Metering
• Up to Eight 100mA LED Driver Pairs (Sink)
• Internal Temperature Sensor
Simplified Functional Diagram
● Secure Valuable IP and Data with Robust On-Board
Trust Protection Unit
MAX32600
• Trust Protection Unit for End-to-End Security
• AES Hardware Engine
ANALOG FRONT-END
• µMAA for ECDSA and RSA
• True Random Number Generator (TRNG)
• Fast-Erase SRAM for Secure Key Storage
4 × SPST ANALOG
SWITCHES
2 × 12-BIT
DACS
4 × COMP/
AMPLIFIERS
PROGRAMMABLE
VOLTAGE REFERENCE
16-BIT ADC
WITH PGA
16 S/E OR 8 DIFF
MUX INPUTS
● Industry’s Lowest Overall System Power Increases
Battery Life
TEMP SENSOR,
CALIBRATION MUX
2 × 8-BIT
DACS
8 × PROGRAMMABLE
LED DRIVERS
• 175µA/MHz Active Power Executing Code from Cache
• 1.25µA Current Consumption with Real-Time Clock
Enable in LP0
• 1.8µA Current Consumption with Data Retention and
Fast 15µs Wakeup in LP1
3 × SPI MASTER
2 × UART
NVIC
256KB FLASH
32KB SRAM
2
ARM CORTEX-M3 24MHz
2 × I C MASTER
• Peripheral Clock Control
• 6-Channel DMA Engine Enables Intelligent
Peripheral Operation While Micro is in Sleep Mode
2
I C SLAVE
CRC32/16
GENERATOR
2 × WATCHDOG TIMER
24MHz INTERNAL OSC
USB
FULL SPEED
● Flexible Package Options
AES ENGINE
MAA
64 GPIOs
• 120-Ball CTBGA, 0.5mm Pitch, 7mm x 7mm
• 192-Ball CTBGA, 0.65mm Pitch, 12mm x 12mm
• 108-Bump WLP, 0.4mm Pitch, 5.4mm x 4.3mm
SUPPLY VOLTAGE
MONITORS
TRNG
LCD CONTROLLER
96/128/160
SEGMENTS
4 × 32-BIT
TIMER
UNIQUE ID
INSTANT ERASE
KEY STORAGE
Additional Benefits and Features and Ordering Information
appear at end of data sheet.
32-BIT REAL-TIME CLOCK
WITH TIME OF DAY ALARM
JTAG
ARM and Cortex are registered trademarks of ARM Limited (or
its subsidiaries) in the EU and/or elsewhere. All rights reserved.
SEE THE SELECTOR GUIDE FOR CONFIGURATION DETAILS.
19-6947; Rev 7; 6/17
MAX32600
Wellness Measurement Microcontroller
Absolute Maximum Ratings
Voltage Range on V
and V
with
Output Current (Sink) by Any I/O Pin.................................25mA
Output Current (Source) by Any I/O Pin............................-25mA
DD
DDA3
Respect to GND ...............................................-0.3V to +3.6V
Voltage Range on V .........................................-0.3V to 5.5V
Output Current (Source) by V
..................................100mA
BUS
DDIO
Voltage Range on Any Lead with
Respect to GND (excluding V
Output Current (Sink) by LED Pins..................................135mA
Output Current (Source) by V ..................................50mA
)....... -0.3V to (V
+ 0.5V)
BUS
DD
REG18
Voltage Range on Analog Pins with
Respect to GND ............................................. -0.3V to V
Operating Temperature Range........................... -40°C to +85°C
Storage Temperature Range............................ -65°C to +150°C
Soldering Temperature (reflow).......................................+260°C
DDA3
Total Current into V /V
Power Lines (Sink) ..........100mA
DD DDA3
Total Current Source V
Power Lines (Sink).................100mA
DD
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
(Note 1)
Package Thermal Characteristics
108 WLP
192 CTBGA
Junction-to-Ambient Thermal Resistance (θ ) .....29.50°C/W
Junction-to-Ambient Thermal Resistance (θ ) .....32.99°C/W
JA
JA
Junction-to-Case Thermal Resistance (θ )............9.40°C/W
JC
120 CTBGA
Junction-to-Ambient Thermal Resistance (θ ) ..........32°C/W
JA
Junction-to-Case Thermal Resistance (θ ).................9°C/W
JC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Recommended DC Operating Conditions
(V
= V
to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
DD
RST A
PARAMETER
SYMBOL
CONDITIONS
MIN
1.8
TYP
MAX
3.6
UNITS
Digital Domain Voltage
Analog Domain Voltage
1.8V Internal Regulator
V
(Note 3)
V
V
V
DD
V
2.3
3.6
DDA3
V
1.8
REG18
Power-Fail Warning Voltage
for Supply
V
Monitors V , PFWVSBIT = 0x0016
2.525
1.765
V
V
V
V
PFW
DD
Power-Fail Reset Voltage
V
Monitors V
Monitors V
RST
DD
DD
Power-On-Reset Release
Voltage
V
or V
1.8
SPOR
DDB
RAM Data Retention Voltage
V
1.0
5
DRV
Cache disabled, f
= 24MHz
CK
LP3 Active Current
(Note 4)
I
mA
Cache enabled, execution from cache,
100% hit rate, f = 24MHz
DDLP3
6.10
CK
One PMU channel enabled
Each additional PMU channel
1.25
200
1.8
mA
µA
LP2 Current
LP1 Current
I
I
I
DDLP2
DDLP1
RTC enabled, V
supply current
supply current
supply current
supply current
DD
µA
RTC disabled, V
1.4
DD
DD
RTC enabled, V
1250
850
0
LP0 Current
nA
µs
DDLP0
ONLP2
RTC disabled, V
DD
LP2 Mode Resume Time
t
One PMU channel active
Maxim Integrated
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MAX32600
Wellness Measurement Microcontroller
Recommended DC Operating Conditions (continued)
(V
= V
to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
DD
RST A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
15
MAX
UNITS
µs
LP1 Mode Resume Time
LP0 Mode Resume Time
t
t
ONLP1
ONLP0
26
µs
Input Low Voltage for SRSTN
and All Port Pins
0.3 ×
V
V
IL
V
DDIO
Input High Voltage for SRSTN
and All Port Pins
0.7×
V
V
IH
V
DDIO
Input Hysteresis (Schmitt)
V
300
0.4
0.4
mV
IHYS
V
V
= 3.6V, I = 11mA
OL
0.5
0.5
Output Low Voltage for All Port
Pins
DD
DD
V
V
OL
= 2.3V, I = 8mA
OL
Output High Voltage for All
Port Pins
V
− 0.5
DDIO
V
I
= -2mA
OH
V
OH
Input/Output Pin Capacitance
for All GPIO Port Pins
C
5
pF
IO
R
Normal drive mode
25
1
kΩ
MΩ
nA
Pullup Resistance for All GPIO
Port Pins
PU25K
R
Weak pullup enabled
PU1M
Input Leakage Current Low
Input Leakage Current High
FLASH MEMORY
I
V
= 0V, internal pullup disabled
-100
-100
+100
+100
IL
IN
IN
V
< V
+ 0.6V or 3.6V or whichever
DD
I
nA
IH
is lower, internal pullup disabled
t
Mass erase
Page erase
30
30
ME
Flash Erase Time
ms
µs
t
ERASE
Flash Programming Time per
Word
t
60
PROG
Flash Endurance
Data Retention
LCD
(Note 5)
20
K cycles
Years
t
T = +25°C (Note 5)
100
RET
A
V
V
output boost voltage;
= 2.0V to 3.6V
LCD
LCD Reference Voltage
V
3.3
V
V
LCD
DD
2/3 level
V
V
V
+ 2/3 (V
- V
- V
- V
)
)
)
ADJ
ADJ
ADJ
LCD
LCD
LCD
ADJ
ADJ
ADJ
LCD Segment/Common Bias
Voltage
V
1/2 level
+ 1/2 (V
+ 1/3 (V
0
LCDBIAS
1/3 level
LCD_LCRA[3:0] = 0
LCD Adjustment Voltage
V
V
0.4 ×
ADJ
LCD_LCRA[3:0] = 15
V
LCD
Static and 1/3 bias
1/2 bias
108
LCD Bias Resistor
R
kΩ
kΩ
LCD
72
72
LCD Adjustment Resistor
R
LCD_LCRA[3:0] = 15
LADJ
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MAX32600
Wellness Measurement Microcontroller
Recommended DC Operating Conditions (continued)
(V
= V
to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
DD
RST A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
REAL-TIME CLOCK (RTC)
RTC Input Frequency
f
32kHz watch crystal
32.768
0.7
kHz
µA
32KIN
I
Micro in LP2 or LP3
Micro in LP0 or LP1
(Note 6)
RTC
RTC_LP0
RTC Operating Current
I
0.4
µA
RTC Initial Power-Up Time
t
250
ms
RTC_ PUP
RTC Power Mode Transition
Time from LP0/LP1 to LP2/LP3
RTC transition from low to high power
drive, not required in all applications
256
ms
USB Electrical Characteristics
(V
= V
to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 5)
DD
RST A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
USB Supply Voltage
V
4.5
5.5
V
V
BUS
DDB
USB PHY Supply Voltage
V
V
≥ 4.0V
3.3
BUS
Transmitting on D+ and D- at 12Mbps,
C = 50 pF on D+ and D- to V
FRCVDD = 0
,
3 + I
mA
mA
L
SS
DD
V
Supply Current in LP2/3
BUS
While Transmitting USB Data
(Note 3)
I
VBUS_TX
Transmitting on D+ and D- at 12Mbps,
C = 50 pF on D+ and D- to GND,
3
L
FRCVDD = 1
V
Supply Current in LP2/3
0.4 +
I
DD
BUS
I
D+ = hi, D- = lo, FRCVDD = 18
mA
V
VBUS_IDLE
with USB Idle
Single-Ended Input High Voltage
D+, D-
V
IHD
2.0
Single-Ended Input Low Voltage
D+, D-
V
0.8
0.3
V
ILD
Output Low Voltage D+, D-
Output High Voltage D+, D-
Differential Input Sensitivity D+, D-
Common-Mode Voltage Range
V
R = 1.5kΩ from D+ to 3.6V
V
V
V
V
OLD
L
V
R = 15kΩ from D+ and D- to V
2.8
0.2
0.8
OHD
L
SS
V
D+ to D-
DI
V
Includes V range
2.5
2.0
CM
DI
Single-Ended Receiver
Threshold
V
0.8
V
mV
V
SE
Single-Ended Receiver
Hysteresis
V
V
200
SEH
CRS
Differential Output Signal
Cross-Point Voltage
C = 50pF
1.65
L
D+, D- Off-State Input
Impedance
R
300
kΩ
LZ
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MAX32600
Wellness Measurement Microcontroller
USB Electrical Characteristics
PARAMETER
SYMBOL
CONDITIONS
Steady-state drive
MIN
28
TYP
MAX
44
UNITS
Driver Output Impedance
R
Ω
DRV
Idle
0.9
1.575
3.090
D+ Pullup Resistor
R
kΩ
PU
Receiving
1.425
USB TIMING
D+, D- Rise Time (Transmit)
D+, D- Fall Time (Transmit)
t
C = 50pF
12
12
ns
ns
R
L
t
C = 50pF
L
F
Rise/Fall Time Matching
(Transmit)
t , t
C = 50pF
100
%
R
F
L
Clock Electrical Characteristics
(V
= V
to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
DD
RST A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MHz
%
External Crystal/Clock Input
Frequency
f
1
24
HFXIN
External Crystal Duty Cycle
t
50
50
HFX_DUTY
External Clock Input Duty
Cycle
t
%
XCLK_DUTY
System Clock Frequency
System Clock Period
f
t
24.2
±1%
MHz
ns
CK
CK
1/f
CK
Internal Relaxation Oscillator
Frequency
f
24
MHz
MHz
OSC
Internal Relaxation Oscillator
Variability
f
OSC_VAR
Phase-Locked Loop (PLL) Electrical Characteristics
(V
= V
to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
DD
RST A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MHz
ns
8MHz, 12MHz, 24MHz with
corresponding clock multiplier
Frequency
f
48
1
PLL
Frequency Jitter
Peak-to-peak
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MAX32600
Wellness Measurement Microcontroller
ADC/PGA Electrical Characteristics
(V
= V
to 3.6V, V
= 2.3V to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
DD
RST
DDA3 A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ADC ANALOG INPUT
Unipolar, AIN+ − AIN-
PGA gain = 1, 2, 4, 8
+V
+V
/
/
/
REFADC
Gain
0
V
V
Bipolar, AIN+ − AIN- PGA gain = 1,
2, 4, 8 range = 0
-V
/
REFADC
(2 × Gain)
REFADC
(2 × Gain)
Bipolar, AIN+ − AIN- PGA gain = 1,
2, 4, 8 range = 1
-V
+V
REFADC/
Gain
REFADC
Gain
V
V
V
Input Voltage Range
(Note 5)
V
IN
Unipolar, AIN+ − AIN-, PGA bypass
0
+V
REFADC
Bipolar, AIN+ − AIN-, PGA bypass,
range = 0
-V
-V
+V
/
REFADC
/2
REFADC
2
Bipolar, AIN+ − AIN-, PGA bypass,
range = 1
+V
V
V
REFADC
REFADC
V
AIN+, AIN-
AIN+, AIN-
0
CM_MIN
Common-Mode Input Voltage
Range
V
V
CM_MAX
DDA3
T
= +25°C,
A
1
AIN0±, AIN[2:7] ± V = 0V < 2.0V
IN
T
= +50°C,
A
4
3
AIN0±, AIN[2:7] ± V = 0V < 2.0V
IN
T
= +25°C,
A
AIN0±, AIN[2:7] ± V = 2.0V to 3.6V
IN
T
= +50°C,
A
8
AIN0±, AIN[2:7] ± V = 2.0V to 3.6V
IN
T
= +25°C,
A
2
AIN1+, AIN1- ± V = 0V < 2.0V
IN
T
= +50°C
A
6
AIN1+, AIN1- ± V = 0V < 2.0V
ADC/PGA Input Leakage
Current (Note 5)
IN
I
pA
IL
T
= +25°C,
A
4
AIN1+, AIN1- ± V = 2.0V to 3.6V
IN
T
= +50°C,
A
13
1
AIN1+, AIN1- ± V = 2.0V to 3.6V
IN
T
= -40°C to +85°C,
A
±200
±350
±300
±525
AIN0±, AIN[2:7] ± V = 0V < 2.0V
IN
T
= -40°C to +85°C,
A
3
AIN0±, AIN[2:7] ± V = 2.0V to 3.6V
IN
T
= -40°C to +85°C,
A
2
AIN1+, AIN1- ± V = 0V < 2.0V
IN
T
= -40°C to +85°C,
A
5
AIN1+, AIN1- ± V = 2.0V to 3.6V
IN
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MAX32600
Wellness Measurement Microcontroller
ADC/PGA Electrical Characteristics (continued)
(V
= V
to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
DD
RST A
PARAMETER
SYMBOL
CONDITIONS
PGA bypass, range = 0
PGA bypass, range = 1
PGA gain = 1
MIN
TYP
7
MAX
UNITS
4
7
Input Capacitance
C
pF
I
PGA gain = 2
13
25
49
PGA gain = 4
PGA gain = 8
DC CHARACTERISTICS
Resolution
N
16
-1
Bits
LSB
LSB
LSB
No Missing Codes (Note 5)
Differential Nonlinearity
Integral Nonlinearity (Note 5)
DNL
INL
16-bit resolution
±0.5
±1.5
3.7
V
≥ 1.5V
±4
REFADC
PGA bypass
PGA gain = 8
PGA bypass
PGA active
Transition Noise
LSB
LSB
8.1
±200
±225
Gain Error without Firmware
Compensation
Gain Error Temperature
Coefficient
V
≥ 1.5V, does not include
LSB/
°C
REF
±0.4
reference drift
PGA bypass
PGA active
0
0
±55
80
Offset Error without Firmware
Compensation
OE
LSB
Offset Error Temperature
Coefficient
V
≥ 1.5V, does not include
LSB/
°C
REF
0.1
±0.1
±0.1
±1
reference drift
Channel-to-Channel Offset
Matching
LSB
LSB
LSB
Channel-to-Channel Gain
Matching
Input Common-Mode
Rejection
CMR
V
= 0V to V
CM DDA3
CONVERSION RATE
PGA bypass
PGA gain = 1
PGA gain = 2
PGA gain = 4
PGA gain = 8
500/N
470/N
470/N
444/N
421/N
128
d
d
d
d
d
Throughput Rate
F
ksps
S
Decimation Rate
N
Powers of 2 (Note 5)
1
Sp
µs
d
15.5 ADC cycles;
FCLK
ADC Conversion Time
t
1.9375
CONV
ADC
= 8MHz (Note 7)
FCLK
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MAX32600
Wellness Measurement Microcontroller
ADC/PGA Electrical Characteristics (continued)
(V
= V
to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
DD
RST A
PARAMETER
SYMBOL
CONDITIONS
PGA bypass
MIN
187.5
250
250
375
375
0.63
1.5
TYP
MAX
UNITS
PGA gain = 1
ADC Acquisition Time
t
PGA gain = 2
ns
ACQ_ADC
PGA gain = 4
PGA gain = 8
Single sample or initial sample
PGA gain = 1, continuous sample
PGA Acquisition Time
Aperture Jitter
t
1.5
µs
PGA gain = 2, continuous sample
PGA gain = 4, continuous sample
PGA gain = 8, continuous sample
External crystal or clock source
Internal relaxation oscillator
(Note 5)
ACQ_PGA
1.5
1.5
500
500
t
ps
AJ
ADC Clock Frequency
Transient Response
8
1
MHz
CLK
cycle
Full-scale step
DYNAMIC SPECIFICATIONS (Note 8)
-0.5dB below full scale with V = 3V internal, V
= 2.048V, ADC range = 1, ADC bipolar = 1, PGA bypass or PGA gain = 1x,
REF
DDA3
f
= 500ksps
SAMPLE
Bypass mode,
decimation filter N = 1
72.4
70.8
74.8
73.6
d
Decimation filter N = 1,
PGA enabled
Signal-to-Noise Ratio
(Note 9)
d
SNR
Decimation filter N = 16
80.3
84.6
85.4
89.9
d
Decimation filter N = 64
d
dB
Bypass mode,
decimation filter N = 1
72.2
70.7
74.7
73.5
d
Decimation filter N = 1,
PGA enabled
Signal-to-Noise and
Distortion
d
SINAD
Decimation filter N = 16
78.6
79.7
84.5
87.9
91
d
Decimation filter N = 64
d
PGA bypass
PGA enabled
PGA bypass
PGA enabled
Spurious-Free Dynamic
Range
SFDR
THD
dB
85
91
Total Harmonic Distortion
dB
dB
91
Channel-to-Channel
Crosstalk
Single-ended, f
< 200kHz
107
INPUT
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MAX32600
Wellness Measurement Microcontroller
ADC/PGA Electrical Characteristics (continued)
(V
= V
to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
DD
RST A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER SUPPLIES
ADC Supply Current
Line Rejection
F
> 333.3ksps, PGA bypass,
S
9.6
post trimmed
mA
F
> 333.3ksps, PGA enabled,
S
11.6
32.9
40.9
post trimmed
F
≤ 333.3ksps, PGA bypass,
S
post trimmed
nA/sps
LSB
F
≤ 333.3ksps, PGA enabled,
S
post trimmed
LR
V
= 2.3 to 3.6V (Note 5)
±10
DDA3
DAC0/DAC1 Electrical Characteristics
(V
= 2.3V to 3.6V, V
= V
to 3.6V, R = 10kΩ and C = 100pF, T = -40°C to +85°C, V
= 1.5V, unless otherwise
DDA3
DD
RST
L
L
A
REFDAC
noted.) (Note 2)
PARAMETER
SYMBOL
DAC
CONDITIONS
MIN
TYP
MAX
UNITS
Resolution
Guaranteed monotonic
12
Bits
R
Power mode = 2 or 3, noise filter
Differential Nonlinearity
DNL
INL
enabled, T = -0°C to +85°C, code
A
000h to FFFh (Note 5)
-2
-4
+2
LSB
Power mode = 2 or 3, noise filter
enabled, code 073h to F8Dh
(Note 5)
Integral Nonlinearity
+4
±4
LSB
mV
Offset Error
E
Using uncommitted op amp (Note 5)
±0.5
O
V
= 1.5V, power mode = 2
REFDAC
to 3, V
= 3.0V, trimmed, using
-8
±1
+8
DDA3
firmware compensation
Gain Error
E
LSB
G
V
= 1.5V, V
= 3.0V,
DDA3
REFDAC
-90
+90
without firmware compensation
Temperature coefficient
compensation disabled, using
internal uncommitted op amp,
-60
-20
V
V
= 1.5V, power mode = 3,
= 3.0V
REFDAC
ppm/°
C
Gain Error Temperature
Compensation
DDA3
E
GTC
Temperature coefficient
compensation enabled, using
internal uncommitted op amp,
V
V
= 1.5V, power mode = 3,
= 3.0V
REFDAC
DDA3
V
+
V
-
SSDAC
DDA3
Output Voltage Range
V
Min code to max code (Note 5)
V
O
E
0.5 + E
O
G
Maxim Integrated
│ 9
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MAX32600
Wellness Measurement Microcontroller
DAC0/DAC1 Electrical Characteristics (continued)
(V
= 2.3V to 3.6V, V
= V
to 3.6V, R = 10kΩ and C = 100pF, T = -40°C to +85°C, V
= 1.5V, unless otherwise
DDA3
DD
RST
L
L
A
REFDAC
noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
6.1
MAX
UNITS
Power mode = 3
kΩ
kΩ
kΩ
kΩ
Power mode = 2
Power mode = 1
Power mode = 0
8.9
Output Impedance
16.3
97.7
Noise filter enabled, code 400h to
C00h, rising or falling, to ±0.5 LSB
4
Voltage Output Settling Time
Glitch Energy
t
ms
V x ns
µA
SFS
Noise filter disabled, code 400h to
C00h, rising or falling, to ±0.5 LSB
0.03
Power mode = 0, 1, or 2
Power mode = 3,
code 000h to A5Hh
Static
12
12
110
82
V
= 2.5V
= 1.5V
= 2.5V
REF
Bias Supply Current Shared
I
DACx_ON
Static
V
REF
Static
V
438.7
301.6
164.5
27.4
REF
Power mode = 3
Static
V
= 2.5V
REF
Power mode = 2
Active Current
I
µA
DAC12
Static
V
= 2.5V
REF
Power mode = 1
Static
V
= 2.5V
REF
Power mode = 0
Static
V
= 1.5V
263.2
181
REF
Power mode = 3
Static
V
= 1.5V
REF
Power mode = 2
Active Current
I
µA
DAC12
Static
V
= 1.5V
98.7
REF
Power mode = 1
Static
V
= 1.5V
16.5
REF
Power mode = 0
Maxim Integrated
│ 10
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MAX32600
Wellness Measurement Microcontroller
DAC0/DAC1 Electrical Characteristics (continued)
(V
= 2.3V to 3.6V, V
= V
to 3.6V, R = 10kΩ and C = 100pF, T = -40°C to +85°C, V
= 1.5V, unless otherwise
DDA3
DD
RST
L
L
A
REFDAC
noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Static
V
= 2.048V
359.3
REF
Power mode = 3
Static
V
= 2.048V
247.1
124.8
22.5
REF
Power mode = 2
Active Current
I
µA
DAC12
Static
V
= 2.048V
REF
Power mode = 1
Static
V
= 2.048V
REF
Power mode = 0
Static
V
= 1.024V
179.7
123.5
67.3
REF
Power mode = 3
Static
V
= 1.024V
REF
Power mode = 2
Active Current
I
µA
DAC12
Static
V
= 1.024V
REF
Power mode = 1
Static
V
= 1.024V
11.2
10
REF
Power mode = 0
Power-On Time
Excluding reference
µs
Maxim Integrated
│ 11
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MAX32600
Wellness Measurement Microcontroller
DAC2/DAC3 Electrical Characteristics
(V
= 2.3V to 3.6V, V
= V
to 3.6V, R = 10kΩ and C = 100pF, T = -40°C to +85°C, V
= 1.5V, unless otherwise
DDA3
DD
RST
L
L
A
REFDAC
noted.) (Note 2)
PARAMETER
SYMBOL
DAC
CONDITIONS
MIN
TYP
MAX
UNITS
Resolution
Guaranteed monotonic
Code 07h to F9h
8
Bits
LSB
LSB
R
Differential Nonlinearity
Integral Nonlinearity
DNL
INL
±0.25
±1
±1
Code 07h to F9h
±0.25
±0.5
±2
Internal uncommitted op amp
(Note 5)
Offset Error
E
E
±4
mV
O
G
Gain Error
Internal reference
LSB
Gain-Error Temperature
Coefficient
Excludes offset and reference drift,
using internal uncommitted op amp
ppm of
FSR/°C
±5
V
DDA3
0.5
-
Output Voltage Range
Output Impedance
V
Min code to max code (Note 5)
V
V
O
SSDAC
49
3
kΩ
µs
40h to C0h code swing rising or
falling to ±0.5 LSB
Voltage Output Settling Time
t
SFS
DAC Glitch Impulse
Supply Current per DAC
Power-On Time
Major carry transitions
Static
12
62.4
10
nV-s
µA
I
DAC
Excluding Reference
µs
Operational Amplifier Electrical Characteristics
(V
= 2.3V to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
A
DDA3
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Common-Mode Rejection
Ratio
CMRR
75
dB
16-bit resolution
Input Offset Voltage
V
±0.5
5
±8
mV
OS
Input Offset Voltage Drift
V
µV/°C
OSDRIFT
15
200
300
650
200
300
650
T = +25°C, V = 0V
A
IN
Input Bias Current (Note 5)
I
pA
T = 0°C to +50°C, V = 0V
BIAS
A
IN
T = -40°C to +85°C, V = 0V
A
IN
15
T = +25°C
A
Input Offset Current (Note 5)
I
pA
dB
T = 0°C to +50°C
A
OS
T = -40°C to +85°C
A
Large Signal Voltage Gain
A
140
OL
en_nch_opampx = 1,
en_pch_opampx = 1
V
50mV
-
-
V
V
V
+
+
+
AGND
DDA3
50mV
en_nch_opampx = 0,
en_pch_opampx = 1
V
AGND
50mV
DDA3
1.05
Input Voltage Range
V
, V
V
IN+ IN-
en_nch_opampx = 1,
en_pch_opampx = 0
DDA3
0.95
50mV
Maxim Integrated
│ 12
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MAX32600
Wellness Measurement Microcontroller
Operational Amplifier Electrical Characteristics (continued)
(V
= 2.3V to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
A
DDA3
PARAMETER
SYMBOL
CONDITIONS
, 100kΩ load
MIN
- 10
TYP
MAX
UNITS
mV
Output Voltage Swing High
Output Voltage Swing Low
Output Short Circuit Current
V
V
V
- V
V
V
OH
DDA3
OUT
DDA3
DDA3
5
V
- V , 100kΩ load
AGND
mV
OL
OUT
I
25
50
mA
SC
OP AMP GND SWITCHES (INA+, INB+, INC+,IND+)
INx+ Capacitance
C
V
V
V
= V , f = 1MHz (Note 5)
AGND
2
pF
Ω
INx+
INx+
INx+
INx+
= 3.0V, I
= 3.0V, I
= 10mA
= 50mA
20
20
30
50
INx+
INx+
On-Resistance (Note 5)
R
ON
INx+ DC Current
I
(Note 5)
mA
INx+
AC CHARACTERISTICS
Gain-Bandwidth
GBW
SR
C = 100pF
3
MHz
V/µs
L
Slew Rate
C = 100pF
L
0.85
1.6
20
20
10
Input Voltage Noise Density
Input Voltage Noise
Input Current Noise Density
V
f = 10kHz
nV/√Hz
n
0.1Hz ≤ f ≤ 10Hz
µV
P-P
I
f = 10kHz
fA/√Hz
n
No sustained oscillations,
= 0Ω
Capacitive Loading
C
100
pF
LOAD
R
SERIES
f = 10kHz, V
= 1V , source
P-P
OUT
follower configuration, (en_nch_
opampx = 0, en_pch_opampx =1)
or (en_nch_opampx = 1, en_pch_
opampx = 0)
Total Harmonic Distortion
THD
-90
dB
POWER-SUPPLY CHARACTERISTICS
en_nch_opampx = 1, en_pch_
opampx = 1
183
155
155
en_nch_opampx = 0, en_pch_
opampx = 1
Supply Current
I
μA
VDDA3
LR
en_nch_opampx = 1, en_pch_
opampx = 0
Line Rejection
90
1.5
1
dB
µs
Turn-On Time
t
2.1
ON
Power-Down Output Impedance
Power-Down Output Leakage
OP AMP FEEDBACK SWITCH
Internal Switch On-Resistance
Ground Switch Resistance
V
= 1V
GΩ
nA
OUTx
±1
R
30
20
Ω
Ω
INTSW
R
OPAGND
Maxim Integrated
│ 13
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MAX32600
Wellness Measurement Microcontroller
Internal Voltage Reference Electrical Characteristics
(V
= 2.3V to 3.6V, T = -40°C to +85°C, Internal Reference Mode, 4.7µF capacitor at REFADC, 4.7µF cap at REFDAC, unless
DDA3
A
otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INTERNAL REFERENCE
V
V
= 2.3V to 3.6V, T = +25°C
A
-2%
-1%
1.024
1.50
+2%
+1%
DDA3
= 2.3V to 3.6V, REFADC,
= +25°C
DDA3
Output Voltage at REFADC
and REFDAC (Note 5)
V
REFADC,
T
A
V
V
REFDAC
V
= 2.3V to 3.6V, T = +25°C
-2%
-2%
2.048
2.50
1.24
30
+2%
+2%
DDA3
DDA3
A
V
= 2.7V to 3.6V, T = +25°C
A
Output Voltage at REFADJ
V
V
REFADJ
T
= 0°C to +70°C
Internal Reference Temperature
Coefficient (Note 5)
A
T
ppm/°C
CREF
T
= -40°C to +85°C
50
A
Temperature Coefficient
Adder of Buffer with External
Reference
T = 0°C to +70°C
5
A
T
ppm/°C
ms
C
T
= -40°C to +85°C
10
0.1 +
A
Turn-On Time
t
(Note 5)
(V
ꢀ
10
ON
REF
1.8)
15
Leakage Current with Internal
Reference Output Disabled
(Note 5)
I
refadc_outen = 0
refdac_outen = 0
50
50
REFADC
nA
I
15
REFDAC
REFADC and REFDAC Line
Regulation
±100
10
µV/V
I
T
= 0µA to 500µA,
= +25°C
SOURCE
Load Regulation
µV/µA
A
Internal reference only (Note 10)
REFADC buffer
33
Reference Supply Current
270
270
µA
REFDAC buffer
Maxim Integrated
│ 14
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MAX32600
Wellness Measurement Microcontroller
External Voltage Reference Electrical Characteristics
(V
= 2.3V to 3.6V, T = -40°C to +85°C, External reference mode.) (Note 2)
A
DDA3
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
EXTERNAL REFERENCE AT REFADJ
1.24
±3%
Input Voltage Range
Input Resistance
V
V
REFADJ
250
kΩ
EXTERNAL REFERENCE AT REFADC
1.0 to
V
V
= 2.3V to 3.0V
DDA3
V
- 0.5
Input Voltage Range
V
V
DDA3
REFADC
> 3.0V
1.0 to 2.5
DDA3
Input Capacitance
7
pF
µA
Dynamic Input Current
500ksps, V
= 2.048V
50
REFADC
EXTERNAL REFERENCE AT REFDAC
1.0 to
V
V
= 2.3V to 3.0V (typ)
> 3.0V (typ)
DDA3
V
- 0.5
DDA3
Input Voltage Range
V
V
REFDAC
1.0 to
2.5
DDA3
SPST Switches (SNO_, SCM_)
(V
= 2.3V to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
A
DDA3
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
,
0 to
SNOX
Analog Signal Range
On-Resistance
V
V
SCMX
DDA3
V
V
= 3.0V, I
= 0V to V
= 50mA,
DDA3
SNO_
SCM_
R
30
50
Ω
ON
DDA3
V
V
= 3.0V, V
= 2V, 0V
= +25° C (Note 5)
= 0V, 2V
= 0V, 2V
= 0V, 2V
DDA3
SNO_
SCM_
±30
±60
±100
T
A
pA
V
V
= 3.0V, V
= 2V, 0V
DDA3
SNO_
SCM_
SNO_ Off-Leakage Current
I
SNO_(OFF)
T
= +70°C
A
V
V
= 3.0V, V
= 2V, 0V
DDA3
SNO_
SCM_
±1
nA
T
= -40°C to +85°C
A
Maxim Integrated
│ 15
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MAX32600
Wellness Measurement Microcontroller
SPST Switches (SNO_, SCM_) (continued)
(V
= 2.3V to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
A
DDA3
PARAMETER
SYMBOL
CONDITIONS
= 3.0V, V = 0V, 2V
MIN
TYP
MAX
UNITS
V
V
DDA3
SNO_
SCM_
= 2V, 0V
±30
±100
T
= +25° C (Note 5)
A
pA
V
V
= 3.0V, V
= 2V, 0V
= +70°C
= 0V, 2V
= 0V, 2V
DDA3
SNO_
SCM_
SCM_
SCM_ Off-Leakage Current
I
±50
SCM_(OFF)
T
A
V
V
= 3.0V, V
= 2V, 0V
DDA3
±1
nA
nA
SNO_
T
= -40°C to +85°C
A
V
= 3.0V, V
= 0V, 2V
= 0V, 2V
= 0V, 2V
DDA3
SCM_
±0.8
±1.2
T
= +25° C
A
V
= 3.0V, V
DDA3
SCM_
SCM_ On-Leakage Current
I
SCM_(ON)
T
= 0°C to +70°C
A
V
= 3.0V, V
SCM_
DDA3
±2.0
1
T
= -40°C to +85°C
A
Turn-On/Off Time
t
/t
V
= 2V, R = 300Ω, C = 35pF
ns
ON OFF
SCM_
L
L
V
= 0V, R
= 0, C = 1.0nF
L
GEN
GEN
Charge Injection
Q
2
pC
(Note 5)
SNO_ Off-Capacitance
C
V
= AGND, f = 1MHz (Note 5)
2.5
5.0
pF
pF
SNOx
SNO_
SCM_
Switch On-Capacitance
C
V
= V
f = 1MHz (Note 5)
ON
SNO_,
CS Switches (CSA_, CSB_)
(V
= 2.3V to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
A
DDA3
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
= 500mV, I
> 2.3V
= 35mA,
CSBx
DDA3
CSx
0.7
Output Low Voltage
V
V
OL
V
V
= 350mV, I
> 2.5V
= 50mA,
CSBx
DDA3
CSx
0.6
Maximum combined current for up to 4
CSA/CSB pairs (Note 5)
CSA_, CSB_ DC Current
I
100
mA
CSx
Maxim Integrated
│ 16
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MAX32600
Wellness Measurement Microcontroller
Temperature Sensor
(V
= 2.3V to 3.6V, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
A
DDA3
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INTERNAL TEMPERATURE SENSOR
Temperature Resolution
0.11
±3
°C/LSB
°C
Internal Sensor Measurement
Error
External voltage reference
EXTERNAL TEMPERATURE SENSOR
AinCurrentEn = 1
I
I
I
I
AinCurrentSel = 00
4
AIN1P0
AIN1P1
AIN1P2
AIN1P3
V
< (V
- 0.5V)
AIN1P
DDA3
AinCurrentEn = 1
AinCurrentSel = 01
< (V
60
V
- 0.5V)
- 0.5V)
- 0.5V)
AIN1P1
DDA3
Current Sourced onto AIN1P
(Note 5)
µA
AinCurrentEn = 1
AinCurrentSel = 10
64
V
< (V
DDA3
AIN1P2
AinCurrentEn = 1
AinCurrentSel = 11
120
V
< (V
DDA3
AIN1P3
Note 2: Specifications to -40°C are guaranteed by design and are not production tested. Typical = 25°C, V
= 3V, unless otherwise
DD
specified.
Note 3: FRCVDD is 1 when firmware forces all power to be sourced from main battery V
rather than V
.
DD
BUS
Note 4: Measured on the V
pin and the part not in reset. All inputs are tied to GND or V . Outputs do not source/sink any current.
DD
DD
Execution from internal 24MHz relaxation oscillator, cache disabled, internal LDO disabled.
Note 5: Guaranteed by design.
Note 6: Initial startup of RTC from power up of MAX32600. This does not apply if RTC is running and changing power modes.
Note 7: During consecutive samples, conversion time overlaps acquisition time.
Note 8: AC electrical specifications are guaranteed by design and are not production tested.
Note 9: 10kHz sine-wave input signal.
Note 10: In order to perform ADC measurements, the internal reference must be turned on even when using external voltage reference.
Maxim Integrated
│ 17
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MAX32600
Wellness Measurement Microcontroller
Ball Configurations
MAX32600-P85
12mm × 12mm CTBGA
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
A
B
C
D
E
F
SCM3
INC+
INC-
INB+
INB-
OUTB
HFXOUT
P0.2
P0.5
P0.7
A
B
C
D
E
F
V
V
V
V
V
V
OUTC
V
V
V
V
V
SSDAC
SSDAC
SSDAC
SSDAC
SS
SCM2
SNO2
SNO3
HFXIN
P0.1
P0.3
P0.6
P1.1
V
V
V
V
V
V
P0.4
P1.0
P1.2
P1.5
P1.7
P2.3
P2.6
P2.7
P3.1
P3.3
P3.6
P4.1
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
IND-
V
SSDAC
V
SSDAC
INA-
SSDAC
SSDAC
SSDAC
SS
SSDAC
INA+
SSDAC
IND+
OUTA
TAMPERO
P0.0
V
OUTD
V
DDA3DAC
SSDAC
SCM1
SNO1
V
SS
P1.3
P2.0
P2.1
P2.4
RSTN
P1.4
P1.6
P2.2
P2.5
P3.0
P3.2
P3.4
P3.7
P4.2
SCM0
SNO0
V
V
V
V
V
V
SSDAC
SSDAC
SSADC
SSADC
SSADC
SSADC
V
V
SSADC
SSADC
AIN1+
AIN0+
G
H
J
G
H
J
AIN1-
AIN0-
V
REFADJ
V
SSUB
V
V
V
V
DDA3REF
DDIO
V
V
REFDAC
REFADC
SSADC
AIN3+
AIN3-
SSADC
AIN2+
AIN2-
V
V
SS
V
SS
DDIO
SS
K
L
P3.5
P4.0
P4.3
K
L
V
V
V
V
V
V
V
V
V
V
V
SS
REG18
REG18
SSADC
SSADC
SSADC
SSADC
SSADC
SSADC
SSADC
SSADC
SS
V
V
DD
SSREF
V
DDA3
M
N
P
R
T
M
N
P
R
T
V
V
SSADC
AIN5+
AIN5-
DDA3ADC
AIN4+
P4.6
P5.1
P5.4
P4.5
P5.0
P5.3
P5.6
P6.1
P4.4
P4.7
P5.2
P5.5
P5.7
AIN4-
V
V
V
SSADC
AIN6+
AIN6-
SSADC
TCK
P7.1
P7.0
P6.6
P6.5
D-
V
V
TSEL
TDO
TAMPERI
TDI
P7.6
P7.5
V
SS
V
SS
SSADC
V
V
V
V
BUS
DDB
SSADC
SSADC
ADJ
U
V
AIN7+
32KOUT
SRSTN
P7.3
P6.3
U
V
D+
V
V
V
SS
SS
LCD2
AIN7-
3
32KIN
P7.2
13
P6.7
14
P6.4
15
P6.2
16
P6.0
17
V
V
RTC
TMS
10
P7.7
11
P7.4
12
SSADC
V
SSADC
LCD1
LCD
6
1
2
4
5
7
8
9
18
Maxim Integrated
│
18
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MAX32600
Wellness Measurement Microcontroller
Ball Configurations (continued)
MAX32600-J85
7mm × 7mm CTBGA
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
13
A
B
C
D
E
F
SCM3
SCM2
IND+
IND-
OUTD
INB+
INB-
OUTB
HFXOUT
A
B
C
D
E
F
V
V
V
V
DDIO_SW1
SSUB
DDA3DAC
SSDAC
SNO3
SNO2
HFXIN
P1.0
P1.1
P1.4
P1.7
V
V
V
V
V
V
V
V
V
V
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
INA-
SSDAC
OUTA
TAMPERO
P1.2
SS
INC+
INC-
OUTC
INA+
V
V
V
V
V
V
V
V
SS
SSDAC
SSDAC
SNO1
SCM0
RSTN
P1.3
P1.6
TDO
TDI
SCM1
SNO0
REFADJ
AIN1+
REFDAC
P1.5
V
DDA3REF
G
H
J
REFADC
TCK
G
H
J
V
V
SSREF
DDIO_SW2
P2.0
AIN1-
V
V
V
V
SS
DDA3ADC
AIN0+
SSADC
P0.1
P0.0
P2.1
V
SSADC
SSADC
K
L
K
L
AIN0-
AIN2+
AIN2-
P0.5
P0.4
P0.2
P0.3
P2.2
P2.3
V
V
SSADC
AIN4+
AIN4-
TAMPERI
P0.7
SRSTN
32KIN
P0.6
V
V
V
REG18
DDA3
SSADC
DD
M
N
M
N
AIN5+
AIN5-
TSEL
TMS
P2.4
P2.6
P2.5
P2.7
V
V
V
BUS
V
V
V
V
V
V
SSADC
DDB
SS
DDIO
D-
SS
SS
AIN3+
AIN3-
D+
7
32KOUT
V
V
SS
SSADC
RTC
SS
1
2
3
4
5
6
8
9
10
11
12
13
Maxim Integrated
│ 19
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MAX32600
Wellness Measurement Microcontroller
Bump Configuration
MAX32600-W85
TOP VIEW
WLP
(BUMP SIDE DOWN)
(5.4mm x 4.3mm)
1
2
3
4
5
6
7
8
9
10
11
12
+
A
B
C
D
E
F
N.C.
D+
D-
V
32KIN
32KOUT
TAMPERI
P0.7
P0.5
P0.3
P0.1
N.C.
A
B
C
D
E
F
DD
V
DDA3
V
SS
V
RTC
P0.6
P0.4
P0.2
TCK
P0.0
TDI
TDO
P2.7
P2.5
P2.3
P2.1
P1.7
P1.6
V
V
DDB
V
TMS
BUS
REG18
V
DDIO_
SW2
V
AIN3+
CFG
V
DDIO
AIN2-
AIN3-
V
SRSTN
SNO1
SCM1
DDA3ADC
SSUB
TSEL
AIN2+
V
V
V
V
V
V
SNO0
SCM0
V
SS
V
SS
V
SS
P2.6
P2.4
P2.2
P1.2
P1.3
P1.5
SSADC
SSADC
SSADC
SSADC
SSADC
SSADC
SSADC
V
AIN1+
AIN1-
V
RSTN
P2.0
SSREF
REF
ADC
V
SS
V
SS
V
SS
V
SS
HFXIN
HFXOUT
P1.0
V
V
DDA3REF
SS
REF
DAC
REFADJ
V
SS
SNO3
SCM3
V
INA+
INA-
V
SS
G
H
J
G
H
J
SSDAC
V
V
SS
V
V
V
V
V
OUTA
TAMPERO
N.C.
SSDAC
SSDAC
SSDAC
SSDAC
SSDAC
V
DDA3
DAC
V
DDIO_
SW1
INB+/-
6
N.C.
INC+/-
V
P1.1
10
P1.4
N.C.
12
OUTC
3
OUTB
REG18
8
SSDAC
1
2
4
5
7
9
11
Maxim Integrated
│ 20
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MAX32600
Wellness Measurement Microcontroller
Ball/Bump Descriptions
BALL
BUMP
NAME
FUNCTION
MAX32600-P85 MAX32600-J85 MAX32600-W85
(192 BALL)
(120 BALL)
(WLP)
CLOCK PINS
V8
U8
N9
A5
A6
32KIN
32kHz Clock Input. Connect to 32kHz crystal.
N10
32KOUT 32kHz Clock Output. Connect to 32kHz crystal.
High-Frequency Crystal Input. Connect an external crystal or
resonator between HFXIN and HFXOUT as the high-frequency
system clock. Alternatively, HFXIN is the input for an external
high-frequency clock source when HFXOUT is shorted to ground.
B13
A13
B13
A13
F10
G10
HFXIN
High-Frequency Crystal Output. Connect an external crystal or
resonator between HFXIN and HFXOUT as the high-frequency
HFXOUT system clock. To use an external high-frequency clock source as
the system clock, connect HFXOUT to ground and apply clock
source to HFXIN.
ANALOG PINS
Analog Input. This pair of analog inputs can function as two single-
ended inputs or one differential pair. In single-ended mode, AIN0+
acts as input AIN0 and AIN0- acts as input AIN8.
AIN0+,
AIN0-
G3, H3
J1, K1
G3, H3
K3, L3
N3, N4
L5, L6
M1, N1
—
—
E3, E4
D1, C1
C4, C3
—
Analog Input. This pair of analog inputs can function as two single-
ended inputs or one differential pair. In single-ended mode, AIN1+
acts as input AIN1 and AIN1- acts as input AIN9.
AIN1+,
AIN1-
G1, H1
K3, L3
K1, L1
N3, P3
N1, P1
T1, U1
U3, V3
Analog Input. This pair of analog inputs can function as two single-
ended inputs or one differential pair. In single-ended mode, AIN2+
acts as input AIN2 and AIN2- acts as input AIN10.
AIN2+,
AIN2-
Analog Input. This pair of analog inputs can function as two single-
ended inputs or one differential pair. In single-ended mode, AIN3+
acts as input AIN3 and AIN3- acts as input AIN11.
AIN3+,
AIN3-
Analog Input. This pair of analog inputs can function as two single-
ended inputs or one differential pair. In single-ended mode, AIN4+
acts as input AIN4 and AIN4- acts as input AIN12.
AIN4+,
AIN4-
Analog Input. This pair of analog inputs can function as two single-
ended inputs or one differential pair. In single-ended mode, AIN5+
acts as input AIN5 and AIN5- acts as input AIN13.
AIN5+,
AIN5-
—
Analog Input. This pair of analog inputs can function as two single-
ended inputs or one differential pair. In single-ended mode, AIN6+
acts as input AIN6 and AIN6- acts as input AIN14.
AIN6+,
AIN6-
—
Analog Input. This pair of analog inputs can function as two single-
ended inputs or one differential pair. In single-ended mode, AIN7+
acts as input AIN7 and AIN7- acts as input AIN15.
AIN7+,
AIN7-
—
—
Maxim Integrated
│ 21
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MAX32600
Wellness Measurement Microcontroller
Ball/Bump Descriptions (continued)
BALL
BUMP
NAME
FUNCTION
MAX32600-P85 MAX32600-J85 MAX32600-W85
(192 BALL)
(120 BALL)
(WLP)
REFERENCE PINS
Internal ADC Reference Pin. If using the internal reference, this pin
K8
G2
F3
F1
F1
G2
G1
REFADC must be connected to ground through at least a 4.7µF ceramic chip
capacitor. In an external reference is used, it is input on this pin.
If an external bandgap input is used to provide the basis for the
REFADJ
H9
J8
internal ADC and DAC reference generation, it is input on this pin.
Internal DAC Reference Pin. If using the internal reference, this pin
REFDAC must be connected to ground through at least a 4.7µF ceramic chip
capacitor. In an external reference is used, it is input on this pin.
OP AMP/COMPARATOR PINS
C9
C10
C11
A9
C9
C10
C11
A9
G7
G8
H8
—
INA+
INA-
Op Amp A Positive Input
Op Amp A Negative Input
Op Amp A Output
OUTA
INB+
INB-
Op Amp B Positive Input
Op Amp B Negative Input
A10
A10
—
Op Amp B Positive/Negative Input. INB+ and INB- are both bonded
out to bump J6.
—
—
J6
INB+/-
A11
A5
A11
C5
J5
—
—
OUTB
INC+
INC-
Op Amp B Output
Op Amp C Positive Input
Op Amp C Negative Input
A6
C6
Op Amp C Positive/Negative Input. INC+ and INC- are both bonded
out to bump J2.
—
—
J2
INC+/-
A7
C7
A5
A6
A7
J3
—
—
—
OUTC
IND+
IND-
Op Amp C Output
C5
Op Amp D Positive Input
Op Amp D Negative Input
Op Amp D Output
C6
C7
OUTD
USB FUNCTION PINS
USB D+ Signal. This bidirectional pin carries the positive differential
data or single-ended data. Connect this pin to a USB “B” connector.
This pin is weakly pulled high internally when the USB is disabled.
U6
T6
T7
T8
N7
N6
M3
M4
A2
A3
B3
B4
D+
D-
USB D- Signal. This bidirectional pin carries the negative differential
data or single-ended data. Connect this pin to a USB “B” connector.
This pin is weakly pulled high internally when the USB is disabled.
USB V
BUS
Supply Voltage. Connect V to a positive 5.0V
BUS
V
V
power supply. Bypass V
to ground with a 1.0µF ceramic
BUS
BUS
capacitor as close as possible to the V pin.
BUS
Output. This pin must be connected to
3.3V Regulated V
BUS
ground with a 4.7µF ceramic capacitor as close as possible to the
pin.
DDB
V
DDB
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│ 22
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MAX32600
Wellness Measurement Microcontroller
Ball/Bump Descriptions (continued)
BALL
BUMP
NAME
FUNCTION
MAX32600-P85 MAX32600-J85 MAX32600-W85
(192 BALL)
(120 BALL)
(WLP)
RESET PINS
Hardware Reset (Active Low) Input. Entire chip is reset (POR)
except for RTC circuitry.
H16
D12
E9
RSTN
Software Reset (Active Low) Input. Resets ARM core and digital
peripherals/registers that are normally cleared by a system reset.
Does not affect the RTC or POR-reset-only settings; does not reset
the ARM debug engine or JTAG debugger state. After sampling
SRSTN as a logic 0, SRSTN is driven low for 6 clock cycles.
Additionally, SRSTN is driven low for at least 6 clock cycles due to a
watchdog reset, firmware reboot, ARM reset request, ARM lockup,
or power-fail event.
U9
M9
C8
SRSTN
ANALOG SPST SWITCHES
D1
E1
D3
E3
B1
C1
A3
B3
D3
E3
E1
D1
A3
B3
A1
B1
E6
D6
E8
D8
—
SCM0
SNO0
SCM1
SNO1
SCM2
SNO2
SCM3
SNO3
Analog Switch 0 Common Terminal
Analog Switch 0 Normally Open Terminal
Analog Switch 1 Common Terminal
Analog Switch 1 Normally Open Terminal
Analog Switch 2 Common Terminal
Analog Switch 2 Normally Open Terminal
Analog Switch 3 Common Terminal
Analog Switch 3 Normally Open Terminal
—
G5
G4
TAMPER DETECTION PINS
Connect to TAMPERO through a PCB trace that is uninterrupted.
Used by trust protection unit (TPU) to prevent external tampering of
the system. If the TAMPERO signal is interrupted, TAMPERI causes
a tamper event to the device.
T11
L8
A7
H9
TAMPERI
Connect to TAMPERI through a PCB trace that is uninterrupted. Used
TAMPERO by TPU to prevent external tampering of the system. If the TAMPERO
signal is interrupted, TAMPERI causes a tamper event to the device.
C13
D11
JTAG PINS
T9
U11
G11
H12
G12
M11
M10
C10
C11
B12
B7
TCK
TDI
JTAG TCK Pin, Weak Pullup
JTAG TDI Pin, Weak Pullup
JTAG TDO Pin
U10
TDO
TMS
TSEL
V10
JTAG TMS Pin, Weak Pullup
JTAG TSEL Pin, Weak Pullup
T10
D9
POWER PINS
Digital Supply Voltage. This pin must be connected to ground
through at least a 4.7µF external ceramic chip capacitor.
L10
L4
A4
V
DD
Maxim Integrated
│ 23
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MAX32600
Wellness Measurement Microcontroller
Ball/Bump Descriptions (continued)
BALL
BUMP
NAME
FUNCTION
MAX32600-P85 MAX32600-J85 MAX32600-W85
(192 BALL)
(120 BALL)
(WLP)
Regulator Capacitor. This pin must be connected to ground through
at least a 1.0µF external ceramic-chip capacitor. The capacitor must
be placed as close to this pin as possible. No external devices other
than the capacitor should be connected to this pin. Note: On the
WLP package, the capacitor should be placed as close as possible
to bump B6.
K11, L11
L7
B6, J8
V
REG18
3V Nominal Backup Supply Input Voltage. Connect to 3V nominal
power supply. This pin must be connected to ground through a
1.0µF external ceramic chip capacitor.
V9
N5
B5
V
RTC
A14, B14, C16,
J9, J10, J16,
K9, K10, T13,
T16, U7, V7
B12, C12, H11,
M5, M7, M8,
N8, N11
H2, G3, G9,
F4–F9, E7, D7,
B2
V
Digital Ground
SS
F1, F2, F3,
G2, H2, J1, J2,
J3, K2, L2, M1,
M2, N2, P2,
R1, R2, R3,
T2, T3, T4, U2,
U4, V2, V4
H2, J2, J3, K2,
L2, M2, N2
D2–D5,
E2, E5, F2
V
V
ADC Ground
SSADC
SSDAC
A2, A4, A8, A12,
B2, B4–B12,
C2, C3, C4,
A8, B2, B4–
B11, C1–C4,
C8, D2, E2
G6, H3–H7, J7
DAC Ground
C12, D2, E2
L8
G1
A2
E1
C5
V
Reference Ground
SSREF
H10
V
Substrate Ground. Connect to V
.
SS
SSUB
Analog Supply Voltage. This pin must be connected to ground
through a 1.0µF external ceramic chip capacitor.
L9
M3
L1
H1
A4
F2
M6
B1
C2
J4
V
DDA3
ADC Analog Supply Voltage. This pin must be connected to ground
through a 10µF external ceramic chip capacitor.
V
DD
A3ADC
DAC Analog Supply Voltage. This pin must be connected to ground
through a 1.0µF external ceramic chip capacitor.
V
DD
A3DAC
C8
Analog Reference Supply Voltage. This pin must be connected to
ground through a 1.0µF external ceramic chip capacitor.
V
DD
A3REF
H8
F3
C9
I/O Supply Voltage. This pin must be connected to ground through
at least a 1.0µF external ceramic chip capacitor.
H11, J11
V
DDIO
Switchable I/O Supply Voltage 1. Connect to either the VREG18
(1.8V) or V
(3V) supply to set the I/O supply rail for ports P0
DDIO
V
DDIO_
SW1
—
A12
J9
and P1. This pin must be connected to ground through at least at
1.0μF external ceramic chip capacitor. Note: Port P6 and P7 are
always powered from V
.
DDIO
Maxim Integrated
│ 24
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MAX32600
Wellness Measurement Microcontroller
Ball/Bump Descriptions (continued)
BALL
BUMP
NAME
FUNCTION
MAX32600-P85 MAX32600-J85 MAX32600-W85
(192 BALL)
(120 BALL)
(WLP)
Switchable I/O Supply Voltage 2. Connect to either the VREG18
(1.8V) or V
(3V) supply to set the I/O supply rail for ports P2,
DDIO
V
DDIO_
SW2
—
G13
C7
P3, P4, and P5. This pin must be connected to ground through at
least a 1.0μF external ceramic chip capacitor. Note: Port P6 and P7
are always powered from V
.
DDIO
LCD PINS
LCD Bias Control Voltage. Highest LCD drive voltage used with
static bias. If using LCD functionality, this pin must be connected to
ground through at least a 1.0µF external ceramic chip capacitor.
V6
—
—
—
—
V
LCD
LCD Bias Voltage 1. LCD drive voltage used with 1/2 and 1/3 LCD
bias. An internal resistor-divider sets the voltage. External resistors and
capacitors can be used to change the LCD voltage or drive capability at
this pin. If using LCD functionality, this pin must be connected to ground
through at least a 1.0µF external ceramic chip capacitor.
V5
U5
T5
V
V
LCD1
LCD Bias Voltage 2. LCD drive voltage used with 1/3 LCD bias.
An internal resistor-divider sets the voltage. External resistors and
capacitors can be used to change LCD voltage or drive capability
at this pin. If using LCD functionality, this pin must be connected to
ground through at least a 1.0µF external ceramic chip capacitor.
—
—
—
—
LCD2
LCD Adjustment Voltage. Connect to an external resistor to provide
external control of the LCD contrast. Leave disconnected for
internal contrast adjustment. If using LCD functionality, this pin must
be connected to ground through at least a 1.0µF external ceramic
chip capacitor.
V
ADJ
GENERAL-PURPOSE I/O
C14
B15
A15
C15
B16
A16
B17
A17
J12
J11
K12
L12
L11
K11
L10
L9
B11
A11
B10
A10
B9
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
General-Purpose, Digital, I/O and Alternate Functions. These port
pins function as bidirectional I/O pins. All port pins default to high-
impedance mode with weak pullups after a reset. All alternate
functions must be enabled from software.
A9
B8
A8
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│ 25
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MAX32600
Wellness Measurement Microcontroller
Ball/Bump Descriptions (continued)
BALL
BUMP
NAME
FUNCTION
MAX32600-P85 MAX32600-J85 MAX32600-W85
(192 BALL)
B18
C17
C18
D16
D17
D18
E17
E18
E16
F16
(120 BALL)
C13
D13
E11
E12
E13
F11
F12
F13
H13
J13
K13
L13
M12
M13
N12
N13
—
(WLP)
H10
J10
F11
G11
J11
H11
H12
G12
E10
F12
E11
E12
D11
D12
D10
C12
—
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
General-Purpose, Digital, I/O and Alternate Functions. These port
pins function as bidirectional I/O pins. All port pins default to high-
impedance mode with weak pullups after a reset. All alternate
functions must be enabled from software.
F17
General-Purpose, Digital, I/O and Alternate Functions. These port
pins function as bidirectional I/O pins. All port pins default to high-
impedance mode with weak pullups after a reset. All alternate
functions must be enabled from software.
F18
G16
G17
G18
H18
H17
J18
—
—
J17
—
—
General-Purpose, Digital, I/O and Alternate Functions. These port
pins function as bidirectional I/O pins. All port pins default to high-
impedance mode with weak pullups after a reset. All alternate
functions must be enabled from software.
K18
K17
K16
L18
—
—
—
—
—
—
—
—
L17
—
—
L16
—
—
M18
M17
M16
N18
N17
N16
P18
—
—
—
—
General-Purpose, Digital, I/O and Alternate Functions. These port
pins function as bidirectional I/O pins. All port pins default to high-
impedance mode with weak pullups after a reset. All alternate
functions must be enabled from software.
—
—
—
—
—
—
—
—
—
—
Maxim Integrated
│ 26
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MAX32600
Wellness Measurement Microcontroller
Ball/Bump Descriptions (continued)
BALL
BUMP
NAME
FUNCTION
MAX32600-P85 MAX32600-J85 MAX32600-W85
(192 BALL)
P17
P16
R18
R17
R16
T18
(120 BALL)
(WLP)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
P5.0
P5.1
P5.2
P5.3
P5.4
P5.5
P5.6
P5.7
P6.0
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
P7.0
P7.1
P7.2
P7.3
P7.4
P7.5
P7.6
P7.7
General-Purpose, Digital, I/O and Alternate Functions. These port
pins function as bidirectional I/O pins. All port pins default to high-
impedance mode with weak pullups after a reset. All alternate
functions must be enabled from software.
T17
U18
V17
U17
V16
U16
V15
U15
T15
General-Purpose, Digital, I/O and Alternate Functions. These port
pins function as bidirectional I/O pins. All port pins default to high-
impedance mode with weak pullups after a reset. All alternate
functions must be enabled from software.
V14
U14
T14
V13
U13
V12
U12
T12
General-Purpose, Digital, I/O and Alternate Functions. These port
pins function as bidirectional I/O pins. All port pins default to high-
impedance mode with weak pullups after a reset. All alternate
functions must be enabled from software.
V11
A1, A12, H1,
J1, J12
—
—
—
—
N.C.
CFG
Not Connected. Leave unconnected.
C6
Must Be Tied to V .
DDIO
Maxim Integrated
│ 27
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MAX32600
Wellness Measurement Microcontroller
Functional Diagram
VDAC0
VDAC1
INA+
REFDAC
REFADC
SNO0
OpAmp/Comparator A
Low Power Comp A
REF
12-Bit DAC
DAC0
OUTA
SCM0
SW0
SCM1
SW1
VDAC2
VDAC3
M
VDAC0
SWA
to ADC
INA-
TEMP.
SENSOR
SNO1
REFDAC
REFADC
VDAC0
VDAC1
INB+
REF
12-Bit DAC
DAC1
PROG.
CURRENT
AIN0+
AIN1+
AIN2+
AIN0+
AIN1+
OpAmp/Comparator B
Low Power Comp B
OUTB
INB-
M
VDAC1
VDAC2
VDAC3
SWB
M
AIN3+
U
AIN4+
X
REFADC
AIN5+
AIN6+
AIN7+
AIN0-/AIN8+
AIN1-/AIN9+
AIN2-/AIN10+
REFADC
REFADJ
REFDAC
REF
1.24V
BANDGAP
N
PGA
16-Bit ADC
A
V
= 1,2,4,8
M
U
X
AIN3-/AIN11+
AIN4-/AIN12+
AIN5-/AIN13+
AIN6-/AIN14+
AIN7-/AIN15+
REFDAC
REFADC
VDAC0
VDAC1
INC+
REF
8-Bit DAC
DAC2
OpAmp/Comparator C
Low Power Comp C
OUTC
M
VDAC2
VDAC2
VDAC3
SWA
SWD
INC-
SNO2
SCM2
SCM3
SNO3
REFDAC
REFADC
VDAC0
VDAC1
IND+
REF
8-Bit DAC
DAC3
OpAmp/Comparator D
Low Power Comp D
SW2
SW3
M
VDAC3
OUTD
IND-
VDAC2
VDAC3
SRSTN
RSTN
VRTC
ARM
CortexTM-M3
32-Bit CORE
NVIC
GPIO
PULSE TRAIN
LED DRIVE
POWER ON
VDDIO
VDDIO_SW1
VDDIO_SW1
RESET,
BROWNOUT
MONITOR,
SUPPLY
VOLTAGE
MONITORS
P7[0:7]
P6[0:7]
P5[0:7]
P4[0:7]
P3[0:7]
P2[0:7]
P1[0:7]
P0[0:7]
VDD
32KB SRAM
2KB CACHE
256KB FLASH
EXTERNAL
INTS, WAKEUP
VDDA3
VDDA3ADC
External
Filtering
SPECIAL
FUNCTION
MUXING
VDDA3DAC
VDDA3REF
SHARED
PAD
PERIPHERAL
CORE
LDO REG
VREG18
FUNCTIONS
(PRIORITY
MUXING)
MANAGEMENT UNIT
4
×
32-bit TIMER
2
×
WATCHDOG
TIMER
3.3V USB
LDO REG
VUSB
VDDB
2
× I2C MASTER
LCD COM
LCD SEG
LED DRIVE
UART
I2C
SPI
USB 2.0 FS
USB FULL SPEED
TRANSCEIVER
CONTROLLER
D+
D−
I2C SLAVE
CRC & ID
TSEL
TCK
TDI
2 × UART
PULSE TRAIN,
SQUARE WAVE,
32-BIT TIMERS
GPIO
JTAG
TMS
TDO
3 × SPI MASTER
EXTERNAL
INTERRUPTS
SUPPORTED
ON ALL
32KIN
32KOUT
HFXIN
CLOCK
RTC &
ALARMS
GENERATOR
HFXOUT
GPIO PINS
96, 128, 160
SEGMENT
LCD
TRUST PROTECTION UNIT
AES
DYNAMIC
TAMPER
SENSOR
TAMPERI
TAMPERO
µMAA
TRNG
BIAS, MUX,
& FRAME
GENERATION
INSTANT ERASE KEY
VLCD
VLCD[2:1]
VADJ
Maxim Integrated
│ 28
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MAX32600
Wellness Measurement Microcontroller
●
32-bit byte address data pointers for a maximum
addressable 4GB memory space, shared by code
memory, data memory, ARM core peripherals and
device-specific peripherals
Detailed Description
The MAX32600 microcontroller is based on the industry-
standard ARM Cortex-M3 32-bit RISC core and includes
256KB of flash memory, 32KB of SRAM, and a 2KB 2-way
set associative cache. The device includes three SPI
●
●
●
Low-power, highly energy efficient core reduces
power consumption
2
master interfaces, two UARTs, two I C master interfaces
2
and one I C slave interface, four 32-bit timers (each of
Built-in debug functionality with JTAG port (connects
to internal debug access port)
which can be optionally split into dual 16-bit timers), a
real-time clock (RTC) with three programmable alarms,
dual independent windowed watchdog timers, and four
supply voltage monitors with multiple user-selectable,
low-voltage detection levels.
Power-saving sleep and deep sleep modes with fast
wake-up
Interrupt Sources
The devices include the ARM Nested Vector Interrupt
Controller (NVIC) providing high-speed, deterministic
response, interrupt masking, and multiple interrupt
sources. Each peripheral is connected to the NVIC and
can have multiple interrupt flags indicating the specific
source of the interrupt within the peripheral. The device
supports up to 64 distinct interrupt sources (including
internal and external interrupts), with eight priority levels.
For system security and integrity checking, a trust
protection unit (TPU) is optionally available that includes
all necessary features to secure communications and
protect internal data and firmware.
Integrated high-performance analog peripherals include
a 16-bit ADC with input buffer, programmable gain
amplifier, and a dual 8:1 differential (or 16:1 single-
ended) input mux, two 12-bit DACs, two 8-bit DACs, four
operational amplifiers with comparator mode, four low-
power comparators, an internal temperature sensor, a
high-precision internal programmable reference, and four
SPST analog switches.
Low Power Modes
The MAX32600 has multiple operating modes with many
user-configurable options offering significant flexibility
in total power consumption. These options are stored
in the data retention power domain registers and are
continuously powered across all modes of operation. The
registers dictate which analog and digital peripherals are
intended to remain enabled during low power modes.
Likewise, there are dedicated system registers that dictate
the configuration of features during run modes. The
MAX32600 supports four power modes: LP0: STOP, LP1:
STANDBY, LP2: PMU,and LP3: RUN.
AmultichannelPMU(peripheralmanagementunit)interface,
with operation during run mode and low-power sleep mode,
can be used to configure and transfer data to and from
peripherals including the ADC, DACs, communications
ports, USB, TPU, and the CRC hardware module.
ARM Cortex-M3 Core
The device is based on the ARM Cortex M3 32-bit RISC
core, which implements the ARMv7-M architectural
profile. The implementation of the Cortex M3 core used in
the device is targeted for a maximum operating frequency
of 24MHz and provides the following features:
The low power modes (LP0: STOP and LP1: STANDBY)
are under the control of the Power Sequencer, while LP2:
PMU is controlled by the PMU, and the LP3: RUN mode is
controlled by the ARM core.
●
●
●
32-bit data path with mixed 16-bit and 32-bit instruc-
tions (Thumb -2 instruction set)
The VRTC power pin (powered by battery or super cap)
ensures that this domain is always on during battery
change or other loss-of-power events on the main supply.
®
Single-cycle multiplication and hardware-based divi-
sion operations
Nested vectored interrupt controller (NVIC) with
multiple interrupt priority levels and nested interrupt
support
Thumb is a registered trademark of ARM Ltd.
Maxim Integrated
│ 29
www.maximintegrated.com
MAX32600
Wellness Measurement Microcontroller
●
●
Programmable prescaler for timer input clock
PMU
The device's peripheral management unit (PMU) is a
DMA-based linked list processing engine. The PMU can
perform operations and data transfers involving memory
and/or peripherals in the Advanced Peripheral Bus (APB)
and Advanced High-performance Bus (AHB) peripheral
memory space while the main CPU is in a sleep state.
This allows low-overhead peripheral operations (for
which intensive CPU resources are not required) to be
performed without the CPU, significantly reducing overall
power consumption. Additionally, for certain analog and
digital operations, switching the CPU off and handling
the operations using the PMU provides a lower-noise
environment that is critical for obtaining optimum analog-
to-digital converter (ADC) and digital-to-analog converter
(DAC) performance.
External I/O pin option allows selectable input or out-
put function for each timer instance using GPIO pin
●
●
Output mode can be used for PWM output genera-
tion or timer rollover output
Input mode can be used for timer input (counter
mode), clock gating or capture, limited to an input
frequency of one-fourth the peripheral clock fre-
quency
●
Timer interrupt
Real-Time Clock
A binary real-time clock (RTC) keeps the time of day in a
32-bit timer with resolution programmable from 244µs to
1 second. With a 1-second tick frequency, the RTC can
count up to 139 years before rolling over. Two time-of-
day alarms can be used to trigger an interrupt or wake
up the devices from low-power mode when the RTC timer
reaches a specified value; a separate sub-second alarm
can be set to trigger on a programmable subdivide of
the RTC tick period. For example, with a 1-second RTC
resolution, the sub-second alarm can be triggered every
second, every 500ms, every 250ms, every 125ms, and so
on down to a minimum of 244µs.
CRC Module
A CRC hardware module is included to provide fast
calculations and data integrity checks by application
software. The CRC module supports both the CRC-16-
CCITT and CRC-32 polynomials. The CRC-16 and CRC-
32 calculation engines operate independently in parallel;
each CRC engine has a programmable start seed and can
be used to calculate checksums of arbitrarily long data
sequences. Data can be loaded either directly or using the
PMU; the CRC-16-CCITT completes in two clock cycles
and the CRC-32 completes in four clock cycles for each
data input calculated.
USB Device Controller
The integrated USB controller is compliant with the USB
2.0 specification, providing full-speed operation as a USB
peripheral device. Integrating the USB physical interface
(PHY) allows direct connection to the USB cable, reducing
board space and overall system cost. An integrated
voltage regulator enables smart switching between the
Watchdog Timers
The device provides two independent watchdog timers
(WDT) with window support. The watchdog timers are
independent and have multiple clock source options to
ensure system security. The watchdog uses a 32-bit timer
with prescaler to generate the watchdog reset. When
enabled, the watchdog timers must be fed prior to timeout
or within a window of time if window mode is enabled.
Failure to feed the watchdog timer during the programmed
timing window results in a watchdog timeout.
main supply and V
controller.
when connected to a USB host
BUS
The USB controller includes a dedicated DMA engine
(separate from the PMU) that is used to transfer data to
and from the endpoint buffers located in SRAM. A total
of seven endpoint buffers are supported with configurable
selection of IN or OUT, in addition to Endpoint 0, which is
used for control purposes only.
32-Bit/16-Bit Timers
2
The device includes four 32-bit timers that are usable
for timing, capture/compare, or generation of pulse-
width modulated (PWM) signals. Each 32-bit timer can
optionally be split into a pair of 16-bit timers. The capture/
compare, input/output, and PWM options are available on
the 32-bit timers only.
I C Master/Slave Interfaces
2
2
Two I C master interfaces and one I C slave interface
are available for communication with a wide variety of
other I C-enabled peripherals. The I C bus is a 2-wire, bi-
directional bus using a ground line and two bus lines, the
serial data line (SDA) and the serial clock line (SCL). Both
the SDA and SCL lines must be driven as open-collector/
2
2
Features of the 32-bit timers include the following:
drain outputs. External resistors (R ) are required pull the
lines to a logic-high state.
P
●
32-bit counter with one-shot and continuous auto-
reload modes
Maxim Integrated
│ 30
www.maximintegrated.com
MAX32600
Wellness Measurement Microcontroller
The device supports both the master and slave protocols.
In the master mode, the interfaces have ownership of the
I C bus, drive the clock, and generate the START and
more expensive LCD module. Every character in an LCD
glass is composed of one or more segments, each of
which is activated by selecting the appropriate segment
and common signal.
2
STOP signals. This allows them to send data to a slave
or receive data from a slave as required. In slave mode,
the interfaces rely on an externally generated clock to
drive SCL and respond to data and commands only when
The LCD controller can multiplex combinations of up to
40 segment outputs (SEG0 to SEG39) and four common
signal outputs (COM0 to COM3). Unused segment outputs
can be used as standard GPIO port pins. The segments
are easily addressed by writing to dedicated display
memory. Once the LCD controller settings and display
memory have been initialized, the 21-byte display memory
is periodically scanned, and the segment and common
signals are generated automatically at the selected display
frequency, with no additional CPU intervention required.
2
requested by the I C master device.
SPI Master Interfaces
The device has three SPI master interface ports. Each
SPI controller provides an independent master-mode
serial communication channel that communicates
synchronously with peripheral SPI devices in a single or
multiple slave system. The third SPI instance is intended
for future Bluetooth module communication.
The design is further simplified and cost reduced by the
inclusion of software-adjustable internal voltage-dividers
The SPI controllers support half- or full-duplex
communications with single, dual, or quad data
transmission modes, and can be operated in master
mode only. Multiple slave select lines are available with
configurable polarity, and optional slave ready (SR) inputs
can be used for hardware flow control for SPI devices that
support this function.
to control display contrast, using either V
or an
DDIO
external voltage. If desired, contrast can also be controlled
with an external resistor network.
Features of the LCD controller include the following:
●
●
●
●
●
●
Automatic LCD segment and common-drive signal
generation
Integrated boost regulator ensures LCD operation
over entire digital operating range
UART Interfaces
The device has two serial communication interfaces.
Flexible LCD clock source selection with adjustable
frame frequency
The
universal
asynchronous
receiver-transmitter
(UART) interface ports support full-duplex asynchronous
communications. The two UARTs implemented on the
devices are identical in behavior and can be configured
independently.
Internal voltage-divider resistors eliminate require-
ment for external components
Internal adjustable resistor allows contrast adjust-
ment without external components
UART features include the following:
●
●
●
●
●
●
●
2-wire interface
Four display modes are supported by the LCD
controller:
Programmable transmit and receive interrupts
Independent baud-rate generators
Programmable even/odd/no parity modes
Programmable start/stop bit options
Character lengths of 5/6/7/8 bits supported
Optional hardware flow control (RTS/CTS)
●
●
Static (COM0)
1/2 duty multiplexed with 1/2 bias voltages
(COM[0:1])
●
●
1/3 duty multiplexed with 1/3 bias voltages
(COM[0:2])
1/4 duty multiplexed with 1/3 bias voltages
(COM[0:3])
LCD Controller
The 192-ball MAX32600 include an LCD controller with
a boost regulator that interfaces directly to common low-
voltage liquid crystal displays. By integrating the LCD
controller in hardware, the device allows designs that
require only an LCD glass rather than a considerably
The voltages available for driving the LCD are V
,
LCD
V
× 2/3, V
× 1/3, and V
. The 1/2-bias mode,
LCD
LCD
ADJ
which uses an output level of V
the LCD voltage supply pins (V
shunted together externally.
× 1/2, requires two of
and V ) to be
LCD
LCD2
LCD1
Maxim Integrated
│ 31
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MAX32600
Wellness Measurement Microcontroller
16-Bit ADC with PGA
8-Bit Voltage Output DACs
The devices include a 16-bit analog-to-digital converter
(ADC) with a 16-channel analog input multiplexer, to
allow selection of an analog input from one of 16 input
lines (single-ended mode) or one pair of eight input pairs
(differential mode). The differential mode supports fully
differential signal inputs.
The device includes two 8-bit voltage output DACs that
output single-ended voltages. The reference used by
these DACs is selectable between the DAC reference
level and the ADC reference level. Each DAC instance
includes PMU channel access to allow output values to be
loaded to the DAC directly from memory.
The front end PGA allows programmable gain settings of
x1, x2, x4, and x8 before the input sample is converted.
An anti-aliasing filter is included between the output of the
PGA and the ADC sample conversion stage.
Uncommitted Op Amps with
Comparator Mode
The device contains four uncommitted operational
amplifiers. Any unused op amp should be connected with
its positive input pin grounded and the negative input pin
and output pin shorted together. Each op amp can be
switched between amplifier and comparator mode under
software control.
The ADC reference voltage is selectable between
V
DDA3
and the dedicated ADC reference level. The ADC
reference level can be set by software to one of four
output levels—1.024V, 1.5V, 2.048V, and 2.5V—based on
the 1.24V reference bandgap.
Each op amp contains an integrated internal switch that
can be used to short the negative/inverting input pin to the
output pin of the op amp under software control, putting the
op amp in a voltage follower mode. In this configuration,
the op amp can be used as an output buffer for any of
the four DAC outputs. Any of the four DAC outputs may
optionally be internally connected to the noninverting
inputs of one or more of the four op amps, under software
control.
ADC/DAC Internal/External Reference
and Programmable Output Buffers
Two programmable reference levels (one used by the
ADC, one used by the DACs) are included, and each can
be individually set to one of four output levels. An external
reference can also be provided at the REFADJ pin; if this
feature is used, the external reference voltage is used in
place of the 1.24V bandgap output, and the programmable
output levels for the ADC and DAC references shift
accordingly.
Uncommitted SPST Analog Switches
The device contains four uncommitted SPST analog
switches that can be opened and closed under software
control. All SPST switches are open by default following
any reset or power-on reset. The SPST switches support
12-Bit Voltage Output DACs
The device includes two 12-bit voltage output DACs that
output single-ended voltages. The reference used by
these DACs is selectable between the DAC reference level
and the ADC reference level. Each DAC instance includes
PMU channel access to allow output values to be loaded
to the DAC directly from memory.
input voltages from ground to V
.
DDA3
Temperature Sensor
The device includes an internal temperature sensor that
can be read using the ADC, and additionally supports
a mode for an external temperature sensor, which is
connected to the same ADC input pair.
Maxim Integrated
│ 32
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MAX32600
Wellness Measurement Microcontroller
Additional Benefits and Features
● Industry-Standard Core and Flexible Peripherals
Enable Rapid Prototyping for Improved Time to Market
• ARM Cortex-M3 32-Bit RISC Core
Single-Cycle Multiplication
• USB Device Interface
2.0 Full-Speed Compliant
USB Integrated Transceiver with Regulator,
On-Chip Termination and Pullup Resistors
5V to 3.3V Regulation with Integrated Supply
Management to Enable USB-Compliant Switching
Dedicated USB DMA Engine Allows Automatic
Transfer of Endpoint Data to/from SRAM
• Pulse Train Engine with Eight Digital Output Channels
and 5 Analog Control Outputs
Nested Vectored Interrupt Controller
• Memory
256KB Flash Memory with 2KB Instruction Cache
32KB SRAM
• Supply Voltage
1.8V to 3.6V Digital Supply Voltage
2.3V to 3.6V Analog Supply Voltage
• Tool Chains Supported Include GNU, Eclipse, and IAR
• Low Power Wakeup (LP0/LP1)
RTC Timeout
• Clock Sources
32kHz Crystal Oscillator for Accurate RTC
External High-Frequency Crystal Oscillator
PLL Generates 48MHz USB Clock (2x/4x/6x HFX)
Internal 24MHz ±1% Relaxation Oscillator
• LCD Controller
244µs Resolution
Multiple Timer Wakeup Options
All 64 GPIO Level Sensitive
96, 128, or 160 Segments
4 x 24, 4 x 32, 4 x 40
USB Power Detection
Static, 1/2, 1/3, and 1/4 Duty Cycle
• Peripheral Management Unit (PMU)
PMU Services Peripherals While CPU is in
Sleep Mode
Boost Converter for 3.3V V
Operation
LCD
Adjustment Resistor for Contrast Control Eliminates
Requirement for External Components
Saves Power when ARM Cortex-M3 Core is
Inactive
6 PMU Channels, Each with Read/Write Access
to All AHB and APB Devices
• Digital and Communication Peripherals
4 × 32-Bit Timers, Configurable to 8 x 16-Bit
32-Bit Real-Time Clock with Subsecond Alarm
and Two Time-of-Day Alarms
Dedicated Backup Supply Pin and Trickle Charge
Four Programmable Supply Voltage Detectors
Power-On-Reset/Brownout Reset
Two Programmable Windowed Watchdog Timers
2
Three SPI Masters, Two UARTs, Two I C Masters,
2
and One I C Slave Port
Up to 64 GPIO Pins with External Interrupt and
Wake from Low-Power Mode Support
Maxim Integrated
│ 33
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MAX32600
Wellness Measurement Microcontroller
Ordering Information
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PART
TEMP RANGE
PIN-PACKAGE
192 CTBGA
192 CTBGA
120 CTBGA
120 CTBGA
108 WLP
MAX32600-P85A+
MAX32600-P85B+
MAX32600-J85A+
MAX32600-J85B+
MAX32600-W85A+
MAX32600-W85B+
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
LAND
PATTERN
NO.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
192 CTBGA
120 CTBGA
108 WLP
X19222+1C
X12077+1C
W1084A5+1
21-0712
21-0899
21-1075
—
108 WLP
—
—
+Denotes a lead(Pb)-free/RoHS-compliant package.
Selector Table
TRUST
PROTECTION
UNIT (TPU)
FLASH
(KB)
SRAM
(KB)
ADC
CHANNELS
PART
LCD
PIN-PACKAGE
MAX32600-P85A+
MAX32600-P85B+
MAX32600-J85A+
MAX32600-J85B+
MAX32600-W85A+
MAX32600-W85B+
256
256
256
256
256
256
32
32
32
32
32
32
16 × 1, 8 × 2
16 × 1, 8 × 2
12 × 1, 6 × 2
12 × 1, 6 × 2
6 × 1, 3 × 2
6 × 1, 3 × 2
No
Yes
No
160-segment 12mm × 12mm CTBGA
160-segment 12mm × 12mm CTBGA
No LCD
No LCD
No LCD
No LCD
7mm × 7mm CTBGA
7mm × 7mm CTBGA
5.4mm × 4.3mm WLP
5.4mm × 4.3mm WLP
Yes
No
Yes
Package/Feature Details
5.4mm x 4.3mm
7mm x 7mm
CTBGA
12mm x 12mm
CTBGA
FEATURE
WLP
LCD
—
—
3
160-segment
8
GPIO (8-bit ports)
3
6 single/
6 differential
12 single/
6 differential
16 single/
8 differential
ADC inputs
Internal only op amp
1
0
0
External input, external output
op amp
2
0
0
Fully external op amp control
Two-pad switches
1
3
1
4
4
0
4
4
0
Shared-pad switches
Maxim Integrated
│ 34
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MAX32600
Wellness Measurement Microcontroller
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
6/14
Initial release
—
Added WLP package and updated specifications in the Electrical Characteristics
table
1–3, 5–7, 11–13,
15–24, 29, 30
1
2
10/14
11/14
Revised Benefits and Features section
1, 30
Updated Simplified Functional Diagram, Electrical Characteristics table notes,
Ball/Bump Descriptions, Detailed Description, and USB Device Controller
sections, Package/Feature Details table, and replaced ball configurations
3
12/14
1–18, 20–34
Replaced the Simplified Functional Diagram; updated the electrical characteristics
tables; updated the SRSTN bump description; added the Low Power Modes and
PMU sections; added LP0/LP1 information to Additional Benefits and Features
section
4
5
6/15
7/15
1–17, 23, 29, 33
7
Added Note 5 to two DC Characteristics parameters (No Missing Codes and
Integral Nonlinearity)
Updated Package Thermal Characteristics, ADC/PGA Electrical Characteristics,
Internal Voltage Reference Electrical Characteristics, Ball/Bump Description,
Detailed Description, Low Power Modes, I2C Master/Slave Interfaces sections
2, 8, 14, 21,
22, 27, 29, 30
6
7
2/16
6/17
Changed PRNG to TRNG
1, 28
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2017 Maxim Integrated Products, Inc.
│ 35
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