MAX3323EEPE+ [MAXIM]
Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, BICMOS, PDIP16, 0.300 INCH, PLASTIC, MO-058AA, DIP-16;![MAX3323EEPE+](http://pdffile.icpdf.com/pdf2/p00261/img/icpdf/MAX3323EEUE-_1576265_icpdf.jpg)
型号: | MAX3323EEPE+ |
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描述: | Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, BICMOS, PDIP16, 0.300 INCH, PLASTIC, MO-058AA, DIP-16 驱动 信息通信管理 光电二极管 接口集成电路 驱动器 |
文件: | 总13页 (文件大小:329K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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19-2667; Rev 1; 1/03
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
General Description
Features
The MAX3322E/MAX3323E 3.0V to 5.5V powered
EIA/TIA-232 and V.28/V.24 communications interfaces
are designed for multidrop applications with low power
requirements, high data-rate capabilities, and
enhanced electrostatic discharge (ESD) protection. All
RS-232 inputs and outputs are protected to ±±5ꢀV
using the IEC ±000-4-2 Air-Gap Discharge method,
± 8ꢀV using the IEC ±000-4-2 Contact Discharge
method, and ±±5ꢀV using the ꢁuman ꢂodꢃ Model.
ꢀ Pin-Selectable 5k /High-Impedance Receivers
ꢀ Transmitter Outputs Three-Stated by Logic
Control
ꢀ V Pin for Compatibility with Mixed Voltage
L
Systems
ꢀ 1Tx/1Rx (MAX3323E) or 2Tx/2Rx (MAX3322E)
Versions
The MAX3322E/MAX3323E have pin-selectable
5ꢀ /high-impedance RS-232 receivers. These devices
are capable of receiving data in high-impedance mode.
In multidrop applications, one receiver has a 5ꢀ input
resistance, while the other receivers are high imped-
ance to ensure the RS-232 standard is observed. Logic
control permits selection of the functional mode: high
impedance or RS-232 standard load. The transmitters
are enabled bꢃ logic control to allow the multiplexing of
the inputs to a single UART.
ꢀ 250kbps Data Rate
ꢀ 1µA Low-Power Shutdown
ꢀ High ESD Protection for RS-232 I/O Pins
±15kVꢀHuman ꢁody Model
±±kVꢀIEC 1000-ꢂ-2 Contact Discharge
±15kVꢀIEC 1000-ꢂ-2 Air-ꢃap Discharge
Ordering Information
A proprietarꢃ low-dropout transmitter output stage
enables true RS-232 performance from a 3.0V to 5.5V
supplꢃ with a dual charge pump. The charge pump
requires onlꢃ four small 0.±µF capacitors for operation
from a 3.3V supplꢃ. The MAX3322E/MAX3323E are
capable of running at data rates up to 250ꢀbps while
maintaining RS-232-compliant output levels. The
PART
TEMP RANGE
-40 C to +85 C
-40 C to +85 C
-40 C to +85 C
PIN-PACKAGE
20 TSSOP
±6 TSSOP
±6 DIP
MAX3322EEUP
MAX3323EEUE
MAX3323EEPE
MAX3322E/MAX3323E have a unique V pin that allows
L
operation in mixed-logic voltage sꢃstems. ꢂoth input
and output logic levels are pin programmable through
the V pin.
L
-in Configurations
The MAX3322E is a 2Tx/2Rx device for hardware hand-
shaꢀing in standard RS-232 mode, and the MAX3323E
is a ±Tx/±Rx, required in most multidrop applications.
TOP VIEW
C1+
V+
1
2
3
4
5
6
7
8
9
20 V
CC
The MAX3322E is offered in a space-saving TSSOP
pacꢀage. The MAX3323E is offered in ±6-pin DIP and
space-saving TSSOP pacꢀages.
19 GND
C1-
C2+
C2-
V-
18 SHDN
17
V
L
Applications
MAX3322E
16 RENABLE
15 TXENABLE
ꢂar-Code Scanners
Video Securitꢃ
TOUT2
RIN2
14
TIN2
Industrial Data Acquisition
Data Splitters
13 ROUT2
12 TIN1
TOUT1
RIN1 10
11 ROUT1
TSSOP
Pin Configurations continued at end of data sheet.
Typical Operating Circuit and Functional Diagram appear
at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
ABSOLUTE MAXIMUM RATINGS
All Voltages Referenced to GND
Short-Circuit Duration TOUT_ to GND........................Continuous
V
, V ....................................................................-0.3V to +6V
Continuous Power Dissipation (T = +70°C)
CC
L
A
V+ (Note ±)....................................................(V
- 0.3V) to +7V
±6-Pin DIP (derate ±0.5mW/°C above +70°C)............842mW
±6-Pin TSSOP (derate 9.4mW/°C above +70°C) ........755mW
20-Pin TSSOP(derate ±±mW/°C above +70°C) ..........879mW
Operating Temperature Range
CC
V- (Note ±) ................................................................+0.3V to -7V
V+ + |V-| (Note ±).................................................................+±3V
Input Voltages
TIN_, RENAꢂLE, TXENAꢂLE, SHDN.....................-0.3V to +6V
RIN_ ..................................................................................±25V
Output Voltages
MAX3322E/MAX3323E ...................................-40°C to +85°C
Junction Temperature..................................................... +±50°C
Storage Temperature Range.............................-65°C to +±50°C
Lead Temperature (soldering, ±0s) .................................+300°C
TOUT_............................................................................±±3.2V
ROUT_........................................................-0.3V to (V + 0.3V)
L
Note 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
= 3.0V to 5.5V, V = ±.65V to 5.5V, C±–C4 = 0.±µF, tested at +3.3V ±±0ꢄ% C± = 0.047µF, C2 = C3 = C4 = 0.33µF, tested at +5V
L
CC
±±0ꢄ% T = T
to T
. Tꢃpical values are at V
= V = 3.3V and T = +25°C, unless otherwise noted.)
A
MIN
MAX
CC
L
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Supply Current Normal Operation
Supply Current in Shutdown
TRANSMITTER LOGIC INPUTS
Input Logic Threshold Low
I
SHDN = V , no load
1
1
mA
µA
CC
L
I
SHDN = 0V, no load
10
CC(SHDN)
0.4
V
V
V
1.8V
V - 0.4
L
L
Input Logic Threshold High
V > 1.8V
L
2/3 x V
L
Transmitter Input Hysteresis
Input Leakage Current
0.2
V
I
IL
0.01
1
0.4
1
µA
LOGIC INPUTS (TXENABLE, RENABLE, SHDN)
Input Logic Threshold Low
V
V
Input Logic Threshold High
Input Leakage Current
2/3 x V
L
0.01
µA
RECEIVER OUTPUTS
Output Leakage Current
I
Receivers disabled, SHDN = 0V
+0.05
+10
0.4
0.4
µA
V
OL
I
I
I
I
= 1.6mA, V > 1.8V
L
OUT
OUT
OUT
OUT
Output Voltage Low
V
OL
= 1mA, V
1.8V
L
= -1mA, V > 1.8V
V - 0.4 V - 0.1
L
L
L
Output Voltage High
V
V
OH
= -500µA, V
1.8V
V - 0.4 V - 0.1
L L
L
RECEIVER INPUTS
Input Voltage Range
V
-25
+25
V
V
RIN
V = 1.65V
0.25
0.6
0.6
L
Input Threshold Low
V = 3.3V
L
1.2
1.5
V = 5.0V
L
0.8
2
_______________________________________________________________________________________
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
DC ELECTRICAL CHARACTERISTICS (continued)
(V
= 3.0V to 5.5V, V = 1.65V to 5.5V, C1–C4 = 0.1µF, tested at +3.3V 10ꢀ% C1 = 0.047µF, C2 = C3 = C4 = 0.33µF, tested at +5V
L
CC
10ꢀ% T = T
to T
. Typical values are at V
= V = 3.3V and T = +25°C, unless otherwise noted.)
A
MIN
MAX
CC
L
A
PARAMETER
Input Threshold High
Input Hysteresis
SYMBOL
CONDITIONS
MIN
TYP
1
MAX
1.4
UNITS
V = 1.65V
L
V
V = 3.3V
L
1.5
1.8
0.35
5
2.4
V = 5.0V
L
2.4
V
k
RENABLE = 1
3
1
7
Input Resistance
R
IN
RENABLE = 0 or SHDN = 0V, R from -13V
IN
M
to +13V
TRANSMITTER OUTPUTS
All transmitter outputs loaded with 3k to
ground
Output Voltage Swing
5
5.4
V
V
= V+ = V- = 0, TOUT_ = 2V,
CC
Output Resistance
300
10M
TXENABLE = 1
Output Short-Circuit Current
Output Leakage Current
ESD PROTECTION
V
V
= 0V
60
25
mA
µA
OUT
OUT
=
12V, transmitters disabled
Human Body Model
15
15
8
RIN, TOUT
IEC 1000-4-2 Air-Gap Discharge
IEC 1000-4-2 Contact Discharge
kV
TIMING CHARACTERISTICS
(V
= 3.0V to 5.5V, V = 1.65V to 5.5V, C1–C4 = 0.1µF, tested at +3.3V 10ꢀ% C1 = 0.047µF, C2 = C3 = C4 = 0.33µF, tested at +5V
L
CC
10ꢀ% T = T
to T
. Typical values are at V
= V = 3.3V and T = +25°C, unless otherwise noted.)
A
MIN
MAX
CC
L
A
PARAMETER
Maximum Data Rate
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
R = 3k , C = 1000pF, one transmitter
L
L
250
kbps
switching
t
t
t
t
150
180
0.6
0.7
10
PHL
PLH
PHL
PLH
RIN_ to ROUT_, C = 30pF, V = 3.3V,
Figure 2
L
L
Receiver Propagation Delay
Transmitter Propagation Delay
ns
µs
TIN_ to TOUT_, R = 3k , C = 1000pF,
L
L
Figure 1
(Note 2)
(Note 2)
(Note 2)
(Note 2)
Time to Enter Three-State on Tx
Time to Exit Three-State on Tx
Time to Enable Resistor
Time to Disable Resistor
Time to Enter Shutdown
Time to Exit Shutdown
Transmitter Skew
50
50
10
10
µs
µs
µs
µs
µs
µs
ns
ns
3
0.4
0.2
50
50
100
30
Receiver Skew
R = 3k to 7k , C = 1000pF, measured
from +3V to -3V or vice versa
L
L
Transition Region Slew Rate
6
30
V/µs
Note 2: Guaranteed by design. Not production tested.
_______________________________________________________________________________________
3
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
Typical Operating Characteristics
(V
CC
= 3.3V, V = 3.3V, C1–C4 = 0.1µF, T = +25°C.)
L
A
SLEW RATE
vs. LOAD CAPACITANCE
TRANSMITTER OUTPUT VOLTAGE
vs. LOAD CAPACITANCE
18
15
12
9
7.5
5.0
2.5
0
SLEW RATE-
DATA RATE = 250kbps
LOAD = 3k IN PARALLEL WITH C
L
SLEW RATE+
6
-2.5
-5.0
-7.5
3
0
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
TRANSMITTER OUTPUT VOLTAGE
vs. DATA RATE
SUPPLY CURRENT
vs. LOAD CAPACITANCE
7.5
5.0
2.5
0
40
30
20
10
0
LOAD = 3k
ONE TRANSMITTER
SWITCHING AT DATA
RATE, OTHER
250kbps
LOAD = 3k , 1000pF
ONE TRANSMITTER
SWITCHING AT DATA
RATE, OTHER
TRANSMITTER
AT 1/8 DATA RATE
TRANSMITTER
125kbps
40kbps
AT 1/8 DATA RATE
-2.5
-5.0
-7.5
0
50
100
150
200
250
0
1000
2000
3000
4000
5000
DATA RATE (kbps)
LOAD CAPACITANCE (pF)
RECEIVER INPUT RESISTANCE
vs. INPUT VOLTAGE RANGE
RECEIVER INPUT RESISTANCE
vs. INPUT VOLTAGE RANGE
5.50
5.25
5.00
4.75
4.50
5
4
3
2
1
0
RENABLE = 0
V = 5V
RENABLE = 1
L
-25
-15
-5
5
15
25
-25
-15
-5
5
15
25
V
(V)
V
(V)
RIN
RIN
4
_______________________________________________________________________________________
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
-in Description
PIN
NAME
FUNCTION
MAX3322E
MAX3323E
1
1
2
C1+
V+
Positive Terminal of the Voltage-Doubler Charge-Pump Capacitor
+5.5V Generated by the Charge Pump
Negative Terminal of the Voltage-Doubler Charge-Pump Capacitor
Positive Terminal of the Inverting Charge-Pump Capacitor
Negative Terminal of the Inverting Charge-Pump Capacitor
-5.5V Generated by the Charge Pump
Transmitter Output
2
3
3
C1-
4
4
C2+
C2-
5
5
6
6
V-
7, 9
8, 10
11, 13
12, 14
7
TOUT_
RIN_
ROUT_
TIN_
8
Receiver Input
9
Receiver Output
10
Transmitter Input
Transmitter Enable. Drive TXENABLE high to enable transmitter. Drive TXENABLE low
to put transmitter into high impedance.
15
16
17
18
11
12
13
14
TXENABLE
Receiver Termination Enable. Drive RENABLE high for normal RS-232 5k termination.
RENABLE Drive RENABLE low to make receiver inputs high impedance. In either case, the
receiver and its output are enabled.
Logic-Level Supply. All CMOS inputs and outputs are referred to V , which is from
L
1.65V to 5.5V.
V
L
Shutdown Input. Drive SHDN low to put device into shutdown mode. Drive SHDN high
for normal operation. In shutdown, all transmitter and receiver outputs are in three-state%
receiver inputs are high impedance.
SHDN
19
20
15
16
GND
Ground
V
+3V to +5.5V Input Voltage. Bypass V
to GND with a 0.1µF capacitor.
CC
CC
= 1000pF. The transmitters are enabled or disabled
(three-stated) by the logic control TXENABLE, which
manages transmission-line sharing in multidrop applica-
tions. When TXENABLE is high, the transmitter is
enabled. When TXENABLE is low, the transmitter is put
in high-impedance state. The receivers can be used in
two conditions, selectable by the logic control RENABLE.
When RENABLE is high, the internal 5k resistor is con-
nected across receiver input and ground. When
RENABLE is low, the receiver input is high impedance,
while maintaining receiving capability.
Detailed Description
The MAX3322E/MAX3323E are RS-232 transceivers for
multidrop applications (i.e., multiple-receiver operation).
The devices are pin selectable between standard RS-232
operation with 5k input resistance receivers or high-
input-impedance receivers. Receivers of the MAX3322E/
MAX3323E remain active in both modes of operation. In
multidrop applications, a selected receiver is set at a 5k
input resistance, while the others are high-input imped-
ance, maintaining RS-232 standards. Logic control per-
mits selection of the functional mode: high impedance or
normal load. The transmitters are enabled by logic control
to allow transmission-line sharing.
In shutdown mode, all transmitter and receiver outputs
are three-stated, receiver inputs are in high impedance,
the charge pump is turned off, V+ decays to V , and
CC
V- decays to ground. ESD protection structures are
incorporated in all pins to protect against ESD events
encountered during handling and assembly. The
receiver inputs and the transmitter outputs have 15kV
ESD structure implementation.
The logic supply input (V ) controls the levels of the
L
system’s I/O and works from 1.65V to 5.5V, providing
compatibility with lower microprocessor I/O voltages.
The transmitters are inverting level translators that con-
vert CMOS logic levels into RS-232-compatible levels.
They guarantee 250kbps with loads of R = 3k and C
L
L
_______________________________________________________________________________________
5
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
+3V
+3V
INPUT
0V
50%
50%
INPUT
0V
V
V+
CC
OUTPUT
50%
GND
50%
0V
V-
OUTPUT
t
t
PLH
PHL
t
t
PHL
PLH
Figure 1. Transmitter Propagation-Delay Timing
Figure 2. Receiver Propagation-Delay Timing
ing capacitor (C1, C2) and reservoir capacitor (C3, C4)
to generate the V+ and V- supplies. Because supply
voltages can vary from +3V up to +5.5V, the selection
POWER-
MANAGEMENT
SHDN
UNIT OR
KEYBOARD
CONTROLLER
of the capacitor values depends on the V
Table 2 shows minimum capacitor values.
value.
CC
Rꢀꢁ232 Transmitters
The transmitters are inverting level translators that con-
vert CMOS-logic levels to 5.0V EIA/TIA-232 levels. The
transmitters are enabled or disabled (three-stated) by
the logic control TXENABLE, which manages transmis-
sion-line sharing in multidrop applications. When
TXENABLE is high, the transmitter is enabled. When
TXENABLE is low, the transmitter is put in a high-
impedance state (see Table 1).
I/O
CHIP
POWER SUPPLY
SHDN
V
L
V
L
MAX3322E
I/O
The MAX3322E/MAX3323Es’ transmitters guarantee a
250kbps data rate with worst-case loads of 3k in par-
allel with 1000pF, providing compatibility with PC-to-PC
communication software (such as LapLink™).
Transmitters can be paralleled to drive multiple
receivers or mice. Figure 3 shows a complete system
connection.
CHIP
WITH
UART
RS-232
CPU
Rꢀꢁ232 Receivers
MAX3322E/MAX3323E receivers convert RS-232 sig-
nals to CMOS-logic output levels. The unique feature of
the receivers is the switchable input resistance. The
receiver input resistance can be 5k or high imped-
ance. These two conditions are selectable by the logic
control RENABLE. When RENABLE is high, the 5k
resistor is connected across the receiver input and
ground. When RENABLE is low, the receiver input is
high impedance, maintaining receiving capability. This
feature permits the design of multidrop applications,
which observe RS-232 interface standards.
Figure 3. Interface Under Control of PMU
Dual Chargeꢁ-ump koltage Converter
The MAX3322E/MAX3323Es’ internal power supply con-
sists of a regulated dual charge pump that provides out-
put voltages of +5.5V (doubling charge pump) and
-5.5V (inverting charge pump), regardless of the input
voltage (V ), over a +3.0V to +5.5V range. The charge
CC
pumps operate in a discontinuous mode: if the output
voltages are less than 5.5V, the charge pumps are
enabled% if the output voltages exceed 5.5V, the charge
pumps are disabled. Each charge pump requires a fly-
LapLink is a trademark of Traveling Software.
6
_______________________________________________________________________________________
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
Table 1. Tx/Rx Logic
TXENABLE
RENABLE
SHDN
TRANSMITTER OUTPUT
RECEIVER OUTPUT
High-Z
RECEIVER INPUT
High-Z
5k
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
High-Z
Active
High-Z
Active
High-Z
High-Z
High-Z
High-Z
Enabled
High-Z
High-Z
High-Z
High-Z
5k
Enabled
High-Z
Enabled
High-Z
High-Z
High-Z
Enabled
k
Logic ꢀupply Input
L
Unlike other RS-232 interface devices, in which the
5V/div
2V/div
T2
receiver outputs swing between 0 and V , the
CC
MAX3322E/MAX3323E feature a separate logic supply
input (V ) that sets V
for the receiver outputs and
OUT
L
sets thresholds for the transmit and shutdown inputs.
This feature allows a great deal of flexibility in interfac-
ing to many types of systems with different logic levels.
Connect this input to the host logic supply (1.65V
5.5V).
V
L
±±15k EꢀD -rotection
To protect the MAX3322E/MAX3323E against ESD,
transmitters and receivers have extra protection against
static electricity to protect the device up to 15kV. The
ESD structures withstand high ESD in all states: normal
operation, shutdown, and powered down. ESD protec-
tion can be tested in various ways% the transmitter and
receiver pins are characterized for protection to the fol-
lowing limits:
T1
V
= 3.3V
CC
C1–C4 = 0.1 F
50 s/div
Figure 4. Transmitter Outputs when Exiting Shutdown
High-input impedance is guaranteed from -13.0V to
+13.0V, when the receiver is in high-input-impedance
mode. The receiver is able to withstand the RS-232
maximum input voltage of 25V.
•
•
15kV using the Human Body Model
8kV using the IEC 1000-4-2 Contact Discharge
method
ꢀhutdown Mode
Supply current falls to less than 10µA when the
MAX3322E/MAX3323E are placed in shutdown mode
(logic low). When in shutdown mode, the devices’
•
15kV using the IEC 1000-4-2 Air-Gap method
Note: ESD performance depends on many conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
charge pumps are turned off, V+ decays to V , V- is
CC
pulled to ground, the transmitter outputs and the
receiver outputs are disabled (high impedance), and
the receiver inputs are in high impedance (Table 1).
Human Body Model
Figure 5 shows the Human Body Model, and Figure 6
shows the current waveform it generates when dis-
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
est, which is then discharged into the test device
through a 1.5k resistor.
The device enters shutdown when V or V
is absent.
CC
L
The time required to exit shutdown is typically 50µs, as
shown in Figure 4. Connect SHDN to V
mode is not used.
if shutdown
CC
_______________________________________________________________________________________
7
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
R
R
C
1M
D
1.5k
I 100%
P
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
r
90%
DISCHARGE
RESISTANCE
CHARGE-CURRENT-
LIMIT RESISTOR
AMPERES
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
36.8%
C
STORAGE
CAPACITOR
s
100pF
10%
0
SOURCE
TIME
0
t
RL
t
DL
CURRENT WAVEFORM
Figure 5. Human Body ESD Test Model
Figure 6. Human Body Model Current Waveform
IEC 1000-4-2
R
R
C
D
330
The IEC 1000-4-2 standard covers ESD testing and
performance of finished equipment% it does not refer
specifically to integrated circuits. The MAX3322E/
MAX3323E help the user design equipment that meets
level 4 of IEC 1000-4-2, without the need for additional
ESD-protection components. The major difference
between tests done using the Human Body Model and
IEC 1000-4-2 is a higher peak current in IEC 1000-4-2,
because series resistance is lower in the IEC 1000-4-2
model. Hence, the ESD withstand voltage measured to
IEC 1000-4-2 is generally lower than that measured
using the Human Body Model. Figure 7 shows the IEC
1000-4-2 model. Figure 8 shows the current waveform it
generates when discharged into a low impedance. The
Air-Gap Discharge test involves approaching the
device with a charged probe. The Contact Discharge
method connects the probe to the device before the
probe is energized.
50 to 100
DISCHARGE
RESISTANCE
CHARGE-CURRENT-
LIMIT RESISTOR
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
C
s
150pF
STORAGE
CAPACITOR
SOURCE
Figure 7. IEC 1000-4-2 ESD Test Model
I
100%
Machine Model
The Machine Model for ESD tests all pins using a
200pF storage capacitor and zero discharge resis-
tance. Its objective is to emulate the stress caused by
contact that occurs with handling and assembly during
manufacturing. All pins require this protection during
manufacturing. Therefore, after PC board assembly, the
Machine Model is less relevant to I/O ports.
90%
Applications Information
The capacitor type used for C1–C4 is not critical for
proper operation% polarized or nonpolarized capacitors
can be used. The charge pump requires 0.1µF capaci-
tors for 3.3V operation. For other supply voltages, see
Table 2 for required capacitor values. Do not use val-
ues smaller than those listed in Table 2. Increasing the
capacitor values (e.g., by a factor of 2) reduces ripple
10%
t = 0.7ns TO 1ns
r
t
30ns
60ns
Figure 8. IEC 1000-4-2 ESD Generator Current Waveform
8
____________________________________________________
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
on the transmitter outputs and slightly reduces power
consumption. The values of C2, C3, and C4 can be
increased without changing C1’s value. However, do
not increase C1’s value without also increasing the val-
ues of C2, C3, and C4 to maintain the proper ratios (C1
to the other capacitors).
Multidrop Applications
The MAX3323E connects to the RS-232 serial port of
computer peripherals such as a bar-code scanner,
video security controls, industrial multimeters, etc., and
allows multiple devices to share the same communica-
tion cable connected to a PC.
When using the minimum required capacitor values,
make sure the capacitor value does not degrade
excessively with temperature. If in doubt, use capaci-
tors with a larger nominal value. The capacitor’s equiv-
alent series resistance (ESR), which usually rises at low
temperatures, influences the amount of ripple on V+
and V-.
Figure 9 shows a PC UART transmitting to a single
receiver with a 5k termination resistor while the other
receivers remain in a high-impedance state. When the
receiver inputs are high impedance, they remain active
and maintain receiving capability. This feature permits
the design of multidrop applications, which observe the
RS-232 interface standard.
Transmitters are enabled and disabled through
TXENABLE, allowing the sharing of a single bus line.
Transmitters are high impedance when disabled. The
host PC’s transmitter stays enabled at all times. Only
one peripheral transmitter remains enabled at any time.
If the host PC wants to communicate with another
peripheral, it first must tell the current peripheral to
deassert its transmitter.
Table 2. Minimum Required Capacitor
Values
V
(V)
C1 ( F)
0.1
C2, C3, C4 ( F)
CC
3.0 to 3.6
4.5 to 5.5
3.0 to 5.5
0.1
0.33
1
0.047
0.22
PC
UART
MAX3323E
MAX3323E
MAX3323E
5k
5k
5k
PERIPHERAL
CONTROL WITH UART
PERIPHERAL
CONTROL WITH UART
PERIPHERAL
CONTROL WITH UART
Figure 9. Multidrop Application
_______________________________________________________________________________________
9
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
MAX3322E fig11
+3.3V
T1IN
5V/div
0.1 F
SHDN
V
CC
2
6
1
C1+
C1-
C2+
C2-
V+
V-
C1
C3
T1OUT
5V/div
0.1 F
0.1 F
3
4
MAX3323E
C2
0.1 F
C4
0.1 F
5
R1OUT
5V/div
V
= 3.3V
CC
T_OUT
R_IN
T_IN
2 s/div
1000pF
R_OUT
Figure 11. Loopback Test Results at 125kbps
5k
MAX3322E fig12
T1IN
5V/div
GND
T1OUT
5V/div
Figure 10. Loopback Test Circuit
-owerꢁꢀupply Decoupling
In most circumstances, a 0.1µF bypass capacitor is ade-
quate. In applications sensitive to power-supply noise,
R1OUT
5V/div
V
= 3.3V
CC
decouple V
to ground with a capacitor of the same
CC
1 s/div
value as charge-pump capacitor C1. Connect bypass
capacitors as close to the IC as possible.
Figure 12. Loopback Test Results at 250kbps
High Data Rates
The MAX3322E/MAX3323E maintain the RS-232 5.0V
minimum transmitter output voltage even at high data
rates. Figure 10 shows a transmitter loopback test cir-
cuit. Figure 11 shows a loopback test result at
125kbps, and Figure 12 shows the same test at
250kbps. For Figure 11, all transmitters were driven
simultaneously at 125kbps into RS-232 loads in parallel
with 1000pF. For Figure 12, a single transmitter was dri-
ven at 250kbps, and all transmitters were loaded with
an RS-232 receiver in parallel with 1000pF.
Interconnection with 3k and 1k Logic
The MAX3322E/MAX3323E can directly interface with
various 5V logic families, including ACT and HCT
CMOS. The logic voltage power-supply pin V sets the
L
output voltage level of the receivers and the input
thresholds of the transmitters.
10 ______________________________________________________________________________________
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
Typical Operating Circuit
-in Configurations (continued)
+3.3V
TOP VIEW
C1+
1
2
3
4
5
6
7
8
16 V
CC
18
SHDN
C1+
20
V
17
V+
C1-
15 GND
V
L
CC
14 SHDN
2
6
1
V+
C1
C3
C2+
MAX3323E
13 V
L
0.1 F
0.1 F
C1-
C2+
C2-
3
4
MAX3322E
C2-
12 RENABLE
11 TXENABLE
10 TIN1
V-
C2
0.1 F
C4
0.1 F
V-
5
TOUT1
RIN1
T1OUT
12 T1IN
9
7
9
ROUT1
TTL/CMOS
INPUTS
RS-232
OUTPUTS
TSSOP/DIP
T2OUT
14 T2IN
15
16
TXENABLE
RENABLE
ENABLE
CONTROL
Functional Diagram
V
L
11 R1OUT
R1IN
10
C1+
C2+ C2-
C1-
MAX3322E
MAX3323E
TTL/CMOS
OUTPUTS
RS-232
INPUTS
5k
V+
V-
V
L
V
CHARGE PUMP
CC
13 R2OUT
R2IN
8
V
HIGH
IMPEDANCE
L
5k
ROUT
RIN
GND
19
5k
RENABLE
TIN
V
L
V+
V-
TOUT
Chip Information
TRANSISTOR COUNT: 1294
SHDN
PROCESS: BiCMOS
TXENABLE
______________________________________________________________________________________ 11
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
-ac5age Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
12 ______________________________________________________________________________________
±±15k EꢀDꢁ-rotected, Rꢀꢁ232 Transceivers for
Multidrop Applications
-ac5age Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated -roducts, ±20 ꢀan Gabriel Drive, ꢀunnyvale, CA 94086 408ꢁ737ꢁ7600 ____________________ 13
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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