MAX40080ATC+T* [MAXIM]
Precision, Fast Sample-Rate, Digital Current-Sense Amplifier;
| 型号： | MAX40080ATC+T* |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Precision, Fast Sample-Rate, Digital Current-Sense Amplifier |
| 文件： | 总37页 (文件大小：1044K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Precision, Fast Sample-Rate,
MAX40080
Digital Current-Sense Amplifier
General Description
Benefits and Features
The MAX40080 is a high-precision, fast-response, bi-di-
rectional current-sense amplifier with digital output and a
very wide input common-mode range from -0.1V (ground
sensing) to 36V.
● Programmable Sample Rate up to 1Msps
● Wide Input Common-Mode range from -0.1V (ground
sensing) to 36V
● Programmable Input Sense Range (±10mV and
±50mV)
The device features an ultra-low 5µV input offset voltage
and a very low 0.2% gain error. The low input offset volt-
age is especially important because it allows using a small
sense resistor, thus saving power dissipation, but at the
same time not compromising the measurement accuracy.
The device also features a programmable input sensing
range between ±10mV and ±50mV (or programmable in-
put gain between 125V/V and 25V/V) which is very useful
to enhance accuracy at low current.
● Very low 5µV Input Offset Voltage allows using a
small sense resistor
2
● I C compliant and SMBus compatible interface with
smart modes to save power:
• Wake-up current threshold
• Low 4 measurements/s rate
2
• Auto-shutdown when I C is inactive
● Bi-directional current sensing
● Common-Mode Voltage monitoring up to 36V
● Space-saving 12-bump WLP (0.4mm pitch) and 12-pin
TDFN
The device includes an analog-to-digital converter with a
programmable sample rate and 12-bit resolution (13-bit in-
cluding sign bit for current measurement) and features an
2
I C compliant and SMBus compatible interface.
● Peak current Log
● Programmable over-current/voltage thresholds and
under-voltage threshold
● Alert output with programmable response time
● 64-cell deep FIFO
The device features a wake-up current threshold and au-
to-shutdown mode when the I C is inactive. Both these
features are designed to minimize power consumption.
2
The device is available in a small 12-pin WLP (and also a
12-pin TDFN) and is specified over the -40°C to +125°C
extended operating temperature range.
Applications
● Server Backplanes
● Base-Station PA Control
● Telecom Equipment
● Battery Operated Devices
● Industrial Control and Automation
19-101226; Rev 0; 10/21
Ordering Information appears at end of data sheet.
© 2021 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.
One Analog Way, Wilmington, MA 01887 U.S.A. | Tel: 781.329.4700 | © 2021 Analog Devices, Inc. All rights reserved.
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Block Diagram
MAX40080
WAKE-UP
VDD
CURRENT THRESHOLD
V
ALERT_
COMP
PROGRAMMABLE
RESPONSE TIME
I
V
BATT
COMP
UP TO 36V
PROGRAMMABLE
RESPONSE TIME
V
S
SDA
I
RS+
RS-
SCL
A0
DIGITAL
FILTER
ADC
MUX
FIFO
R
SENSE
CSA
V
PEAK CURRENT LOG
AUTO-SHUTDOWN WHEN INACTIVE
LOAD
GND
FLT+
FLT-
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Analog Devices | 2
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
TABLE OF CONTENTS
General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Benefits and Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
WLP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
TDFN* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
WLP-12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
TDFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2
I C-Compliant and SMBus-Compatible Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2
I C Slave Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2
I C Communication Speed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Engaging HS-Mode for Operation up to 3.4MHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Alert Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Internal Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Operation Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2
I C Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Alert Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
PEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Input Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Stay HS Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
ADC Sample Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Digital Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Wake-Up Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Conversion Ready . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Overflow Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Overflow or Underflow Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2
I C Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
FIFO Alarm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
FIFO Overflow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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Analog Devices | 3
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
TABLE OF CONTENTS (CONTINUED)
FIFO Data Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Thresholds and Wake-Up Current registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
MAX_Peak_Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
FIFO Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Store IV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Overflow_Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Flush. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Read Current and Voltage from the FIFO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
INT_EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Filter Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
FIFO Reading Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
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Analog Devices | 4
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
LIST OF FIGURES
2
Figure 1. I C/SMBus Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 2. 2-Byte Write (Write Word) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 3. 2-Byte Write with PEC Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 4. 2-Byte Read (Read Word) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 5. 2-Byte Read with PEC Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 6. One-Byte Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 7. One-Byte Read with PEC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 8. Read 32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 9. Read 32 with PEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 10. Engaging HS Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 11. Quick Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
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Analog Devices | 5
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
LIST OF TABLES
2
Table 1. I C Slave Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 2. Register Functions and POR States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 3. Operation Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 4. Sample Rate Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 5. Digital Filter Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 6. Output Data Rate vs. Sample Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 7. Thresholds and Wake-Up Current registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 8. Filter Cap Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2
Table 9. FIFO Reading Data Rate vs. I C Interface Speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 10. Read 2 Bytes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 11. Read 4 Bytes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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Analog Devices | 6
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Absolute Maximum Ratings
DD
V
to GND.............................................................. -0.3V to +2V
Continuous Power Dissipation (Multilayer Board) (T = +70°C,
A
RS+ to RS- ............................................................................. ±2V
derate 13.73mW/°C above +70°C.) ...........................1098.60mW
Operating Temperature Range...........................-40°C to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range ..............................-40°C to +150°C
Soldering Temperature (reflow) ........................................+260°C
V , RS+, RS- to GND............................................. -0.3V to +40V
S
All other pins to GND ................................... -0.3V to V
+ 0.3V
DD
Continuous current into any input pin.................................. 10mA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
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Analog Devices | 7
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Package Information
WLP
Package Code
N121D1+1S
Outline Number
21-100492
Land Pattern Number
Thermal Resistance, Four-Layer Board:
Refer to Application Note 1891
Junction-to-Ambient (θ
)
72.82°C/W
17.90°C/W
JA
Junction-to-Case Thermal Resistance (θ
)
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different
suffix character, but the drawing pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a
four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/
thermal-tutorial.
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Analog Devices | 8
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
TDFN*
Package Code
TD1233+1C
21-0664
Outline Number
Land Pattern Number
Thermal Resistance, Single-Layer Board:
90-0397
Junction-to-Ambient (θ
)
63 ºC/W
8.5 ºC/W
JA
Junction-to-Case Thermal Resistance (θ
)
JC
Thermal Resistance, Four-Layer Board:
Junction-to-Ambient (θ
)
JA
41 ºC/W
8.5 ºC/W
Junction-to-Case Thermal Resistance (θ
)
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different
suffix character, but the drawing pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a
four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/
thermal-tutorial.
www.analog.com
Analog Devices | 9
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
www.analog.com
Analog Devices | 10
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Electrical Characteristics
(V
= 1.8V, V
= V
= +12V, V
= (V
- V ) = 0V, V = +12V, T = +25°C, minimum and maximum limits are from T
RS- S A A
DD
RS+
RS-
SENSE
RS+
= -40°C to +125°C, unless otherwise noted. (Note 1))
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CURRENT MEASUREMENT
Input Common Mode
Range
V
-0.1
36
V
CM
(RS+ - RS-), Option #1 programmable
with I C
±50
±10
125
25
2
Input Voltage Sense
CSA Gain
V
mV
SENSE
(RS+ - RS-), Option #2 programmable
2
with I C
V
= ±10mV, Option #1
SENSE
2
programmable with I C
G
V/V
µV
V
= ±10mV, Option #1
SENSE
2
programmable with I C
T
= +25°C
5
5
20
45
25
55
Input Offset Voltage
(CSA only)
A
V
V
OS
-40°C ≤ T ≤ +125°C
A
T
A
= +25°C
5
μV
µV
Input Offset Voltage
(CSA + ADC)
OS
-40°C ≤ T ≤ +125°C
5
A
Input Offset Drift
TCV
50
1
nV/°C
nA
OS
Input Bias Current
I
B
-40°C ≤ T ≤ +125°C
20
A
T
= +25°C
0.2
0.2
0.05
0.05
0.55
0.75
0.5
A
Gain Error (CSA only)
GE
GE
%
%
-40°C ≤ T ≤ +125°C
A
T
A
= +25°C
Gain Error (CSA + ADC)
-40°C ≤ T ≤ +125°C
1.05
A
Common Mode
Rejection Ratio (CSA
only)
CMRR
CMRR
123
119
140
140
dB
dB
Common Mode
Rejection Ratio (CSA +
ADC)
Power Supply Rejection
Ratio (CSA only)
PSRR
PSRR
76
76
110
110
47
dB
dB
Power Supply Rejection
Ratio (CSA + ADC)
Input Voltage-Noise
Density
V
V
= (V
) = 50mV
-
SENSE
RS+
V
f = 1kHz
nV/√Hz
N
RS-
V
= (V
= (V
- V
- V
) = ±50mV
) = ±10mV
50
10
SENSE
SENSE
RS+
RS+
RS-
RS-
Small Signal Bandwidth
BW
kHz
V
Wake-up and Over-
Current Thresholds
Resolution
V
= ±50mV
0.78
mV
ms
SENSE
Wake-up Response
Time
Sampling Rate = 15ksps
32.7
Unfiltered (D4 = 0)
31
294
88
Over-Current Response
Time
Filtered (D4 = 1), Sample Rate = 15ksps
Filtered (D4 = 1), Sample Rate = 60ksps
Filtered (D4 = 1), Sample Rate = 1Msps
μs
35
www.analog.com
Analog Devices | 11
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Electrical Characteristics (continued)
(V
= 1.8V, V
= V
= +12V, V
= (V
- V
) = 0V, V = +12V, T = +25°C, minimum and maximum limits are from T
DD
RS+
RS-
SENSE
RS+
RS- S A A
= -40°C to +125°C, unless otherwise noted. (Note 1))
PARAMETER SYMBOL
INPUT VOLTAGE MEASUREMENT
CONDITIONS
MIN
TYP
MAX
UNITS
Input Voltage Range
Voltage Buffer Gain
V
0
36
V
S
G
1/30
1.5
V/V
Input Offset Voltage
(Voltage Buffer only)
V
V
Referred to V , V = 1.2V
21
35
mV
mV
%
OS
S
S
Input Offset Voltage
(Voltage Buffer + ADC)
Referred to V , V = 1.2V
1.5
0.05
0.2
1
OS
S
S
Gain Error (Voltage
Buffer only)
GE
GE
BW
0.4
1.2
Gain Error (Voltage
Buffer + ADC)
%
Input Voltage Signal
Bandwidth
kHz
Over/Under-Voltage
Thresholds Resolution
Referred to V
0.586
6.5
V
S
Input Impedance
Z
IN
MΩ
Unfiltered (D4 = 0)
31
294
88
Over/Under-Voltage
Response Time
Filtered (D4 = 1), Sample Rate = 15ksps
Filtered (D4 = 1), Sample Rate = 60ksps
Filtered (D4 = 1), Sample Rate = 1Msps
μs
35
ADC CHARACTERISTICS
Sample Frequency
Resolution
2
f
S
Programmable through I C
15
1,000
Ksps
bits
(Note 2)
12
Internal Reference
Voltage
V
REF
1.25
V
From current to voltage measurement or
vice-versa
Switching Time
t
S
1
ms
2
I C TIMING (UP TO 1MHz) (Note 3)
Serial Clock Frequency
f
1
MHz
µs
SCL
Bus Free Time Between
Start and Stop
t
0.5
BUF
Conditions
START Condition Hold
Time
t
0.26
0.26
µs
µs
HD:STA
STOP Condition Setup
Time
t
90% of SCL to 10% of SDA
90% of SCL to 90% of SDA
SU:STO
Clock Low Period
Clock High Period
t
0.5
µs
µs
LOW
t
0.26
HIGH
START Condition Setup
Time
t
0.26
µs
SU:STA
Data Setup Time
Data In Hold Time
t
10% of SDA to 10% of SCL
10% of SCL to 10% of SDA
50
0
ns
µs
SU:DAT
t
HD:DAT
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Analog Devices | 12
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Electrical Characteristics (continued)
(V
= 1.8V, V
= V
= +12V, V
= (V
- V
) = 0V, V = +12V, T = +25°C, minimum and maximum limits are from T
DD
RS+
RS-
SENSE
RS+
RS- S A A
= -40°C to +125°C, unless otherwise noted. (Note 1))
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Minimum Receive SCL/
SDA Rise Time
20 +
t
t
(Note 3)
ns
R
0.1C
B
Maximum Receive SCL/
SDA Rise Time
(Note 3)
(Note 3)
(Note 3)
120
ns
ns
R
Minimum Receive SCL/
SDA Fall Time
20 +
t
F
0.1C
B
Maximum Receive SCL/
SDA Fall Time
t
t
120
ns
ns
F
F
Transmit SDA Fall Time
Bus capacitance = 550pF.
120
Maximum Pulse Width
of Spikes That Must Be
Suppressed by the Input
Filter
50
ns
Capacitive Load for
Each Bus Line
C
550
pF
B
2
I C TIMING (HS MODE UP TO 3.4MHz) (Note 3)
Serial Clock Frequency
f
3.4
MHz
ns
SCL
START Condition Hold
Time
t
160
160
HD:STA
START Condition Setup
Time
t
90% of SCL to 90% of SDA
ns
SU:STA
Clock Low Period
Clock High Period
Data Setup Time
Data In Hold Time
t
160
60
ns
ns
ns
ns
LOW
t
HIGH
t
10% of SDA to 10% of SCL
10% of SCL to 10% of SDA
10
SU:DAT
t
35
HD:DAT
Minimum Receive SCL/
SDA Rise Time
20 +
t
t
(Note 3)
ns
ns
ns
ns
ns
pF
R
0.1C
B
Maximum Receive SCL/
SDA Rise Time
(Note 3)
120
R
Minimum Receive SCL/
SDA Fall Time
20 +
t
t
(Note 3)
F
F
0.1C
B
Maximum Receive SCL/
SDA Fall Time
(Note 3)
120
STOP Condition Setup
Time
t
90% of SCL to 10% of SDA
160
SU:STO
Capacitive Load for
Each Bus Line
C
100
10
B
Maximum Pulse Width
of Spikes That Must Be
Suppressed by the Input
Filter
ns
V
LOGIC (SDA, SCL, A0, ALERT_) DC CHARACTERISTICS
0.7 x
V
+
DD
0.3
Input High Voltage
V
IH
V
DD
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Analog Devices | 13
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Electrical Characteristics (continued)
(V
= 1.8V, V
= V
= +12V, V
= (V
- V
) = 0V, V = +12V, T = +25°C, minimum and maximum limits are from T
DD
RS+
RS-
SENSE
RS+
RS- S A A
= -40°C to +125°C, unless otherwise noted. (Note 1))
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
0.3 x
Input Low Voltage
V
IL
-0.3
V
V
DD
Input High Leakage
Current
I
Logic Input to DV
Logic Input to 0V
-1
-1
±0.005
+1
+1
µA
µA
IH
DD
Input Low Leakage
Current
I
±0.005
5
IL
Input Capacitance
Output Low Voltage
C
pF
V
IN
V
I
= 3mA
0
0.3
1
OL
OL
Output High Leakage
Current
V
OUT
= V
±0.005
µA
DD
POWER SUPPLY
Supply Voltage Range
V
DD
Guaranteed by PSRR
1.71
1.98
V
2
Active Power Supply
Current
Active mode, I C
inactive
-40°C ≤ T
+125°C
≤
≤
A
A
I
2700
52
3500
µA
ACTIVE
2
I C inactive, ADC
is shutdown,
current-sense
takes one
Low-Power Mode
Supply Current
-40°C ≤ T
+125°C
I
85
µA
LP
measurement
every 50ms
2
I C inactive, 4
-40°C ≤ T
+125°C
≤
≤
A
A
41
18
14
65
38
27
conversions/s
2
I C inactive, 1
-40°C ≤ T
+125°C (Note 3)
conversions/s
Average Supply Current
in Selected Active Mode
2
I
µA
µA
AVE
I C inactive, 0.25
-40ºC ≤ T
≤
A
conversions/s
+125ºC (Note 3)
2
I C inactive,
-40°C ≤ T
+125°C (Note 3)
≤
A
0.0625
conversions/s
13
23
15
In Standby and
between
conversions, I C
-40°C ≤ T
+125°C
≤
A
Standby Supply Current
I
2.7
SDBY
2
bus inactive
In Low-Power Mode, analog current-
sense wakes up every 50ms. Measured
current is below programmed value in
"Wakeup Current" register
300
Turn-On Time
t
µs
EN
From Low-Power Mode to Active Mode.
From Standby to either Active Mode or
Selected Active Mode or Single
Measurement Mode
500
100
Power-On Time
t
V
= 0V to1.8V
ms
ON
DD
Note 1: All devices are 100% production tested at T = +25ºC. Specifications over temperature limits are guaranteed by design and
A
characterization.
Note 2: 12 bit data + 1bit sign bit for current measurement.
Note 3: Guaranteed by design.
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Analog Devices | 14
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Typical Operating Characteristics
(V
= 1.8V, V
= V
= +12V, V
= (V
- V ) = 0V, V = +12V, T = +25°C, minimum and maximum limits are from T
RS- S A A
DD
RS+
RS-
SENSE
RS+
= -40°C to +125°C, unless otherwise noted. )
µ
µ
µ
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Analog Devices | 15
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Typical Operating Characteristics (continued)
(V
= 1.8V, V
= V
= +12V, V
= (V
- V
) = 0V, V = +12V, T = +25°C, minimum and maximum limits are from T
DD
RS+
RS-
SENSE
RS+
RS- S A
A
= -40°C to +125°C, unless otherwise noted. )
www.analog.com
Analog Devices | 16
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Typical Operating Characteristics (continued)
(V
= 1.8V, V
= V
= +12V, V
= (V
- V
) = 0V, V = +12V, T = +25°C, minimum and maximum limits are from T
DD
RS+
RS-
SENSE
RS+
RS- S A
A
= -40°C to +125°C, unless otherwise noted. )
www.analog.com
Analog Devices | 17
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Typical Operating Characteristics (continued)
(V
= 1.8V, V
= V
= +12V, V
= (V
- V
) = 0V, V = +12V, T = +25°C, minimum and maximum limits are from T
DD
RS+
RS-
SENSE
RS+
RS- S A
A
= -40°C to +125°C, unless otherwise noted. )
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Analog Devices | 18
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Pin Configurations
WLP-12
TOP VIEW
MAX40080
1
2
3
4
+
RS+
RS-
A0
V
S
A
B
C
FLT+
FLT-
NC
GND
SDA
ALERT_
SCL
V
DD
12-WLP
TDFN
TOP VIEW
1
12
11
10
9
FLT+
V
S
2
3
4
5
6
RS+
RS-
A0
FLT-
ALERT_
MAX40080
V
DD
8
7
NC
SCL
GND
SDA
TDFN-EP
(3mm x 3mm)
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Analog Devices | 19
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Pin Description
PIN
NAME
FUNCTION
WLP-12
A1
TDFN
1
2
V
Input Voltage Sense
S
A2
RS+
RS-
Positive Current-Sensing Input
Negative Current-Sensing Input
A3
3
A4
4
A0
Address Input. Connect to the external resistor
B1
12
11
5
FLT+
FLT-
NC
Connect a capacitor between FLT+ and FLT- to limit the input signal bandwidth.
B2
Connect a capacitor between FLT+ and FLT- to limit the input signal bandwidth
B3
Do Not Connect
Ground
B4
6
GND
ALERT_
2
C1
10
9
I C Interrupt/Alert Output (active low)
C2
V
Analog Positive Supply Voltage
DD
2
C3
8
SCL
SDA
I C Clock
2
C4
7
I C Data
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Analog Devices | 20
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Detailed Description
2
The MAX40080 measures current and common-mode voltage and converts the data into digital form. It is an I C-
compatible two-wire serial interface that allows access to conversion results. Standard I C commands allow reading
2
the data and configuring other operating characteristics. While reading the current/voltage registers, any changes in
measured current and voltage are ignored until the read is completed. The current/voltage register is updated for the new
measurement upon completion of the read operation.
2
I C-Compliant and SMBus-Compatible Bus Interface
2
A standard I C-compliant 2-wire serial interface reads current/voltage data from the current and voltage registers. It
also reads and writes control bits to/from the configuration registers. In addition, the interface supports useful SMBus
functions, including selectable Packet Error Checking (PEC). SMBus timeout is not supported which makes this SMBus
interface, compatible but not fully compliant.
SDA
t
BUF
t
t
SP
HD:STA
t
F
t
LOW
SCL
t
HIGH
t
R
t
SU:STO
t
SU:STA
t
HD:STA
t
HD:DAT
t
SU:DAT
REPEATED
START
STOP
START
2
Figure 1. I C/SMBus Timing Diagram
Normal transactions consist of 2-byte writes and reads. However, some registers are single-byte read and one register
is 4-byte read. An additional byte will be appended when PEC is enabled. Attempting longer transactions is not
recommended. A transaction always begins with a START (S) condition followed by the slave address and the Write/
Read bit.
A 2-byte write transaction (Write Word) begins with the master generating a START condition and then transmitting the
MAX40080's slave address followed by the Write bit. The device acknowledges with an ACK (A) bit, and the master
transmits the target register, followed by another ACK from the MAX40080. The master then writes the two data bytes,
and the MAX40080 ACKs each. The master ends the transaction by generating a STOP (P) condition. Writing more bytes
(not recommended) will simply overwrite the register (e.g., DATA LOW - DATA HIGH - DATA LOW - DATA HIGH for a
4-byte write).
DIRECTION
BITS
M
S
M
S
M
S
S
M
M
S
S
M
M
S
S
M
M
S
S
M
M
S
1
7
1
1
8
1
8
1
8
1
1
CONTENT
S
SLAVE ADDRESS
WR
A
REGISTER SELECT
A
DATA BYTE [7:0]
A
DATA BYTE [15:8]
A
P
Figure 2. 2-Byte Write (Write Word)
When Packet Error Checking (PEC) is enabled, the write transaction is similar, except that the PEC byte (calculated
using SLAVE ADDRESS, REGISTER ADDRESS, DATA LOW, and DATA HIGH) is appended by the master after the
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Analog Devices | 21
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
ACK bit that follows the second data byte. Any attempted write that is not a multiple of three bytes will be ignored. If
more than one set of three bytes is written, the PEC byte is calculated using the bytes listed above, plus the first PEC
byte and the second DATA LOW and DATA HIGH bytes. Again, writing more than three bytes with PEC enabled is not
recommended.
DIRECTION
BITS
M
S
M
S
M
S
S
M
M
S
S
M
M
S
S
M
M
S
S
M
M
S
S
M
M
S
1
7
1
1
8
1
8
1
8
1
8
1
1
CONTENT
S
SLAVE ADDRESS
WR
A
REGISTER SELECT
A
DATA BYTE [7:0]
A
DATA BYTE [15:8]
A
PEC BYTE
A
P
Figure 3. 2-Byte Write with PEC Byte
A 2-byte read (Read Word) is slightly more complex than a write. After transmitting the register byte and receiving an
ACK from the device, the master generates a REPEAT START (Sr) and writes the address and a Read bit. The device
then ACKs the address/read a byte and transmits the two data bytes. The master ACKs the first and NACKs the second,
signaling that the transaction is complete, and then generates the STOP condition.
DIRECTION
BITS
M
S
M
S
M
S
S
M
S
M
S
S
M
1
7
1
1
8
1
CONTENT
S
SLAVE ADDRESS
WR
A
REGISTER SELECT
A
M
S
M
S
M
S
M
S
M
M
S
S
M
M
S
M
S
1
7
1
1
8
1
8
1
1
Sr
SLAVE ADDRESS
Rd
A
DATA BYTE [7:0]
A
DATA BYTE [15:8]
N
P
Figure 4. 2-Byte Read (Read Word)
When Packet Error Checking (PEC) is enabled, the read transaction is similar, except that the PEC byte is appended by
the device after the ACK bit that follows the second data byte.
DIRECTION
BITS
M
S
M
S
M
S
S
M
S
M
S
S
M
1
7
1
1
8
1
CONTENT
S
SLAVE ADDRESS
WR
A
REGISTER SELECT
A
M
S
M
S
M
S
M
S
M
M
S
S
M
M
S
S
M
M
S
M
S
1
7
1
1
8
1
8
1
8
1
1
Sr
SLAVE ADDRESS
Rd
A
DATA BYTE [7:0]
A
DATA BYTE [15:8]
A
PEC BYTE
N
P
Figure 5. 2-Byte Read with PEC Byte
A one-byte read without and with PEC is similar to the Read Word above, but only one byte is read, as shown in Figure
6 and Figure 7.
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Analog Devices | 22
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
DIRECTION
BITS
M
S
M
S
M
S
S
M
S
M
S
S
M
1
7
1
1
8
1
CONTENT
S
SLAVE ADDRESS
WR
A
REGISTER SELECT
A
M
S
M
S
M
S
M
S
M
M
S
M
S
1
7
1
1
8
1
1
Sr
SLAVE ADDRESS
Rd
A
DATA BYTE
N
P
Figure 6. One-Byte Read
DIRECTION
BITS
M
S
M
S
M
S
S
M
S
M
S
S
M
1
7
1
1
8
REGISTER SELECT
1
CONTENT
S
SLAVE ADDRESS
WR
A
A
M
S
M
S
M
S
M
S
M
M
S
S
M
M
S
M
S
1
7
1
1
8
1
8
1
1
Sr
SLAVE ADDRESS
Rd
A
DATA BYTE
A
PEC BYTE
N
P
Figure 7. One-Byte Read with PEC
Read 32 Protocol: The Read 32 protocol is used with commands that require reading up to 32 bits (4 bytes) of data from
a slave device. For MAX40080 this only applies to register Current_Voltage_Measurement.
This protocol can be used to read less than 32 bits, but the packet must be padded to fill 32 bits. Data or meaningful
bits are packed into the lower order bits and unused higher-order bits are filled with zeros. For example, a 20-bit value is
transmitted in bits [19:0] with the most significant bit in bit [19]. Bits [31:20] are all zeros.
DIRECTION
BITS
M
S
M
S
M
S
S
M
S
M
S
S
M
1
7
1
1
8
1
CONTENT
S
SLAVE ADDRESS
WR
A
REGISTER SELECT
A
M
S
M
S
M
S
M
S
M
M
M
S
S
S
M
M
S
1
7
1
1
8
1
8
1
Sr
SLAVE ADDRESS
Rd
A
DATA BYTE [7:0]
A
DATA BYTE [15:8]
A
S
M
M
S
S
M
M
S
8
1
8
1
1
DATA BYTE [23:16]
A
DATA BYTE [31:24]
N
P
Figure 8. Read 32
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Analog Devices | 23
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
DIRECTION
BITS
M
S
M
S
M
S
S
M
S
M
S
S
M
1
7
1
1
8
1
CONTENT
S
SLAVE ADDRESS
WR
A
REGISTER SELECT
A
M
S
M
S
M
S
M
S
M
M
S
S
M
M
M
S
1
7
1
1
8
1
8
1
Sr
SLAVE ADDRESS
Rd
A
DATA BYTE [7:0]
A
DATA BYTE [15:8]
A
S
M
M
S
S
M
M
S
S
M
M
S
S
8
1
8
1
8
1
1
DATA BYTE [23:16]
A
DATA BYTE [31:24]
A
PEC BYTE
N
P
Figure 9. Read 32 with PEC
2
I C Slave Address
2
The MAX40080 has a unique I C slave address selection method based on a single resistor connected to the A0 input
pin. Such a resistor-based method has many benefits, including lower cost and smaller size, as well as allowing the users
to stock just one part in their inventory system and use it in multiple projects with different I C addresses just by changing
2
2
a single standard 1% resistor. Select the resistor value by choosing the desired I C address. See Table 1.
32 different resistor values that correspond to 32 addresses, which are encoded by the 5 least significant bits. The two
most significant bits of the address word (A , A ) are fixed, two options A6 = 0, A5 = 1 or A6 = 1, A5 = 0 are available to
6
5
be chosen at factory final test via OTP. Default value is A = 0, A = 1. Note that the part will monitor the resistor value at
6
5
2
A0 pin continuously, if the resistor value changes after the part are powered up, the I C slave address will be changed.
2
Table 1. I C Slave Addresses
RESISTOR VALUE [Ω], 1%
115,000
100,000
86,600
SLAVE ADDRESS
A , A , 0_0000
6
5
A , A , 0_0001
6
5
A , A , 0_0010
6
5
75,000
A , A , 0_0011
6 5
64,900
A , A , 0_0100
6 5
56,200
A , A , 0_0101
6 5
48,700
A , A , 0_0110
6 5
42,200
A , A , 0_0111
6 5
36,500
A , A , 0_1000
6 5
30,900
A , A , 0_1001
6 5
26,100
A , A , 0_1010
6 5
21,500
A , A , 0_1011
6 5
16,900
A , A , 0_1100
6 5
12,400
A , A , 0_1101
6 5
8,060
A , A , 0_1110
6 5
3,740
A , A , 0_1111
6 5
2,870
A , A , 1_0000
6 5
2,490
A , A , 1_0001
6 5
2,150
A , A , 1_0010
6 5
1,870
A , A , 1_0011
6 5
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Analog Devices | 24
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
2
Table 1. I C Slave Addresses (continued)
1,620
1,400
1,210
1,050
909
A , A , 1_0100
6 5
A , A , 1_0101
6
5
A , A , 1_0110
6
5
A , A , 1_0111
6
5
A , A , 1_1000
6
5
768
A , A , 1_1001
6 5
649
A , A , 1_1010
6 5
536
A , A , 1_1011
6 5
422
A , A , 1_1100
6 5
309
A , A , 1_1101
6 5
200
A , A , 1_1110
6 5
95.3
A , A , 1_1111
6 5
2
I C Communication Speed
The MAX40080 provides a revision 3.0 I C-compatible (3.4MHz) serial interface. Revision 3.0 I C-compatible serial
communications channel:
2
2
● 0Hz to 100kHz (standard mode)
● 0Hz to 400kHz (fast mode)
● 0Hz to 1MHz (fast mode plus)
● 0Hz to 3.4MHz (high-speed mode or HS mode)
2
● Does not utilize I C clock stretching
Operating in standard mode, fast mode and fast mode plus do not require any special protocols. The main consideration
when changing the bus speed through this range is the combination of the bus capacitance and pullup resistors. Higher
time constants created by the bus capacitance and pullup resistance (C x R) slow the bus operation. Therefore, when
increasing bus speeds the pullup resistance must be decreased to maintain a reasonable time constant. Refer to the
2
Pullup Resistor Sizing section of the I C revision 3.0 specification for detailed guidance on the pullup resistor selection.
In general, for bus capacitance of 200pF, a 100kHz bus needs 5.6kΩ pullup resistors, a 400kHz bus needs about 1.5kΩ
pullup resistors, and a 1MHz bus needs 680Ω pullup resistors. Note that the pullup resistor dissipates power when the
2
open drain bus is low. The lower the value of the pullup resistor, the higher the power dissipation is (V /R).
2
Operating high-speed mode requires some considerations. For the full list of considerations, refer to the I C 3.0
specification. The major considerations with respect to MAX40080 are:
2
2
● The I C bus master uses current source pull-ups to shorten the signal rise time.
● The I C slave must use a different set of input filters on its SDA and SCL lines to accommodate for the higher bus
speed.
● The communication protocols need to utilize the high speed master code.
At power-up and after each STOP condition, the MAX40080 input filters are set to standard mode, fast mode, or fast
mode plus (i.e., 0Hz to 1MHz), unless bit 7 in the Configuration Register is set high. In that case, once entering the HS-
mode, the device will stay into such a mode until this bit remains set, thus ignoring the STOP condition.
Once the bit is reset, at the next STOP condition the MAX40080 will exit from HS mode.
Engaging HS-Mode for Operation up to 3.4MHz
Figure 10 shows the protocol for engaging HS mode operation. HS-mode operation allows for a bus operating speed up
to 3.4MHz. The engaging HS-mode protocol is as follows:
1. Begin the protocol, while operating at a bus speed of 1MHz or lower.
2. The master sends a START command (S).
3. The master sends the 8-bit master code of 00001xxxb where xxxb are don’t care bits.
4. The addressed slave issues a NOT ACKNOWLEDGE (NA).
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Analog Devices | 25
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
5. The master may now increase its bus speed up to 3.4MHz and issue any read/write operation.
6. The master may continue to issue high-speed read/write operations until a STOP (P) is issued. Issuing a STOP (P)
ensures that the bus input filters are set for 1MHz or slower operation. After a STOP has been issued, steps 1 to 6 in
the above algorithm may be skipped.
DIRECTION
BITS
M
S
M
S
S
M
M
S
M
S
M
S
M
S
M
S
M
S
M
S
1
8
1
1
1
1
1
CONTENT
S
MASTER CODE NACK
FAST MODE
Sr
ANY READ/WRITE FOLLOWED BY SR
Sr
ANY READ/WRITE FOLLOWED BY SR Sr
HS MODE
ANY READ/WRITE
P
FAST MODE
Figure 10. Engaging HS Mode
2
Note that the I C HS Mode is only available when the device operates in Active Mode. See the Configuration Register
section for more details about Active Mode and the other modes of operation.
Modes of Operation
The device operates in one of the following five modes that can be programmed through the "Configuration" register:
2
1. Standby Mode: The device is not active, except for the I C interface which can receive commands.
2. Low-Power Mode: The ADC is disabled, but the current sense is partially active, taking one current measurement
every 50ms. The measured current is below the threshold set in the "Wake_Up_Current" register. Once the
measured current reaches the threshold the device will enter into "Active Mode". No voltage measurement is taken
as long as the device stays in low-power mode. For this reason, it is recommended that only current is stored into the
FIFO (See the FIFO configuration register to determine what to store into the FIFO). But once the device wakes up
from low-power mode to active mode, it will take either current or voltage measurement according to the Store V_I
setting in the FIFO configuration register.
3. Single-Measurement Mode: The device is basically in Standby mode, but when it responds to the SM BUS "Quick
Command", it wakes up and takes one current and voltage measurement, then it enters into Standby again until the
next "Quick Command".
4. Active Mode: The device is active in all its functionality and measurement is continuously taken.
5. Selected Active Mode: The device automatically takes several measurements per second (according to the sample
rate setting) and stays on standby in between each measurement.
2
When operating in either "Active Mode" or "Selected Active Mode" if the I C bus is inactive for as long as 1 minute the
device will automatically go in the Standby Mode.
Quick Command:
In the Quick Command, the R/W# bit of the slave address denotes the command. The R/W# bit is used only when in
Single-Measurement Mode to make the measurement. There are no data sent or received.
DIRECTION
BITS
M
S
M
S
M
S
S
M
M
S
1
7
1
1
1
CONTENT
S
SLAVE ADDRESS
R/W#
A
P
Figure 11. Quick Command
Alert Management
The MAX40080 features an open-drain ALERT_ output that reports when any of the following situations occur:
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Analog Devices | 26
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
● Overcurrent
● Overvoltage
● Under voltage
● FIFO overflow warning (programmable threshold)
● FIFO full (64 data on it)
● Conversion ready (single-measurement mode only)
● Wake-up current threshold reached
2
● One minute timeout on the I C bus (when inactive) expired
Any of the conditions above are also reported in the Status Register.
The ALERT_ output is latched and is de-asserted only after the relevant flag has been cleared in the Status Register.
Such a flag is cleared by writing into the Status Register. See the Status Register description for more details.
The ALERT_ interrupt output (also called SMBALERT#) is a wired-AND signal that is used in conjunction with the SMBus
Alert Response Address (ARA).
A slave-only device can signal the host through SMBALERT# that it wants to talk. The host processes the interrupt and
simultaneously accesses all SMBALERT# devices through the Alert Response Address. Only the device(s) which pulled
SMBALERT# low will acknowledge the Alert Response Address. The host performs a modified Receive Byte operation.
The 7-bit device address provided by the slave transmits device is placed in the 7 most significant bits of the byte. The
eighth bit can be a zero or one.
If more than one device pulls SMBALERT# low, the highest priority (lowest address) device will win communication rights
via standard arbitration during the slave address transfer.
After receiving an acknowledge (ACK) from the master in response to its address, that device must stop pulling down on
the SMBALERT# signal. If the host still sees SMBALERT# low when the message transfer is complete, it knows to read
the ARA again.
Internal Registers
2
The pointer register selects between the registers as shown in Table 2. The pointer register must be written for each I C
transaction.
Register addresses are not auto-incremented during reads and write. The max peak current register resets upon reading.
Write to the configuration register by writing the slave address byte, the pointer register byte to value 00h, and the data
bytes. All other registers require the slave address byte, pointer register byte (04h or 05h, etc.), and 2 data bytes. If
only 1 data byte is written, it is saved in bits D[15:8] of the respective register. If more than 2 data bytes are written, the
additional data writes to the same register.
Perform a read operation by issuing the slave address byte (write), pointer byte, repeat START, another slave address
byte (read), and then reading the data byte. If more than 2 data bytes are read, the additional reads are from the same
register. See Figure 4.
Table 2. Register Functions and POR States
REGISTER NAME
R/W
R/W
R
ADDRESS(HEX)
NUMBER OF BITS POR STATE(HEX)
I2C READ TYPE
Read Word
Read Word
Read Byte
Configuration
00h
02h
04h
05h
06h
07h
08h
0Ah
0Ch
0Eh
16
14
7
0060h
0000h
30h
Status
Threshold_Over_Current
Threshold_Over_Voltage
Threshold_Under_Voltage
Wake_Up_Current
R/W
R/W
R/W
R/W
R
6
30h
Read Byte
6
00h
Read Byte
7
08h
Read Byte
Max_Peak_Current
FIFO_Configuration
Current_Measurement
Voltage_Measurement
14
16
16
16
0000h
3400h
Read Word
Read Word
Read Word
Read Word
R/W
R
0000h
0000h
R
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Analog Devices | 27
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Table 2. Register Functions and POR States (continued)
Current_Voltage Measurement
R
10h
32
0000 0000h
FFh
Read 32
INT_EN
R/W
14h
8
Read Byte
Configuration Register
The configuration register contains 16 bits of data:
D15
D14 D13 D12
Digital Filter
D11 D10 D9 D8
D7
D6
D5
D4
D3
D2 D1 D0
Modes
Reserved
ADC Sample Rate Stay HS Mode Input Range PEC Alert I2C Timeout
Operation Modes
Set bits D2, D1 and D0 to select one of the following device operation modes:
Table 3. Operation Mode
OPERATION MODE
D2
0
D1
0
D0
0
COMMENT
Default mode at device power up
Standby Mode
0
0
1
Low-Power Mode
Single-Conversion Mode
Active Mode
0
1
0
0
1
1
Continuous measurement
Fixed sample rate at 4sps
Fixed sample rate at 1sps
Fixed sample rate at 0.25sps
Fixed sample rate at 0.0625sps
1
0
0
1
0
1
1
1
0
Selected Active Mode
1
1
1
If a mode of operation is changed when a conversion is taking place, the conversion completes and then change occurs.
2
While in standby, the I C interface remains active and all registers remain accessible to the master.
2
When operating in either "Active Mode" or "Selected Active Mode" if the I C bus is inactive for as long as 1 minute the
device will automatically go into Standby Mode.
2
I C Timeout
Write 1 to D3 to disable I C timeout.
2
2
Write 0 to D3 to enable I C timeout (default condition at reset and power-up). When operating in either "Active Mode"
2
or "Selected Active Mode" if the I C bus is inactive for as long as 1 minute the device will automatically go into Standby
Mode. When such a condition happens the ALERT_ is pulled low and a bit is set in the Status Register.
Alert Response Time
Bit D4 selects the alert interrupt response time:
- D4 = 0: Unfiltered. The alert is issued as soon as it is detected.
- D4 = 1: The alert is issued after being detected in four consecutive ADC clock samples (delay time varies from 4µs to
266.4µs depending on the ADC sample frequency).
PEC
Write 1 to enable Packet Error Checking (Default).
Write 0 to disable Packet Error Checking.
Set PEC bit to enable Packet Error Checking (PEC). When enabled, a PEC byte is appended to the end of each message
transfer. This is a CRC-8 byte that is calculated on all the message bytes (including the address/read/write byte). The
last device to transmit a data byte, also transmits the PEC byte, so the master transmits the PEC byte after a Write
transaction and the device transmits the PEC byte after a Read transaction.
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Analog Devices | 28
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Input Range
Write 0 to D6 to select a range of 50mV (default).
Write 1 to D6 to select a range of 10mV.
Stay HS Mode
Set D7 to 1 to make the device stay in HS mode. Set D7 to 0 to exit from the HS mode (default). When this bit is set to 1,
2
if device I C speed is set to HS mode (up to 3.4MHz) the device will stay in HS mode, thus ignoring the STOP condition.
Once the bit is reset to 0, at the next STOP condition the device will exit from HS mode.
ADC Sample Rate
Table 4 shows all the available ADC sampling rates, please note column "Data read from FIFO" is only valid for active
mode. In single measurement and selected active mode, data read from FIFO can be "Both Current and Voltage" at
any sample rate.
Table 4. Sample Rate Selection
D9
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D8
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
SAMPLE RATE (ksps)
DATA READ FROM FIFO
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Either Current or Voltage
Both Current and Voltage
D11
D10
0
0
15
23.45
30
0
0
0
0
0
1
37.5
47.1
60
0
1
0
1
0
1
93.5
120
1
0
1
0
150
1
0
234.5
375
1
0
1
1
468.5
750
1
1
1
1
1,000
0.5
1
1
2
The I C interface reads data at a maximum speed of 3.4MHz. Therefore, not all the ADC sample rates can be
continuously pulled out from the device without overflowing the FIFO.
The main purpose of the high ADC sample rate is for over-sampling with digital filtering. It is the responsibility of the user
2
to ensure that the I C can read data without overflowing the FIFO.
See the Application Section "FIFO Reading Data Rate" for details.
See also FIFO Configuration register to determine whether the MAX40080 should store either current or voltage or both
current and voltage. When MAX40080 is in active mode and FIFO is configured to store both current and voltage, only
the slowest sample rate of 0.5ksps can be used. Note that when the part is in a single measurement and selected active
state, both current and voltage can be read at any sample rate.
Digital Filter
This option calculates the average among samples. See Table 5. Such an average is applied to the following modes of
operation:
● Active mode
● Selected active mode
● Single Measurement mode
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Analog Devices | 29
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
In each of these modes there is also the option of not using any filter.
Table 5. Digital Filter Selection
D14
D13
D12
FUNCTION
0
0
0
No Average
0
0
1
Average among 8 samples
Average among 16 samples
Average among 32 samples
Average among 64 samples
Average among 128 samples
0
1
0
0
1
1
1
0
0
1
0
1
Table 6 shows the output rate depending on the selected sample frequency and filter option.
Table 6. Output Data Rate vs. Sample Rate
Sample Rate
[ksps]
15
Output Data Rate [ksps]
No Filter
15
x8
x16
x32
x64
x128
1.875
2.34375
2.93125
3.75
0.9375
1.171875
1.465625
1.875
0.46875
0.5859375
0.7328125
0.9375
0.234375
0.29296875
0.36640625
0.46875
0.1171875
0.146484375
0.183203125
0.234375
18.75
23.45
30
19
23
30
37.5
38
4.6875
5.8875
7.5
2.34375
2.94375
3.75
1.171875
1.471875
1.875
0.5859375
0.7359375
0.9375
0.29296875
0.36796875
0.46875
47.1
47
60
60
93.5
94
11.6875
15
5.84375
7.5
2.921875
3.75
1.4609375
1.875
0.73046875
0.9375
120
120
150
235
375
469
750
1000
150
18.75
29.3125
46.875
58.5625
93.75
125
9.375
4.6875
2.34375
1.171875
234.5
375
14.65625
23.4375
29.28125
46.875
62.5
7.328125
11.71875
14.640625
23.4375
31.25
3.6640625
5.859375
7.3203125
11.71875
15.625
1.83203125
2.9296875
3.66015625
5.859375
468.5
750
1000
7.8125
Status Register
The status register contains 6 flags plus 6 bits of FIFO data count:
D13-8
D7
D6
FIFO
Alarm
D5
D4
D3
D2
D1
D0
2
FIFO Data
Count
FIFO
Overflow
I C
Timeout
Conversion
Ready
Wake-
Up
Underflow_V Overflow_V Overflow_I
In order to clear each of the flags in bits D7–D0, a write to this register with the same word that was read is required.
When doing this flag clearing, what is written in the upper byte is meaningless and will not affect this register.
For instance, suppose that the over the current flag is set because an overcurrent condition occurred. Suppose the FIFO
has 4 data on it.
A read to this register will yield the data 0x0404.
To clear the overcurrent flag, a write to this register with the data 0xXXX4 must happen where the X in the upper byte
indicates that any value is allowed.
Wake-Up Current
D0 is a read-only status bit indicating that the measured current has exceeded the value programmed in the register
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Analog Devices | 30
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
"Wake_up_Current ". This only applies when the device is set in Low-Power Mode. An interrupt is also generated.
Conversion Ready
D1 is a read-only status bit indicating that the ADC conversion is completed. This bit is only used in Single-Measurement
Mode and in such a mode an interrupt is also generated.
Overflow Current
D2 is a read-only bit that indicates that the measured current has exceeded the value programmed in the register
"Threshold Over-Current ". Such a condition also generates an interrupt. This bit is used in single conversion mode,
selective active mode, and active mode, this bit not applies when FIFO store voltage only. In active mode when FIFO
stores both current and voltage, the bit only applies when the ADC sampling rate is 0.5Ksps.
Overflow or Underflow Voltage
D3 is a read-only bit that indicates that the measured voltage has exceeded the value programmed in the register
"Threshold Over-Voltage". Such a condition also generates an interrupt.
D4 is a read-only bit that indicates that the measured voltage has gone below the value programmed in the register
"Threshold Under-Voltage". Such a condition also generates an interrupt.
Both D3 and D4 can be used in single conversion mode, selective active mode, and active mode. These two bits do
not apply when FIFO only store current measurement. In active mode, when FIFO stores both current and voltage
measurement, these two bits only apply when the ADC sampling rate is 0.5Ksps.
2
I C Timeout
2
D5 is a read-only bit that indicates that when operating in either "Active Mode" or "Selected Active Mode" if the I C
bus is inactive for one minute the device will automatically go into Standby Mode. Such a condition also generates an
interrupt.
FIFO Alarm
D6 is a read-only status bit indicating that the ADC FIFO is about to overflow. When such a condition happens an interrupt
is also generated.
FIFO is 64 deep, the overflow warning is issued when N locations have been written and none has been read yet. The
number N is determined by the field Overflow_Threshold in the FIFO Configuration register.
FIFO Overflow
When set to 1 it indicates that the FIFO is full with 64 data on it. An interrupt is also issued. In any other situations where
the number of data is less or equal to 63 this bit will be 0.
FIFO Data Count
6-bit counter that indicates the number of data that are currently inside the FIFO. Range is from 0 to 63.
If the FIFO is full, meaning there are 64 data on it, then this counter will be 0, but the Overflow bit will be set to 1
Thresholds and Wake-Up Current registers
Table 7 shows the data format for the threshold_over_current, threshold over/under_voltage and wake-up current
registers
Table 7. Thresholds and Wake-Up Current registers
REGISTER BIT
REGISTER NAME
Threshold_Over_Current
Threshold_Over_Voltage
BITS 5-0
ADDRESS
6
Over-current threshold. When the measured current is higher than this value an
alert is issued on ALERT_ and one status register bit is set
0x04
sign
Over-voltage threshold. When the measured voltage is higher than this value an
alert is issued on ALERT_ and one status register bit is set
0x05
n/a
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Analog Devices | 31
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Table 7. Thresholds and Wake-Up Current registers (continued)
Under-voltage threshold. When the measured voltage is lower than this value an
alert is issued on ALERT_ and one status register bit is set
Threshold_Under_Voltage
0x06
n/a
Wake-up current threshold when in Low-Power Mode. When the measured current
Wake_up_Current
0x07
sign is higher than this value the device will switch on to Active Mode. Additionally, an
alert is issued on ALERT_ and one status register bit is set
MAX_Peak_Current
Display the maximum current value FIFO stored.
FIFO Configuration
BIT
D15
Flush
0
D14
RO
0
D13-8
Overflow_Warning
110100
D7-2
D1-0
Store_IV
00
BIT NAME
DEFAULT
Not_Used
000000
Store IV
These two bits determine whether the device measures and stores into the FIFO either current or voltage or both current
and voltage.
● 2'b00: Current Only
● 2'b01: Voltage Only
● 2'b10: Current and Voltage
● 2'b11: Not Used
The FIFO is 64 deep and 32 bits wide. Regardless of the selection made with these two bits, current and voltage
information always occupies the data format as shown in the following table.
D31–D16
D15–D0
Voltage
Current
In Current Only mode (2'b00) the ADC only measures current and the voltage bits (D31–D16) are always empty and
meaningless.
In Voltage Only mode (2'b01) the ADC only measures voltage and the current bits (D15–D0) are always empty and
meaningless.
In Current and Voltage mode (10) the ADC continuously alternates between 10 current measurements and one voltage
measurement. All the bits (D31–D0) are written. The voltage bits are repeated for 10 contiguous current bits. In this
mode, the actual sample rate for either current or voltage is less than what is specified in the Configuration Register,
ADC Sample Rate.
Current and Voltage data are retrieved from the FIFO through the registers Current_Measurement (0x0C), Voltage
Measurement (0x0E), and Current_Voltage Measurement (0x10). It is the user's responsibility to keep track of the mode
of operation. For instance, if these bits are set to Current Only (2'b00) only the register Current_Measurement (0x0C) will
provide meaningful data.
All data are two's complement.
Overflow_Threshold
This is a 6-bit programmable threshold that allows the user to set at what data count in the FIFO the overflow warning
interrupt should be issued.
The range is from 0x00 to 0x3F.
The default value is 0x34 (80% of FIFO is filled)
RO
RO (Roll-Over):
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Analog Devices | 32
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
It defines the rollover behavior when the FIFO is full. If RO is set to low, then a new data sample does not write to the
FIFO and is lost when the FIFO is full. If RO is set to high, then the FIFO rolls over to the first location, and a new data
sample writes to the FIFO, overwriting the old data sample.
Flush
When set to 1 it resets the entire data content in the FIFO.
Read Current and Voltage from the FIFO
Current and Voltage data are retrieved from the FIFO through the following registers.
The FIFO Configuration Register (bits Store V_I) specifies whether the user wants to read either Current Only or Voltage
Only or Current and Voltage. The read pointer is incremented after each reading.
All data are two's complement.
Registers that allow reading from the FIFO:
FIFO Configuration Register: bits Store IV:
● 2'b00: Current Only (2 bytes - Read Only)
REGISTER NAME
REGISTER ADDRESS
D15
D14–D13
D12
D11–D0
Current_Measurement
0x0C
Data Valid
Current Sign Extension
Current Sign
Current Magnitude
● 2'b01: Voltage Only (2 bytes - Read Only)
REGISTER NAME
REGISTER ADDRESS
0x0E
D15
D14–D13
D12
D11–D0
Voltage_Measurement
Data Valid
Voltage Sign Extension
Voltage Sign
Voltage Magnitude
● 2'b10: Current and Voltage (4 bytes - Read Only)
REGISTER
REGISTER NAME
D31
D30–D28
D27–D16
D15
Reserved
D14–D12
D11–D0
ADDRESS
Data
Valid
Voltage Sign
(repeated 3x)
Voltage
Magnitude
Current Sign
(repeated 3x)
Current
Magnitude
Current_Voltage_Measurement
● 11: Not Used
0x10
Data Valid = 0: FIFO is empty and the data is meaningless.
Data Valid = 1: FIFO is not empty and the data is valid.
Voltage Sign is expected to be always 0 since the voltage measurement is always positive.
INT_EN
This register is a mask for the status register, meaning that each bit enables/disables the interrupt generation from the
status register. Bits are in the same order as they are reported in the status register.
1 = Interrupt generation is enabled (default)
0 = Interrupt generation is disabled
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Overflow
Mask
Enable
Alarm
Mask
Enable
Overflow_I
Mask
Enable
Conversion
Ready Mask
Enable
Wake-up
Mask
Enable
2
BIT
NAME
I C Timeout Underflow_V Overflow_V
Mask Enable Mask Enable Mask Enable
DEFAULT
1
1
1
1
1
1
1
1
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Analog Devices | 33
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Applications Information
Filter Selection
The MAX40080 offers two programmable input ranges (±10mV or ±50mV) with different bandwidth specifications (10kHz
or 50kHz). Additional capacitor can be added at filter pins (FLT±), which will limit the input bandwidth of the ADC. At
±50mV range, input bandwidth of different values of filter cap and typical settling time. See Table 8. Typically, a 4.7nF
cap is recommended across filter pins (FLT±).
Table 8. Filter Cap Selection
FILTER CAP
-3dB FREQUENCY
TYPICAL SETTLING TIME FOR A 1.25V STEP TO 0.5 LSB (12 bit)
4.7nF
45.6 kHz
25µs
100nF
2.3 kHz
450µs
FIFO Reading Data Rate
2
The I C interface reads data at a maximum speed of 3.4MHz. Therefore, not all the ADC sample rates can be
continuously pulled out from the device without overflowing the FIFO.
Table 9 explains this situation. The main purpose of the high ADC sample rate is for over-sampling with digital filtering. It
2
is the responsibility of the user to ensure that the I C can read data without overflowing the FIFO.
2
Table 9. FIFO Reading Data Rate vs. I C Interface Speed
2
2
FIFO_READ
[BITS]
I C_READ
[BITS]
SAMPLE FREQUENCY
[Ksps]
I C INTERFACE SPEED
READ MODE
[MHz]
27
66
Current and Voltage
0.5
0.033
Either Current or
Voltage
14
48
48
48
48
48
48
48
48
48
48
48
48
48
15
0.72
0.9
Either Current or
Voltage
14
14
14
14
14
14
14
14
14
14
14
14
18.75
23.45
30
Either Current or
Voltage
1.1256
1.44
Either Current or
Voltage
Either Current or
Voltage
37.5
47.1
60
1.8
Either Current or
Voltage
2.2608
2.88
Either Current or
Voltage
Either Current or
Voltage
93.5
120
4.488
5.76
Either Current or
Voltage
Either Current or
Voltage
150
7.2
Either Current or
Voltage
234.5
375
11.256
18
Either Current or
Voltage
Either Current or
Voltage
468.5
22.488
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Analog Devices | 34
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
2
Table 9. FIFO Reading Data Rate vs. I C Interface Speed (continued)
Either Current or
14
48
750
36
48
Voltage
Either Current or
Voltage
14
48
1000
Reading both current and voltage requires 4 bytes, while reading either of the two requires only 2 bytes. Table 10 and
Table 11 show the number of transactions and bits involved in both types of reads.
Table 10. Read 2 Bytes
TRANSACTION
READ 2 BYTES
1
START
2
SLAVE_ADDRESS + WR
3
ACK
4
REG_ADDRESS
5
ACK
6
RPT_START
7
SLAVE_ADDRESS + RD
8
ACK
9
DATA (1st Byte)
ACK
10
11
DATA (2nd Byte)
NACK
12
13
STOP
Total Bits
48
Table 11. Read 4 Bytes
TRANSACTION
READ 4 BYTES
1
START
2
SLAVE_ADDRESS + WR
3
ACK
4
REG_ADDRESS
ACK
5
6
RPT_START
SLAVE_ADDRESS + RD
ACK
7
8
9
DATA (1st Byte)
ACK
10
11
DATA (2nd Byte)
ACK
12
13
DATA (3rd Byte)
ACK
14
15
DATA (4th Byte)
NACK
16
17
STOP
Total Bits
66
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Analog Devices | 35
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Ordering Information
PART NUMBER
TEMP RANGE
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
PIN-PACKAGE
12 WLP
TOP MARK
+AAS
MAX40080ANC+
MAX40080ANC+T
12 WLP
+AAS
MAX40080ATC+T*
12 TDFN
+AIO
+ Denotes a lead(Pb)-free/RoHS-compliant package.
T Denotes tape-and-reel.
* Denotes future product.
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Analog Devices | 36
MAX40080
Precision, Fast Sample-Rate,
Digital Current-Sense Amplifier
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
10/21
Release for Market Intro
—
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is
assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may
result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks andregistered trademarks are the property of
their respective owners.
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Analog Devices | 37
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