MAX4105 [MAXIM]
740MHz, Low-Noise, Low-Distortion Op Amps in SOT23-5; 740MHz ,低噪声,低失真运算放大器SOT23-5型号: | MAX4105 |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | 740MHz, Low-Noise, Low-Distortion Op Amps in SOT23-5 |
文件: | 总12页 (文件大小:133K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
19-4757; Rev 3; 10/98
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
1/MAX4305
Ge n e ra l De s c rip t io n
Fe a t u re s
The MAX4104/MAX4105/MAX4304/MAX4305 op amps
feature ultra-high speed, low noise, and low distortion in
a SOT23 p a c ka g e . The unity-g a in-s ta b le MAX4104
requires only 20mA of supply current while delivering
625MHz b a nd wid th a nd 400V/µs s le w ra te . The
MAX4304, compensated for gains of +2V/V or greater,
delivers a 730MHz bandwidth and a 1000V/µs slew
rate. The MAX4105 is compensated for a minimum gain
of +5V/V a nd d e live rs a 410MHz b a nd wid th a nd a
1400V/sec slew rate. The MAX4305 has +10V/V mini-
mum gain compensation and delivers a 340MHz band-
width and a 1400V/µs slew rate.
♦ Low 2.1nV/√Hz Voltage Noise Density
♦ Ultra-High 740MHz -3dB Bandwidth (MAX4304,
= 2V/V)
A
VCL
♦ 100MHz 0.1dB Gain Flatness (MAX4104/4105)
♦ 1400V/µs Slew Rate (MAX4105/4305)
♦ -88dBc SFDR (5MHz, R = 100Ω) (MAX4104/4304)
L
♦ High Output Current Drive: ±70mA
♦ Low Differential Gain/Phase Error: 0.01%/0.01°
(MAX4104/4304)
Low voltage noise density of 2.1nV/√Hz and -88dBc
spurious-free dynamic range make these devices ideal
for low-noise/low-distortion video and telecommunica-
tions applications. These op amps also feature a wide
output voltage swing of ±3.7V and ±70mA output current-
drive capability. For space-critical applications, they
are available in a miniature 5-pin SOT23 package.
♦ Low ±1mV Input Offset Voltage
♦ Available in Space-Saving 5-Pin SOT23 Package
S e le c t o r Gu id e
MINIMUM
STABLE
GAIN (V/V)
BANDWIDTH
PART
PIN-PACKAGE
(MHz)
________________________Ap p lic a t io n s
MAX4104
MAX4304
MAX4105
MAX4305
1
2
625
740
410
340
5-pin SOT23, 8-pin SO
5-pin SOT23, 8-pin SO
5-pin SOT23, 8-pin SO
5-pin SOT23, 8-pin SO
Video ADC Preamp
Pulse/RF Telecom Applications
Video Buffers and Cable Drivers
Ultrasound
5
10
Ord e rin g In fo rm a t io n
Active Filters
PIN-
SOT
ADC Input Buffers
PART
TEMP. RANGE
PACKAGE TOP MARK
MAX4104ESA
-40°C to +85°C 8 SO
—
MAX4104EUK-T -40°C to +85°C 5 SOT23-5
ACCO
Typ ic a l Ap p lic a t io n Circ u it
Ordering Information continued at end of data sheet.
P in Co n fig u ra t io n s
INPUT
TOP VIEW
8 to 16-BIT
HIGH-SPEED
MAX4304
ADC
OUT
1
2
3
5
V
CC
MAX4104
MAX4105
MAX4304
MAX4305
V
EE
330Ω
IN+
4
IN-
330Ω
SOT23-5
Pin Configurations continued at end of data sheet.
ADC BUFFER WITH GAIN (A = 2V/V)
VCL
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (V to V )................................................+12V
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
CC
EE
Voltage on Any Pin to Ground..........(V - 0.3V) to (V + 0.3V)
EE
CC
Short-Circuit Duration (V
to GND)........................Continuous
OUT
Continuous Power Dissipation (T = +70°C)
A
5-pin SOT23 (derate 7.1mW/°C above +70°C)...........571mW
8-pin SO (derate 5.9mW/°C above +70°C).................471mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V = +5V, V = -5V, V = 0, R = 100kΩ, T = T
to T , unless otherwise noted. Typical values are at T = +25°C.)
MAX A
CC
EE
CM
L
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Operating Supply Voltage
Range
V
/V
Guaranteed by PSRR test
±3.5
±5
±5.5
V
CC EE
MAX4_0_ESA
MAX4_0_EUK
1
1
6
8
Input Offset Voltage
V
OS
V
OUT
= 0
mV
Input Offset-Voltage Drift
Input Bias Current
TCV
2.5
32
0.5
6
µV/°C
µA
OS
I
B
70
Input Offset Current
I
OS
5.0
µA
Differential Input Resistance
R
-0.8V ≤ V ≤ 0.8V
kΩ
IN
IN
Common-Mode Input
Resistance
R
Either input
1.5
MΩ
IN
Input Common-Mode Voltage
Range
V
Guaranteed by CMRR test
-2.8
80
+4.1
V
CM
Common-Mode Rejection Ratio
CMRR
-2.8V ≤ V
≤ 4.1V
95
85
dB
dB
CM
Positive Power-Supply Rejection
Ratio
PSSR+
PSRR-
V
CC
= 3.5V to 5.5V
75
Negative Power-Supply
Rejection Ratio
V
= -3.5V to -5.5V
55
65
dB
EE
Quiescent Supply Current
Open-Loop Gain
I
V
= 0
20
65
27
mA
dB
S
OUT
1/MAX4305
A
-2.8V ≤ V
≤ 2.8V, R = 100Ω
55
VOL
OUT L
R
R
R
R
= 100kΩ
= 100Ω
= 30Ω
±3.5 -3.7 to +3.8
±3.0 -3.5 to +3.4
L
L
L
L
Output Voltage Swing
V
V
OUT
Output Current Drive
I
±53
±70
80
9
mA
mA
Ω
OUT
Short-Circuit Output Current
Open-Loop Output Impedance
I
= short to ground
SC
Z
OUT
2
_______________________________________________________________________________________
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
1/MAX4305
AC ELECTRICAL CHARACTERISTICS
(V = +5V, V = -5V, V = 0, R = 100Ω; A = +1V/V for MAX4104, +2V/V for MAX4304, +5V/V for MAX4105, +10V/V for MAX4305;
CC
EE
CM
L
V
T
A
= +25°C; unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
625
740
410
340
100
60
MAX
UNITS
MAX4104
MAX4304
MAX4105
MAX4305
MAX4104
MAX4304
MAX4105
MAX4305
MAX4104
MAX4304
MAX4105
MAX4305
MAX4104
MAX4304
MAX4105
MAX4305
to 0.1%
-3dB Bandwidth
BW
V
= 100mVp-p
MHz
(-3dB)
OUT
0.1dB Bandwidth
Full-Power Bandwidth
BW
V
OUT
= 100mVp-p
= 2Vp-p
MHz
MHz
(0.1)
80
70
115
285
370
320
400
1000
1400
1400
20
FPBW
SR
V
OUT
Slew Rate
V
OUT
= 2Vp-p
= 2Vp-p
V/µs
ns
Settling Time to 0.1%
t
S
V
OUT
to 0.01%
25
f
= 5MHz
= 20MHz
= 5MHz
= 20MHz
-88
C
MAX4104/
MAX4304
f
C
-67
Spurious-Free
Dynamic Range
SFDR
V
OUT
= 2Vp-p
dBc
f
C
-74
MAX4105/
MAX4305
f
C
-61
MAX4104/MAX4304
MAX4105/MAX4305
MAX4104/MAX4304
MAX4105/MAX4305
0.01
0.02
0.01
0.02
2.1
Differential Gain Error
Differential Phase Error
DG
DP
NTSC, R = 150Ω
%
L
NTSC, R = 150Ω
degrees
L
Input Voltage Noise Density
Input Current Noise Density
Output Impedance
e
n
f = 1MHz
f = 1MHz
f = 10MHz
nV/√Hz
pA/√Hz
Ω
i
n
3.1
Z
OUT
1
_______________________________________________________________________________________
3
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(V = +5V, V = -5V, R = 330Ω, R = 100Ω, T = +25°C, unless otherwise noted.)
CC
EE
F
L
A
MAX4104
MAX4304
MAX4105
SMALL-SIGNAL GAIN
vs. FREQUENCY (A = +1)
SMALL-SIGNAL GAIN
vs. FREQUENCY (A = +2)
VCL
SMALL-SIGNAL GAIN
vs. FREQUENCY (A = +5)
VCL
VCL
5
4
3
5
5
4
3
V
OUT
= 100mVp-p
V
OUT
= 100mVp-p
V
OUT
= 100mVp-p
4
3
2
1
0
2
1
0
2
1
0
-1
-2
-1
-2
-1
-2
-3
-4
-3
-4
-3
-4
-5
-5
-5
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
1G
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
MAX4305
MAX4104
GAIN FLATNESS
MAX4304
SMALL-SIGNAL GAIN
vs. FREQUENCY (A = +10)
VCL
GAIN FLATNESS
vs. FREQUENCY (A = +2)
VCL
vs. FREQUENCY (A = +1)
VCL
5
4
3
0.5
0.4
0.3
0.5
V
OUT
= 100mVp-p
V
OUT
= 100mVp-p
V
OUT
= 100mVp-p
0.4
0.3
2
1
0
0.2
0.1
0
0.2
0.1
0
-1
-2
-0.1
-0.2
-0.1
-0.2
-3
-4
-0.3
-0.4
-0.3
-0.4
-5
-0.5
-0.5
100k
1M
10M
100M
1G
100k
1M
10M
100M
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
1/MAX4305
MAX4305
GAIN FLATNESS
MAX4105
GAIN FLATNESS
MAX4104
LARGE-SIGNAL GAIN
vs. FREQUENCY (A = +1)
VCL
vs. FREQUENCY (A = +10)
VCL
vs. FREQUENCY (A = +5)
VCL
0.5
0.4
0.3
0.5
5
V
OUT
= 100mVp-p
V
OUT
= 100mVp-p
V
OUT
= 2Vp-p
0.4
0.3
4
3
0.2
0.1
0
0.2
0.1
0
2
1
0
-0.1
-0.2
-0.1
-0.2
-1
-2
-0.3
-0.4
-0.3
-0.4
-3
-4
-0.5
-0.5
-5
100k
1M
10M
100M
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
4
_______________________________________________________________________________________
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
1/MAX4305
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V = +5V, V = -5V, R = 330Ω, R = 100Ω, T = +25°C, unless otherwise noted.)
CC
EE
F
L
A
MAX4304
LARGE-SIGNAL GAIN
vs. FREQUENCY (A = +2)
VCL
MAX4105
LARGE-SIGNAL GAIN
vs. FREQUENCY (A = +5)
VCL
MAX4305
LARGE-SIGNAL GAIN
vs. FREQUENCY (A = +10)
VCL
5
4
3
5
4
3
5
4
3
V
OUT
= 2Vp-p
V
OUT
= 2Vp-p
V
OUT
= 2Vp-p
2
1
0
2
1
0
2
1
0
-1
-2
-1
-2
-1
-2
-3
-4
-3
-4
-3
-4
-5
-5
-5
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
POSITIVE POWER-SUPPLY REJECTION
vs. FREQUENCY
COMMON-MODE REJECTION
vs. FREQUENCY
NEGATIVE POWER-SUPPLY REJECTION
vs. FREQUENCY
0
0
20
10
-10
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
-20
-30
-10
-20
-30
-40
-50
-60
-70
-80
-40
-50
-60
-70
-80
-90
-100
100k
1M
10M
100M
1G
10k
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
CLOSED-LOOP OUTPUT IMPEDANCE
vs. FREQUENCY
VOLTAGE NOISE DENSITY vs. FREQUENCY
(INPUT REFERRED)
CURRENT NOISE DENSITY vs. FREQUENCY
(INPUT REFERRED)
1000
100
10
1
100
10
1
100
10
1
0.1
0.01
100k
1M
10M
100M
1G
1
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
1
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
FREQUENCY (Hz)
_______________________________________________________________________________________
5
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V = +5V, V = -5V, R = 330Ω, R = 100Ω, T = +25°C, unless otherwise noted.)
CC
EE
F
L
A
MAX4104/MAX4304
MAX4105/MAX4305
MAX4104/MAX4304
DIFFERENTIAL GAIN AND PHASE
DIFFERENTIAL GAIN AND PHASE
HARMONIC DISTORTION vs. FREQUENCY
0.005
0.03
0
V
= 2Vp-p
OUT
0.000
-0.005
-0.010
-0.015
0.02
0.01
-10
-20
-30
-40
-50
-60
-70
-80
-90
0.00
R = 150Ω
R = 150Ω
L
L
-0.01
0
100
0
100
0.015
0.010
0.005
0.000
-0.005
0.025
0.020
0.015
0.010
0.005
0.000
-0.005
R = 150Ω
L
R = 150Ω
L
2ND HARMONIC
1M
3RD HARMONIC
10M
-100
0
100
0
100
100k
100M
IRE
IRE
FREQUENCY (Hz)
MAX4105/MAX4305
HARMONIC DISTORTION vs. LOAD
MAX4105/MAX4305
HARMONIC DISTORTION vs. FREQUENCY
MAX4104/MAX4304
HARMONIC DISTORTION vs. LOAD
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
V
OUT
= 2Vp-p
f = 5MHz
= 2Vp-p
f = 5MHz
V
OUT
-10
V
= 2Vp-p
OUT
-20
-30
-40
-50
-60
-70
-80
-90
2ND HARMONIC
2ND HARMONIC
2ND HARMONIC
3RD HARMONIC
3RD HARMONIC
3RD HARMONIC
-100
0
100 200 300 400 500 600 700 800 900 1k
0
100 200 300 400 500 600 700 800 900 1k
100k
1M
10M
100M
LOAD (Ω)
LOAD (Ω)
FREQUENCY (Hz)
1/MAX4305
MAX4104/MAX4304
HARMONIC DISTORTION
vs. OUTPUT SWING
MAX4105/MAX4305
HARMONIC DISTORTION
vs. OUTPUT SWING
OUTPUT SWING vs. LOAD RESISTANCE
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
8
7
6
5
4
3
2
1
f = 5MHz
f = 5MHz
2ND HARMONIC
3RD HARMONIC
2ND HARMONIC
3RD HARMONIC
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
OUTPUT SWING (Vp-p)
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
OUTPUT SWING (Vp-p)
0
50 100 150 200 250 300 350 400
LOAD RESISTANCE (Ω)
6
_______________________________________________________________________________________
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
1/MAX4305
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V = +5V, V = -5V, R = 330Ω, R = 100Ω, T = +25°C, unless otherwise noted.)
CC
EE
F
L
A
INPUT OFFSET CURRENT
vs. TEMPERATURE
INPUT BIAS CURRENT
vs. TEMPERATURE
INPUT OFFSET VOLTAGE
vs. TEMPERATURE
4
3
2
1
0
3.0
35
34
33
32
31
30
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-1
-2
-3
-40
-15
10
35
60
85
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
POSITIVE OUTPUT VOLTAGE SWING
vs. TEMPERATURE
SUPPLY CURRENT
vs. TEMPERATURE
25
25
24
23
22
21
20
19
18
17
16
15
4.0
24
23
22
21
20
19
18
17
16
15
3.9
3.8
3.7
3.6
3.5
3.4
3.3
3.2
R = 100kΩ
L
R = 100kΩ
L
9.0
9.5
10.0
10.5
11.0
-40
-15
10
35
60
85
-40
-15
10
35
60
85
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
MAX4304
MAX4104
MAX4105
SMALL-SIGNAL PULSE RESPONSE
SMALL-SIGNAL PULSE RESPONSE
SMALL-SIGNAL PULSE RESPONSE
(A = +2)
V
(A = +1)
V
(A = +5)
V
MAX4104 TOCII
MAX4104 TOCHH
MAX4104 TOCJJ
IN
+50mV
IN
+25mV
IN
GND +10mV
-10mV
GND
GND
GND
GND
-50mV
-25mV
+50mV
+50mV
+50mV
OUT
OUT
GND
OUT
-50mV
-50mV
-50mV
10ns/div
10ns/div
10ns/div
_______________________________________________________________________________________
7
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V = +5V, V = -5V, R = 330Ω, R = 100Ω, T = +25°C, unless otherwise noted.)
CC
EE
F
L
A
MAX4305
MAX4104
SMALL-SIGNAL PULSE RESPONSE
LARGE-SIGNAL PULSE RESPONSE
(A = +10)
V
(A = +1)
V
MAX4104 TOCKK
MAX4104 TOCLL
IN
+5mV
-5mV
+1V
IN
GND
GND
GND
-1V
+50mV
OUT
+1V
OUT
GND
-1V
-50mV
10ns/div
10ns/div
MAX4105
MAX4305
LARGE-SIGNAL PULSE RESPONSE
LARGE-SIGNAL PULSE RESPONSE
(A = +5)
V
(A = +2)
V
MAX4104 TOCNN
MAX4104 TOCMM
IN
+200mV
IN
+500mV
GND
GND
GND
GND
-200mV
-500mV
+1V
+1V
OUT
-1V
OUT
-1V
10ns/div
10ns/div
1/MAX4305
MAX4305
LARGE-SIGNAL PULSE RESPONSE
(A = +10)
V
MAX4104 TOCOO
IN
+100mV
GND
GND
-100mV
+1V
OUT
-1V
10ns/div
8
_______________________________________________________________________________________
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
1/MAX4305
Regardless of whether or not a constant-impedance
board is used, it is best to observe the following guide-
lines when designing the board:
_____________________P in De s c rip t io n
PIN
NAME
FUNCTION
1) Do not use wire-wrapped boards (they are much too
ind uc tive ) or b re a d b oa rd s (the y a re muc h too
capacitive).
SOT23-5
SO
1, 5, 8
2
N.C.
IN-
Not internally connected.
Amplifier Inverting Input
—
4
2) Do not use IC sockets. IC sockets increase reac-
tances.
Amplifier Noninverting
Input
3
3
IN+
3) Keep signal lines as short and straight as possible.
Do not make 90° turns; round all corners.
2
1
5
4
6
7
V
Negative Power Supply
Amplifier Output
EE
4) Observe high-frequency bypassing techniques to
maintain the amplifier’s accuracy and stability.
OUT
V
CC
Positive Power Supply
5) Bear in mind that, in general, surface-mount compo-
nents have shorter bodies and lower parasitic reac-
tance, resulting in greatly improved high-frequency
performance over through-hole components.
_______________De t a ile d De s c rip t io n
The MAX4104/MAX4105/MAX4304/MAX4305 are ultra-
high-speed, low-noise amplifiers featuring -3dB band-
wid ths up to 880MHz, 0.1d B g a in fla tne s s up to
100MHz, and low differential gain and phase errors of
0.01% and 0.01°, respectively. These devices operate
on dual power supplies ranging from ±3.5V to ±5.5V
and require only 20mA of supply current.
The bypass capacitors should include 1nF and 0.1µF
ceramic surface-mount capacitors between each sup-
ply pin and the ground plane, located as close to the
package as possible. Optionally, place a 10µF tantalum
capacitor at the power supply pins’ point of entry to the
PC board to ensure the integrity of incoming supplies.
The power-supply trace should lead directly from the
The MAX4104/MAX4304/MAX4105/MAX4305 are opti-
mized for minimum closed-loop gains of +1V/V, +2V/V,
+5V/V and +10V/V (respectively) with corresponding
-3dB bandwidths of 880MHz, 730MHz, 430MHz, and
350MHz. Each device in this family features a low input
voltage noise density of only 2.1nV/√Hz (at 1MHz), an
outp ut c urre nt d rive of ± 70mA, a nd s p urious -fre e
tantalum capacitor to the V
mize parasitic inductance, keep PC traces short and
use surface-mount components.
and V pins. To mini-
CC
EE
Input termination resistors and output back-termination
resistors, if used, should be surface-mount types, and
should be placed as close to the IC pins as possible.
dynamic range as low as -88dBc (5MHz, R = 100Ω).
L
DC a n d No is e Erro rs
The MAX4104/MAX4105/MAX4304/MAX4305 output
___________Ap p lic a t io n s In fo rm a t io n
offset voltage, V
(Figure 1), can be calculated with
OUT
the following equation:
La yo u t a n d P o w e r-S u p p ly Byp a s s in g
V
= [V + (I x R ) + (I x (R R ))] [1 + R / R ]
OUT
OS
B+
S
B-
F
G
F
G
||
The MAX4104/MAX4105/MAX4304/MAX4305 have an
extremely high bandwidth, and consequently require
careful board layout, including the possible use of
constant-impedance microstrip or stripline techniques.
where:
= input offset voltage (in volts)
V
OS
1 + R /R = amplifier closed-loop gain (dimensionless)
F
G
To realize the full AC performance of these high-speed
a mp lifie rs , p a y c a re ful a tte ntion to p owe r-s up p ly
bypassing and board layout. The PC board should
have at least two layers: a signal and power layer on
one side, and a large, low-impedance ground plane on
the other side. The ground plane should be as free of
voids as possible. With multilayer boards, locate the
ground plane on a layer that incorporates no signal or
power traces.
I
= noninverting input bias current (in amps)
= inverting input bias current (in amps)
= gain-setting resistor (in ohms)
B+
I
B-
R
G
R = feedback resistor (in ohms)
R = source resistor at noninverting input (in ohms)
S
F
The following equation represents output noise density:
2
2
2
R
F
e
=
1+
i x R
+
i x R ||R
+ e
n
n(OUT)
n
S
n
F
G
R
G
_______________________________________________________________________________________
9
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
R
G
R
F
R
G
R
F
IN-
FB
IN
R
75Ω
T
I
B-
75Ω CABLE
OUT
OUT
V
OUT
75Ω CABLE
I
B+
IN+
R
L
75Ω
MAX4104
MAX4105
MAX4304
MAX4305
MAX4104
MAX4105
MAX4304
MAX4305
R
75Ω
T
R
S
Figure 1. Output Offset Voltage
where:
Figure 2. Video Line Driver
very rapidly during the conversion cycle—a condition
that demands an amplifier with very low output imped-
ance at high frequencies to maintain measurement
accuracy. The combination of high-speed, fast slew
ra te , low nois e , a nd low-d is tortion a va ila b le in the
MAX4104/MAX4105/MAX4304/MAX4305 makes them
ideally suited for use as buffer amplifiers in high-speed
ADC applications.
i = input current noise density (in pA/√Hz)
n
e
= input voltage noise density (in nV/√Hz)
n
The MAX4104/MAX4105/MAX4304/MAX4305 have a
very low, 2.1nV/√Hz input voltage noise density and
3.1pA/√Hz input current noise density.
An e xa mp le of DC-e rror c a lc ula tions , us ing the
MAX4304 typical data and the typical operating circuit
Vid e o Lin e Drive r
The MAX4104/MAX4105/MAX4304/MAX4305 are opti-
mize d to d rive c oa xia l tra nsmission line s whe n the
cable is terminated at both ends, as shown in Figure 2.
To minimize reflections and maximize power transfer,
select the termination resistors to match the character-
istic impedance of the transmission line. Cable frequen-
cy response can cause variations in the flatness of the
signal.
with R = R = 330Ω (R || R = 165Ω) and R = 50Ω
F
G
F
G
S
gives:
−6
−6
−3
V
=
32 x 10
50 + 32 x 10
)
165Ω +1 x 10
1 + 1
[
(
(
)
]
OUT
V
= 15.8mV
OUT
Calculating total output noise in a similar manner yields
the following:
1/MAX4305
Drivin g Ca p a c it ive Lo a d s
The MAX4104/MAX4105/MAX4304/MAX4305 provide
maximum AC performance when driving no output load
capacitance. This is the case when driving a correctly
terminated transmission line (i.e., a back-terminated
cable).
e
=
n(OUT)
2
2
2
−12
−12
−9
1+1
[
3.1 x 10
x 50
+
3.1 x 10
x 165 + 2.1 x 10
]
e
= 4.3nV Hz
n(OUT)
With a 200MHz system bandwidth, this calculates to
60.8µV (approximately 365µVp-p, using the six-
sigma calculation).
In most amplifier circuits, driving a large load capaci-
tance increases the chance of oscillations occurring.
The amplifier’s output impedance and the load capaci-
tor combine to add a pole and excess phase to the
loop response. If the pole’s frequency is low enough
and phase margin is degraded sufficiently, oscillations
may result.
RMS
ADC In p u t Bu ffe rs
Input buffer amplifiers can be a source of significant
error in high-speed ADC applications. The input buffer
is usually required to rapidly charge and discharge the
ADC’s input, which is often capacitive. In addition, the
input impedance of a high-speed ADC often changes
A second concern when driving capacitive loads origi-
nates from the amplifier’s output impedance, which
10 ______________________________________________________________________________________
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
1/MAX4305
30
25
30
25
20
C = 15pF
L
C = 15pF
L
20
15
10
5
15
10
5
C = 10pF
L
C = 10pF
L
0
0
-5
-5
C = 5pF
L
-10
-15
-10
-15
C = 5pF
L
-20
-20
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 3a. MAX4104 Frequency Response with Capacitive
Load and No Isolation Resistor
Figure 3b. MAX4304 Frequency Response with Capacitive
Load and No Isolation Resistor
25
20
15
25
20
C = 15pF
L
15
C = 15pF
L
10
5
10
5
C = 10pF
L
C = 10pF
L
0
0
-5
-5
C = 5pF
L
-10
-10
C = 5pF
L
-15
-20
-15
-20
-25
-25
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 3c. MAX4105 Frequency Response with Capacitive
Load and No Isolation Resistor
Figure 3d. MAX4305 Frequency Response with Capacitive
Load and No Isolation Resistor
appears inductive at high frequencies. This inductance
forms an L-C resonant circuit with the capacitive load,
which causes peaking in the frequency response and
degrades the amplifier’s phase margin.
load. With higher capacitive values, bandwidth is domi-
nated by the RC network formed by R
and C ; the
ISO
L
bandwidth of the amplifier itself is much higher. Also
note tha t the is ola tion re s is tor forms a d ivid e r tha t
decreases the voltage delivered to the load.
The MAX4104/MAX4105/MAX4304/MAX4305 d rive
c a p a c itive loa d s up to 10p F without os c illa tion.
However, some peaking may occur in the frequency
domain (Figure 3). To drive larger capacitance loads or
to reduce ringing, add an isolation resistor between the
amplifier’s output and the load (Figure 4).
Ma x im ’s Hig h -S p e e d Eva lu a t io n Bo a rd s
The MAX4104 evaluation kit manual shows a suggest-
ed layout for Maxim’s high-speed, single-amplifier eval-
uation boards. This board was developed using the
te c hniq ue s d e s c rib e d p re vious ly (s e e La yout a nd
Power-Supply Bypassing section). The smallest avail-
able surface-mount resistors were used for the feed -
back and back-termination resistors to minimize the
The value of R
depends on the circuit’s gain and the
ISO
c a p a c itive loa d (Fig ure 5). Fig ure 6 s hows the
MAX4104/MAX4105/MAX4304/MAX4305 fre q ue nc y
response with the isolation resistor and a capacitive
______________________________________________________________________________________ 11
7 4 0 MHz, Lo w -No is e , Lo w -Dis t o rt io n
Op Am p s in S OT2 3 -5
4
R
G
R
F
3
2
C = 47pF
L
1
0
MAX4104
MAX4105
MAX4304
MAX4305
C = 68pF
L
-1
IN-
-2
-3
C = 83pF
L
R
ISO
OUT
-4
-5
MAX4104/MAX4304
C
L
R
L
IN+
R
= 15Ω
ISO
-6
100k
1M
10M
100M
1G
FREQUENCY (Hz)
Figure 6. Frequency Responses vs. Capacitive Load with 15Ω
Isolation Resistor
Figure 4. Using an Isolation Resistor (R ) for High Capacitive
ISO
Loads
distance from the IC to these resistors, thus reducing
the capacitance associated with longer lead lengths.
30
25
SMA connectors were used for best high-frequency
performance. Because distances are extremely short,
performance is unaffected by the fact that inputs and
outputs do not match a 50Ω line. However, in applica-
tions that require lead lengths greater than 1/4 of the
wa ve le ng th of the hig he s t fre q ue nc y of inte re s t,
constant-impedance traces should be used.
MAX4105/MAX4305
20
15
10
Fully assembled evaluation boards are available for the
MAX4104 in an 8-pin SO package.
MAX4104/MAX4304
5
0
0
50
100
150
200
250
Ord e rin g In fo rm a t io n (c o n t in u e d )
CAPACITIVE LOAD (pF)
PIN-
SOT
Figure 5. Optimal Isolation Resistor (R ) vs. Capacitive
ISO
Load
PART
TEMP. RANGE
PACKAGE TOP MARK
MAX4105ESA
-40°C to +85°C 8 SO
—
ACCP
—
1/MAX4305
MAX4105EUK-T -40°C to +85°C 5 SOT23-5
MAX4304ESA -40°C to +85°C 8 SO
P in Co n fig u ra t io n s (c o n t in u e d )
MAX4304EUK-T -40°C to +85°C 5 SOT23-5
MAX4305ESA* -40°C to +85°C 8 SO
ACCQ
—
TOP VIEW
MAX4305EUK-T -40°C to +85°C 5 SOT23-5
*Future product—contact factory for availability.
ACCR
1
2
3
4
8
7
6
5
N.C.
N.C.
IN-
MAX4104
MAX4105
V
CC
OUT
N.C.
IN+
Ch ip In fo rm a t io n
MAX4304
MAX4305
V
EE
TRANSISTOR COUNT: 44
SUBSTRATE CONNECTED TO V
EE
SO
12 ______________________________________________________________________________________
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