MAX4636 [MAXIM]
Fast, Low-Voltage, Dual 4з SPDT CMOS Analog Switches; 快速,低电压,双路SPDT 4Ω CMOS模拟开关型号: | MAX4636 |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | Fast, Low-Voltage, Dual 4з SPDT CMOS Analog Switches |
文件: | 总11页 (文件大小:245K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
19-1709; Rev 2; 5/03
Fast, Low-Voltage, Dual 4 SPDT
CMOS Analog Switches
General Description
Features
The MAX4635/MAX4636 are fast, dual 4 single-
pole/double-throw (SPDT) analog switches that operate
with supply voltages from +1.8V to +5.5V. High switch-
ing speeds, 1 on-resistance flatness, and low power
consumption make these devices ideal for audio/video,
communications, and battery-operated devices.
Containing two independently controllable SPDT
switches in 10-pin µMAX and 10-pin 3mm x 3mm thin
QFN packages, the MAX4635/MAX4636 use little board
space, and have low power consumption ensuring min-
imal impact on your power budget. The analog signal
range extends to the supply rails. The MAX4635 has
inverted logic compared to the MAX4636.
o Guaranteed On-Resistance
(max) +5V Supply
5.5 (max) +3V Supply
4
o Guaranteed Match Between Channels
0.2 (max)
o Guaranteed Flatness Over Signal Range
1
(max) with +5V Supply
o Fast Switching Speeds
14ns (max) Turn-On Time
6ns (max) Turn-Off Time
o 1.8V Operation
100 (typ) On-Resistance Over Temperature
56ns (typ) Turn-On Time
________________________Applications
17ns (typ) Turn-Off Time
Battery-Powered Equipment
o +1.8V to +5.5V Single-Supply Operation
o Rail-to-Rail® Signal Handling
o Low Crosstalk: -67dB at 1MHz
o High Off-Isolation: -65dB at 1MHz
o THD: 0.1%
Relay Replacement
Audio and Video Signal Routing
Low-Voltage Data-Acquisition Systems
Sample-and-Hold Circuits
Communications Circuits
Ordering Information
PIN-
PACKAGE
TOP
MARK
PART
TEMP RANGE
MAX4635EUB
-40°C to +85°C
-40°C to +85°C
10 µMAX
—
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
MAX4635ETB
10 Thin
AAT
QFN (3 ✕ 3)
MAX4636EUB
-40°C to +85°C
-40°C to +85°C
10 µMAX
—
MAX4636ETB
10 Thin
AAO
QFN (3 ✕ 3)
Pin Configuration/Functional Diagram/Truth Table
TOP VIEW
IN1
NC1
GND
NC2
IN2
1
2
3
4
5
10 COM1 IN1
1
2
3
4
5
10 COM1 IN1
1
2
3
4
5
10 COM1
IN1
NO1
GND
NO2
IN2
1
2
3
4
5
10 COM1
9
8
7
6
NO1 NO1
V+ GND
9
8
7
6
NC1 NC1
V+ GND
9
8
7
6
NO1
V+
9
8
7
6
NC1
V+
MAX4636
MAX4635
MAX4636
MAX4635
NO2 NO2
COM2 IN2
NC2 NC2
COM2 IN2
NO2
COM2
NC2
COM2
3 x 3 THIN QFN
3 x 3 THIN QFN
MAX
MAX
IN_
NO_ TO COM_ NC_ TO COM_
0
1
OFF
ON
ON
OFF
SWITCHES SHOWN FOR "0" INPUT
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Fast, Low-Voltage, Dual 4 SPDT
CMOS Analog Switches
ABSOLUTE MAXIMUM RATINGS
(Voltages Referenced to GND)
Continuous Power Dissipation (T = +70°C)
A
V+, IN_ .....................................................................-0.3V to +6V
COM_, NC_, NO_ (Note 1) .......................... -0.3V to (V+ + 0.3V)
Continuous Current into Any Terminal ............................. 30mA
Peak Current into COM_, NC_, NO_
10-Pin µMAX (derate 4.7mW/°C above +70°C)............330mW
10-Pin Thin QFN (derate 24.4mW/°C above +70°C) ..1951mW
Operating Temperature Range .......................... -40°C to +85°C
Storage Temperature Range ........................... -65°C to +150°C
Lead Temperature (soldering, 10s) ............................... +300°C
(pulsed at 1ms, 10% duty cycle)................................. 100mA
Note 1: Signals on NO_, NC_, or COM_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to maxi-
mum current rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +4.5V to +5.5V, V = +2.4V, V = +0.8V, T = T
to T , unless otherwise noted. Typical values are at T = +25°C.)
MAX A
IH
IL
A
MIN
(Notes 2, 9)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG SWITCH
V
,
COM_
Analog Signal Range
V
,
0
V+
V
NO_
V
NC_
T
A
T
A
T
A
T
A
T
A
T
A
= +25°C
2.5
0.1
0.5
4
V+ = 4.5V, I
= 10mA,
COM_
On-Resistance
R
ON
V
or V
= 0 to V+
NC_
NO_
= T
to T
4.5
0.2
0.4
1
MIN
MAX
MAX
MAX
= +25°C
= T to T
On-Resistance Match
Between Channels (Notes 3, 4)
V+ = 4.5V, I
= 10mA,
COM_
R
ON
V
or V
= 0 to V+
NC_
NO_
MIN
= +25°C
= T to T
On-Resistance Flatness
(Note 5)
V+ = 4.5V, I
= 10mA,
COM_
R
FLAT(ON)
V
or V
= 0 to V+
NC_
NO_
1.2
MIN
V+ = 5.5V; V
= 1V,
= 4.5V,
COM_
T
T
T
T
T
T
= +25°C
-0.1
-0.3
-0.1
-0.3
-0.1
-0.3
0.01
0.01
0.01
0.1
0.3
0.1
0.3
0.1
0.3
A
NO_, NC_ Off-Leakage Current
(Note 6)
I
I
,
NC_(OFF)
nA
nA
nA
4.5V; V
1V
or V
NO_
NC_
NO_(OFF)
= T
to T
MAX
A
MIN
V+ = 5.5V; V
= 1V,
COM_
= +25°C
A
A
A
A
COM_ Off-Leakage Current
(Note 6)
I
4.5V; V
1V
or V = 4.5V,
NC_
COM_(OFF)
NO_
= T
to T
MIN
MAX
V+ = 5.5V; V
= 4.5V,
= 4.5V,
COM_
or V
NC_
= +25°C
= T to T
COM_ On-Leakage Current
(Note 6)
1V; V
I
NO_
COM_(ON)
MIN
MAX
1V or floating
DIGITAL I/O (IN1, IN2)
Input Logic High
V
2.4
V
V
IH
Input Logic Low
V
0.8
IL
Input Leakage Current
I
, I
IH IL
V
= 0 or +5.5V
IN_
-100
5
100
nA
2
_______________________________________________________________________________________
Fast, Low-Voltage, Dual 4 SPDT
CMOS Analog Switches
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = +4.5V to +5.5V, V = +2.4V, V = +0.8V, T = T
to T , unless otherwise noted. Typical values are at T = +25°C.)
MAX A
IH
IL
A
MIN
(Notes 2, 9)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ns
DYNAMIC
V
, V
= 3V;
NO_ NC_
T
T
T
T
T
T
= +25°C
12
14
16
6
A
A
A
A
A
A
Turn-On Time
(Note 6)
t
R = 300 , C = 35pF,
ON
L
L
= T
to T
MIN
MAX
MAX
MAX
Figure 1a
V
, V
NO_ NC_
= 3V;
= +25°C
= T to T
5
7
Turn-Off Time
(Note 6)
t
R = 300 , C = 35pF,
ns
OFF
L
L
8
MIN
Figure 1a
V
, V
NO_ NC_
= 3V;
= +25°C
= T to T
Break-Before-Make Time
(Note 6)
t
ns
R = 300 , C = 35pF,
BBM
L
L
1
Figure 1b
MIN
Charge Injection
Q
V
V
= 2V, R
= 0, C = 1.0nF, Figure 2
2
9
pC
pF
pF
dB
GEN
GEN
L
C
C
,
NO_(OFF)
NO_, NC_ Off-Capacitance
COM_ On-Capacitance
Off-Isolation (Note 7)
, V
NO_ NC_
= GND, f = 1MHz, Figure 3
NC_(OFF)
C
V
= GND, f = 1MHz, Figure 3
32
-52
-65
-66
-67
0.1
COM_(ON) COM_
C = 5pF, R = 50 , f = 10MHz, Figure 4
L
L
V
ISO
C = 5pF, R = 50 , f = 1MHz, Figure 4
L
L
C = 5pF, R = 50 , f = 10MHz, Figure 4
L
L
Crosstalk (Note 8)
V
dB
%
CT
C = 5pF, R = 50 , f = 1MHz, Figure 4
L
L
Total Harmonic Distortion
SUPPLY
THD
I+
R = 600 , V
= 5V , f = 20Hz to 20kHz
L
NO_ P-P
Positive Supply Current
V+ = 5.5V, V = 0 or V+
0.001
1.0
µA
IN_
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +2.7V to +3.6V, V = +2.0V, V = +0.8V, TA = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX A
IH
IL
MIN
(Notes 2, 9)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG SWITCH
V
,
COM_
V
,
Analog Signal Range
0
V+
V
NO_
V
NC_
T
A
T
A
T
A
T
A
T
A
T
A
T
A
T
A
T
A
T
A
= +25°C
5
5.5
8
V+ = 2.7V, I
= 10mA,
COM_
On-Resistance
R
ON
V
or V
= 0 to V+
NC_
NO_
= T
to T
MIN
MAX
MAX
MAX
MAX
MAX
= +25°C
= T to T
0.1
1.5
0.01
0.01
0.2
0.4
2
On-Resistance Match Between
Channels (Notes 3, 4)
V+ = 2.7V, I
= 10mA,
COM_
R
ON
V
or V
= 0 to V+
NC_
NO_
MIN
= +25°C
= T to T
On-Resistance Flatness
(Note 5)
V+ = 2.7V, I
= 10mA,
COM_
R
FLAT(ON)
V
or V
= 0 to V+
NC_
NO_
2.5
0.1
0.3
0.1
0.3
MIN
= +25°C
= T to T
-0.1
-0.3
-0.1
-0.3
NO_, NC_ Off-Leakage Current
(Note 6)
I
I
V+ = 3.3V; V
= 1V, 3V;
= 3V, 1V
NO_(OFF),
COM_
nA
nA
V
or V
NC_(OFF)
NO_
NC_
MIN
COM_ Off-Leakage Current
(Note 6)
V+ = 3.3V; V
or V
= 1V, 3V;
= +25°C
= T to T
COM_
ICOM_(OFF)
V
= 3V, 1V
NC_
NO_
MIN
_______________________________________________________________________________________
3
Fast, Low-Voltage, Dual 4 SPDT
CMOS Analog Switches
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
(V+ = +2.7V to +3.6V, V = +2.0V, V = +0.8V, TA = T
to T , unless otherwise noted. Typical values are at T = +25°C.)
MAX A
IH
IL
MIN
(Notes 2, 9)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V+ = 3.3V; V
=1V,
COM_
T
A
T
A
= +25°C
-0.1
0.01
0.1
COM_ On-Leakage Current
(Note 6)
I
3V; V
or V = 1V,
NC_
nA
COM_(ON)
NO_
= T
to T
MAX
MIN
-0.3
0.3
3V, or floating
DIGITAL I/O (IN1, IN2)
Input Logic High
Input Logic Low
V
2.0
V
V
IH
V
0.4
IL
Input Leakage Current
DYNAMIC
I
, I
IH IL
V
_= 0 or +5.5V
IN
-100
5
100
nA
V
, V
= 2V;
NO_ NC_
T
A
T
A
T
A
T
A
T
A
T
A
= +25°C
14
18
20
8
Turn-On Time (Note 6)
Turn-Off Time (Note 6)
t
ns
ns
ns
C = 35pF, R = 300 ,
Figure 1a
ON
L
L
= T
to T
MIN
MAX
MAX
MAX
V
, V
= 2V;
NO_ NC_
= +25°C
= T to T
6
7
t
C = 35pF, R = 300 ,
Figure 1a
OFF
L
L
10
MIN
V
, V
= 2V;
L
NO_ NC_
= +25°C
= T to T
Break-Before-Make Time
(Note 6)
C = 35pF, R = 300 ,
Figure 1b
L
1
MIN
Charge Injection
Q
V
= 1.5V, R
= 0, C = 1.0nF, Figure 2
11
9
pC
pF
pF
dB
GEN
GEN
L
C
C
,
NO_(OFF)
NO_, NC_ Off-Capacitance
COM On-Capacitance
Off-Isolation (Note 7)
V
, V
NO_ NC_
= GND, f = 1MHz, Figure 3
NC_(OFF)
C
(ON) V
= GND, f = 1MHz, Figure 3
COM
32
COM
-52
C = 5pF, R = 50 , f = 10MHz, Figure 4
L
L
V
ISO
C = 5pF, R = 50 , f = 1MHz, Figure 4
-65
-66
-67
L
L
C = 5pF, R = 50 , f = 10MHz, Figure 4
L
L
Crosstalk (Note 8)
V
dB
CT
C = 5pF, R = 50 , f = 1MHz, Figure 4
L
L
SUPPLY
Positive Supply Current
I+
V+ = 3.6V, V = 0 or +3.6V
0.001
1
µA
IN
Note 2: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in
this data sheet.
Note 3:
Note 4:
R
= R
- R
.
ON
ON(MAX)
ON(MIN)
R
ON
matching specifications for QFN-packaged parts are guaranteed by design.
Note 5: Flatness is defined as the difference between the maximum and minimum values of on-resistance as measured over the
specified analog signal ranges.
Note 6: Guaranteed by design.
Note 7: Off-Isolation = 20log (V
/ V ), V
= output, V
= input to off switch.
NO
10 COM
NO
COM
Note 8: Between any two switches.
Note 9: QFN packaged parts are tested at +25°C and guaranteed by design and correlation over the entire temperature range.
4
_______________________________________________________________________________________
Fast, Low-Voltage, Dual 4 SPDT
CMOS Analog Switches
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
ON-RESISTANCE vs. V
TEMPERATURE (V+ = +3V)
AND
ON-RESISTANCE vs. V
TEMPERATURE (V+ = +5V)
AND
COM
COM
ON-RESISTANCE vs. V
COM
3.0
4.0
3.5
3.0
2.5
2.0
14
12
10
8
T
A
= +85°C
T
A
= +85°C
V+ = 1.8V
2.5
2.0
V+ = 2.5V
V+ = 3.0V
6
V+ = 4.5V
4
T
A
= -40°C
T
A
= +25°C
T
A
= -40°C
2
T
A
= +25°C
V+ = 5.0V
4
1.5
0
4
0
0.5
1.0
1.5
(V)
2.0
2.5
3.0
0
1
2
3
5
0
1
2
3
5
V
V
(V)
V
COM
(V)
COM
COM
TURN-ON/OFF TIME
vs. SUPPLY VOLTAGE
ON/OFF-LEAKAGE CURRENT
vs. TEMPERATURE (V+ = +5V)
CHARGE INJECTION vs. V
COM
0.15
0.10
0.05
0
25
20
15
10
5
40
20
0
I
COM(ON)
V
= +5V
CC
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
t
V
= +3V
ON
CC
NO
(OFF)
t
OFF
0
-5
1.5
2.5
3.5
4.5
5.5
-50
0
50
100
0
1
2
3
(V)
4
5
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
V
COM
TURN-ON/OFF TIME
vs. TEMPERATURE (V+ = +5V)
POWER-SUPPLY CURRENT
vs. TEMPERATURE (V+ = +5V)
LOGIC-LEVEL THRESHOLD
vs. SUPPLY VOLTAGE
2.0
1.5
25
20
15
10
2.5
2.0
1.5
1.0
0.5
0
t
ON
1.0
0.5
t
OFF
5
0
0
-50
0
50
100
-50
0
50
100
1
2
3
4
5
TEMPERATURE ( C)
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
Fast, Low-Voltage, Dual 4 SPDT
CMOS Analog Switches
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
FREQUENCY RESPONSE
10
0
0.12
0.10
-10
-20
-30
-40
-50
-60
-70
-80
BANDWIDTH
0.08
OFF-ISOLATION
0.06
0.04
0.02
0
CROSSTALK
600 IN AND OUT
V+ = 5V
0.01
0.1
1
10
100
1k
10
100
1k
10k
100k
FREQUENCY (MHz)
FREQUENCY (Hz)
Pin Description
PIN
NAME
FUNCTION
MAX4635
MAX4636
1
2
1
9
IN1
NO1
GND
NO2
IN2
Logic Control for Switch 1
Normally Open Terminal of Switch 1
Ground
3
3
4
7
Normally Open Terminal of Switch 2
Logic Control Input for Switch 2
Common Terminal of Switch 2
5
5
6
6
COM2
NC2
V+
7
4
Normally Closed Terminal of Switch 2
Input Supply Voltage, +1.8V to +5.5V
Normally Closed Terminal of Switch 1
Common Terminal of Switch 1
8
8
9
2
NC1
COM1
10
10
6
_______________________________________________________________________________________
Fast, Low-Voltage, Dual 4 SPDT
CMOS Analog Switches
MAX4635/MAX4636
t < 5ns
t < 5ns
f
r
V+
V+
V
IH
+ 0.5V
50%
LOGIC
INPUT
0
NC_ or NO_
NO_ or NC_
V
OUT
V
IN
COM_
t
OFF
C
L
V
R
L
OUT
✕
✕
0.9
V
0UT
0.9
V
OUT
IN_
SWITCH
OUTPUT
0
LOGIC
INPUT
GND
t
ON
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
C INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
Figure 1a. Switching Time
t < 5ns
r
t < 5ns
f
V+
V+
MAX4635/MAX4636
V
IH
+ 0.5V
LOGIC
INPUT
50%
0
NC_ or NO_
V
OUT
V
IN
COM_
NO_ or NC_
C
L
R
L
IN_
LOGIC
INPUT
GND
✕
0.9
V
OUT
V
OUT
t
D
C INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
Figure 1b. Break-Before-Make Interval
MAX4635/MAX4636
V+
V
OUT
V+
V
OUT
R
GEN
COM_
NC_
V
OUT
IN
OR NO_
OFF
OFF
OFF
C
L
ON
V
GEN
GND
IN
ON
OFF
IN
V
INL
TO V
INH
Q = (
V
)(C )
OUT L
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
Figure 2. Charge Injection
_______________________________________________________________________________________
7
Fast, Low-Voltage, Dual 4 SPDT
CMOS Analog Switches
Logic Inputs
Detailed Description
The MAX4635/MAX4636 logic inputs (IN1, IN2) can be
driven up to +5.5V, regardless of the voltage on V+.
This allows interfacing to 5V logic signals while operat-
ing with a +3.3V supply voltage without external level
translation.
The MAX4635/MAX4636 are low-on-resistance (R ),
ON
low-voltage, dual SPDT analog switches that operate
from a +1.8V to +5.5V supply. The MAX4635/MAX4636
feature very fast switching speed (t
= 14ns max,
ON
t
= 6ns max) and guaranteed break-before-make
OFF
switching. The low maximum R
allows high continu-
ON
Analog Signal Levels
Analog signals ranging over the entire supply voltage
(V+ to GND) can be passed with very little change in
on-resistance (see Typical Operating Characteristics).
The switches are bidirectional, so the NO_, NC_, and
COM_ pins may be used as either inputs or outputs.
ous currents to be switched in a variety of applications.
Applications Information
Power-Supply Sequencing and
Overvoltage Protection
V+
10nF
Caution: Do not exceed the absolute maximum rat-
ings because stresses beyond the listed ratings can
cause permanent damage to the device. Proper
power-supply sequencing is recommended for all
CMOS devices. Always apply V+ before applying ana-
log signals, especially if the analog signal is not current
limited. If this sequencing is not possible, and if the
analog inputs are not current limited to less than 30mA,
add a small-signal diode (D1) as shown in Figure 5. If
the analog signal can dip below GND, add D2. Adding
protection diodes reduces the analog range to a diode
drop (about 0.7V) below V+ (for D1), and a diode drop
above ground (for D2).
V+
COM_
MAX4635
MAX4636
V
INL
OR
IN_
CAPACITANCE
METER
V
INH
NC_ OR
NO_
f = 1MHz
GND
Figure 3. Channel Off/On-Capacitance
10nF
+5V
V+
V
V
OUT
OFF-ISOLATION = 20log
ON-LOSS = 20log
V
IN
NETWORK
ANALYZER
50
50
OUT
V
V
0 OR V+
IN
IN_
V
IN
COM_
NO_
V
OUT
MAX4635
MAX4636
CROSSTALK = 20log
NC_
V
IN
MEAS
50
REF
OUT
50
GND
50
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 4. On-Loss, Off-Isolation, and Crosstalk
8
_______________________________________________________________________________________
Fast, Low-Voltage, Dual 4 SPDT
CMOS Analog Switches
Chip Information
POSITIVE SUPPLY
TRANSISTOR COUNT: 239
PROCESS: CMOS
D1
V+
MAX4635
MAX4636
NO_
COM_
V
g
GND
D2
Figure 5. Overvoltage Protection Using Two External Blocking
Diodes
On-resistance increases slightly at low supply voltages.
Maximum supply voltage (V+) must not exceed +6V.
Adding protection diode D2 causes the logic threshold
to be shifted relative to GND. Protection diodes D1 and
D2 also protect against some overvoltage situations.
With Figure 5’s circuit, if the supply voltage is below the
absolute maximum rating, and if a fault voltage up to
the absolute maximum rating is applied to an analog
signal pin, no damage results.
_______________________________________________________________________________________
9
Fast, Low-Voltage, Dual 4 SPDT
CMOS Analog Switches
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
e
4X S
10
10
INCHES
MAX
MILLIMETERS
MAX
1.10
0.15
0.95
3.05
3.00
3.05
3.00
5.05
0.70
DIM MIN
MIN
-
A
-
0.043
0.006
0.037
0.120
0.118
0.120
0.118
0.199
A1
A2
D1
D2
E1
E2
H
0.002
0.030
0.116
0.114
0.116
0.114
0.187
0.05
0.75
2.95
2.89
2.95
2.89
4.75
0.40
H
ÿ 0.50 0.1
0.6 0.1
L
0.0157 0.0275
0.037 REF
L1
b
0.940 REF
0.007
0.0106
0.177
0.270
0.200
1
1
e
0.0197 BSC
0.500 BSC
0.6 0.1
c
0.0035 0.0078
0.0196 REF
0.090
BOTTOM VIEW
0.498 REF
S
TOP VIEW
0∞
6∞
0∞
6∞
D2
E2
GAGE PLANE
A2
c
A
E1
b
L
A1
D1
L1
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 10L uMAX/uSOP
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0061
I
1
Note: The MAX4636 does not have an exposed pad.
10 ______________________________________________________________________________________
Fast, Low-Voltage, Dual 4 SPDT
CMOS Analog Switches
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
L
A
D2
D
A2
PIN 1 ID
1
N
1
C0.35
b
[(N/2)-1] x e
REF.
E
E2
PIN 1
INDEX
AREA
DETAIL A
e
k
A1
C
L
C
L
L
L
e
e
A
DALLAS
SEMICONDUCTOR
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 6, 8 & 10L,
TDFN, EXPOSED PAD, 3x3x0.80 mm
APPROVAL
DOCUMENT CONTROL NO.
REV.
NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY
1
2
21-0137
D
COMMON DIMENSIONS
SYMBOL
MIN.
0.70
2.90
2.90
0.00
0.20
MAX.
A
0.80
3.10
3.10
0.05
0.40
D
E
A1
L
k
0.25 MIN.
0.20 REF.
A2
PACKAGE VARIATIONS
PKG. CODE
T633-1
N
6
D2
E2
e
JEDEC SPEC
b
[(N/2)-1] x e
1.90 REF
1.95 REF
2.00 REF
1.50 0.10 2.30 0.10 0.95 BSC
1.50 0.10 2.30 0.10 0.65 BSC
MO229 / WEEA
MO229 / WEEC
0.40 0.05
0.30 0.05
T833-1
8
T1033-1
10
1.50 0.10 2.30 0.10 0.50 BSC MO229 / WEED-3 0.25 0.05
DALLAS
SEMICONDUCTOR
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 6, 8 & 10L,
TDFN, EXPOSED PAD, 3x3x0.80 mm
APPROVAL
DOCUMENT CONTROL NO.
REV.
2
2
21-0137
D
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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