MAX4684_V01 [MAXIM]
0.5Ω/0.8Ω Low-Voltage, Dual SPDTl Analog Switches in UCSP;
| 型号： | MAX4684_V01 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 0.5Ω/0.8Ω Low-Voltage, Dual SPDTl Analog Switches in UCSP 光电二极管 |
| 文件： | 总10页 (文件大小：1997K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MAX4684/MAX4685
0.5Ω/0.8Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
General Description
The MAX4684/MAX4685 low on-resistance (R ), low-
Benefits and Features
● 12-Bump, 0.5mm-Pitch UCSP
ON
voltage, dual single-pole/double-throw (SPDT) analog
switches operate from a single +1.8V to +5.5V supply.
● NC Switch R
ON
• 0.5Ω max (+2.7V Supply) (MAX4684)
The MAX4684 features a 0.5Ω (max) R
for its NC
• 0.8Ω max (+2.7V Supply) (MAX4685)
ON
switch and a 0.8Ω (max) R
supply. The MAX4685 features a 0.8Ω max on-resistance
for both NO and NC switches at a +2.7V supply.
for its NO switch at a +2.7V
ON
● NO Switch R
ON
• 0.8Ω max (+2.7V Supply)
● R Match Between Channels
ON
• 0.06Ω (max)
Both parts feature break-before-make switching action
● R
Flatness Over Signal Range
(2ns) with t
= 50ns and t
= 40ns at +3V. The digital
ON
ON
OFF
• 0.15Ω (max)
logic inputs are 1.8V logic-compatible with a +2.7V to
+3.3V supply.
● +1.8V to +5.5V Single-Supply Operation
● Rail-to-Rail Signal Handling
● 1.8V Logic Compatibility
● Low Crosstalk: -68dB (100kHz)
● High Off-Isolation: -64dB (100kHz)
● THD: 0.03%
The MAX4684/MAX4685 are packaged in the chipscale
package (UCSP)™, significantly reducing the required PC
board area. The chip occupies only a 2.0mm x 1.50mm
area. The 4 x 3 array of solder bumps are spaced with a
0.5mm bump pitch.
● 50nA (max) Supply Current
● Low Leakage Currents
Applications
● Speaker Headset Switching
• 1nA (max) at T = +25°C
A
● MP3 Players
● Power Routing
● Battery-Operated Equipment
● Relay Replacement
● Audio and Video Signal Routing
● Communications Circuits
● PCMCIA Cards
UCSP is a trademark of Maxim Integrated Products, Inc.
μMAX is a registered trademark of Maxim Integrated Products,
Inc.
● Cellular Phones
● Modems
Ordering Information appears at end of data sheet.
19-1977; Rev 5; 10/19
MAX4684/MAX4685
0.5Ω/0.8Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
Absolute Maximum Ratings
(All Voltages Referenced to GND)
Continuous Power Dissipation (T = +70°C)
A
V+, IN_ ....................................................................-0.3V to +6V
COM_, NO_, NC_ (Note1) ..........................-0.3V to (V+ + 0.3V)
Continuous Current NO_, NC_, COM_..........................±300mA
Peak Current NO_, NC_, COM_
(pulsed at 1ms, 50% duty cycle) ................................±400mA
Peak Current NO_, NC_, COM_
10-Pin TDFN (derate 18.5mW/°C above +70°C) ......1482mW
12-Bump UCSP (derate 11.4mW/°C above +70°C)....909mW
10-Pin μMAX (derate 5.6mW/°C above +70°C)..........444mW
Operating Temperature Ranges......................... -40°C to +85°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Bump Temperature (soldering) (Note 2)
pulsed at 1ms, 10% duty cycle) .................................±500mA
Infared (15s) ................................................................+220°C
Vapor Phase (60s).......................................................+215°C
Note 1: Signals on NO_, NC_, and COM_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to
maximum current rating.
Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device
can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recom-
mended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and Convection reflow.
Preheating is required. Hand or wave soldering is not allowed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
PACKAGE TYPE
PACKAGE CODE
B12-4
DOCUMENT NO.
21-0104
12 UCSP
10 TDFN-EP
10 μMAX
T1033-1
21-0137
U10-2
21-0061
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless
of RoHS status.
Electrical Characteristics—+3V Supply
(V+ = +2.7V to +3.3V, V = +1.4V, V = +0.5V, T = T
to T
, unless otherwise noted. Typical values are at +3V and +25°C.)
IH
IL
A
MIN
MAX
(Notes 3, 9, 10)
PARAMETER
SYMBOL
CONDITIONS
T
MIN
TYP
MAX UNITS
A
ANALOG SWITCH
V
_, V _,
NC
COM
NO
V
Analog Signal Range
E
0
V+
V
_
+25°C
E
0.3
0.5
0.5
0.8
0.8
0.8
0.8
MAX4684
MAX4685
NC_ On-Resistance
(Note 4)
V+ = 2.7V; I
_ = 100mA;
COM
R
Ω
ON(NC)
ON(NO)
V
_= 0 to V+
+25°C
E
0.45
0.45
NC
+25°C
E
NO_ On-Resistance
(Note 4)
V+ = 2.7V; I
_ = 100mA;
_ = 100mA;
COM
R
Ω
Ω
V
_ = 0 to V+
NO
On-Resistance Match
Between Channels
(Notes 4, 5)
+25°C
E
0.06
0.06
V+= 2.7V; I
COM
∆R
ON
V
_or V _ = 1.5V
NO
NC
MAX4684
MAX4685
E
E
0.15
0.35
NC_ On-Resistance
Flatness (Note 6)
V+ = 2.7V; I
= 100mA;
COM
R
Ω
Ω
FLAT (NC)
V
_ = 0 to V+
NC
NO_ On-Resistance
Flatness (Note 6)
V+ = 2.7V; I
= 100mA;
COM
R
E
0.35
FLAT (NO)
V
_= 0 to V+
NO
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MAX4684/MAX4685
0.5Ω/0.8Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
Electrical Characteristics—+3V Supply (continued)
(V+ = +2.7V to +3.3V, V = +1.4V, V = +0.5V, T = T
to T
, unless otherwise noted. Typical values are at +3V and +25°C.)
IH
IL
A
MIN
MAX
(Notes 3, 9, 10)
PARAMETER
SYMBOL
CONDITIONS
T
MIN
TYP
MAX UNITS
A
+25°C
-1
1
NO_ or NC_ Off-
Leakage Current
(Note 7)
I
_(OFF)or V+ = 3.3V; V _ or V _ = 3V, 0.3V;
NO NC
NO
I
nA
_(OFF)
V
_ = 0.3V, 3V
E
-10
-2
10
NC
COM
+25°C
E
2
V+ = 3.3V; V _ or V _ = 3V, 0.3V,
NO
NC
COM_ On-Leakage
Current (Note 7)
I
_(ON)
or unconnected; V
_ = 3V, 0.3V, or
nA
20
COM
COM
-20
unconnected
DYNAMIC CHARACTERISTICS
+25°C
E
30
25
50
ns
60
V+ = 2.7V, V _ or V _ = 1.5V;
NO
NC
Turn-On Time
t
ON
R = 50Ω; C = 35pF; Figure 2
L
L
+25°C
E
30
ns
40
V+ = 2.7V, V _ or V _ = 1.5V;
NO
NC
Turn-Off Time
t
OFF
R = 50Ω; C = 35pF; Figure 2
L
L
Break-Before-Make
Delay
V+ = 2.7V, V _, or V _ = 1.5V;
NO NC
t
E
2
15
200
-64
ns
pC
dB
BBM
R = 50Ω; C = 35pF; Figure 3
L
L
Charge Injection
Q
COM_ = 0; R = 0; C = 1nF; Figure 4
+25°C
+25°C
S
L
C = 5pF; R = 50Ω; f = 100kHz;
L
L
RMS
Off-Isolation (Note 8)
V
ISO
V
_ = 1V
; Figure 5
COM
C = 5pF; R = 50Ω; f = 100kHz;
L
L
Crosstalk
V
+25°C
+25°C
-68
dB
%
CT
V
_ = 1V
; Figure 5
COM
RMS
Total Harmonic
Distortion
R = 600Ω, IN_ = 2Vp-p, f = 20Hz to
L
THD
0.03
20kHz
NC_ Off-Capacitance
NO_ Off-Capacitance
NC_ On-Capacitance
NO_ On-Capacitance
DIGITAL I/O
C
C
f = 1MHz; Figure 6
f = 1MHz; Figure 6
f = 1MHz; Figure 6
f = 1MHz; Figure 6
+25°C
+25°C
+25°C
+25°C
84
37
pF
pF
pF
pF
NC_(OFF)
NO_(OFF)
C
190
150
NC_(ON)
C
NO_(ON)
Input Logic High
V
E
E
1.4
V
IH
Input Logic Low
V
0.5
+1000
+20
V
IL
MAX4684/MAX4685
-1000
-20
IN_ Input Leakage
Current
I
_
V
_ = 0 or V+
E
nA
IN
IN
MAX4684A
POWER SUPPLY
Power-Supply Range
V+
I+
E
+25°C
E
1.8
-50
5.5
50
V
0.04
Supply Current (Note 4)
V+= 5.5V; V _ = 0 or V+
nA
IN
-200
200
Note 3: The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive
value a maximum.
Note 4: Guaranteed by design.
Note 5: ∆R
= R
- R
, between NC1 and NC2 or between NO1 and NO2.
ON
ON(MAX)
ON(MIN)
Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 7: Leakage parameters are 100% tested at T = +85°C, and guaranteed by correlation over rated temperature range.
A
COM
Note 8: Off-isolation = 20log (V
/ V ), V
= output, V
= input to off switch.
10 COM
NO
NO
Note 9: UCSP and TDFN parts are 100% tested at +25°C only and guaranteed by design and correlation at the full hot-rated
temperature.
Note 10: -40°C specifications are guaranteed by design.
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MAX4684/MAX4685
0.5Ω/0.8Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
POSITIVE SUPPLY
MAX4685
NC ON-RESISTANCE vs. COM VOLTAGE
NO ON-RESISTANCE vs. COM VOLTAGE
D1
2.0
1.8
2.5
2.0
1.5
1.0
0.5
0
V+
V+ = +1.8V
MAX4684
MAX4685
V+ = +1.8V
1.6
1.4
1.2
V+ = +2.0V
NO
COM
V+ = +2.0V
V
g
1.0
0.8
0.6
0.4
0.2
0
V+ = +2.3V
V+ = +2.5V
V+ = +2.3V
V+ = +2.5V
GND
V+ = +3.0V
V+ = +5.0V
V+ = +3.0V
V+ = +5.0V
0
1
2
3
4
5
0
1
2
3
4
5
V
COM
(V)
V
COM
(V)
MAX4684
MAX4685
NC ON-RESISTANCE vs. COM VOLTAGE
NC ON-RESISTANCE vs. COM VOLTAGE
NO ON-RESISTANCE vs. COM VOLTAGE
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.28
0.26
V+ = +5V
V+ = +5V
V+ = +5V
0.24
0.22
0.20
0.18
0.16
0.14
0.12
T
= +85°C
A
T
= +85°C
A
T = +85°C
A
T
= +25°C
A
T
A
= +25°C
T = +25°C
A
T
A
= -40°C
4
T
= -40°C
4
T = -40°C
A
A
0.10
0.10
0
1
2
3
(V)
5
0
1
2
3
4
5
0
1
2
3
5
V
V
COM
(V)
V (V)
COM
COM
MAX4684
MAX4685
NO ON-RESISTANCE vs. COM VOLTAGE
NC ON-RESISTANCE vs. COM VOLTAGE
NC ON-RESISTANCE vs. COM VOLTAGE
0.50
0.35
0.30
0.25
0.20
0.15
0.10
0.50
0.45
0.40
0.35
V+ = +3V
V+ = +3V
V+ = +3V
0.45
0.40
0.35
T
A
= +85°C
T
A
= +85°C
T
A
= +85°C
T
A
= +25°C
0.30
0.25
0.20
0.15
0.10
0.30
0.25
0.20
0.15
0.10
T
= +25°C
A
T
A
= +25°C
T
A
= -40°C
2.0
T
= -40°C
A
T
A
= -40°C
2.0
0
0.5
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
2.5
3.0
0
0.5
1.0
1.5
2.5
3.0
V
COM
(V)
V
COM
(V)
V
COM
(V)
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MAX4684/MAX4685
0.5Ω/0.8Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
TURN-ON/TURN-0FF TIMES
vs. SUPPLY VOLTAGE
TURN-ON/TURN-0FF TIMES
vs. TEMPERATURE
SUPPLY CURRENT vs. SUPPLY VOLTAGE
50
45
40
35
30
25
20
15
10
5
80
70
60
50
100
V+ = +3V
80
60
40
20
0
t
ON
t
ON
40
30
t
OFF
20
10
0
t
OFF
0
0
1
2
3
4
5
6
1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.3
(V)
-40
-40
10
-15
10
35
60
85
V
(V)
V
SUPPLY
TEMPERATURE (°C)
SUPPLY
MAX4684
ON/OFF-LEAKAGE CURRENT
vs. TEMPERATURE
LOGIC THRESHOLD VOLTAGE
vs. SUPPLY VOLTAGE
CHARGE INJECTION vs. COM VOLTAGE
2.0
1.5
1.0
0.5
0
300
200
100
0
1000
100
10
V
IN
RISING
-100
-200
-300
-400
-500
V
IN
FALLING
I
COM(ON)
I
COM(OFF)
1
0
1
2
3
4
5
6
0
1
2
3
4
5
6
-15
10
35
60
85
V
(V)
V
COM
(V)
TEMPERATURE (°C)
SUPPLY
MAX4685
ON/OFF-LEAKAGE CURRENT
vs. TEMPERATURE
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
FREQUENCY RESPONSE (µMAX)
0
0.1
1000
100
10
ON-
RESPONSE
-20
OFF-
ISOLATION
-40
-60
I
COM(ON)
CROSSTALK
-80
I
COM(OFF)
-100
-120
1
0.01
-40
-15
10
35
60
85
0.001
0.01
0.1
1
10
100
100
1k
10k
100k
TEMPERATURE (°C)
FREQUENCY (MHz)
FREQUENCY (Hz)
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MAX4684/MAX4685
0.5Ω/0.8Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
Pin Configurations/Functional Diagrams/Truth Table
TOP VIEW
MAX4684/MAX4685
GND
MAX4684/MAX4685
C1
C2
B1
A1
A2
NC1
IN1
NC2
IN2
1
2
3
4
5
10 NO2
V+
NO1
9
COM2
IN2
MAX4684/MAX4685
8
7
COM1
IN1
ꢀꢁꢂ
ꢁꢃꢂ
OFF
ON
ꢁꢄꢂ
ON
COM1 C3
A3 COM2
NC2
GND
0
1
NO1
C4
NO2
A4
OFF
B4
NC1
6
SWITCHES SHOWN FOR LOGIC "0" INPUT
V+
ꢈMAX
ꢅꢄꢆꢇ
MAX4684/MAX4685
1
2
3
4
5
10
9
V+
NO2
COM2
IN2
NO1
COM1
IN1
8
7
NC2
GND
6
NC1
*EP
ꢀꢁꢁ ꢂ ꢀꢁꢁ ꢃꢄꢅꢆ
*CONNECT EP TO GND.
Pin Description
PIN
NAME
FUNCTION
UCSP
A1, C1
µMAX/TDFN
NC_
IN_
5, 7
4, 8
3, 9
2, 10
1
Analog Switch—Normally Closed Terminal
Digital Control Input
A2, C2
A3, C3
A4, C4
B4
COM_
NO_
V+
Analog Switch—Common Terminal
Analog Switch—Normally Open Terminal
Positive Supply Voltage Input
Ground
GND
EP
B1
6
—
—
Exposed Pad. Connect EP to GND (for TDFN only.)
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MAX4684/MAX4685
0.5Ω/0.8Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
supply voltages. Maximum supply voltage (V+) must not
exceed +6V. Protection diode D1 also protects against
some overvoltage situations. No damage will result on
Figure 1’s circuit if the supply voltage is below the abso-
lute maximum rating applied to an analog signal pin.
Detailed Description
The MAX4684/MAX4685 are low on-resistance, low-
voltage, dual SPDT analog switches that operate from a
+1.8V to +5.5V supply. The devices are fully specified for
nominal 3V applications. The MAX4684/MAX4685 have
break-before-make switching and fast switching speeds
UCSP Package Consideration
(t
= 50ns max, t
= 40ns max).
ON
OFF
For general UCSP package information and PC layout
considerations, please refer to the Maxim Application
Note (Wafer-Level Ultra-Chip-Board-Scale Package).
The MAX4684 offers asymmetrical normally closed (NC)
and normally open (NO) R for applications that require
ON
asymmetrical loads (examples include speaker headsets
and internal speakers). The part features a 0.5Ω max
UCSP Reliability
R
for its NC switch and a 0.8Ω max RON for its NO
ON
The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical reliabil-
ity tests. UCSP reliability is integrally linked to the user’s
assembly methods, circuit board material, and usage
environment. The user should closely review these areas
when considering use of a UCSP package. Performance
through Operating Life Test and Moisture Resistance
remains uncompromised as it is primarily determined by
the wafer-fabrication process.
switch at the 2.7V supply. The MAX4685 features a 0.8Ω
max on-resistance for both NO and NC switches at the
+2.7V supply.
Applications Information
Digital Control Inputs
The MAX4684/MAX4685 logic inputs accept up to +5.5V
regardless of supply voltage. For example, with a +3.3V
supply, IN_ may be driven low to GND and high to 5.5V.
Driving IN_ rail-to-rail minimizes power consumption.
Logic levels for a +1.8V supply are 0.5V (low) and 1.4V
(high).
Mechanical stress performance is a greater consideration
for a UCSP package. UCSPs are attached through direct
solder contact to the user’s PC board, foregoing the inher-
ent stress relief of a packaged product lead frame. Solder
joint contact integrity must be considered. Information on
Maxim’s qualification plan, test data, and recommendations
are detailed in the UCSP application note, which can be
found on Maxim’s website at www.maximintegrated.com.
Analog Signal Levels
Analog signals that range over the entire supply voltage
(V+ to GND) are passed with very little change in on-
resistance (see Typical Operating Characteristics). The
switches are bidirectional, so the NO_, NC_, and COM_
pins can be either inputs or outputs.
POSITIVE SUPPLY
Power-Supply Sequencing and
Overvoltage Protection
D1
V+
Caution: Do not exceed the absolute maximum rat-
ings because stresses beyond the listed ratings may
cause permanent damage to devices.
MAX4684
MAX4685
NO
COM
Proper power-supply sequencing is recommended for all
CMOS devices. Always apply V+ before applying analog
signals, especially if the analog signal is not current lim-
ited. If this sequencing is not possible, and if the analog
inputs are not current limited to <20mA, add a small sig-
nal diode (D1) as shown in Figure 1. Adding a protection
diode reduces the analog range to a diode drop (about
V
g
GND
Figure 1. Overvoltage Protection Using Two External Blocking
0.7V) below V+ (for D1). R
increases slightly at low
Diodes
ON
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MAX4684/MAX4685
0.5Ω/0.8Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
Test Circuits/Timing Diagrams
MAX4684
MAX4685
V+
t
< 5ns
r
f
V
IH
t < 5ns
LOGIC
INPUT
50%
V+
COM_
V
IL
NO_
V
IN_
V
OUT
OR NC
R
50Ω
C
35pF
L
L
t
OFF
IN_
V
t
OUT
0.9 x V
0.9 x V
OUT
0UT
GND
LOGIC
INPUT
SWITCH
OUTPUT
0
ON
C INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
R
L
V
= V
N_
OUT
(
)
R + R
L
ON
Figure 2. Switching Time
V+
V+
MAX4684
MAX4685
V
IH
LOGIC
INPUT
50%
V
IL
NC_
NO_
V
OUT
V
COM_
N_
R
50Ω
L
C
35pF
L
IN_
LOGIC
INPUT
GND
0.9 x V
OUT
V
OUT
t
D
C INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
Figure 3. Break-Before-Make Interval
V+
∆V
OUT
MAX4684
MAX4685
V+
V
OUT
R
GEN
NC_
COM_
V
OUT
IN
OR NO_
OFF
OFF
OFF
OFF
C
L
ON
ON
V
GEN
GND
IN_
IN
V
TO V
IH
Q = (∆V
)(C )
L
IL
OUT
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
Figure 4. Charge Injection
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MAX4684/MAX4685
0.5Ω/0.8Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
Test Circuits/Timing Diagrams (continued)
+5V 10nF
V
V
OUT
OFF-ISOLATION = 20log
ON-LOSS = 20log
V
IN
NETWORK
ANALYZER
OUT
V+
50Ω
50Ω
V
V
0V OR V+
IN
IN_
V
IN
COM
NO
V
V
OUT
MAX4684
MAX4685
CROSSTALK = 20log
NC_
IN
MEAS
REF
OUT
50Ω
GND
50Ω
50Ω
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 5. On-Loss, Off-Isolation, and Crosstalk
Ordering Information
V+
10nF
PIN/BUMP-
PACKAGE
TOP
MARK
PART
TEMP RANGE
MAX4684EBC+T
MAX4684ETB+T
MAX4684EUB+T
-40°C to +85°C 12 UCSP*
-40°C to +85°C 10 TDFN-EP**
AAF
AAG
—
V+
COM_
MAX4684
MAX4685
®
-40°C to +85°C 10 µMAX
MAX4684AEBC+T -40°C to +85°C 12 UCSP*
AEJ
AAG
AAH
—
V
IL
IN
MAX4685EBC+T
MAX4685ETB+T
MAX4685EUB+T
-40°C to +85°C 12 UCSP*
-40°C to +85°C 10 TDFN-EP**
-40°C to +85°C 10 µMAX
CAPACITANCE
METER
OR
V
IH
NC_ or
NO_
f = 1MHz
+Denotes a lead(Pb)-free/RoHS-compliant package.
GND
Note: Requires special solder temperature profile described in
the Absolute Maximum Ratings section.
*UCSP reliability is integrally linked to the user’s assembly
methods, circuit board material, and environment. Refer to the
UCSP Reliability Notice in the UCSP Reliability section of this
data sheet for more information.
Figure 6. Channel Off/On-Capacitance
**EP = Exposed Pad
T = Tape and reel.
Chip Information
PROCESS: BiCMOS
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MAX4684/MAX4685
0.5Ω/0.8Ω Low-Voltage, Dual SPDT
Analog Switches in UCSP
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
3
4
2/03
1/09
Added TDFN packaging, noted parts are now UCSP qualified
Added lead-free packaging and exposed pad note
—
1, 2, 6–9
Updated the Electrical Characteristics table and added MAX4684AEBC+T to the
Ordering Information table
5
10/19
3, 9
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2019 Maxim Integrated Products, Inc.
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