MAX468CPE [MAXIM]

Two-Channel, Triple/Quad RGB Video Switches and Buffers; 双通道,三/四路RGB视频开关及缓冲器
MAX468CPE
型号: MAX468CPE
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Two-Channel, Triple/Quad RGB Video Switches and Buffers
双通道,三/四路RGB视频开关及缓冲器

开关
文件: 总16页 (文件大小:164K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-0219; Rev 2; 6/94  
Tw o -Ch a n n e l, Trip le /Qu a d  
RGB Vid e o S w it c h e s a n d Bu ffe rs  
63–MAX470  
_______________Ge n e ra l De s c rip t io n  
____________________________Fe a t u re s  
100MHz Unity-Gain Bandwidth  
The MAX463–MAX470 s e rie s of two-c ha nne l,  
triple/quad buffered video switches and video buffers  
combines high-accuracy, unity-gain-stable amplifiers  
with high-performance video switches. Fast switching  
time and low differential gain and phase error make this  
series of switches and buffers ideal for all video appli-  
cations. The devices are all specified for ±5V supply  
operation with inputs and outputs as high as ±2.5V  
when driving 150loads (75back-terminated cable).  
90MHz Bandwidth with 2V/V Gain  
0.01%/0.03° Differential Gain/Phase Error  
Drives 50and 75Back-Terminated Cable Directly  
Wide Output Swing:  
±2V into 75Ω  
±2.5V into 150Ω  
300V/µs Slew Rate (2V/V gain)  
20ns Channel Switching Time  
Input capacitance is typically only 5pF, and channel-to-  
channel crosstalk is better than 60dB, accomplished by  
surrounding all inputs with AC ground pins. The on-  
board amplifiers feature a 200V/µs slew rate (300V/µs  
Logic Disable Mode:  
High-Z Outputs  
Reduced Power Consumption  
for A = 2V/V amplifiers), and a bandwidth of 100MHz  
V
Outputs May Be Paralleled for Larger Networks  
5pF Input Capacitance (channel on or off)  
(90MHz for A = 2V/V buffers). Channel selection is  
V
controlled by a single TTL-compatible input pin or by a  
microprocessor interface, and channel switch time is  
only 20ns.  
______________Ord e rin g In fo rm a t io n  
For design flexibility, devices are offered with buffer-  
amplifier gains of 1V/V or 2V/V for 75back-terminated  
applications. Output amplifiers have a guaranteed out-  
put swing of ±2V into 75.  
PART  
TEMP. RANGE  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
24 Narrow Plastic DIP  
24 Wide SO  
MAX463CNG  
MAX463CWG  
MAX463C/D  
MAX463ENG  
MAX463EWG  
Dice*  
Devices offered in this series are as follows:  
24 Narrow Plastic DIP  
24 Wide SO  
VOLTAGE GAIN  
PART  
DESCRIPTION  
(V/V)  
Ordering Information continued on last page.  
MAX463  
MAX464  
MAX465  
MAX466  
MAX467  
MAX468  
MAX469  
MAX470  
Triple RGB Switch & Buffer  
Quad RGB Switch & Buffer  
Triple RGB Switch & Buffer  
Quad RGB Switch & Buffer  
Triple Video Buffer  
1
1
2
2
1
1
2
2
* Dice are specified at T = +25°C, DC parameters only.  
A
_________________P in Co n fig u ra t io n s  
TOP VIEW  
IN0A  
GND  
IN1A  
GND  
IN2A  
V-  
1
2
3
4
5
6
7
8
9
24 GND  
23 LE  
Quad Video Buffer  
Triple Video Buffer  
MAX463  
MAX465  
22 EN  
Quad Video Buffer  
21 A0  
20 CS  
________________________Ap p lic a t io n s  
19 V-  
Broadcast-Quality Color-Signal Multiplexing  
RGB Multiplexing  
V-  
18 OUT0  
17 V+  
IN0B  
GND  
RGB Color Video Overlay Editors  
RGB Color Video Security Systems  
RGB Medical Imaging  
16 OUT1  
15 GND  
14 V+  
IN1B 10  
GND 11  
IN2B 12  
Coaxial-Cable Line Drivers  
13 OUT2  
DIP/SO  
Typical Operating Circuit appears at end of data sheet.  
Pin Configurations continued at end of data sheet.  
________________________________________________________________ Maxim Integrated Products  
1
Ca ll t o ll fre e 1 -8 0 0 -9 9 8 -8 8 0 0 fo r fre e s a m p le s o r lit e ra t u re .  
Tw o -Ch a n n e l, Trip le /Qu a d  
RGB Vid e o S w it c h e s a n d Bu ffe rs  
ABSOLUTE MAXIMUM RATINGS  
Power-Supply Ranges  
24-Pin Narrow Plastic DIP  
V+ to V- ................................................................................12V  
Analog Input Voltage ..........................(V- - 0.3V) to (V+ + 0.3V)  
Digital Input Voltage ...................................-0.3V to (V+ + 0.3V)  
Output Short-Circuit Duration (to GND)........................1 Minute  
Input Current into Any Pin, Power On or Off...................±50mA  
(derate 20.2mW/°C above +70°C)..................................1620mW  
24-Pin Wide SO (derate 19.3mW/°C above +70°C) .........1590mW  
28-Pin Narrow Plastic DIP  
(derate 20.2mW/°C above +70°C)..................................1620mW  
28-Pin Wide SO (derate 18.1mW/°C above +70°C) .........1440mW  
Operating Temperature Ranges  
Continuous Power Dissipation (T = +70°C)  
A
16-Pin Plastic DIP (derate 22.22mW/°C above +70°C) ....1778mW  
16-Pin Wide SO (derate 20.00mW/°C above +70°C) .......1600mW  
MAX4_ _C_ _.........................................................0°C to +70°C  
MAX4_ _E_ _......................................................-40°C to +85°C  
Storage Temperature Range .............................-65°C to +150°C  
Lead Temperature (soldering, 10sec) .............................+300°C  
Stresses beyond those listed under Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
ELECTRICAL CHARACTERISTICS  
(V+ = 5V, V- = -5V, -2V V +2V, R  
= 75, unless otherwise noted.)  
IN  
LOAD  
63–MAX470  
T
= +25°C  
T
A
= T  
MIN  
to T  
A
MIN MAX  
PARAMETER  
SYMBOL  
CONDITIONS  
UNITS  
MIN TYP MAX  
MAX  
±5.25  
2
Operating Supply Voltage  
Input Voltage Range  
Offset Voltage  
V
S
±4.75 ±5 ±5.25  
±4.75  
-2  
V
V
V
IN  
-2  
2
V
OS  
±3  
60  
±1  
±10  
±15  
mV  
dB  
µA  
kΩ  
pF  
Power-Supply Rejection Ratio  
On Input Bias Current  
On Input Resistance  
Input Capacitance  
PSRR  
50  
50  
I
±3  
±5  
BIAS  
R
C
300 700  
5
150  
IN  
IN  
Channel off or on  
MAX463/MAX464, MAX467/MAX468  
(Note 1)  
0.2  
0.3  
0.5  
1.0  
1.0  
2.0  
Voltage-Gain Accuracy  
Output Voltage Swing  
%
V
MAX465/MAX466, MAX469/MAX470,  
R
R
R
= 150, (Note 2)  
LOAD  
LOAD  
LOAD  
= 150Ω  
±2.5 ±2.8  
±2.0 ±2.4  
5
±2.5  
V
OUT  
= 75Ω  
-1.5/+2  
f
IN  
= 10MHz  
MAX463/MAX464,  
MAX467/MAX468  
0.05  
0.1  
Output Impedance  
R
OUT  
f
IN  
= DC  
MAX465/MAX466,  
MAX469/MAX470  
MAX463/MAX464  
MAX465/MAX466  
150  
0.7  
250  
1
100  
0.7  
kΩ  
kΩ  
Output Resistance,  
Disabled Mode  
R
C
OUTD  
OUTD  
Output Capacitance,  
Disabled Mode  
MAX463–MAX466  
10  
65  
85  
pF  
MAX463/MAX465/MAX467/MAX469,  
= 0V  
80  
100  
120  
V
IN  
MAX464/MAX466/MAX468/MAX470,  
= 0V  
100  
Positive Supply Current  
I+  
mA  
V
IN  
MAX463/MAX465, disabled mode  
MAX464/MAX466, disabled mode  
35  
40  
45  
50  
50  
55  
2
_______________________________________________________________________________________  
Tw o -Ch a n n e l, Trip le /Qu a d  
RGB Vid e o S w it c h e s a n d Bu ffe rs  
63–MAX470  
ELECTRICAL CHARACTERISTICS (continued)  
(V+ = 5V, V- = -5V, -2V V +2V, R  
= 75, unless otherwise noted.)  
IN  
LOAD  
T
= +25°C  
T
= T  
MIN  
to T  
MAX  
A
A
MIN MAX  
PARAMETER  
SYMBOL  
CONDITIONS  
UNITS  
MIN TYP MAX  
MAX463/MAX465/MAX467/MAX469,  
50  
65  
65  
80  
75  
V
IN  
= 0V  
MAX464/MAX466/MAX468/MAX470,  
= 0V  
95  
Negative Supply Current  
I-  
mA  
V
IN  
MAX463/MAX465, disabled mode  
MAX464/MAX466, disabled mode  
20  
25  
30  
35  
35  
40  
–—  
Input Noise Density  
Slew Rate  
en  
f
= 10kHz  
20  
nV/Hz  
IN  
MAX463/MAX464, MAX467/MAX468  
MAX465/MAX466, MAX469/MAX470  
MAX463/MAX464, MAX467/MAX468  
MAX465/MAX466, MAX469/MAX470  
MAX463/MAX464, MAX467/MAX468  
MAX465/MAX466, MAX469/MAX470  
MAX463/MAX464, MAX467/MAX468  
MAX465/MAX466, MAX469/MAX470  
200  
300  
100  
90  
SR  
BW  
DG  
DP  
V/µs  
MHz  
%
-3dB Bandwidth  
0.01  
0.12  
0.03  
0.14  
50  
Differential Gain Error  
(Note 3)  
Differential Phase Error  
(Note 3)  
deg.  
ns  
Settling Time to 0.1%  
t
V
= 2V-to-0V step  
S
IN  
Adjacent Channel Crosstalk  
(Note 4)  
XTALK  
f
IN  
= 10MHz  
60  
dB  
All-Hostile Crosstalk (Note 5) XTALK  
f
= 10MHz  
50  
70  
dB  
dB  
IN  
All-Hostile Off Isolation (Note 6)  
ISO  
f
IN  
= 10MHz, MAX463–MAX466  
Channel Switching  
Propagation Delay (Note 7)  
t
MAX463–MAX466  
MAX463–MAX466  
15  
ns  
ns  
PD  
Channel Switching Time  
(Note 8)  
t
20  
300  
80  
SW  
Switching Transient  
V
INA  
= V  
= 0V, MAX463–MAX466  
mV  
P-P  
INB  
Amplifier Switching Off-Time  
(Note 9)  
t
MAX463–MAX466  
ns  
OFF  
Amplifier Switching On-Time  
(Note 10)  
t
MAX463–MAX466  
100  
ns  
ON  
—–  
—–  
Logic Input High Threshold  
Logic Input Low Threshold  
Logic Input Current High  
Logic Input Current Low  
V
EN, A0, CS, LE; MAX463–MAX466  
2
2
V
V
IH  
—–  
—–  
V
EN, A0, CS, LE; MAX463–MAX466  
—– –  
0.8  
0.8  
IL  
I
EN, A0, CS, LE; MAX463–MAX466  
—– –  
200  
200  
200  
200  
µA  
µA  
INHI  
I
EN, A0, CS, LE; MAX463–MAX466  
INLO  
_______________________________________________________________________________________  
3
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ELECTRICAL CHARACTERISTICS (continued)  
(V+ = 5V, V- = -5V, -2V V +2V, R  
= 75, unless otherwise noted.)  
IN  
LOAD  
T
= +25°C  
T
= T  
MIN  
to T  
MAX  
A
A
MIN MAX  
PARAMETER  
SYMBOL  
CONDITIONS  
UNITS  
MIN TYP MAX  
—–  
—–  
Address Setup Time (Note 11)  
Address Hold Time (Note 11)  
t
EN, A0, CS, LE; MAX463–MAX466  
30  
30  
ns  
ns  
ns  
SU  
—–  
—–  
t
H
EN, A0, CS, LE; MAX463–MAX466  
—– –  
0
0
—–  
CS Pulse Width Low (Note 11)  
t
CS  
EN, A0, CS, LE; MAX463–MAX466  
15  
15  
Note 1: Voltage gain accuracy for the unity-gain devices is defined as [(V  
- V ) at V = 1V - (V  
- V ) at V = -1V]/2.  
OUT IN IN  
OUT  
IN  
IN  
Note 2: Voltage gain accuracy for the gain-of-two devices is defined as [(V  
/2 - V ) at V = 1V - (V  
/2 - V ) at V = -1V]/2.  
OUT IN IN  
OUT  
IN  
IN  
Note 3: Tested with a 3.58MHz sine wave of amplitude 40IRE superimposed on a linear ramp (0IRE to 100IRE), R = 150to ground.  
L
Note 4: Tested with the selected input connected to ground through a 75resistor, and a 4V sine wave at 10MHz driving adjacent input.  
P-P  
Note 5: Tested in the same manner as described in Note 4, but with all other inputs driven.  
—–  
Note 6: Tested with LE = 0V, EN = V+, and all inputs driven with a 4V , 10MHz sine wave.  
P-P  
Note 7: Measured from a channel switch command to measurable activity at the output.  
Note 8: Measured from where the output begins to move to the point where it is well defined.  
Note 9: Measured from a disable command to amplifier in a non-driving state.  
Note 10: Measured from an enable command to the point where the output reaches 90% current out.  
Note 11: Guaranteed by design.  
63–MAX470  
__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s  
(T = +25°C, unless otherwise noted.)  
A
MAX468  
MAX464  
POWER-SUPPLY REJECTION RATIO  
vs. FREQUENCY  
OUTPUT IMPEDANCE  
vs. FREQUENCY  
MAX468  
GAIN AND PHASE RESPONSES  
100  
10  
1
60  
50  
40  
30  
2
1
V–  
GAIN  
0
0
V+  
PHASE  
–1  
36  
72  
0.1  
108  
144  
180  
20  
10  
–2  
–3  
0.01  
10k  
100k  
1M  
10M 100M  
1G  
1k  
10k  
100k  
1M  
10M 100M  
10k  
100k  
1M  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
4
_______________________________________________________________________________________  
Tw o -Ch a n n e l, Trip le /Qu a d  
RGB Vid e o S w it c h e s a n d Bu ffe rs  
63–MAX470  
____________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )  
(T = +25°C, unless otherwise noted.)  
A
MAX463  
MAX465  
DISABLED OUTPUT RESISTANCE  
vs. TEMPERATURE  
VOLTAGE GAIN ACCURACY  
DISABLED OUTPUT RESISTANCE  
vs. TEMPERATURE  
vs. TEMPERATURE  
400  
350  
300  
0.16  
1.30  
1.25  
1.20  
0.14  
MAX465  
0.12  
0.10  
MAX463  
250  
200  
1.15  
1.10  
0.08  
0.06  
–50 –25  
0
25  
50  
75  
100  
–50 –25  
0
25  
50  
75  
100  
–50 –25  
0
25  
50  
75  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
DISABLED SUPPLY CURRENT  
vs. TEMPERATURE  
SUPPLY CURRENT PER AMPLIFIER  
vs. TEMPERATURE  
OUTPUT VOLTAGE SWING  
vs. LOAD RESISTANCE  
40  
35  
30  
25  
4
30  
25  
3
2
I+  
I–  
I+  
I–  
20  
15  
10  
5
1
MAX463/4/7/8:V  
IN  
MAX465/6/9/70:V  
IN  
=
=
4V  
2V  
0
–1  
–2  
20  
15  
10  
–3  
–4  
0
–50 –25  
0
25  
50  
75  
100  
–50 –25  
0
25  
50  
75  
100  
10  
100  
1000  
10000  
LOAD RESISTANCE ()  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
_______________________________________________________________________________________  
5
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____________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )  
(T = +25°C, unless otherwise noted.)  
A
MAX464  
MAX466  
SMALL-SIGNAL STEP RESPONSE  
SMALL-SIGNAL STEP RESPONSE  
A: V ,  
IN  
A: V ,  
IN  
GND  
GND  
GND  
GND  
100mV/div  
100mV/div  
B: V  
OUT  
,
B: V ,  
OUT  
100mV/div  
200mV/div  
63–MAX470  
10ns/div  
10ns/div  
MAX466  
MAX464  
LARGE-SIGNAL STEP RESPONSE  
LARGE-SIGNAL STEP RESPONSE  
GND  
GND  
GND  
GND  
A: V ,  
IN  
A: V ,  
IN  
1V/div  
2V/div  
B: V  
,
OUT  
B: V  
,
OUT  
2V/div  
2V/div  
20ns/div  
20ns/div  
MAX464  
OUTPUT TRANSIENT WHEN SWITCHING  
BETWEEN TWO GROUNDED INPUTS  
MAX464  
EN RESPONSE TIME  
A: CS,  
5V/div  
A: CS,  
5V/div  
GND  
GND  
GND  
GND  
B: A0,  
B: EN,  
5V/div  
5V/div  
GND  
GND  
C: OUT0,  
C: OUT3,  
1V/div  
100mV/div  
50ns/div  
50ns/div  
t
t
ON  
OFF  
6
_______________________________________________________________________________________  
Tw o -Ch a n n e l, Trip le /Qu a d  
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63–MAX470  
_____________________________________________________________P in De s c rip t io n s  
PIN  
NAME  
IN0A  
GND  
FUNCTION  
MAX463/MAX465 MAX464/MAX466  
1
28  
Channel A, Analog Input 0  
Analog Ground  
2, 4, 9,  
11, 15, 24  
1, 3, 5,  
11, 13, 19  
3
2
IN1A  
IN2A  
IN3A  
V-  
Channel A, Analog Input 1  
Channel A, Analog Input 2  
Channel A, Analog Input 3  
5
4
6
6, 7, 19  
7, 9, 21, 23  
Negative Power-Supply Input. Connect to -5V. Thermal path.  
Channel B, Analog Input 0  
8
10  
8
10  
IN0B  
IN1B  
IN2B  
IN3B  
OUT3  
OUT2  
V+  
Channel B, Analog Input 1  
12  
12  
Channel B, Analog Input 2  
14  
Channel B, Analog Input 3  
15  
Buffered Analog Output 3  
13  
17  
Buffered Analog Output 2  
14, 17  
16  
16, 18  
20  
Positive Power-Supply Input. Connect to +5V.  
Buffered Analog Output 1  
OUT1  
OUT0  
18  
22  
Buffered Analog Output 0  
–  
—–  
Chip-Select—latch control for the digital inputs. When CS is low, A0 and EN  
–  
CS  
—–  
20  
24  
input registers are transparent. When CS goes high, the A0 input register latches.  
—–  
—–  
If LE is high, the EN input register also latches when CS goes high (see LE).  
—–  
Channel-Select Input. When CS is low, driving A0 low selects channel A  
and driving A0 high selects channel B.  
21  
22  
25  
26  
A0  
—–  
—–  
—–  
Buffer-Enable Input. When CS is low or LE is low, driving EN low enables  
–  
EN  
all output buffers and driving EN high disables all output buffers.  
—–  
Digital Latch-Enable Input. When LE is low, the EN register is transparent;  
—–  
—–  
23  
27  
LE  
when LE is high, the EN register is transparent only when CS is low. Hard-  
wire to V+ or GND for best crosstalk performance.  
PIN  
MAX467/MAX469 MAX468/MAX470  
NAME  
FUNCTION  
1
1
IN0  
GND  
IN1  
Analog Input 0  
2, 7, 8, 9, 15  
2, 7, 15  
Analog Ground  
3
3
Analog Input 1  
4, 5, 12, 13  
4, 5, 12, 13  
V-  
Negative Power-Supply Input. Connect to -5V. Thermal path.  
Analog Input 2  
6
6
IN2  
8
IN3  
Analog Input 3  
9
OUT3  
V+  
Buffered Analog Output 3  
Positive Power-Supply Input. Connect to +5V.  
Buffered Analog Output 2  
Buffered Analog Output 1  
Buffered Analog Output 0  
10  
11  
14  
16  
10  
11  
14  
16  
OUT2  
OUT1  
OUT0  
_______________________________________________________________________________________  
7
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_______________De t a ile d De s c rip t io n  
The MAX463–MAX470 have a bipolar construction,  
which results in a typical channel input capacitance of  
COAX  
only 5pF, whether the channel is on or off. This low  
input capacitance allows the amplifiers to realize full  
AC performance, even with source impedances as  
great as 250. It also minimizes switching transients  
b e c a us e the d riving s ourc e s e e s the s a me loa d  
whether the channel is on or off. Low input capaci-  
RT  
RETURN  
CURRENT  
COAX  
tance is critical, because it forms a single-pole RC low-  
pa ss filte r with the output impe da nc e of the sig na l  
sourc e , a nd this filte r c a n limit the syste ms sig na l  
bandwidth if the RC product becomes too large.  
RT  
RETURN  
CURRENT  
The MAX465/MAX466/MAX469/MAX470s amplifiers are  
internally configured for a gain of two, resulting in an over-  
all gain of one at the cable output when driving back-ter-  
minated coaxial cable (see the section Driving Coaxial  
Cable). The MAX463/MAX464/MAX467/MAX468 are  
internally configured for unity gain.  
63–MAX470  
Figure 1. Low-Crosstalk Layout. Return current from the  
termination resistor does not flow through the ground plane.  
Connect all V- pins to a large power plane. The V- pins  
conduct heat away from the internal die, aiding thermal  
dissipation.  
P o w e r-S u p p ly Byp a s s in g a n d Bo a rd La yo u t  
To realize the full AC performance of high-speed ampli-  
fiers, pay careful attention to power-supply bypassing  
and board layout, and use a large, low-impedance  
ground plane. With multi-layer boards, the ground  
plane should be located on the layer that is not dedi-  
cated to a specific signal trace.  
Diffe re n t ia l Ga in a n d P h a s e Erro rs  
Differential gain and phase errors are critical specifica-  
tions for an amplifier/buffer in color video applications,  
because these errors correspond directly to changes in  
the color of the displayed picture in composite video  
systems. The MAX467–MAX470 have low differential  
gain and phase errors, making them ideal in broadcast-  
quality composite color applications, as well as in RGB  
video systems where these errors are less significant.  
To prevent unwanted signal coupling, minimize the  
tra c e a re a a t the c irc uit's c ritic a l hig h-imp e d a nc e  
nodes, and surround the analog inputs with an AC  
ground trace (analog ground, bypassed DC power  
s u p p ly, e tc ). Th e a n a lo g in p u t p in s to th e  
MAX463–MAX470 ha ve b e e n s e p a ra te d with AC  
ground pins (GND, V+, V-, or a hard-wired logic input)  
to minimize parasitic coupling, which can degrade  
crosstalk and/or stability of the amplifier. Keep signal  
paths as short as possible to minimize inductance,  
and ensure that all input channel traces are of equal  
length to maintain the phase relationship between the  
R, G, and B signals. Connect the coaxial-cable shield  
to the ground side of the 75terminating resistor at  
the g round p la ne to furthe r re d uc e c ros s ta lk (s e e  
Figure 1).  
The MAX467–MAX470 differential gain and phase errors  
a re me a s ure d with the Te ktronix VM700 Vid e o  
Measurement Set, with the input test signal provided by  
the Tektronix 1910 Digital Generator as shown in Figure 2.  
Me a s uring the d iffe re ntia l g a in a nd p ha s e of the  
MAX469/MAX470 (Figure 2a) is straightforward because  
the output amplifiers are configured for a gain of two,  
allowing connection to the VM700 through a back-termi-  
nated coaxial cable. Since the MAX467/MAX468 are  
unity-gain devices, driving a back-terminated coax  
would result in a gain of 1/2 at the VM700.  
Bypass all power-supply pins directly to the ground  
plane with 0.1µF ceramic capacitors, placed as close  
to the supply pins as possible. For high-current loads,  
it may be necessary to include 10µF tantalum or alu-  
minum-electrolytic capacitors in parallel with the 0.1µF  
ceramics. Keep capacitor lead lengths as short as  
possible to minimize series inductance; surface-mount  
(chip) capacitors are ideal.  
Figure 2b shows a test method to measure the differen-  
tial gain and phase for the MAX467/MAX468. First,  
measure and store the video signal with the device  
under test (DUT) removed and replaced with a short  
circuit, and the 150load resistor omitted. Then do  
another measurement with the DUT and load resistor in  
the circuit, and calculate the differential gain and phase  
errors by subtracting the results.  
8
_______________________________________________________________________________________  
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RGB Vid e o S w it c h e s a n d Bu ffe rs  
63–MAX470  
75CABLE  
(a)  
75Ω  
MAX469/MAX470  
75CABLE  
75CABLE  
75Ω  
DUT  
75Ω  
SOURCE:  
TEKTRONIX  
75Ω  
MEASUREMENT:  
TEKTRONIX VM700  
VIDEO MEASUREMENT  
1910 DIGITAL GENERATOR  
SET  
MAX467/MAX468  
(b)  
75CABLE  
75Ω  
75CABLE  
75Ω  
A = 2  
V
DUT  
75Ω  
150Ω  
Figure 2. Differential Phase and Gain Error Test Circuits (a) for the MAX469/MAX470 Gain-of-Two Amplifiers, (b) for the  
MAX467/MAX468 Unity-Gain Amplifiers  
The MAX463–MAX470 phase margin and capacitive-  
load driving performance are optimized by internal  
compensation. When driving capacitive loads greater  
than 50pF, connect an isolation resistor between the  
amplifier output and the capacitive load, as shown in  
Figure 3.  
Drivin g Co a x ia l Ca b le  
Hig h-s p e e d p e rforma nc e , e xc e lle nt outp ut c urre nt  
capability, and an internally fixed gain of two make the  
MAX465/MAX466/MAX469/MAX470 ideal for driving  
50or 75b a c k-te rmina te d c oa xia l c a b le s . The  
MAX465/MAX466/MAX469/MAX470 will drive a 150Ω  
load (75back-terminated cable) to ±2.5V.  
The Typical Operating Circuit shows the MAX465/MAX466  
driving four back-terminated 75video cables. The  
back-termination resistor (at each amplifier output) pro-  
vides impedance matching at the driven end of the  
cable to eliminate signal reflections. It forms a voltage  
divider with the load impedance, which attenuates the  
signal at the cable output by one-half. The amplifier  
operates with an internal 2V/V closed-loop gain to pro-  
vide unity gain at the cables output.  
A = 1  
V
12Ω  
100pF  
IN_  
OUT_  
Drivin g Ca p a c it ive Lo a d s  
Driving large capacitive loads increases the likelihood  
of oscillation in most amplifier circuits. This is especially  
true for circuits with high loop-gains, like voltage follow-  
ers. The amplifiers output impedance and the capaci-  
tive load form an RC filter that adds a pole to the loop  
response. If the pole frequency is low enough, as  
when driving a large capacitive load, the circuit phase  
margin is degraded and oscillation may occur.  
MAX468  
Figure 3a. Using an Isolation Resistor with a Capacitive Load  
_______________________________________________________________________________________  
9
Tw o -Ch a n n e l, Trip le /Qu a d  
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MAX468 (WITH ISOLATION RESISTOR)  
MAX468 (NO ISOLATION RESISTOR)  
A
B
A
B
GND  
GND  
GND  
GND  
1µs/div  
= 12Ω  
1µs/div  
C
= 100pF  
LOAD  
C
= 100pF, R  
ISOLATION  
LOAD  
A: V , 500mV/div  
IN  
A: V , 500mV/div  
IN  
63–MAX470  
B: V , 500mV/div  
OUT  
B: V , 500mV/div  
OUT  
Figure 3b. Step Response without an Isolation Resistor  
Figure 3c. Step Response with an Isolation Resistor  
disabled MAX463/MAX464 outputs exhibit a 250kΩ  
typical resistance. Because their internal feedback  
resistors are required to produce a gain of two, the  
MAX465/MAX466 exhibit a 1kdisabled output resis-  
tance.  
Dig it a l In t e rfa c e  
The MAX463–MAX466 multiplexer architecture provides  
an input transistor buffer, ensuring that no input chan-  
nels are ever connected together. Select a channel by  
changing A0's state (A0 = 0 for channel A, and A0 = 1  
for channel B) and pulsing CS low (see Tables 1a, 1b).  
—–  
—–  
—–  
LE determines whether EN is latched by CS or operates  
independently. When the latch-enable input (LE) is con-  
Figure 4 shows the logic timing diagram.  
—–  
—–  
—–  
nected to V+, CS becomes the latch control for the EN  
Output Disable (MAX463–MAX466)  
—–  
—–  
input register. If CS is low, both the EN and A0 registers  
When the enable input (EN) is driven to a TTL low state, it  
—–  
—–  
are transparent; once CS returns high, both registers  
enables the MAX463–MAX466 amplifier outputs. When EN  
are latched.  
is driven high, it disables the amplifier outputs. The  
tCS  
CS  
tH  
tSU  
A0  
tH  
tSU  
EN  
tON  
tOFF  
HIGH-Z  
OUTPUTS  
tSW  
LE = V+  
tPD  
Figure 4. Logic Timing Diagram  
10 ______________________________________________________________________________________  
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63–MAX470  
Table 1a. Amplifier and Channel Selection  
with LE = V+  
Table 1b. Amplifier and Channel Selection  
with LE = GND  
—–  
—–  
—–  
—–  
EN  
CS  
EN  
A0  
FUNCTION  
CS  
A0  
FUNCTION  
Enables amplifier outputs.  
Selects channel A.  
Enables amplifier outputs.  
Selects channel A.  
0
0
0
0
0
0
0
0
0
1
1
0
Enables amplifier outputs.  
Selects channel B.  
Enables amplifier outputs.  
Selects channel B.  
0
0
1
0
1
1
0
1
Disables amplifiers. Outputs high-Z.  
A0 register = channel A  
1
X
X
Disables amplifiers. Outputs high-Z.  
Latches all input registers.  
Changes nothing.  
Disables amplifiers. Outputs high-Z.  
A0 register = channel B  
X
Enables amplifier outputs, latches A0  
register, programs outputs to output A  
1
1
0
1
X
X
or B, according to the setting of A0 at  
—–  
CS's last edge.  
Disables amplifiers. Outputs high-Z.  
—–  
When LE is connected to ground, the EN register is  
Another option for output disable is to connect LE to V+,  
—–  
transparent and independent of CS activity. This allows  
all MAX463–MAX466 devices to be simultaneously shut  
parallel the outputs of several MAX463-MAX466s, and use  
—–  
EN to individually disable all devices but the one in use  
—–  
down, regardless of the CS input state. Simply connect  
—–  
(Figure 5b).  
LE to ground and connect all EN inputs together (Figure  
When the outputs are disabled, the off isolation from  
the analog inputs to the amplifier outputs is typically  
5a). For the MAX464 and MAX466, LE must be hard-  
wired to either V+ or ground (rather than driving LE with  
a gate) to prevent crosstalk from the digital inputs to  
IN0A.  
70dB at 10MHz, all inputs driven with a 4V  
sine  
P-P  
wave and a 150load impedance. Figure 6 shows the  
test circuits used to measure isolation and crosstalk.  
EN  
MAX463–  
MAX466  
AO  
MAX463–  
MAX466  
LE  
CS  
+5V  
LE  
SHUTDOWN  
EN  
EN  
AO  
MAX463–  
LE MAX466  
MAX463–  
MAX466  
CS  
+5V  
LE  
EN  
NOTE: ISOLATION RESISTORS,  
(a)  
(b)  
IF REQUIRED, NOT SHOWN.  
–  
–  
Figure 5. (a) Simultaneous Shutdown of all MAX463–MAX466, (b) Enable (EN) Register Latched by CS  
______________________________________________________________________________________ 11  
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MAX467–MAX470  
MAX467–MAX470  
150Ω  
150Ω  
75Ω  
75Ω  
V
IN  
= 4V  
P-P  
AT 10MHz,  
R = 75Ω  
S
63–MAX470  
*
*
V
IN  
= 4V  
P-P  
AT 10MHz,  
R = 75Ω  
S
(a)  
(b)  
MAX463–MAX466  
MAX463–MAX466  
75Ω  
150Ω  
150Ω  
150Ω  
150Ω  
150Ω  
150Ω  
150Ω  
150Ω  
*
*
LE  
EN  
+5V  
V
IN  
= 4V AT 10MHz,  
P-P  
V
= 4V AT 10MHz,  
P-P  
IN  
R = 75Ω  
S
R = 75Ω  
S
(c)  
(d)  
* MAX464/MAX466/MAX468/MAX470 ONLY  
Figure 6. (a) MAX467–MAX470 Adjacent Channel Crosstalk, (b) MAX467–MAX470 All-Hostile Crosstalk, (c) MAX463–MAX466  
All-Hostile Off Isolation, (d) MAX463–MAX466 All-Hostile Crosstalk  
12 ______________________________________________________________________________________  
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63–MAX470  
75Ω  
28  
27  
26  
25  
24  
23  
IN0A  
1
2
3
4
5
6
GND  
IN1A  
LE  
EN  
A0  
+5V  
MAX470  
75Ω  
75Ω  
75Ω  
MAX464  
GND  
IN2A  
CS  
V–  
–5V  
OUT0 22  
1
2
IN0  
OUT0 16  
GND  
IN3A  
75Ω  
–5V  
75Ω  
75Ω  
21  
V–  
15  
GND  
IN1  
GND  
7
8
V–  
OUT1 20  
3
OUT1 14  
–5V  
75Ω  
–5V  
IN0B  
75Ω  
75Ω  
19  
75Ω  
75Ω  
75Ω  
4
5
13  
V–  
GND  
9
–5V  
–5V  
V–  
–5V  
V–  
18  
12  
+5V  
V–  
V–  
V+  
–5V  
10  
IN1B  
OUT2 17  
6
7
IN2  
OUT2 11  
75Ω  
11  
12  
75Ω  
+5V  
75Ω  
GND  
IN2B  
16  
10  
GND  
IN3  
V+  
V+  
V+  
75Ω  
OUT3 15  
8
OUT3  
9
13  
GND  
75Ω  
75Ω  
14 IN3B  
75Ω  
75Ω  
28  
27  
26  
25  
24  
23  
IN0A  
1
GND  
LE  
EN  
A0  
+5V  
–5V  
2
3
4
5
6
IN1A  
75Ω  
75Ω  
75Ω  
MAX464  
GND  
IN2A  
CS  
V–  
OUT0 22  
GND  
IN3A  
75Ω  
–5V  
21  
V–  
7
8
V–  
OUT1 20  
–5V  
75Ω  
–5V  
IN0B  
75Ω  
19  
GND  
9
V–  
18  
+5V  
V+  
10  
IN1B  
OUT2 17  
75Ω  
75Ω  
75Ω  
11  
12  
75Ω  
+5V  
GND  
IN2B  
16  
V+  
OUT3 15  
13  
GND  
75Ω  
14 IN3B  
FROM OTHER  
MAX464s  
Figure 7. Higher-Order RGB + Sync Video Multiplexer  
______________________________________________________________________________________ 13  
Tw o -Ch a n n e l, Trip le /Qu a d  
RGB Vid e o S w it c h e s a n d Bu ffe rs  
A1  
A0  
CS  
75Ω  
28  
27  
26  
25  
24  
23  
IN0A  
1
2
3
4
5
6
GND  
IN1A  
LE  
EN  
A0  
+5V  
75Ω  
75Ω  
75Ω  
MAX466  
GND  
IN2A  
CS  
V–  
–5V  
OUT0 22  
GND  
IN3A  
22Ω  
–5V  
50Ω  
75Ω  
21  
V–  
7
8
V–  
OUT1 20  
–5V  
75Ω  
–5V  
IN0B  
22Ω  
50Ω  
50Ω  
50Ω  
19  
75Ω  
75Ω  
75Ω  
GND  
9
V–  
18  
63–MAX470  
+5V  
V+  
10  
IN1B  
OUT2 17  
75Ω  
11  
12  
22Ω  
+5V  
GND  
IN2B  
16  
V+  
75Ω  
OUT3 15  
13  
GND  
22Ω  
14 IN3B  
75Ω  
75Ω  
28  
27  
26  
25  
24  
23  
IN0A  
1
GND  
LE  
EN  
A0  
+5V  
–5V  
2
3
4
5
6
IN1A  
75Ω  
75Ω  
75Ω  
MAX466  
GND  
IN2A  
CS  
V–  
OUT0 22  
GND  
IN3A  
22Ω  
–5V  
21  
V–  
7
8
V–  
OUT1 20  
–5V  
75Ω  
–5V  
IN0B  
22Ω  
19  
GND  
9
V–  
18  
+5V  
V+  
10  
IN1B  
OUT2 17  
75Ω  
11  
12  
22Ω  
+5V  
GND  
IN2B  
16  
V+  
75Ω  
75Ω  
OUT3 15  
13  
GND  
22Ω  
14 IN3B  
Figure 8. 1-of-4 RGB + Sync Video Multiplexer  
14 ______________________________________________________________________________________  
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RGB Vid e o S w it c h e s a n d Bu ffe rs  
63–MAX470  
P a ra lle lin g MAX4 6 6 s t o S w it c h  
__________Ap p lic a t io n s In fo rm a t io n  
1 -o f-4 RGB + S yn c S ig n a l In p u t s  
Figure 8 shows a 1-of-4 RGB + sync video mux/amp  
circuit. The 1kdisabled output resistance limits the  
number of paralleled MAX465/MAX466s to no more  
than two. The amplifier outputs are connected after a  
22isolation resistor and ahead of a 50back-termi-  
nation resistor, which isolates the active amplifier out-  
put from the capacitive load (5pF typ) presented by the  
inactive output of the second MAX466. Impedance  
mismatching is minimal, and the signal gain at the  
cable end is near 1. This minimizes ringing in the out-  
put signals. For multiplexing more than two devices,  
s e e the s e c tion Hig he r Ord e r RGB + Sync Vid e o  
Multiplexing, above.  
Hig h e r-Ord e r RGB + S yn c  
Vid e o Mu lt ip le x in g  
Higher-order RGB video multiplexers can be realized  
by paralleling several MAX463/MAX464s. Connect LE  
—–  
—–  
to V+ and use CS and EN to disable all devices but the  
one in use. Since the disabled output resistance of the  
MAX463/MAX464 is 250k, several devices may be  
paralleled to form larger RGB video multiplexer arrays  
without signal degradation. Connect series resistors at  
each amplifier's output to isolate the disabled output  
c a p a c ita nc e of e a c h p a ra lle le d d e vic e , a nd us e a  
MAX469 or MAX470 to drive the output coaxial cables  
(see Figure 7).  
_____________________________________________P in Co n fig u ra t io n s (c o n t in u e d )  
TOP VIEW  
GND  
IN1A  
GND  
IN2A  
GND  
IN3A  
V-  
1
2
3
4
5
6
7
8
9
28 IN0A  
27 LE  
IN0  
GND  
IN1  
V-  
1
2
3
4
5
6
7
8
16 OUT0  
15 GND  
14 OUT1  
13 V-  
IN0  
GND  
IN1  
V-  
1
2
3
4
5
6
7
8
16 OUT0  
15 GND  
14 OUT1  
13 V-  
MAX464  
MAX466  
26 EN  
25 A0  
24 CS  
V-  
12 V-  
V-  
12 V-  
23 V-  
IN2  
GND  
GND  
11 OUT2  
10 V+  
IN2  
GND  
IN3  
11 OUT2  
10 V+  
22 OUT0  
21 V-  
IN0B  
V-  
9
GND  
9
OUT3  
20 OUT1  
19 GND  
18 V+  
DIP/SO  
DIP/SO  
IN1B 10  
GND 11  
IN2B 12  
GND 13  
IN3B 14  
MAX468  
MAX470  
QUAD  
17 OUT2  
16 V+  
MAX467  
MAX469  
TRIPLE (RGB)  
BUFFERS  
BUFFERS  
15 OUT3  
DIP/SO  
______________________________________________________________________________________ 15  
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RGB Vid e o S w it c h e s a n d Bu ffe rs  
__________Typ ic a l Op e ra t in g Circ u it  
_Ord e rin g In fo rm a t io n (c o n t in u e d )  
PART  
TEMP. RANGE  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
-40°C to +85°C  
-40°C to +85°C  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
-40°C to +85°C  
-40°C to +85°C  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
-40°C to +85°C  
-40°C to +85°C  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
-40°C to +85°C  
-40°C to +85°C  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
-40°C to +85°C  
-40°C to +85°C  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
-40°C to +85°C  
-40°C to +85°C  
0°C to +70°C  
0°C to +70°C  
0°C to +70°C  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
28 Narrow Plastic DIP  
28 Wide SO  
Dice*  
MAX464CNI  
MAX464CWI  
MAX464C/D  
MAX464ENI  
MAX464EWI  
MAX465CNG  
MAX465CWG  
MAX465C/D  
MAX465ENG  
MAX465EWG  
MAX466CNI  
MAX466CWI  
MAX466C/D  
MAX466ENI  
MAX466EWI  
MAX467CPE  
MAX467CWE  
MAX467C/D  
MAX467EPE  
MAX467EWE  
MAX468CPE  
MAX468CWE  
MAX468C/D  
MAX468EPE  
MAX468EWE  
MAX469CPE  
MAX469CWE  
MAX469C/D  
MAX469EPE  
MAX469EWE  
MAX470CPE  
MAX470CWE  
MAX470C/D  
MAX470EPE  
MAX470EWE  
+5V  
MAX465  
MAX466  
10µF  
0.1µF  
28 Narrow Plastic DIP  
28 Wide SO  
A
= 2  
V
IN0A  
75Ω  
75Ω  
OUT0  
OUT1  
OUT2  
OUT3  
24 Narrow Plastic DIP  
24 Wide SO  
Dice*  
IN0B  
75Ω  
A
V
= 2  
= 2  
= 2  
IN1A  
IN1B  
24 Narrow Plastic DIP  
24 Wide SO  
28 Narrow Plastic DIP  
28 Wide SO  
Dice*  
75Ω  
75Ω  
A
V
IN2A  
IN2B  
75Ω  
75Ω  
63–MAX470  
28 Narrow Plastic DIP  
28 Wide SO  
A
V
IN3A  
IN3B  
A0  
16 Plastic DIP  
16 Wide SO  
Dice*  
75Ω  
LOGIC  
16 Plastic DIP  
16 Wide SO  
16 Plastic DIP  
16 Wide SO  
Dice*  
-5V  
MAX466  
ONLY  
10µF  
0.1µF  
16 Plastic DIP  
16 Wide SO  
16 Plastic DIP  
16 Wide SO  
Dice*  
16 Plastic DIP  
16 Wide SO  
16 Plastic DIP  
16 Wide SO  
Dice*  
16 Plastic DIP  
16 Wide SO  
* Dice are specified at T = +25°C, DC parameters only.  
A
16 ______________________________________________________________________________________  

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