MAX4821 [MAXIM]
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface; + 3.3V / + 5V ， 8通道，串行/并行接口可级联的继电器驱动器
| 型号： | MAX4821 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | +3.3V/+5V, 8-Channel, Cascadable Relay Drivers with Serial/Parallel Interface |
| 文件： | 总13页 (文件大小：343K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2751; Rev 0; 1/03
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
General Description
Features
The MAX4820/MAX4821 8-channel relay drivers offer
built-in kickback protection and drive +3.3V/+5V non-
latching or dual-coil-latching relays. These devices are
especially useful when driving +3V relays. Each inde-
pendent open-drain output features a 2Ω on-resistance
and is guaranteed to sink 70mA (min) of load current.
Both devices consume less than 50µA (max) quiescent
current and have 1µA output off-leakage current.
ꢀ 8 Independent Output Channels
ꢀ Built-In Inductive Kickback Protection
ꢀ Drive +3V and +5V Relays
ꢀ Guaranteed 70mA (min) Coil Drive Current
ꢀ SET Function to Turn On All Outputs
Simultaneously
The MAX4820 features an SPI™-/QSPI™-/MICROWIRE™-
compatible serial interface. Input data is shifted into an 8-
bit shift register and latched to the outputs when CS
transitions from low to high. Each data bit in the shift reg-
ister corresponds to a specific output, allowing indepen-
dent control of all outputs.
ꢀ RESET Function to Turn Off All Outputs
Simultaneously
ꢀ SPI-/QSPI-/MICROWIRE-Compatible Serial
Interface (MAX4820)
ꢀ Serial Digital Output for Daisy Chaining
The MAX4821 features a 4-bit (A0, A1, A2, LVL) paral-
lel-input interface. The first three bits (A0, A1, A2) deter-
mine the output address, and the fourth bit (LVL)
determines whether the selected output is switched on
or off. Data is latched to the outputs when CS transi-
tions from low to high.
(MAX4820)
ꢀ Parallel Interface (MAX4821)
ꢀ Low 50µA (max) Quiescent Supply Current
ꢀ Space-Saving 20-Pin Thin QFN Package
Both devices feature separate set and reset functions
that allow the user to turn on or turn off all outputs simul-
taneously with a single control line. Built-in hysteresis
(Schmidt trigger) on all digital inputs allows this device
to be used with slow rising and falling signals, such as
those from optocouplers or RC power-up initialization
circuits. The MAX4820/MAX4821 are available in 20-pin
TSSOP and space-saving 20-pin thin QFN packages.
Ordering Information
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
20 Thin QFN-EP
20 TSSOP
MAX4820ETP*
MAX4820EUP*
MAX4821ETP*
MAX4821EUP*
20 Thin QFN-EP
20 TSSOP
Applications
Central Office
*For maximum heat dissipation, packages have an exposed pad
(EP) on the bottom. Solder exposed pad to GND.
ATE
Pin Configurations
DSL, ADSL Line Cards
Industrial Equipment
E1/T1 Redundancy
TOP VIEW
RESET
CS
1
2
3
4
5
15 OUT3
14 OUT4
13 COM
12 OUT5
Pin Configurations continued at end of data sheet.
DIN
MAX4820
Typical Application Circuits and Functional Diagrams
appear at end of data sheet.
SCLK
DOUT
11
OUT6
SPI and QSPI are trademarks of Motorola, Inc.
THIN QFN
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.)
Continuous Power Dissipation (T = +70°C)
A
V
, COM..............................................................-0.3V to +6.0V
20-Lead Thin QFN
(derate 16.9mW/°C above +70°C).................................1350mW
CC
OUT_........................................................-0.3V to (V
+ 0.3V)
COM
CS, SCLK, DIN, SET, RESET, A0, A1, A2, LVL......-0.3V to +6.0V
θ
.........................................................................59.3°C/W
20-Pin TSSOP
JA
DOUT..........................................................-0.3V to (V + 0.3V)
CC
Continuous OUT_ Current (all outputs turned on) ............150mA
Continuous OUT_ Current (single output turned on) ........300mA
(derate 21.7mW/°C above +70°C).................................1739mW
θ
JA
............................................................................46°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Soldering Temperature (10s)...........................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= +3V to +5.5V, V = V , T = -40°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
COM CC A A
CC
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
5.5
50
UNITS
Operating Voltage
V
2.3
V
CC
V
V
= 3.6V
= 5.5V
15
20
CC
CC
I
_ = 0,
OUT
Quiescent Current
I
µA
Q
logic inputs = 0 or V
CC
70
Thermal Shutdown
160
1.5
140
°C
V
Power-On Reset
0.8
2.2
Power-On Reset Hysteresis
mV
DIGITAL INPUTS (SCLK, DIN, CS, LVL, A0, A1, A2, RESET, SET)
V
V
V
V
= 3.3V
= 5V
2.0
2.4
CC
CC
CC
CC
Input Logic High Voltage
Input Logic Low Voltage
V
V
V
IH
= 3.3V
= 5V
0.6
0.8
V
IL
Input Logic Hysteresis
Input Leakage Currents
V
150
0.01
5
mV
µA
pF
HYST
I
Input voltages = 0 or 5.5V
-1.0
+1.0
0.4
LEAK
C
Input Capacitance
C
IN
IN
DIGITAL OUTPUT (DOUT)
DOUT Low Voltage
V
I
I
= 6mA
V
V
OL
SINK
DOUT High Voltage
V
= 0.5mA
V
- 0.5
CC
OH
SOURCE
RELAY OUTPUT DRIVERS (OUT1–OUT8)
V
V
V
V
V
= 2.7V
70
CC
CC
CC
CC
OUT
OUT_ Drive Current
mA
= 4.5V
= 2.7V
= 3.0V, I
70
OUT_ On-Resistance
OUT_ Voltage
R
2
6
Ω
V
ON
V
_
_ = 70mA
OUT
0.4
+1
OUT
I
Off-Leakage Current
I
_ = V , all outputs off
-1
µA
OUT
LEAK
CC
Kickback Diode Forward Voltage
V
I
_ = 150mA (Note 2)
OUT
1.5
V
FORW
2
_______________________________________________________________________________________
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
ELECTRICAL CHARACTERISTICS (continued)
(V
= +3V to +5.5V, V
= V , T = -40°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
CC
COM
CC
A
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SPI TIMING (MAX4821)
From rising edge of CS, R = 50Ω,
C = 50pF
L
L
Turn-On Time (OUT_)
t
1.0
µs
µs
ON
From rising edge of CS, R = 50Ω,
L
Turn-Off Time (OUT_)
t
1.0
2.1
OFF
C = 50pF
L
SCLK Frequency
Cycle Time
f
0
MHz
ns
SCLK
t
+ t
480
240
240
190
190
100
0
CH
CL
CS Fall to SCLK Rise Setup
CS Rise to SCLK Hold
SCLK High Time
SCLK Low Time
t
ns
CSS
CSH
t
ns
t
ns
CH
t
ns
CL
DS
DH
Data Setup Time
Data Hold Time
t
ns
t
ns
50% of SCLK to 10% of DOUT,
C = 50pF
L
SCLK Fall to DOUT Valid
t
85
120
2
ns
µs
µs
DO
Rise Time (DIN, SCLK, CS, SET,
RESET)
t
20% of V
20% of V
to 70% of V , C = 50pF
CC L
SCR
CC
CC
Fall Time (DIN, SCLK, CS,
RESET, SET)
t
to 70% of V , C = 50pF
2
SCF
CC
L
RESET Min Pulse Width
SET Min Pulse Width
t
70
70
ns
ns
RW
t
SW
PARALLEL TIMING (MAX4820)
From rising edge of CS, R = 50Ω,
C = 50pF
L
L
Turn-On Time
Turn-Off Time
t
1
1
µs
µs
ON
From rising edge of CS, R = 50Ω,
L
t
OFF
C = 50pF
L
LVL Setup Time
t
100
0
ns
ns
ns
ns
µs
µs
ns
ns
LS
LH
AH
LVL Hold Time
t
Address to CS Setup Time
Address to CS Hold Time
Rise Time (A2, A1, A0, LVL)
Fall Time (A2, A1, A0, LVL)
RESET Pulse Width
t
100
0
t
AS
t
20% of V
20% of V
to 70% of V , C = 50pF
2
2
SCR
CC
CC
CC
L
t
to 70% of V , C = 50pF
CC L
SCF
t
70
70
RW
SW
SET Pulse Width
t
Note 1: Specifications at -40°C are guaranteed by design and not production tested.
Note 2: After relay turn-off, inductive kickback may momentarily cause the voltage at OUT_ to exceed V
. This is considered part
COM
of normal operation and will not damage the device.
_______________________________________________________________________________________
3
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
Typical Operating Characteristics
(V
= V , T = -40°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
CC A A
COM
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SUPPLY CURRENT
vs. INPUT LOGIC VOLTAGE
SUPPLY CURRENT
vs. TEMPERATURE
25
20
15
10
5
1000
900
800
700
600
500
400
300
200
100
0
25
20
15
10
5
V
= 5.5V
ALL LOGIC INPUTS = 0
CC
ALL LOGIC INPUTS
CONNECTED
V
= 5V
CC
V
= 5V
CC
V
= 3.3V
CC
V
= 3.3V
CC
V
= 2.3V
CC
0
0
2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
SUPPLY VOLTAGE (V)
0
1
2
3
4
5
-40
-15
10
35
60
85
INPUT LOGIC VOLTAGE (V)
TEMPERATURE (°C)
POWER-ON RESET VOLTAGE
vs. TEMPERATURE
ON-RESISTANCE
vs. SUPPLY VOLTAGE
ON-RESISTANCE
vs. TEMPERATURE
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
3.0
2.5
2.0
1.5
1.0
0.5
0
3.0
2.5
2.0
1.5
1.0
0.5
0
I
= 70mA
I
= 70mA
OUT_SINK
OUT_SINK
V
= 3.3V
CC
V
= 2.3V
CC
V
= 5V
35
CC
V
= 5.5V
CC
-40
-15
10
35
60
85
2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
SUPPLY VOLTAGE (V)
-40
-15
10
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
OUTPUT OFF-LEAKAGE CURRENT
vs. SUPPLY VOLTAGE
OUT_ TURN-ON/TURN-OFF DELAY TIMES
vs. SUPPLY VOLTAGE
OUTPUT OFF-LEAKAGE CURRENT
vs. TEMPERATURE
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
80
70
60
50
40
30
20
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
R = 50Ω
L
L
C = 50pF
V
= 5.5V
CC
t
OFF
V
CC
= 5V
V
= 2.3V
60
CC
t
ON
V
= 3.3V
35
CC
2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
SUPPLY VOLTAGE (V)
2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
SUPPLY VOLTAGE (V)
-40
-15
10
85
TEMPERATURE (°C)
4
_______________________________________________________________________________________
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
Typical Operating Characteristics (continued)
(V
= V , T = -40°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
CC A A
COM
INPUT LOGIC THRESHOLD
vs. SUPPLY VOLTAGE
BACK EMF CLAMPING
WITH STANDARD 3V RELAY
MAX4820 toc11
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
V
CS
5V/div
0
OUT_
1V/div
OUT_ TURNS OFF
0
V
= 3.3V
CC
2.3 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
SUPPLY VOLTAGE (V)
200µs/div
Pin Description
PIN
MAX4820
MAX4821
NAME
FUNCTION
THIN
THIN
QFN
TSSOP
TSSOP
QFN
Reset Input. Drive RESET low to clear all latches and registers (all outputs
are turned off). RESET overrides all other inputs. If RESET and SET are pulled
low at the same time, then RESET takes precedence.
1
3
1
2
3
RESET
CS
Chip-Select Input.
MAX4820: Drive CS low to select the device. When CS is low, data at DIN is
clocked into the 8-bit shift register on SCLK’s rising edge. Drive CS from low
to high to latch the data to the registers and activate the appropriate relays.
MAX4821: Drive CS low to select the device and set level on LVL. Drive CS
from low to high to latch the address and level data to the output.
2
4
4
3
4
5
6
—
—
—
—
DIN
Serial Data Input
Serial Clock Input
SCLK
Serial Data Output. DOUT is the output of the 8-bit shift register. This output
5
7
—
—
DOUT can be used to daisy chain multiple MAX4820s. The data at DOUT appears
synchronous to SCLK’s falling edge.
6
7
8
9
—
—
N.C.
No Connection
Ground
7
9
GND
Open-Drain Output 8. Connect OUT8 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
8
9
10
11
8
9
10
11
OUT8
OUT7
PGND
OUT6
Open-Drain Output 7. Connect OUT7 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
Power Ground. PGND is a return for the output sinks. Connect PGND pins
together and to GND.
10, 16
11
12, 18
13
10, 16
11
12, 18
13
Open-Drain Output 6. Connect OUT6 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
_______________________________________________________________________________________
5
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
Pin Description (continued)
PIN
MAX4820
MAX4821
NAME
FUNCTION
THIN
THIN
TSSOP
TSSOP
QFN
QFN
Open-Drain Output 5. Connect OUT5 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
12
14
12
14
OUT5
COM
Common Free-Wheeling Diodes. Connect COM to V . COM can also be
CC
connected to a separate supply that is higher than V . In that case, bypass
CC
13
15
13
15
V
to GND with a 0.1µF capacitor.
CC
Open-Drain Output 4. Connect OUT4 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
14
15
17
16
17
19
14
15
17
16
17
19
OUT4
OUT3
OUT2
OUT1
Open-Drain Output 3. Connect OUT3 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
Open-Drain Output 2. Connect OUT2 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
Open-Drain Output 1. Connect OUT1 to the low side of a relay coil. This
output is pulled to PGND when activated, but otherwise is high impedance.
18
19
20
1
18
19
20
1
V
Input Supply Voltage. Bypass V
to GND with a 0.1µF capacitor.
CC
CC
Set Input. Drive SET low to set all latches and registers high (all outputs are
turned on). SET overrides all parallel and serial control inputs. RESET
overrides SET under all conditions.
20
2
20
3
2
5
SET
Level Input. LVL determines whether the selected address is switched on or
off. A logic high on LVL switches on the addressed output. A logic low on
LVL switches off the addressed output.
—
—
LVL
—
—
—
—
—
—
—
—
4
5
6
7
A0
A1
A2
EP
Digital Address “0” Input. (See Table 2 for address mapping.)
Digital Address “1” Input. (See Table 2 for address mapping.)
Digital Address “2” Input. (See Table 2 for address mapping.)
Exposed Pad. Solder exposed pad to GND.
6
8
—
—
The MAX4821 features a 4-bit (A0, A1, A2, LVL) parallel
Detailed Description
input interface. The three bits (A0, A1, A2) determine
the output address, and LVL determines whether the
selected output is switched on or off. Data is latched to
the outputs when CS transitions from low to high.
The MAX4820/MAX4821 8-channel relay drivers offer
built-in kickback protection and drive +3.3V/+5V non-
latching or dual-coil-latching relays. These devices are
especially useful when driving +3V relays. Each inde-
pendent open-drain output features a 2Ω on-resistance
and is guaranteed to sink 70mA (min) load current. Both
devices consume less than 50µA (max) quiescent cur-
rent and feature 1µA (min) output off-leakage current.
Both devices feature separate set and reset functions
that allow the user to turn on or turn off all outputs
simultaneously with a single control line. Built-in hys-
teresis (Schmidt trigger) on all digital inputs allows this
device to be used with slow rising and falling signals,
such as those from optocouplers or RC power-up ini-
tialization circuits. The MAX4820/MAX4821 are avail-
able in 20-pin TSSOP and space-saving 20-pin thin
QFN packages.
The MAX4820 features an SPI/QSPI/MICROWIRE-com-
patible serial interface. Input data is shifted into an 8-bit
shift register and latched to the outputs when CS transi-
tions from low to high. Each data bit in the shift register
corresponds to a specific output, allowing independent
control of all outputs.
6
_______________________________________________________________________________________
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
CS
t
CSW
t
t
CSO
CSH
t
t
t
CH
CL
CSS
SCLK
t
DH
t
DS
D0
DIN
D7
D6
D1
t
DO
DOUT
OUT_
t
,
ON
t
OFF
Figure 1. 3-Wire Serial-Interface Timing Diagram (MAX4820 only)
Table 1. Serial Input Address Map (MAX4820 Only)
DIN
D0
D1
D2
D3
D4
D5
OUT6
D6
OUT7
D7
OUT8
OUT_
OUT1
OUT2
OUT3
OUT4
OUT5
Digital Interface
Serial Interface (MAX4820)
If the number of data bits entered while CS is low is
greater or less than 8, the shift register contains only
the last 8 data bits, regardless of when they were
entered.
The serial interface consists of an 8-bit shift register
and parallel latch controlled by SCLK and CS. The
input to the shift register is an 8-bit word. Each data bit
controls one of the eight outputs, with the most signifi-
cant bit (D7) corresponding to OUT8 and the least sig-
nificant bit (D0) corresponding to OUT1 (see Table 1).
When CS is low (device is selected), data at DIN is
clocked into the shift register synchronously with
SCLK’s rising edge. Driving CS from low to high latches
the data in the shift register to the parallel latch.
The 3-wire serial interface is compatible with SPI, QSPI,
and MICROWIRE standards. The latch that drives the
analog switch is updated on the rising edge of CS,
regardless of SCLK’s state.
Parallel Interface (MAX4821)
The parallel interface consists of three address bits
(A0, A1, A2) and one level selector bit (LVL). The
address bits determine which output is updated, and
the level bit determines whether the addressed output
is switched on (LVL = high) or off (LVL = low). When CS
is high, the address and level bits have no effect on the
state of the outputs. Driving CS from low to high latches
the address and level data to the parallel register and
updates the state of the outputs. Address data entered
after CS is pulled low is not reflected in the state of the
outputs following the next low-to-high transition on CS
(Figure 2).
DOUT is the output of the shift register. Data appears
on DOUT synchronously with SCLK’s falling edge and
is identical to the data at DIN delayed by eight clock
cycles. When shifting the input data, D7 is the first bit in
and out of the shift register.
While CS is low, the switches always remain in their pre-
vious state. Drive CS high after 8 bits of data have been
shifted in to update the output state and inhibit further
data from entering the shift register. When CS is high,
transitions at DIN and SCLK have no effect on the out-
put, and the first input bit (D7) is present at DOUT.
_______________________________________________________________________________________
7
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
Table 2. Parallel Interface Address Map
(MAX4821 Only)
CS
A2
A1
A0
OUTPUT
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
Low
Low
Low
Low
High
High
High
High
Low
Low
High
High
Low
Low
High
High
Low
High
Low
High
Low
High
Low
High
t
t
AH
AS
A_
t
LH
t
LS
LVL
Applications Information
t
,
ON
Daisy Chaining
t
OFF
The MAX4820 features a digital output, DOUT, that pro-
vides a simple way to daisy chain multiple devices. This
feature allows the user to drive large banks of relays
using only a single serial interface. To daisy chain multi-
ple devices, connect all CS pins together, and connect
the DOUT of one device to the DIN of another device
(see Figure 3). During operation, a stream of serial data
is shifted through all the MAX4820s in series. When CS
goes high, all outputs update simultaneously.
V
OUT
Figure 2. Parallel Interface Timing Diagram (MAX4821 only)
SET/RESET Functions
The MAX4820/MAX4821 feature set and reset inputs that
allow the user to simultaneously turn all outputs on or off
using a single control line. Drive SET low to set all latch-
es and registers to 1 and turn all outputs on. SET over-
rides all serial/parallel control inputs. Drive RESET low to
clear all latches and registers and turn all outputs off.
RESET overrides all other inputs, including SET.
The MAX4820 can also be used in a slave configuration
that allows the user to address individual devices.
Connect all the DIN pins together, and use the CS input
to address one device at a time. Drive CS low to select
a slave and input the data into the shift register. Drive
CS high to latch the data and turn on the appropriate
outputs. Typically, in this configuration only one slave is
addressed at a time.
V
V
V
V
CC
CC
CC
CC
0.1µF
0.1µF
0.1µF
V
V
CC
CC
DIN
DIN
DOUT
OUT1
DIN
DOUT
OUT1
DIN
DOUT
OUT1
MAX4820
MAX4820
MAX4820
SCLK
SCLK
SCLK
SCLK
CS
SCLK
CS
SCLK
CS
OUT8
PGND
OUT8
PGND
OUT8
PGND
GND
GND
GND
CS
Figure 3. Daisy-Chain Configuration
_______________________________________________________________________________________
8
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
flow back to the supply. Connect the common cathode
(COM) of the internal protection diodes to V
Inductive Kickback Protection
The MAX4820/MAX4821 feature built-in inductive kick-
back protection to reduce the voltage spike on OUT_
generated by a relay’s coil inductance when the output
is suddenly switched off. Internal diodes connected
from each output to COM allow the inductor current to
.
CC
COM also can be connected to a higher voltage than
V
(+6V max) for faster kickback recovery. In this con-
CC
figuration, bypass COM to PGND with a 0.1µF capacitor.
Relay Manufacturers
COMPANY
PHONE
WEBSITE
COMPANY
Aromat Corp.
CP Clare Corp.
PHONE
WEBSITE
NEC Electronics,
Inc.
310-524-9862 www.aromat.com
978-524-6700 www.crouzet.com
800-366-9782 www.nec-global.com
847-843-7900 www.oeiweb.omron.com
414-382-2000 www.ab.com
Omron
Electronics, Inc.
Coto Techonology 401-943-2686 www.cotorelay.com
Deustch Relays,
516-499-6000 www.deutschrelays.com
Inc.
Rockwell/Allen-
Bradley
Fujitsu
408-745-4900 www.fujitsufta.com
Takamisawa
Siemens
Electromechanical 770-371-3000 www.sec.siemens.com
Component, Inc.
Hella KG Hueck
734-414-0970 www.hella.com
Teledyne Relays
213-777-0077 www.teledynerelays.com
Typical Application Circuits
V
V
V
CC
CC
0.1µF
0.1µF
RELAY
COIL 1
RELAY
COIL 1
COM
OUT1
V
COM
OUT1
CC
CC
RESET
RESET
SET
A0
SET
MAX4820
V
MAX4821
V
CC
CC
CLK
CS
A1
A2
RELAY
COIL 8
RELAY
COIL 8
DIN
CS
LVL
DOUT
OUT8
PGND
OUT8
PGND
GND
GND
_______________________________________________________________________________________
9
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
Functional Diagrams
COM
V
CC
MAX4820
OUT1
RESET
SET
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
DIN
DOUT
SCLK
PARALLEL
REGISTER
8-BIT
SHIFT
REGISTER
OUT8
CS
PGND
GND
COM
V
CC
MAX4821
OUT1
RESET
SET
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
LVL
A2
PARALLEL
LATCH
4-TO-8
DECODER
A1
OUT8
A0
CS
PGND
GND
10 ______________________________________________________________________________________
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
Pin Configurations (continued)
TOP VIEW
RESET
CS
1
2
3
4
5
15 OUT3
14 OUT4
13 COM
12 OUT5
LVL
A0
MAX4821
11
OUT6
A1
THIN QFN
V
1
2
3
4
5
6
7
8
9
20 OUT1
19 OUT2
18 PGND
17 OUT3
16 OUT4
15 COM
V
1
2
3
4
5
6
7
8
9
20 OUT1
19 OUT2
18 PGND
17 OUT3
16 OUT4
15 COM
CC
CC
SET
SET
RESET
CS
RESET
CS
MAX4821
MAX4820
LVL
A0
DIN
SCLK
DOUT
N.C.
A1
14
14
OUT5
OUT5
A2
13 OUT6
12 PGND
11 OUT7
13 OUT6
12 PGND
11 OUT7
GND
GND
OUT8 10
OUT8 10
TSSOP
TSSOP
Chip Information
TRANSISTOR COUNT: 1301
PROCESS: BiCMOS
______________________________________________________________________________________ 11
+3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE
12,16,20,24L QFN THIN, 4x4x0.8 mm
21-0139
A
PACKAGE OUTLINE
12,16,20,24L QFN THIN, 4x4x0.8 mm
21-0139
A
12 ______________________________________________________________________________________
3.3V/+5V, 8-Channel, Cascadable Relay Drivers
with Serial/Parallel Interface
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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