MAX4846EYT+T [MAXIM]
Overvoltage Protection Controllers with Low Standby Current;
| 型号： | MAX4846EYT+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Overvoltage Protection Controllers with Low Standby Current |
| 文件： | 总10页 (文件大小：198K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-3649; Rev 5; 12/09
Overvoltage Protection Controllers with
Low Standby Current
3–MAX846
General Description
Features
The MAX4843–MAX4846 overvoltage protection con-
trollers protect low-voltage systems against high-voltage
faults of up to 28V. When the input voltage exceeds the
overvoltage threshold, these devices turn off a low-cost,
external n-channel FET(s) to prevent damage to the pro-
tected components. An internal charge pump eliminates
the need for external capacitors and drives the FET gate
for a simple, robust solution.
♦ Overvoltage Protection Up to 28V
♦ Preset 7.4V, 6.35V, 5.8V, or 4.65V Overvoltage Trip
Level
♦ Low (10µA) Undervoltage Lockout Standby
Current
♦ Drives Low-Cost nMOSFET
♦ Internal 50ms Startup Delay
♦ Internal Charge Pump
The overvoltage trip level is set to 7.4V (MAX4843),
6.35V (MAX4844), 5.8V (MAX4845), or 4.65V
(MAX4846). When the input voltage drops below the
undervoltage lockout (UVLO) threshold, the devices
enter a low standby current mode (10µA). The
MAX4843/MAX4844/MAX4845 have a UVLO threshold
of 4.15V, the MAX4845C/MAX4845D have a UVLO
threshold of 2.2V, and the MAX4846 has a UVLO
threshold of 2.5V. In addition to the single FET configu-
ration, the devices can be configured with back-to-
back external FETs to prevent currents from being
back-driven into the adapter.
♦ Overvoltage Fault FLAG Indicator
♦ 6-Pin (1.5mm x 1.0mm) µDFN Package
Ordering Information
PIN-
PACKAGE
UVLO OVLO
(V)
TOP
MARK
PART
(V)
MAX4843ELT
MAX4844ELT
MAX4845ELT
MAX4845EYT+T
6 μDFN
6 μDFN
6 μDFN
6 UTLGA
4.15
4.15
4.15
4.15
2.20
2.20
2.50
2.50
7.40
6.35
5.80
5.80†
5.80†
5.80
4.65
4.65
BE
BF
An additional feature includes a 15kV EꢀD-protected
input when bypassed with a 1µF capacitor to ground.
All devices are offered in small 6-pin µDFN (1.5mm x
1.0mm) and 6-pin ultra-thin LGA (MAX4845 and
MAX4846 only) (1.5mm x 1.0mm) packages and are
specified for operation over the -40°C to +85°C temper-
ature range.
BG
AC
AP
AQ
BH
AD
MAX4845CEYT+T 6 UTLGA
MAX4845DEYT+T 6 UTLGA
MAX4846ELT
6 μDFN
MAX4846EYT+T
6 UTLGA
Applications
Note: All devices are specified over the -40°C to +85°C tem-
perature range.
Cell Phones
+Denotes a lead(Pb)-free/RoHꢀ-compliant package.
T = Tape and reel.
†OVLO maximum is 6.0V for the MAX4845C and 5.9V for the
MAX4845D.
Digital ꢀtill Cameras
PDAs and Palmtop Devices
MP3 Players
Typical Operating Circuit
Pin Configurations
INPUT
+1.2V TO +28V
TOP VIEW
OUTPUT
N
N.C.
6
N.C.
5
GATE
4
N.C.
6
N.C.
5
GATE
4
1
2
4
3
IN
GATE
MAX4843–
MAX4846
MAX4845
MAX4846
1μF
V
IO
MAX4843–
MAX4846
1
2
3
1
2
3
GND
GND
IN
FLAG
IN
FLAG
GND
FLAG
μDFN
ULTRA-THIN LGA
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Overvoltage Protection Controllers with
Low Standby Current
ABSOLUTE MAXIMUM RATINGS
IN to GND ..............................................................-0.3V to +30V
GATE to GND ........................................................-0.3V to +12V
FLAG to GND ..........................................................-0.3V to +6V
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature .................................................... +150°C
ꢀtorage Temperature Range ............................-65°C to +150°C
ꢀoldering Temperature (reflow)
Continuous Power Dissipation (T = +70°C)
A
6-Pin µDFN (derate 2.1mW/°C above +70°C) .........167.7mW
6-Pin Ultra-Thin LGA (derate 2.1mW/°C
6-Pin µDFN...................................................................+240°C
6-Pin Ultra-Thin LGA ....................................................+260°C
above +70°C) ...........................................................170.2mW
ꢀtresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = +5V for MAX4843/MAX4844/MAX4845, V = +4V for MAX4846, C
= 500pF, T = -40°C to +85°C, unless otherwise
A
IN
IN
GATE
noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
1.2
3.9
1.8
2.3
TYP
MAX
28.0
4.4
UNITS
Input Voltage Range
V
V
IN
3–MAX846
MAX4843/MAX4844/MAX4845
MAX4845C/MAX4845D
MAX4846
4.15
2.2
2.5
41
Undervoltage Lockout Threshold
UVLO
V
falling
V
2.5
IN
2.7
MAX4843/MAX4844/MAX4845
MAX4846
Undervoltage Lockout
Hysteresis
mV
25
MAX4843
7.0
6.0
5.5
5.5
5.5
4.35
7.4
6.35
5.8
5.8
5.8
4.65
75
7.8
6.7
6.1
6.0
5.9
4.95
MAX4844
MAX4845
Overvoltage Trip Level
OVLO
V
rising
V
IN
MAX4845C
MAX4845D
MAX4846
MAX4843
MAX4844
MAX4845
MAX4846
65
Overvoltage Lockout Hysteresis
mV
55
50
MAX4843/MAX4844/MAX4845
MAX4846
70
120
110
22
IN Supply Current
UVLO Supply Current
Gate Voltage
I
μA
μA
V
IN
60
V
V
= 3.8V MAX4843/MAX4844/MAX4845
= 2.2V MAX4846
10
IN
IN
I
UVLO
8
18
MAX4843/MAX4844/MAX4845
9
9.83
7.85
27
10
V
1μA load
GATE
MAX4846
7.5
10
8.0
GATE Pulldown Current
FLAG Output Low Voltage
FLAG Leakage Current
I
V
> OVLO, V
= 5.5V
mA
V
PD
IN
GATE
V
I
= 1mA, FLAG deasserted
0.4
1
OL
SINK
V
FLAG
= 5.5V, FLAG asserted
μA
2
_______________________________________________________________________________________
Overvoltage Protection Controllers with
Low Standby Current
3–MAX846
ELECTRICAL CHARACTERISTICS (continued)
(V = +5V for MAX4843/MAX4844/MAX4845, V = +4V for MAX4846, C
= 500pF, T = -40°C to +85°C, unless otherwise
A
IN
IN
GATE
noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING
V
= UVLO rising to V
= 0.3V rising
GATE
IN
Startup Delay
t
20
20
50
50
80
80
ms
ms
START
(Figure 1)
V
= 0.3V rising to V
= 0.3V falling
FLAG
GATE
FLAG Blanking Time
t
BLANK
(Figure 1)
V
= 0.3V to 8V
GATE
Gate Turn-On Time
Gate Turn-Off Time
t
(MAX4843/MAX4844/MAX4845),
10
6
ms
μs
GON
V
= 0.3V to 7V (MAX4846) (Figure 1)
GATE
V
rising at 1V/μs from 5V to 8V
IN
(MAX4843/MAX4844/MAX4845)
or from 4V to 7V (MAX4846)
t
20
GOFF
to V
= 0.3V (Figure 2)
GATE
V
rising at 1V/μs from 5V to 8V
IN
(MAX4843/MAX4844/MAX4845)
or from 4V to 7V (MAX4846), to V
FLAG Assertion Delay
t
5.8
1.5
μs
μs
FLAG
=
FLAG
2.4V, R
= 10k to 3V (Figure 2)
FLAG
V
V
rising at 1V/μs from 0V to 9V, time from
IN
IN
= 5V to I
= 80% of I
PD
Initial Overvoltage Fault Delay
t
OVP
GATE
(Figure 3)
Note 1: All devices are 100% tested at +25°C. Electrical limits across the full temperature range are guaranteed by design and correlation.
Typical Operating Characteristics
(V = +5V for MAX4843/MAX4844/MAX4845, V = +4V for MAX4846, T = +25°C, unless otherwise noted.)
IN
IN
A
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(MAX4843)
REVERSE CURRENT vs. OUTPUT VOLTAGE
(MAX4843)
GATE VOLTAGE vs. INPUT VOLTAGE
(MAX4843/MAX4844/MAX4845)
15
12
9
100
80
60
40
20
0
1000
100
10
MAX4843
MAX4844
1
MAX4845
SINGLE FET
0.1
0.01
6
BACK-TO-BACK FET
0.001
0.0001
0.00001
0.000001
3
0
3
4
5
6
7
8
0
5
10
15
20
25
30
1
2
4
7
3
5
6
INPUT VOLTAGE (V)
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE (V)
_______________________________________________________________________________________
3
Overvoltage Protection Controllers with
Low Standby Current
Typical Operating Characteristics (continued)
(V = +5V for MAX4843/MAX4844/MAX4845, V = +4V for MAX4846, T = +25°C, unless otherwise noted.)
IN
IN
A
GATE VOLTAGE vs. INPUT VOLTAGE
(MAX4846)
GATE VOLTAGE vs. INPUT VOLTAGE
(MAX4843)
POWER-UP RESPONSE
MAX4843-46 toc06
10.50
10.25
10.00
9.75
10
8
5V/DIV
5V/DIV
V
IN
GATE CURRENT = 0
0
6
V
GATE
4
0
0
GATE
CURRENT = 1μA
V
5V/DIV
FLAG
2
9.50
0
3
4
5
6
7
8
1
2
3
4
5
6
20ms/DIV
3–MAX846
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
OVERVOLTAGE RESPONSE
POWER-UP OVERVOLTAGE RESPONSE
POWER-UP RESPONSE
MAX4843-46 toc08
MAX4843-46 toc09
MAX4843-46 toc07
8V
5V/DIV
V
8V
5V/DIV
V
5V/DIV
5V/DIV
1A/DIV
5V/DIV
IN
IN
0
0
0
V
IN
0
V
I
10V/DIV
10mA/DIV
5V/DIV
V
GATE
OUT
0
V
2V/DIV
5V/DIV
GATE
0
I
IN
GATE
0
0
0
0
V
FLAG
0
V
V
FLAG
FLAG
4μs/DIV
20μs/DIV
20ms/DIV
Pin Description
PIN
NAME
FUNCTION
ULTRA-
THIN LGA
μDFN
Voltage Input. IN is both the power-supply input and the overvoltage sense input. Bypass IN
to GND with a 1μF capacitor or larger.
1
2
1
2
IN
GND
Ground
Fault Indication Output. FLAG is asserted high during undervoltage lockout and overvoltage
lockout conditions. FLAG is deasserted during normal operation. FLAG is an open-drain
output.
3
3
FLAG
Gate-Drive Output. GATE is the output of an on-chip charge pump. When V
GATE is driven high to turn on the external n-channel MOSFET(s).
< V < V
,
OVLO
UVLO
IN
4
4
GATE
N.C.
5, 6
5, 6
No Connection. Not internally connected. Do not connect.
4
_______________________________________________________________________________________
Overvoltage Protection Controllers with
Low Standby Current
3–MAX846
Functional Diagram
5.5V
REGULATOR
2x CHARGE
PUMP
GATE
FLAG
IN
GATE DRIVER
GND
UVLO AND
OVLO
DETECTOR
MAX4843–
MAX4846
CONTROL
LOGIC AND
TIMER
5V
8V
V
IN
V
IN
V
OVLO
V
UVLO
5V
t
FLAG
t
GON
t
GOFF
t
START
V
V
V
V
GATE
FLAG
GATE
0.3V
0.3V
2.4V
FLAG
0.3V
t
BLANK
Figure 1. ꢀtartup Timing Diagram
Figure 2. ꢀhutdown Timing Diagram
V
IN
V
OVLO
0V
t
OVP
80%
I
GATE
Figure 3. Power-Up Overvoltage Timing Diagram
_______________________________________________________________________________________
5
Overvoltage Protection Controllers with
Low Standby Current
Device Operation
Detailed Description
The MAX4843–MAX4846 have an on-board state
machine to control device operation. A flowchart is
The MAX4843–MAX4846 provide up to 28V overvoltage
protection for low-voltage systems. When the input volt-
age exceeds the overvoltage trip level, the
MAX4843–MAX4846 turn off a low-cost external n-chan-
nel FET(s) to prevent damage to the protected compo-
nents. An internal charge pump (see the Functional
Diagram) drives the FET gate for a simple, robust solu-
tion. On power-up, the device waits for 50ms before dri-
ving GATE high. The open-drain FLAG output is kept at
high impedance for an additional 50ms after GATE goes
high before deasserting. The FLAG output asserts high
immediately to an overvoltage fault.
shown in Figure 4. On initial power-up, if V < UVLO or
IN
if V > OVLO, GATE is held at 0V, and FLAG is high.
IN
If UVLO < V < OVLO, the device enters startup after
IN
a 50ms internal delay. The internal charge pump is
enabled, and GATE begins to be driven above V by
IN
the internal charge pump. FLAG is held high during
startup until the FLAG blanking period expires, typically
50ms after the GATE starts going high. At this point the
device is in its on state.
At any time if V drops below UVLO or V is greater
IN
IN
than OVLO, FLAG is driven high and GATE is driven
to ground.
Undervoltage Lockout (UVLO)
The MAX4843/MAX4844/MAX4845 have a fixed 4.15V
typical UVLO level, the MAX4845C/MAX4845D have a
2.2V typical UVLO, and the MAX4846 has a 2.5V typi-
cal UVLO. When V is less than the UVLO, the GATE
IN
3–MAX846
STANDBY
GATE = 0
FLAG = HIGH
driver is held low and FLAG is asserted.
Overvoltage Lockout (OVLO)
The MAX4843 has a 7.4V typical OVLO; the MAX4844
has a 6.35V typical OVLO; and the MAX4845 has a
5.8V typical OVLO. The MAX4846 has a 4.65V typical
V
> UVLO
IN
overvoltage threshold. When V is greater than OVLO,
IN
TIME STARTS
COUNTING
V
< UVLO
IN
the GATE driver is held low and FLAG is asserted.
FLAG Output
The open-drain FLAG output is used to signal to the
host system that there is a fault with the input voltage.
FLAG asserts immediately to an overvoltage fault.
FLAG is held high for 50ms after GATE turns on before
deasserting. Connect a pullup resistor from FLAG to
the logic I/O voltage of the host system.
t = 50ms
OVLO CHECK
GATE = 0
FLAG = HIGH
V
IN
< OVLO
V
IN
> OVLO
GATE Driver
An on-chip charge pump is used to drive GATE above
IN, allowing the use of low-cost n-channel MOꢀFETs. The
charge pump operates from the internal 5.5V regulator.
STARTUP
GATE DRIVEN HIGH
FLAG = HIGH
The actual GATE output voltage tracks approximately
t = 50ms
two times V until V exceeds 5.5V or the OVLO trip
IN
IN
level is exceeded, whichever comes first. The
MAX4843 has a 7.4V typical OVLO, therefore GATE
remains relatively constant at about 10.5V for 5.5V <
ON
GATE HIGH
FLAG = LOW
V
< 7.4V. The MAX4845 has a 5.8V typical OVLO, but
IN
this can be as low as 5.5V. The GATE output voltage as
a function of input voltage is shown in the Typical
Operating Characteristics.
Figure 4. ꢀtate Diagram
6
_______________________________________________________________________________________
Overvoltage Protection Controllers with
Low Standby Current
3–MAX846
Applications Information
MOSFET Configuration
The MAX4843–MAX4846 can be used with either a sin-
INPUT
+1.2V TO +28V
gle MOꢀFET configuration as shown in the Typical
Operating Circuit, or can be configured with a back-to-
back MOꢀFET as shown in Figure 5. The back-to-back
configuration has almost zero reverse current when the
input supply is below the output.
N
N
1
2
4
3
IN
GATE
1μF
If reverse current leakage is not a concern, a single
MOꢀFET can be used. This approach has half the loss of
the back-to-back configuration when used with similar
MOꢀFET types and is a lower cost solution. Note that if
the input is actually pulled low, the output is also pulled
low due to the parasitic body diode in the MOꢀFET. If
this is a concern, the back-to-back configuration should
be used.
V
IO
MAX4843–
MAX4846
GND
FLAG
In a typical application of the MAX4846, an external
adapter with built-in battery charger is connected to IN
and a battery is connected to the source of the external
FET. When the adapter is unplugged, IN is directly con-
nected to the battery through the external FET. ꢀince
the battery voltage is typically greater than 3V, the
GATE voltage stays high and the device remains pow-
ered by the battery.
Figure 5. Back-to-Back External MOꢀFET Configuration
IN Bypass Considerations
For most applications, bypass IN to GND with a 1µF
ceramic capacitor. If the power source has significant
inductance due to long lead length, take care to pre-
vent overshoots due to the LC tank circuit and provide
protection if necessary to prevent exceeding the 30V
absolute maximum rating on IN.
MOSFET Selection
The MAX4843–MAX4846 are designed for use with
either a single n-channel MOꢀFET or dual back-to-back
n-channel MOꢀFETs. In most situations, MOꢀFETs with
The MAX4843–MAX4846 provide protection against
voltage faults up to 28V, but this does not include nega-
tive voltages. If negative voltages are a concern, con-
nect a ꢀchottky diode from IN to GND to clamp
negative input voltages.
R
specified for a V
of 4.5V work well. If the input
ON
Gꢀ
supply is near the UVLO maximum of 3.5V, consider
using a MOꢀFET specified for a lower V voltage.
Gꢀ
ESD Test Conditions
EꢀD performance depends on a number of conditions.
The MAX4843–MAX4846 are protected from 15kV typ-
ical EꢀD on IN when IN is bypassed to ground with a
1µF ceramic capacitor.
Also the V
should be 30V for the MOꢀFET to with-
Dꢀ
stand the full 28V IN range of the MAX4843–MAX4846.
Table 1 shows a selection of MOꢀFETs appropriate for
use with the MAX4843–MAX4846.
Table 1. MOSFET Suggestions
CONFIGURATION/
PART
V
DS
MAX (V)
R
at 4.5V (mꢀ)
ON
MANUFACTURER
Vishay Siliconix
PACKAGE
Dual/1206-8
Single/SSOT-6
Dual/SSOT-6
Dual/SSOT-6
Si5902DC
Si1426DH
30
30
30
20
143
115
145
80
www.vishay.com
FDC6561AN
FDC6305N
Fairchild Semiconductor
www.fairchildsemi.com
_______________________________________________________________________________________
7
Overvoltage Protection Controllers with
Low Standby Current
help users design equipment that meets Level 3 of IEC
1000-4-2, without additional EꢀD-protection compo-
nents.
Human Body Model
Figure 6 shows the Human Body Model and Figure 7
shows the current waveform it generates when dis-
charged into a low impedance. This model consists
of a 100pF capacitor charged to the EꢀD voltage of
interest, which is then discharged into the device
through a 1.5kΩ resistor.
The main difference between tests done using the
Human Body Model and IEC 1000-4-2 is higher peak
current in IEC 1000-4-2. Because series resistance is
lower in the IEC 1000-4-2 EꢀD test model (Figure 8),
the EꢀD withstand voltage measured to this standard is
generally lower than that measured using the Human
Body Model. Figure 9 shows the current waveform for
the 8kV IEC 1000-4-2 Level 4 EꢀD Contact Discharge
test. The Air-Gap test involves approaching the device
with a charger probe. The Contact Discharge method
connects the probe to the device before the probe is
energized.
IEC 1000-4-2
ꢀince January 1996, all equipment manufactured
and/or sold in the European Union has been required to
meet the stringent IEC 1000-4-2 specification. The IEC
1000-4-2 standard covers EꢀD testing and perfor-
mance of finished equipment; it does not specifically
refer to integrated circuits. The MAX4843–MAX4846
R
D
R
R
D
R
C
C
3–MAX846
1.5kΩ
50MΩ TO 100MΩ
330Ω
1MΩ
DISCHARGE
RESISTANCE
DISCHARGE
RESISTANCE
CHARGE-CURRENT-
LIMIT RESISTOR
CHARGE-CURRENT-
LIMIT RESISTOR
HIGH-
VOLTAGE
DC
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
DEVICE
UNDER
TEST
C
100pF
STORAGE
CAPACITOR
C
150pF
STORAGE
CAPACITOR
s
s
SOURCE
SOURCE
Figure 6. Human Body EꢀD Test Model
Figure 8. IEC 1000-4-2 EꢀD Test Model
I
I 100%
P
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
r
100%
90%
AMPERES
36.8%
10%
0
10%
TIME
0
30ns
t
tr = 0.7ns to 1ns
t
RL
t
DL
60ns
CURRENT WAVEFORM
Figure 7. Human Body Model Current Waveform
Figure 9. IEC 1000-4-2 EꢀD Generator Current Waveform
8
_______________________________________________________________________________________
Overvoltage Protection Switches with
Low Standby Current
3–MAX846
Package Information
Chip Information
For the latest package outline information and land patterns, go
PROCEꢀꢀ: BiCMOꢀ
to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
6 µDFN
L611-1
21-0147
21-0190
6 UTLGA
Y61A1-1
_______________________________________________________________________________________
9
Overvoltage Protection Switches with
Low Standby Current
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
3
4/05
2/08
Initial release
—
Added packaging, removed SC70
1, 2, 4, 7, 9
Added MAX4845A and MAX4845C to Ordering Information and Electrical
Characteristics.
4
8/09
1, 2
• Removed MAX4845A and added MAX4845D to Ordering Information and
Electrical Characteristics.
• Updated Undervoltage Lockout (UVLO) section under Detailed Description to
include MAX4845D.
5
12/09
1, 2, 6
3–MAX846
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
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