MAX4866LEUT+T [MAXIM]
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| 型号： | MAX4866LEUT+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 暂无描述 控制器 |
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19-3582; Rev 1; 5/06
Overvoltage Protection Controllers
with Reverse Polarity Protection
General Description
Features
The MAX4864L/MAX4865L/MAX4866L/MAX4867/
MAX4865/MAX4866 overvoltage protection controllers
protect low-voltage systems against high-voltage faults
up to +28V, and negative voltages down to -28V. These
devices drive a low-cost complementary MOSFET. If the
input voltage exceeds the overvoltage threshold, these
devices turn off the n-channel MOSFET to prevent dam-
age to the protected components. If the input voltage
drops below ground, the devices turn off the p-channel
MOSFET to prevent damage to the protected compo-
nents. An internal charge pump eliminates the need for
external capacitors and drives the MOSFET GATEN for
a simple, robust solution.
♦ Overvoltage Protection Up to +28V
♦ Reverse Polarity Protection Down to -28V
♦ Preset Overvoltage (OV) Trip Level (7.4V, 6.35V,
5.8V, 4.65V)
♦ Drive Low-Cost Complementary MOSFET
♦ Internal 50ms Startup Delay
♦ Internal Charge Pump
♦ 8.5µA Standby Current (In UVLO Mode)
♦ 0.4µA Shutdown Current
♦ Overvoltage Fault FLAG Indicator
♦ 6-Pin (2mm x 2mm) µDFN and 6-Pin SOT23
The overvoltage thresholds are preset to +7.4V
(MAX4864L), +6.35V (MAX4865L), +5.8V (MAX4866L),
and +4.65V (MAX4867). When the input voltage drops
below the undervoltage lockout (UVLO) threshold, the
devices enter a low-current standby mode (8.5µA). Also in
shutdown (EN set to logic-high), the current is reduced fur-
ther (0.4µA). The MAX4864L/MAX4865L/MAX4866L have
a +2.85V UVLO threshold, and the MAX4867 has a +2.5V
UVLO threshold. The MAX4865/MAX4866 have a 4.15V
UVLO threshold.
Packages
Ordering Information
PIN-
PACKAGE
OV TRIP
TOP PKG
LEVEL (V) MARK CODE
PART
MAX4864LEUT-T 6 SOT23-6
MAX4864LELT 6 µꢀFN
MAX4865LEUT-T 6 SOT23-6
MAX4865LELT 6 µꢀFN
MAX4866LEUT-T 6 SOT23-6
7.40
7.40
6.35
6.35
5.80
5.80
4.65
4.65
ABVO
AAE L622-1
ABVP
AAF L622-1
ABVQ
AAG L622-1
ABVN
AAꢀ L622-1
—
In addition, a 15kV ESꢀ protection is provided to the
input when bypassed with a 1µF capacitor to ground. All
devices are offered in a small 6-pin SOT23 and a 6-pin,
2mm x 2mm µꢀFN package, and are specified for
operation over the -40°C to +85°C temperature range.
—
—
MAX4866LELT
MAX4867EUT-T
MAX4867ELT
6 µꢀFN
6 SOT23-6
6 µꢀFN
—
Applications
Cell Phones
ꢀigital Still Cameras
PꢀAs and Palmtop ꢀevices
MP3 Players
Note: All devices are specified over the -40°C to +85°C operating
range.
Typical Operating Circuit
Pin Configurations
ADAPTER
(-28V TO +28V)
TOP VIEW
P
N
OUTPUT
1 F
IN
GND
1
2
3
6
5
4
EN
GND
FLAG
IN
1
2
3
6
5
4
GATEN
GATEP
EN
GATEP
IN
GATEN
MAX4864L
MAX4865L
MAX4866L
MAX4867
MAX4864L
MAX4865L
MAX4866L
MAX4867
GATEP
GATEN
MAX4864L
MAX4865L
MAX4866L
MAX4867
V
IO
FLAG
EN
SOT23
DFN
GND
FLAG
Functional Diagram appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Overvoltage Protection Controllers
with Reverse Polarity Protection
ABSOLUTE MAXIMUM RATINGS
IN to GNꢀ ..............................................................-0.3V to +30V
GATEN, GATEP to GNꢀ ........................................-0.3V to +12V
IN to GATEP ...........................................................-0.3V to +20V
FLAG, EN to GNꢀ ....................................................-0.3V to +6V
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature .................................................... +150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
Continuous Power ꢀissipation (T = +70°C)
A
6-Pin µꢀFN (2mm x 2mm) (derate 2.1mW/°C
above +70°C) ..............................................................168mW
6-Pin SOT23 (derate 8.7mW/°C above +70°C)............696mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = +5V (MAX4864L/MAX4865L/MAX4866L), V = +4V (MAX4867), T = -40°C to +85°C, C
= 500pF, unless otherwise
IN
IN
A
GATEN
noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
1.2
TYP
MAX UNITS
Input Voltage Range
V
28.0
7.8
V
IN
MAX4864L
7.0
7.4
6.35
5.8
4.65
75
MAX4865L
MAX4866L
MAX4867
5.95
5.45
4.35
6.75
6.15
4.95
Overvoltage Trip Level
OVLO
V
rising
V
IN
MAX4864L
MAX4865L
MAX4866L
MAX4867
65
Overvoltage Lockout
Hysteresis
mV
55
50
MAX4864L/MAX4865L/MAX4866L
MAX4867
2.65
2.3
2.85
2.5
44
3.05
2.7
Undervoltage Lockout
Threshold
UVLO
V
falling
V
IN
MAX4864L/MAX4865L/MAX4866L
MAX4867
Undervoltage Lockout
Hysteresis
mV
µA
25
MAX4864L/MAX4865L/MAX4866L
77
120
110
IN Supply Current
I
EN = GNꢀ
IN
MAX4867
68
MAX4864L/MAX4865L/MAX4866L,
8.5
8
22
18
2
V
= +2.6V
IN
UVLO Supply Current
I
EN = GNꢀ
µA
UVLO
MAX4867, V = +2.2V
IN
MAX4864L/MAX4865L/MAX4866L,
0.4
V
= 3.6V
Shutdown Supply Current
GATEN Voltage
I
EN = 1.6V
IN
µA
V
SHꢀ
MAX4867, V = 3.6V
IN
0.4
9.83
7.85
32
2
10
MAX4864L/MAX4865L/MAX4866L
MAX4867
9
7.5
12
V
V
1µA load
GATEN
8.0
65
GATEN Pulldown Current
GATEP Clamp Voltage
GATEP Pulldown Resistor
FLAG Output-Low Voltage
FLAG Leakage Current
EN Input-High Voltage
EN Input-Low Voltage
I
V
> OVLO, V = +5.5V
GATEN
mA
V
Pꢀ
IN
13.5
32
16.5
48
19.5
64
CLAMP
R
k
GATEP
V
I
= 1mA
0.4
1
V
OL
SINK
V
= +5.5V
µA
V
FLAG
V
1.5
IH
V
0.4
V
IL
2
_______________________________________________________________________________________
Overvoltage Protection Controllers
with Reverse Polarity Protection
ELECTRICAL CHARACTERISTICS (continued)
(V = +5V (MAX4864L/MAX4865L/MAX4866L), V = +4V (MAX4867), T = -40°C to +85°C, C
= 500pF, unless otherwise
IN
IN
A
GATEN
noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
EN Input Leakage Current
TIMING
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
I
EN = GNꢀ or +5.5V
1
µA
LKG
Startup ꢀelay
t
V
V
> UVLO to V > 0.3V, Figure 1
GATEN
20
20
50
50
80
80
ms
ms
START
IN
FLAG Blanking Time
t
> 0.3V to V
< 0.3V, Figure 1
BLANK
GATEN
FLAG
C
= 500pF, V
= 0.3V to +8V
GATEN
GATEN
(MAX4864L/MAX4865L/MAX4866L)
GATEN Turn-On Time
GATEN Turn-Off Time
t
10
ms
GON
V
= 0.3V to +7V (MAX4867), Figure 1
GATEN
V
rising at 3V/µs from +5V to +8V
IN
(MAX4864L/MAX4865L/MAX4866L),
or from +4V to +7V (MAX4867)
t
7
20
µs
Goff
V
= 0.3V, C
= 500pF, Figure 2
GATEN
GATEN
V
rising at 3V/µs from 5V to 8V
IN
(MAX4864L/MAX4865L/MAX4866L),
FLAG Assertion ꢀelay
t
3.5
µs
FLAG
or from +4V to +7V (MAX4867), V
Figure 2
= 0.3V,
FLAG
V
V
rising at 3V/µs from 0V to +9V, time from
IN
IN
Initial Overvoltage Fault ꢀelay
ꢀisable Time
t
= 5V to I
= 80% of I (GATEN pulldown
1.5
2
µs
µs
OVP
GATEN
Pꢀ
current), Figure 3
t
V
= +2.4V, V = 0.3V, Figure 4
GATEN
ꢀIS
EN
Note 1: All parts are 100% tested at +25°C. Electrical limits across the full temperature range are guaranteed by design and correlation.
+5V
V
V
IN
IN
V
V
UVLO
OVLO
t
+5V
FLAG
t
GON
t
GOFF
+8V (+7V)*
t
START
V
V
GATEN
FLAG
V
GATEN
FLAG
+0.3V
+0.3V
V
+0.3V
+0.3V
t
BLANK
*MAX4867
Figure 1. Startup Timing Diagram
Figure 2. Shutdown Timing Diagram
V
V
EN
IN
+2.4V
V
OVLO
0V
t
OVP
t
DIS
80%
I
GATEN
V
GATEN
+0.3V
Figure 4. Disable Timing Diagram
_______________________________________________________________________________________
Figure 3. Power-Up Overvoltage Timing Diagram
3
Overvoltage Protection Controllers
with Reverse Polarity Protection
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
REVERSE CURRENT vs. OUTPUT VOLTAGE
(MAX4864L)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
REVERSE CURRENT vs. OUTPUT VOLTAGE
(MAX4864L)
(MAX4864L)
350
0.4
0.3
0.2
0.1
0
80
60
40
20
0
EN = 3V
EN = 0V
300
250
200
150
100
50
DEVICE TURNS ON
AT TRANSITION
0
0
5
10
15
20
25
30
0
1
2
3
4
5
0
1
2
3
4
5
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
MAX4864L/MAX4865L/MAX4866L
GATEN VOLTAGE vs. INPUT VOLTAGE
MAX4867
GATEN VOLTAGE vs. INPUT VOLTAGE
POWER-UP RESPONSE
MAX4864 toc06
15
12
9
15
12
9
5V
0V
5V
0V
MAX4864L
ADAPTER
IN
MAX4867
MAX4865L
MAX4866L
6
6
10V
GATEN
0V
5V
0V
3
3
FLAG
0
0
0
2
4
6
8
0
2
4
6
8
20ms/div
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
OVERVOLTAGE RESPONSE
POWER-UP RESPONSE
MAX4864 toc08
MAX4864 toc07
8V
ADAPTER
5V
ADAPTER
5V/div
8V
IN
5V
IN
5V/div
OUT
5V/div
GATEN
5V/div
IIN
1A/div
I
GATEN
10mA/div
FLAG
5V/div
FLAG
5V/div
2 s/div
20ms/div
4
_______________________________________________________________________________________
Overvoltage Protection Controllers
with Reverse Polarity Protection
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
NEGATIVE VOLTAGE RESPONSE
POWER-UP OVERVOLTAGE RESPONSE
MAX4864 toc10
MAX4864 toc09
8V
ADAPTER
5V
ADAPTER
0V
0V
8V
IN
0V
GATEP
0V
IN
0V
GATEN
0V
5V
FLAG
0V
5V
FLAG
0V
20ms/div
20ms/div
Pin Description
PIN
MAX4864LEUT/ MAX4864LELT/
MAX4865LEUT/ MAX4865LELT/
MAX4866LEUT/ MAX4866LELT/
NAME
FUNCTION
MAX4867EUT
MAX4867ELT
1
2
3
1
IN
Voltage Input. IN is both the power-supply input and the overvoltage sense input.
Ground
GNꢀ
Fault-Indication Output. When EN goes high, FLAG becomes high-impedance. FLAG
3
4
2
6
FLAG is asserted high during undervoltage lockout and overvoltage lockout conditions.
FLAG is deasserted during normal operation. FLAG is an open-drain output.
n-Channel MOSFET Gate-ꢀrive Output. GATEN is the output of an on-chip charge
GATEN pump. When V
< V < V
, GATEN is driven high to turn on the external
OVLO
UVLO
IN
n-channel MOSFET.
p-Channel MOSFET Gate-ꢀrive Output. GATEP is always on when input is above
ground and off when input drops below ground.
5
6
5
4
GATEP
Active-Low Enable Input. Connect to ground in normal operation. ꢀrive EN high to
disable device and enter shutdown mode.
EN
_______________________________________________________________________________________
5
Overvoltage Protection Controllers
with Reverse Polarity Protection
output voltage is a function of input voltage, as shown
in the Typical Operating Characteristics.
Detailed Description
The MAX4864L/MAX4865L/MAX4866L/MAX4867 provide
up to +28V overvoltage and negative voltage protection
for low voltage systems. When the input voltage exceeds
the overvoltage trip level, the MAX4864L/MAX4865L/
MAX4866L/MAX4867 turn off a low-cost external n-channel
MOSFET to prevent damage to the protected compo-
nents. The devices also drive an external p-channel
MOSFET to protect against negative voltage inputs. An
internal charge-pump (see the Functional Diagram),
drives the MOSFET GATEN for a simple, robust solution.
On power-up, the device waits for 50ms before driving
GATEN high. The open-drain FLAG output is kept at a
high impedance for an additional 50ms after GATEN goes
high before deasserting. The FLAG output asserts high
immediately to an overvoltage fault.
GATEP Driver
When the input voltage drops below ground, GATEP
goes high turning the external p-channel MOSFET off.
When the input voltage goes above ground, GATEP
pulls low and turns on the p-channel MOSFET. An inter-
nal clamp protects the p-channel MOSFET by insuring
that the GATEP-to-IN voltage does not exceed +16V
when the input (IN) rises to +28V.
Device Operation
The MAX4864L/MAX4865L/MAX4866L/MAX4867 have
an on-board state machine to control device operation.
A flowchart is shown in Figure 5. On initial power-up, if
V
< UVLO or if V > OVLO, GATEN is held at 0V and
IN
IN
FLAG is high.
Undervoltage Lockout (UVLO)
The MAX4864L/MAX4865L/MAX4866L/MAX4867 have
a fixed +2.85V typical UVLO level, and the MAX4867
has +2.5V UVLO level. When V is less than the UVLO,
IN
the GATEN driver is held low and FLAG is asserted.
If UVLO < V < OVLO, the device enters startup after a
IN
50ms internal delay. The internal charge pump is
enabled, and GATEN begins to be driven above V by
IN
the internal charge pump. FLAG is held high during
startup until the FLAG blanking period expires, typically
50ms after the GATEN starts going high. At this point,
the device is in its on-state.
Overvoltage Lockout (OVLO)
The MAX4864L has a +7.4V typical OVLO threshold;
the MAX4865L has +6.35V typical OVLO threshold; the
MAX4866L has a +5.8V typical OVLO threshold; and
the MAX4867 has a +4.65V typical OVLO threshold.
When V is greater than OVLO, the GATEN driver is
IN
held low and FLAG is asserted.
At any time if V drops below UVLO, FLAG is driven
IN
high and GATEN is driven to ground.
STANDBY
GATEN = 0
FLAG = HIGH
FLAG Output
The open-drain FLAG output is used to signal to the
host system when there is a fault with the input voltage.
On power-up, FLAG is held high for 50ms after GATEN
turns on, before deasserting. FLAG asserts immediately
to overvoltage and undervoltage faults. When the fault
condition is removed, FLAG deasserts 50ms after
GATEN turns on. Connect a pullup resistor from FLAG
to the logic I/O voltage of the host system.
V
IN
> UVLO
TIMER STARTS
COUNTING
t = 50ms
OVLO CHECK
GATEN = 0
V
< UVLO
IN
GATEN Driver
An on-chip charge pump is used to drive GATEN
above IN, allowing the use of a low-cost n-channel
MOSFET. The charge pump operates from the internal
+5.5V regulator.
FLAG = HIGH
V
IN
> OVLO
STARTUP
GATEN DRIVEN HIGH
FLAG = HIGH
V
> OVLO
IN
The actual GATEN output voltage tracks approximately
t = 50ms
two times V until V exceeds +5.5V, or the OVLO trip
IN
IN
level is exceeded, whichever comes first. The
MAX4864L has a +7.4V typical OVLO, therefore GATEN
remains relatively constant at approximately +10.5V for
ON
GATEN HIGH
FLAG = LOW
+5.5V < V < +7.4V. The MAX4866L has a +5.8V typi-
IN
cal OVLO, but this can be as low as +5.5V. The GATEN
Figure 5. State Diagram
6
_______________________________________________________________________________________
Overvoltage Protection Controllers
with Reverse Polarity Protection
that if the input is actually pulled low, the output will
also be pulled low due to the parasitic body diode in
the MOSFET. If this is a concern, then the back-to-back
configuration should be used.
ADAPTER
-28V TO +28V
N
N
P
OUTPUT
1 F
MOSFET Selection
The MAX4864L/MAX4865L/MAX4866L/MAX4867 are
designed for use with a complementary MOSFET or sin-
gle p-channel and dual back-to-back n-channel
MOSFETs. In most situations, MOSFETs with RꢀS(ON)
IN
GATEP
GATEN
MAX4864L
MAX4865L
MAX4866L
MAX4867
V
IO
specified for a VGS of 4.5V work well. Also the V
ꢀS
should be +30V for the MOSFET to withstand the full
+28V IN range of the MAX4864L/MAX4865L/
MAX4866L/MAX4867. Table 1 shows a selection of
MOSFETs which are appropriate for use with the
MAX4864L/MAX4865L/MAX4866L/MAX4867.
GND
FLAG
Figure 6. Back-to-Back External MOSFET Configuration
IN Bypass Considerations
For most applications, bypass AꢀAPTER to GNꢀ with a
1µF ceramic capacitor. If the power source has signifi-
cant inductance due to long lead length, take care to
prevent overshoots due to the LC tank circuit and pro-
vide protection if necessary to prevent exceeding the
+30V absolute maximum rating on IN.
Applications Information
MOSFET Configuration
The MAX4864L/MAX4865L/MAX4866L/MAX4867 can be
used with either a complementary MOSFET configuration
as shown in the Typical Operating Circuit, or can be con-
figured with a single p-channel MOSFET and back-to-
back n-channel MOSFETs as shown in Figure 6.
ESD Test Conditions
ESꢀ performance depends on a number of conditions. The
MAX4864L/MAX4865L/MAX4866L/MAX4867 are specified
for +/-15kV typical ESꢀ resistance on IN when AꢀAPTER is
bypassed to ground with a 1µF ceramic capacitor.
The MAX4864L/MAX4865L/MAX4866L/MAX4867 can drive
either a complementary MOSFET or a single p-channel
MOSFET and back-to-back n-channel MOSFETs. The
back-to-back configuration has almost zero reverse cur-
rent when the adapter is not present or when the
adapter voltage is below the UVLO threshold.
Human Body Model
Figure 7 shows the Human Body Model, and Figure 8
shows the current waveform it generates when dis-
charged into a low impedance. This model consists of a
100pF capacitor charged to the ESꢀ voltage of interest,
which is then discharged into the device through a
1.5k resistor.
If reverse current leakage is not a concern, a single
MOSFET can be used. This approach has half the loss
of the back-to-back configuration when used with simi-
lar MOSFET types and is a lower cost solution. Note
Table 1. MOSFET Suggestions
CONFIGURATION/
PACKAGE
V
MAX
(V)
V
MAX
(V)
GS
DS
PART
R
AT 4.5V (m )
MANUFACTURER
ON
+30
-30
143 (n-MOSFET)
290 (p-MOSFET)
143 (n-MOSFET)
115 (n-MOSFET)
80 (p-MOSFET)
145 (n-MOSFET)
160 (n-MOSFET)
75 (p-MOSFET)
125 (p-MOSFET)
Complementary
MOSFET/1206-8
Si5504ꢀC
20
Si5902ꢀC
Si1426ꢀH
Si5435ꢀC
FꢀC6561AN
FꢀG315N
FꢀC658P
FꢀC654P
ꢀual/1206-8
Single/µꢀFN-6
Single/1206-8
ꢀual/SSOT-6
Single/µꢀFN-6
Single/SSOT-6
Single/SSOT-6
20
20
20
20
20
20
20
+30
+30
-30
Vishay Siliconix
+30
+30
-30
Fairchild Semiconductor
-30
_______________________________________________________________________________________
7
Overvoltage Protection Controllers
with Reverse Polarity Protection
R
R
C
D
1M
1.5
I
100%
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
P
r
DISCHARGE
RESISTANCE
CHARGE-CURRENT
LIMIT RESISTOR
AMPERES
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
36.8%
C
s
100pF
STORAGE
CAPACITOR
10%
0
SOURCE
TIME
0
t
RI
t
DL
CURRENT WAVEFORM
Figure 7. Human Body ESD Test Model
Figure 8. Human Body Current Waveform
I
R
R
D
C
330
50 TO 100
100%
90%
DISCHARGE
RESISTANCE
CHARGE-CURRENT
LIMIT RESISTOR
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
C
150pF
STORAGE
CAPACITOR
s
SOURCE
10%
t = 0.7ns TO 1ns
R
t
30ns
60ns
Figure 9. IEC 1000-4-2 ESD Test Model
Figure 10. IEC 1000-4-2 ESD Generator Current Waveform
erally lower than that measured using the Human Body
Model. Figure 10 shows the current waveform for the
8kV IEC 1000-4-2 Level 4 ESꢀ Contact ꢀischarge test.
The Air-Gap test involves approaching the device with a
charger probe. The Contact ꢀischarge method connects
the probe to the device before the probe is energized.
IEC 1000-4-2
Since January 1996, all equipment manufactured
and/or sold in the European Union has been required to
meet the stringent IEC 1000-4-2 specification. The IEC
1000-4-2 standard covers ESꢀ testing and perfor-
mance of finished equipment. It does not specifically
refer to ICs. The MAX4864L/MAX4865L/MAX4866L/
MAX4867 help users design equipment that meets
Level 3 of IEC 1000-4-2, without additional ESꢀ-protec-
tion components.
Chip Information
TRANSISTOR COUNT: 727
The main difference between tests done using the
Human Body Model and IEC 1000-4-2 is higher peak
current in IEC 1000-4-2. Because series resistance is
lower in the IEC 1000-4-2 ESꢀ test model (Figure 9), the
ESꢀ-withstand voltage measured to this standard is gen-
PROCESS TECHNOLOGY: BiCMOS
8
_______________________________________________________________________________________
Overvoltage Protection Controllers
with Reverse Polarity Protection
Functional Diagram
ADAPTER
P
N
OUTPUT
IN
GATEP
GATEN
GND
MAX4864L
MAX4865L
MAX4866L
MAX4867
+15V CLAMP
+5.5V
2x CHARGE
GATE
REGULATOR
PUMP
DRIVER
V
IO
UVLO AND OVLO
DETECTOR
CONTROL
FLAG
LOGIC AND TIMER
EN
_______________________________________________________________________________________
9
Overvoltage Protection Controllers
with Reverse Polarity Protection
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
A
b
D
e
N
XXXX
XXXX
XXXX
SOLDER
MASK
COVERAGE
E
PIN 1
0.10x45∞
L
L1
1
SAMPLE
MARKING
PIN 1
INDEX AREA
A
A
7
(N/2 -1) x e)
C
L
C
L
b
L
L
A
e
e
A2
EVEN TERMINAL
ODD TERMINAL
A1
PACKAGE OUTLINE,
6, 8, 10L uDFN, 2x2x0.80 mm
1
-DRAWING NOT TO SCALE-
21-0164
A
2
10 ______________________________________________________________________________________
Overvoltage Protection Controllers
with Reverse Polarity Protection
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
COMMON DIMENSIONS
SYMBOL
MIN.
0.70
0.15
0.020
1.95
1.95
0.30
NOM.
0.75
0.20
0.025
2.00
2.00
0.40
MAX.
0.80
0.25
0.035
2.05
2.05
0.50
A
A1
A2
D
-
E
L
L1
0.10 REF.
PACKAGE VARIATIONS
PKG. CODE
L622-1
N
6
e
b
(N/2 -1) x e
0.65 BSC
0.50 BSC
0.40 BSC
0.30±0.05 1.30 REF.
0.25±0.05 1.50 REF.
0.20±0.03 1.60 REF.
L822-1
8
L1022-1
10
PACKAGE OUTLINE,
6, 8, 10L uDFN, 2x2x0.80 mm
2
21-0164
A
-DRAWING NOT TO SCALE-
2
______________________________________________________________________________________ 11
Overvoltage Protection Controllers
with Reverse Polarity Protection
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, SOT 6L BODY
1
21-0058
G
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2006 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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