MAX5006AEUB [MAXIM]
Analog IC ; 模拟IC\n
| 型号： | MAX5006AEUB |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Analog IC
|
| 文件： | 总12页 (文件大小：725K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2035; Rev 0; 5/01
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
General Description
Features
The MAX5005/MAX5006/MAX5007 are low-dropout
(LDO), micropower linear voltage regulators with an
integrated microprocessor (µP) reset circuit for use with
USB peripheral devices. Each device is available with a
fixed +3.3V output voltage and can deliver up to
150mA load current. Each device features 15ꢀV tran-
sient voltage suppression (TVS) as well as precision
1.5ꢀΩ data-line termination resistors for USB digital sig-
nals maꢀing them ideal for use with USB peripherals.
ꢀ Integrated ±±15k ꢀranꢁsent kVotage ꢂSuureꢁꢁVrꢁ
fVr D+ and D- Data Lsneꢁ
ꢀ Psn ꢂeoectaboe Internao D+ and D- ꢀermsnatsVn
ReꢁsꢁtVrꢁ (±.15Ω ±1ꢃ%
ꢀ Integrated MscrVurVceꢁꢁVr Reꢁet CsrcSst wsth
±00mꢁ (msn% ꢀsmeVSt
ꢀ 3.3k OStuSt wsth ±3ꢃ ꢄccSracꢅ
ꢀ 21µꢄ QSseꢁcent CSrrent at FSoo LVad
ꢀ ꢂmaoo ±µF OStuSt CauacstVr
The MAX5005/MAX5006/MAX5007 include an internal
reset circuit that enables the USB microcontroller
100ms after the LDO regulator output voltage reaches
regulation. Reset outputs are available in push-pull
(active-low or active-high) and open-drain (active-low)
options.
ꢀ OStuSt tV InuSt Reverꢁe Lea5age PrVtectsVn
ꢀ ꢀhermao and ꢂhVrt-CsrcSst PrVtectsVn
ꢀ ±0-Psn µMꢄX Pac5age
The MAX5005/MAX5006/MAX5007 are optimized for
use with a 1µF ceramic output capacitor. Each device
includes thermal shutdown protection, output short-cir-
cuit protection, and output to input reverse leaꢀage pro-
tection. These devices also include an active-low
manual reset input.
Ordering Information
ꢀEMP.
RꢄNGE
PIN-
PꢄCKꢄGE
REꢂEꢀ
OUꢀPUꢀ
PꢄRꢀ
The MAX5005 features an open-drain reset output, the
MAX5006 features an active-low push-pull reset output,
and the MAX5007 features an active-high push-pull
reset output. Each device is available in a space-saving
10-pin µMAX pacꢀage.
Open-
Drain Low
MꢄX1001_EUB* -40°C to +85°C 10 µMAX
MꢄX1006_EUB* -40°C to +85°C 10 µMAX
MꢄX1007_EUB* -40°C to +85°C 10 µMAX
Push-Pull
Low
Push-Pull
High
Applications
USB Peripherals
*Insert “A” for a 7.5% reset threshold and “B” for a 12.5% reset
Hand-Held Instruments
threshold.
ꢁypical Operating Circuit
Pin Configuration
3.3V USB
USB
CONTROLLER
PORT
SELR
ENR
OUT
5V
3.3V
V
V
CC
BUS
IN
TOP VIEW
1µF
CERAMIC
C
OUT
C
IN
1µF
MAX5005
MAX5006
MAX5007
IN
D+
1
2
3
4
5
10 OUT
9
8
7
6
GND
D+
D-
D+
D-
RESET
RST
D+
MAX5005
MAX5006
MAX5007
(RESET)
GND
D-
MR
GND
RESET/(RESET)
ENR
MR
D-
GND
GND
SELR
µMꢄX
27Ω
() FOR MAX5007 ONLY.
27Ω
( ) FOR MAX5007 ONLY
________________________________________________________________ Maxim Integrated Products
±
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
ꢄBꢂOLUꢀE MꢄXIMUM RꢄꢀINGꢂ
IN to GND.................................................................-0.3V to +6V
D+, D- to GND..........................................................-0.3V to +6V
Short-Circuit Duration ....................................................Indefinite
Continuous Power Dissipation (T = +70°C)
A
MR to GND ..............................................-0.3V to (V
RESET, RESET to GND, Push-Pull............-0.3V to (V
RESET to GND, Open-Drain.....................................-0.3V to +6V
OUT, SELR, ENR to GND .........................................-0.3V to +6V
Maximum Current to Any Pin
+ 0.3V)
+ 0.3V)
10-Pin µMAX (derate 5.6mW/°C above +70°C)...........444mW
OUT
OUT
Thermal Resistance (θ )...............................................180°C/W
JA
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
(except IN, OUT, D+, D-)............................................. 20mA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECꢀRICꢄL CHꢄRꢄCꢀERIꢂꢀICꢂ
(V = +5V, I
= 0, C
= 2.2µF, T = -40°C to +85°C, unless otherwise noted. Typical specifications are at T = +25°C.) (Note 1)
IN
OUT
OUT
A
A
PꢄRꢄMEꢀER
Input Voltage Range
ꢂYMBOL
CONDIꢀIONꢂ
MIN
ꢀYP
MꢄX
5.5
UNIꢀꢂ
V
V
I
= 100mA
4.0
IN
LOAD
Supply Current
I
Measured at GND
25
50
µA
GND
REGULꢄꢀOR
Guaranteed Output Current
Output Voltage
I
150
3.2
mA
V
OUT
V
V
= 4.0V to 5.5V, I = 0 to 100mA
OUT
3.3
20
3.4
30
OUT
IN
I
I
= 10mA
LOAD
LOAD
Dropout Voltage (Note 2)
∆V
mV
DO
= 150mA
300
350
1
400
Output Current Limit
V
V
= 5.5V
165
mA
IN
IN
Input Reverse Leakage Current
= 0, V
= 5.5V
µA
OUT
Rising edge of V to V
R = 500Ω
L
IN
OUT
Startup Response Time
500
µs
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
REꢂEꢀ CIRCUIꢀ
T
160
20
oC
oC
JSHDN
∆ T
JSHDN
MAX500_AEUB
MAX500_BEUB
2.92
2.75
100
3.05
2.89
200
75
3.18
3.01
300
Reset Threshold
(Note 3)
V
V
TH
Reset Timeout Period
t
ms
RP
V
to Reset Delay
t
µs
OUT
RD
0.2 x
V
IL
V
OUT
MR Input Voltage
V
0.8 x
V
IH
V
OUT
MR Minimum Input Pulse Width
MR Glitch Rejection
1
µs
ns
ns
kΩ
120
500
25
MR to Reset Delay
MR Pullup Resistance to OUT
10
45
0.2 x
V
Connects R
Connects R
to D-
IL
TERM
V
OUT
SELR Input Voltage
V
0.8 x
OUT
V
to D+
IH
TERM
V
2
_______________________________________________________________________________________
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
ELECꢀRICꢄL CHꢄRꢄCꢀERIꢂꢀICꢂ (cVntsnSed%
(V = +5V, I
= 0, C
= 2.2µF, T = -40°C to +85°C, unless otherwise noted. Typical specifications are at T = +25°C.) (Note 1)
IN
OUT
OUT
A
A
PꢄRꢄMEꢀER
SELR Input Current
ꢂYMBOL
CONDIꢀIONꢂ
SELR = GND or OUT
MIN
ꢀYP
MꢄX
UNIꢀꢂ
-1
1
µA
0.2 x
V
R
enabled
disabled
IL
TERM
TERM
V
OUT
ENR Input Voltage
ENR Input Current
V
0.8 x
V
R
IH
V
OUT
ENR = GND or OUT
-1
1
µA
V
V
> 1.0V, I
> 2.7V, I
= 50µA, reset asserted
0.3
0.4
OUT
OUT
SINK
SINK
Open-Drain RESET Output Low
Voltage (MAX5005)
V
V
OL
= 3.2mA, reset asserted
Open-Drain Reset Output Leakage
Current (MAX5005)
I
Reset not asserted
-1.0
1.0
0.3
0.4
µA
LKG
V
V
= 1.0V, I
= 50µA, reset asserted
OUT
OUT
SINK
V
OL
> V
, I
= 3.2mA, reset
Push-Pull RESET Output Voltage
(MAX5006)
TH(MIN) SINK
asserted
V
V
> V
, I = 500µA,
TH(MAX) SOURCE
0.8 x
V
OUT
OUT
V
OH
reset not asserted
V
> V , I
= 3.2mA,
TH(MAX) SINK
OUT
V
0.4
OL
reset not asserted
Push-Pull RESET Output Voltage
(MAX5007)
V
V
= 1.0V, I
= 150µA, reset
SOURCE
0.8 x
V
OUT
OUT
V
OH
asserted
UꢂB OPꢀIONꢂ ꢄND ꢀRꢄNꢂIENꢀ ꢂUPPREꢂꢂION
D+/D- R Impedance ENR = GND, SELR = GND or OUT
= V = 3.3V
1425
-1
1500
1575
1
Ω
TERM
D+/D- Input Leakage Current
D+ to D- Capacitance
V
µA
ENR
OUT
1MHz, 100mVp-p signal
applied at D+ and D-,
ENR = OUT
Unpowered
ENR = OUT
Unpowered
5.5
24
40
47
pF
pF
V
= 3.3V
OUT
1MHz, 100mVp-p signal
applied at D+ and D-,
D+, D- Capacitance to GND
V
= 3.3V
OUT
ESD Trigger Voltage
Surge Trigger Voltage
Clamping Voltage
Surge Current
dV/dt < 1V/ns, V or V > 3.6V
3.6
3.6
5
V
V
V
A
D+
D-
dV/dt < 2V/µs, V or V > 3.6V
16
16
6
D+
D-
6A, pulse width = 200ns to 40µs
16V, pulse width = 200ns to 40µs
Human Body Model MIL-STD-883
16
Contact Discharge IEC1000-4-2
(EN61000-4-2)
8
D+/D- to GND ESD
kV
Air Discharge IEC1000-4-2 (EN61000-4-2)
15
NVte ±: All devices are 100% tested at T = +25°C. Limits over temperature are guaranteed by characterization and not production
A
tested.
NVte 2: Dropout voltage is defined as V - V
when V
is 2% below the value of V
for V = V
+ 1V.
OUT
IN
OUT
OUT
IN
OUT
NVte 3: Specification is guaranteed to 4σ limit.
_______________________________________________________________________________________
3
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
ꢁypical Operating Characteristics
(V = +5V, I
IN
= 0, C
= 2.2µF, unless otherwise noted.)
OUT
OUT
GROUND-PIN CURRENT
vs. SUPPLY VOLTAGE
MAXIMUM PULSE DURATION vs.
RESET THRESHOLD OVERDRIVE
DROPOUT VOLTAGE
vs. LOAD CURRENT
27.0
26.5
26.0
25.5
25.0
24.5
24.0
23.5
23.0
22.5
250
300
275
250
225
200
175
150
125
100
75
200
150
100
50
I
= 150mA
OUT
RESET OCCURS ABOVE THIS LINE
50
I
= 0
OUT
25
0
0
22.0
3.5
1
10
100
(mV)
0
15 30 45 60 75 90 105 120 135 150
LOAD CURRENT (mA)
4.0
4.5
5.0
5.5
RESET THRESHOLD OVERDRIVE, V - V
SUPPLY VOLTAGE (V)
TH
OUT
POWER-SUPPLY REJECTION RATIO vs.
FREQUENCY
OUTPUT VOLTAGE
vs. SUPPLY VOLTAGE
3.35
3.34
3.33
3.32
3.31
3.30
3.29
3.28
3.27
3.26
3.25
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
I
= 0
OUT
I
= 150mA
OUT
C
OUT
= 1µF
0.01
0.1
1
10
3.5
4.0
4.5
5.0
5.5
FREQUENCY (kHz)
SUPPLY VOLTAGE (V)
REGION OF STABLE C
ESR vs. LOAD CURRENT
OUT
OUTPUT NOISE
MAX5005-7 toc07
150
125
100
75
50
25
0
V
OUT
1mV/div
C
= 1µF
OUT
C
= 4.7µF
OUT
STABLE REGION BELOW THE CURVE
200µs/div
0
15 30 45 60 75 90 105 120 135 150
LOAD CURRENT (mA)
4
_______________________________________________________________________________________
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
ꢁypical Operating Characteristics (continued)
(V = +5V, I
IN
= 0, C
OUT
= 2.2µF, unless otherwise noted.)
OUT
LOAD TRANSIENT RESPONSE
TURN-ON/TURN-OFF RESPONSE
STARTUP RESPONSE
MAX5005-7 toc10a
MAX5005-7 toc08
MAX5005-7 toc09
20mA
I
LOAD
V
IN
5V/div
V
0
IN
5V/div
V
OUT
50mV/div
V
OUT
5V/div
3.3V
C
C
= 2.2µF
= 1.0µF
OUT
V
OUT
V
OUT
1V/div
50mV/div
RESET
5V/div
3.3V
OUT
R = 1kΩ
L
R = 1kΩ
L
1.0ms/div
50ms/div
1ms/div
LOAD TRANSIENT RESPONSE
LINE TRANSIENT RESPONSE
MAX5005-7 toc11a
MAX5005-7 toc10b
5.25V
IN
200mV/div
I
LOAD
V
20mA
0
V
OUT
50mV/div
4.75V
3.3V
C
OUT
= 10µF
V
OUT
V
OUT
50mV/div
50mV/div
3.3V
3.3V
C
OUT
= 4.7µF
I
= 10mA
OUT
OUT
C
= IµF
1.0ms/div
100µs/div
LINE TRANSIENT RESPONSE
TVS PEAK POWER vs. PULSE WIDTH
MAX5005-7 toc11b
MAX5005-7 toc12
1000
100
5.25V
V
IN
200mV/div
4.75V
3.3V
V
OUT
50mV/div
10
1
I
= 10mA
OUT
OUT
C
= 1µF
D+ OR D- WITH RESPECT TO GROUND
100µs/div
0.01
0.1
1
10
100
PULSE WIDTH (µs)
_______________________________________________________________________________________
1
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
Pin Description
PIN
NꢄME
DEꢂCRIPꢀION
Regulator Input. Supply voltage ranges from +4.0V to +5.5V. Bypass with a 1µF ceramic capacitor
to ground.
1
IN
D+ ESD/Transient Suppression Input. Connect directly to USB port D+ data input. SELR high and
ENR low connects D+ to OUT through a 1.5kΩ resistor.
2
3, 9
4
D+
GND
D-
Ground. This pin also functions as a heatsink. Solder to large pads or the circuit board ground
plane to maximize thermal dissipation.
D- ESD/Transient Suppression Input. Connect directly to USB port D- data input. SELR low and
ENR low connects D- to OUT through a 1.5kΩ resistor.
USB Full-Speed/Low-Speed Termination Resistor Select. Logic high connects the termination
resistor to D+ for full-speed peripherals. Logic low connects the termination resistor to D- for low-
speed peripherals. An internal 1.5kΩ resistor connects to OUT when ENR is low.
5
6
SELR
ENR
USB Termination Resistor Enable. When reset is not asserted, ENR low enables the termination
resistor connection. ENR high or a reset disables the termination resistor connection.
Active-Low Reset Output. RESET remains low while V
is below the reset threshold or while MR
OUT
RESET
is held low. RESET remains low for the duration of the reset timeout period after the reset conditions
are terminated. (MꢄX1001/MꢄX1006 ONLY%
7
Active-High Reset Output. RESET remains high while V
is below the reset threshold or while MR
OUT
is held low. RESET remains high for the duration of the reset timeout period after the reset
RESET
conditions are terminated. (MꢄX1007 ONLY%
Active-Low Manual Reset Input. A logic low forces a reset. Reset remains asserted for the duration
of the reset timeout period after MR transitions from low to high. Leave unconnected or connect to
OUT if not used. MR has an internal pullup resistor of 25kΩ to OUT.
8
MR
Voltage Regulator Output. Fixed +3.3V. Sources up to 150mA. Bypass with a 1µF (min) capacitor
for full rated performance.
10
OUT
6
_______________________________________________________________________________________
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
THERMAL
PROTECTION
REVERSE
IN
OUT
3.3V
CURRENT
4.0V to 5.5V
PROTECTION
CURRENT
LIMIT
PROTECTION
ESD/
SURGE
PROTECTION
MAX5005
MAX5006
MAX5007
LDO
ERROR
AMP
200ms
RESET
TIMEOUT
V
REF
RESET/(RESET)
1.23V
RESET
COMPARATOR
GND
25kΩ
USB
TERMINATION
DRIVER
LOW
SPEED
FULL
SPEED
MR
D-
OUT
OUT
1.5kΩ
1.5kΩ
TVS
TVS
D+
( ) FOR MAX5007 ONLY.
GND
SELR
ENR
Figure 1. Functional Diagram
Reset Circuit
Detailed Description
The reset supervisor circuit is fully integrated in the
MAX5005/MAX5006/MAX5007, and uses the same ref-
erence voltage as the regulator. Two supply tolerance
reset thresholds, typically -7.5% and -12.5%, are avail-
able for each type of device.
The MAX5005/MAX5006/MAX5007 are USB applica-
tion-specific, low-dropout, low-quiescent current linear
regulators with an integrated µP reset circuit (see
Figure 1). The devices drive loads up to 150mA and
are available with a fixed output voltage of +3.3V.
Features include 1.5kΩ D+ and D- termination resistors
and 15kV transient voltage suppression (TVS) in
accordance with IEC1000-4-2 (EN61000-4-2) Air
Discharge Method and MILSTD883C- Method 3015-6
making the MAX5005/MAX5006/MAX5007 ideal for use
with USB peripheral devices. The internal reset circuit
monitors the regulator output voltage and asserts a
reset signal when the output is typically -7.5% out of
regulation for MAX500_AEUB and -12.5% out of regula-
tion for MAX500_BEUB.
7.1ꢃ reꢁet: Reset does not assert until the regulator
output voltage is at least -3.6% out of tolerance and
always asserts before the regulator output voltage is
-11.5% out of tolerance.
±2.1ꢃ reꢁet: Reset does not assert until the regulator
output voltage is at least -8.8% out of tolerance and
always asserts before the regulator output voltage is
-16.7% out of tolerance.
Reset Output
The MAX5005/MAX5006/MAX5007 µP supervisory cir-
cuits assert a reset during power-up, power-down, and
_______________________________________________________________________________________
7
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
brownout conditions. Reset is guaranteed to be logic
high or low depending on the device chosen (see
Ordering Information). RESET or RESET asserts when
can be powered from an auxiliary supply such as a
backup battery without any need for additional blocking
diodes.
V
is below the reset threshold and remains assert-
OUT
Current Limit
The MAX5005/MAX5006/MAX5007 include a current
limiter that monitors and controls the pass transistor’s
gate voltage, limiting the output current to 350mA (typ).
For design purposes, consider the current limit to be
160mA (min) to 600mA (max). The output can be short-
ed to ground for an indefinite period without damaging
the part.
ed for at least 100ms minimum after V
rises above
OUT
the reset threshold. RESET or RESET also asserts when
MR is pulled low.
SELR and ENR
When reset is not asserted a logic high to SELR con-
nects a 1.5kΩ termination resistor from D+ to OUT for
full speed USB peripherals and a logic low connects a
1.5kΩ termination resistor from D- to OUT for low-speed
peripherals. Logic low on ENR enables the selected
termination resistor connection and logic high disables
the selected termination resistor connection. An assert-
ed reset always disconnects the termination resistors.
ꢁhermal Protection
When the junction temperature exceeds T = +160°C,
J
an internal thermal sensor signals the shutdown logic,
turning off the pass transistor and allowing the IC to
cool. The thermal sensor turns the pass transistor on
again after the IC’s junction temperature decreases by
20°C, resulting in a pulsed output during continuous
thermal overload conditions. Thermal overload protec-
tion is designed to protect the MAX5005/MAX5006/
MAX5007 in the event of fault conditions. For continu-
ous operation, do not exceed the absolute maximum
D+ and D-
D+ and D- include transient voltage suppressors rated
at
15kV (see USB
15ꢀk Transient koltage
Suppression section).
The proprietary TVS shunt circuit passes no data
through the MAX5005/MAX5006/MAX5007, thereby
eliminating delays associated with series protection cir-
cuits. D+ and D- have only 1µA of leakage current and
a typical input capacitance of 40pF at 1MHz.
junction temperature rating of T = +150°C.
J
Operating Region and Power Dissipation
The MAX5005/MAX5006/MAX5007’s maximum power
dissipation depends on the thermal resistance of the
case and circuit board, the temperature difference
between the die junction and the ambient air, and the
rate of airflow. The power dissipation across the device
Manual Reset Input
Many µP-based products require manual reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic low on MR
asserts a reset while the regulator output voltage is still
within tolerance.
is P = I
tion is:
(V - V
). The maximum power dissipa-
OUT IN
OUT
P
MAX
= (T - T ) / (Θ
)
JA
J
A
Reset remains asserted while MR is low and for the
reset timeout period (100ms minimum) after MR returns
high. The MR input has an internal pullup of 25kΩ (typ)
to OUT. Drive this input with TTL/CMOS logic levels or
with open-drain/collector outputs. Connect a normally
open momentary switch from MR to GND to create a
manual reset function; external debounce circuitry is
not required. If MR is driven from long cables or the
device is used in a noisy environment, connect a 0.1µF
capacitor from MR to GND to provide additional noise
immunity. For proper operation, ensure that the voltage
where T - T is the temperature difference between
J
A
the die junction and the surrounding air, Θ is the ther-
JA
mal resistance of the package from junction to ambient.
The MAX5005/MAX5006/MAX5007’s ground pin (GND)
performs the dual function of providing an electrical
connection to the system ground and channeling heat
away. Connect GND to the system ground using a
large pad or ground plane. For optimum performance,
minimize trace inductance to D+, D-, and GND.
on MR is not greater than a diode drop above V
.
Applications Information
OUT
Output to Input Reverse Leaꢀage
Protection
An internal circuit monitors the input and output volt-
ages. When the output voltage is greater than the input
voltage, the internal pass transistor and parasitic
diodes turn off, and OUT powers the device. There is
no leakage path from OUT to IN. Therefore, the output
Capacitor Selection and Regulator
Stability
For stable operation over the full temperature range
and with load currents up to 150mA, use a 1µF (min)
output capacitor. To reduce noise and improve load
transient response, stability, and power-supply rejec-
tion, use large output capacitor values such as 10µF.
8
_______________________________________________________________________________________
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
Note that some ceramic dielectrics exhibit large capac-
itance and ESR variation with temperature. With
dielectrics such as Z5U and Y5V, it may be necessary
to use 2.2µF or more to ensure stability at temperatures
below -10°C. With X7R or X5R dielectrics, 1µF should
be sufficient at all operating temperatures. Also, for
high-ESR tantalum capacitors, 2.2µF or more may be
needed to maintain stability. A graph of the Region of
ꢁkS Surge ꢁest Information
Figure 2 shows the test circuit used to generate the
8/40µs short circuit waveform of Figure 3. Figures 4, 5,
and 6 show the actual surge current I/V characteristics
with various capacitive loads.
ESD Performance
The MAX5005/MAX5006/MAX5007 are characterized
to the following limits on D+, D-, and IN:
Stable C
ESR vs. Load Current is shown in the
OUT
Typical Operating Characteristics.
•
•
15kV using the Human Body Model
To improve power-supply rejection and transient
response use a 1µF capacitor between IN and GND.
8kV using the Contact Discharge Method specified
in IEC 1000-4-2 (EN61000-4-2)
•
15kV using the Air-Gap Discharge Method speci-
fied in IEC 1000-4-2 (EN61000-4-2).
Negative-Going k
OUꢁ
ꢁransients
These devices are relatively immune to short-duration,
negative-going V transients. The Typical Operating
Note that in order to achieve the above ESD levels on
IN, a ceramic 1µF ceramic capacitor should be con-
nected from IN to GND.
OUT
Characteristics section shows a graph of the Maximum
Pulse Duration vs. Reset Threshold Overdrive for which
reset is not asserted. The graph was produced using
ESD ꢁest Conditions
ESD performance depends on several conditions.
Contact Maxim for a reliability report that documents
test setup, methodology, and results.
negative going output transients starting at V
and
OUT
ending below the reset threshold by the magnitude
indicated (Reset Threshold Overdrive). The graph
shows the maximum pulse width that a negative going
V
transient can typically have without triggering a
OUT
reset pulse. As the amplitude of the transient increases
(i.e., goes further below the reset threshold), the maxi-
mum allowable pulse width decreases. Typically, a
Human Body Model
Figure 7 shows the Human Body Model, and Figure 8
shows the current waveform it generates when dis-
charged into low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the test device through a
1.5kΩ resistor.
V
transient that goes only 10mV below the reset
OUT
threshold and lasts for 75µs will not trigger a reset
pulse.
USB 15ꢀk ꢁransient koltage
Suppression
ESD ꢁransmission Line Pulsing
Figure 9 shows the test circuit used for transmission
line pulsing conditions. The 200ns pulsewidth has a
rise time of 4ns. Figure 10 shows the Current vs.
Voltage characteristics for various output capacitance
values.
The universal serial bus (USB) simplifies interconnectiv-
ity between peripheral devices and personal comput-
ers. USBs offer high-speed data communication rates
(up to 12Mbps) using only two lines (D+ and D-).
CMOS based USB peripherals that utilize deep submi-
cron technologies are more susceptible to electrostatic
discharge (ESD) failure due to shorter channel lengths,
shallower drain/source junctions, and lightly doped
drain structures. The MAX5005/MAX5006/MAX5007
incorporate a proprietary transient voltage suppression
(TVS) circuit for use with submicron devices.
The TVS design complies with IEC-1000-4-2 level 4
(EN61000-4-2) 15kV Air Discharge and 8kV Contact
Discharge as well as MIL STD 883C-Method 3015-6
level 3.
The TVS circuit handles up to 11A of surge current. The
TVS/ESD structure is directly coupled to the output of
the LDO regulator.
_______________________________________________________________________________________
9
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
I 100%
P
JENNINGS
RELAY
80µH
200kΩ
20Ω
RF3D-26S
LEAKAGE
RELAY
40µs
AMPERES
t
2
0.2µF
50%
0
HIGH
VOLTAGE
D+/D-
TVS
2µF
4kV
DEVICE
UNDER
TEST
TIME
0
8µs
t
1
Figure 2. Surge Current Test Circut
Figure 3. Test Circuit Surge Current Waveform (Short-Circuit
Load)
12
12
C
= 0
OUT
10
8
10
8/40µs PULSE WIDTH
D+ OR D- TO GND
8
6
8/40µs PULSE WIDTH
6
C
= 1µF
OUT
4
4
2
0
D+ OR D- TO GND
2
0
0
2
4
6
8
10 12 14 16 18 20
0
2
4
6
8
10 12 14 16 18
VOLTAGE (V)
VOLTAGE (V)
Figure 4. Surge Current I/k Characteristic (C
= 0)
OUT
Figure 5. Surge Current I/k Characteristic (C
= 1µF)
OUT
12
10
8/40µs PULSE WIDTH
8
6
C
= 10µF
OUT
4
2
0
D+ OR D- TO GND
0
2
4
6
8
10 12 14 16 18
VOLTAGE (V)
Figure 6. Surge Current I/k Characteristic (C
= 10µF)
OUT
±0 ______________________________________________________________________________________
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
R
R
D
1500Ω
C
1MΩ
I 100%
P
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
r
DISCHARGE
RESISTANCE
CHARGE-CURRENT
LIMIT RESISTOR
AMPERES
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
36.8%
C
STORAGE
CAPACITOR
s
100pF
10%
0
SOURCE
TIME
0
t
RL
t
DL
CURRENT WAVEFORM
Figure 7. Human Body ESD Test Model
Figure 8. Human Body Model Current Waveform
7
6
5
4
3
2
1
0
D+ OR D- TO GND
= 0
C
OUT
L
10MΩ
200ns PULSE WIDTH
Zo = 50Ω
SCOPE
DEVICE
V
IN
R
L
0
2
4
6
8
10 12 14 16
VOLTAGE (V)
Figure 10. Transmission Line Pulsing I/k Characteristic
(C = 0)
OUT
t
= 4ns
RISE
7
6
5
4
3
2
1
0
D+ OR D- TO GND
= 1µF
C
OUT
200ns PULSE WIDTH
t
= 200ns
pw
Figure 9. Transmission Line Pulsing Setup for ESD I/k
Characteristics
0
2
4
6
8
10 12 14 16
VOLTAGE (V)
Figure 11. Transmission Line Pulsing I/k Characteristic
(C = 1µF)
OUT
______________________________________________________________________________________ ±±
150mA USB LDO Regulators with 15ꢀk ꢁkS
and µP Reset
Chip Information
7
6
5
4
3
2
1
0
TRANSISTOR COUNT: 890
PROCESS: BiCMOS
D+ OR D- TO GND
= 10µF
C
OUT
200ns PULSE WIDTH
0
2
4
6
8
10 12 14 16
VOLTAGE (V)
±2 ______________________________________________________________________________________
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