MAX5048C [MAXIM]
7A Sink/3A Source Current;
| 型号： | MAX5048C |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 7A Sink/3A Source Current |
| 文件： | 总11页 (文件大小：1071K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX5048C
7A Sink/3A Source Current, 8ns,
SOT23, MOSFET Driver
General Description
Benefits and Features
● Improved Power Conversion Efficiency
The MAX5048C is a high-speed MOSFET driver capable
of sinking/sourcing 7A/3A peak currents. This device
takes logic input signals and drives a large external
MOSFET. The device has inverting and noninverting
inputs that give the user greater flexibility in controlling the
MOSFET. The device also has the features necessary to
drive low-side enhancement-mode Gallium Nitride (GaN)
FETs. The device features two separate outputs working
in complementary mode, offering flexibility in controlling
both turn-on and turn-off switching speeds.
• Lowꢀ8nsꢀPropagationꢀDelayꢀ
• 5ns Typical Rise and 4ns Typical Fall Times with
1nF Load
• 0.3ΩꢀOpen-Drainꢀn-ChannelꢀSinkꢀOutputꢀ
• 0.84ΩꢀOpen-Drainꢀp-ChannelꢀSourceꢀOutputꢀ
● Improved EMI
• Independent Source/Sink Outputs for Controllable
Rise and Fall Times
● Reduced Solution Size and Cost
• Low Input Capacitance (10pF, typ)
• 6-Pin SOT-23 Package
The device has internal logic circuitry, which prevents
shoot-through during output state changes. The logic
inputs are protected against voltage spikes up to +14V,
regardless of V+ voltage. Propagation delay time is
minimized and matched between the inverting and
noninverting inputs. The device has very fast switching
times combined with very short propagation delays (8ns,
typ) making it ideal for high-frequency circuits.
• +4V to +14V Single Power Supply
● Greater Flexibility in Controlling the MOSFET
• MatchingꢀDelayꢀTimeꢀBetweenꢀInvertingꢀandꢀ
Noninverting Inputs
• 7A/3AꢀPeakꢀSink/SourceꢀDriveꢀCurrentꢀ
• TTL Logic-Level Inputs with Hysteresis for Noise
Immunity
The device operates from a +4V to +14V single power
supply, typically consuming 0.5mA of supply current and
has TTL input logic levels. This device is available in a
6-pin SOT23 package and provides an upgrade path for
users of the MAX5048B.
● Improved System Reliabilty
• Inputs Rated to +14V Regardless of V+ Voltage
• Thermal Shutdown Protection
• -40°C to +125°C Operating Temperature Range
● Easy Upgrade from MAX5048B
Applications
●ꢀ PowerꢀMOSFETꢀSwitching
●ꢀ Switch-ModeꢀPowerꢀSupplies
●ꢀ DC-DCꢀConverters
• Pin-Compatible with the MAX5048B
Typical Operating Circuit
●ꢀ MotorꢀControl
●ꢀ Power-SupplyꢀModules
V+
V+
P_OUT
MAX5048C
Ordering Information appears at end of data sheet.
IN+
IN-
N
N_OUT
GND
19-6451; Rev 1; 1/15
MAX5048C
7A Sink/3A Source Current, 8ns,
SOT23, MOSFET Driver
Absolute Maximum Ratings
V+,ꢀIN+,ꢀIN-,ꢀP_OUT,ꢀN_OUTꢀtoꢀGND ..................-0.3V to +16V
Operating Temperature Range......................... -40°C to +125°C
Storage Temperature Range............................ -65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
(Note 1)
Package Thermal Characteristics
Junction-to-AmbientꢀThermalꢀResistanceꢀ(θ ) ..............80°C/W
JA
Note 1: Measured on the MAX5048C evaluation kit.
Electrical Characteristics
(V+ = 12V, C = 0, T = -40°C to +125°C, unless otherwise noted. Typical values are specified at T = +25°C.) (Note 2)
L
A
A
PARAMETER
POWER SUPPLY (V+)
V+ Operating Range
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V+
4
14
V
V
V+ Undervoltage Lockout
V+ UVLO Hysteresis
UVLO V+ rising
3.28
3.45
200
127
0.5
3.63
mV
µs
V+ꢀUVLOꢀtoꢀOutputꢀDelay
V+ꢀrising,ꢀIN+ꢀ=ꢀV+,ꢀIN-ꢀ=ꢀGND
Not switching, V+ = 14V
I+
1
Q
V+ Supply Current
mA
I+
V+ = 6 V, switching at 1MHz
2.65
SW
n-CHANNEL OUTPUT
V+ = 14V, I
= -100mA
= -100mA
0.31
0.32
6.1
1.29
6.5
7
0.55
0.56
8.5
DriverꢀOutputꢀResistanceꢀPullingꢀ
Down
N_OUT
R
Ω
ON-N
V+ = 4.5V, I
N_OUT
Power-Off Pulldown Resistance
Power-Off Pulldown Clamp Voltage
Output Leakage Current
V+ = unconnected, I
V+ = unconnected, I
N_OUT = 14V
= -10mA, T = +25NC
4
Ω
V
N_OUT
A
= -10mA, T = +25NC
0.95
1.65
11
N_OUT
A
I
µA
A
LK-N
Peak Output Current (Sinking)
p-CHANNEL OUTPUT
I
C = 10 nF
L
PK-N
V+ = 14V, I
= 100mA
= 100mA
0.84
0.88
1.47
1.55
+1
DriverꢀOutputꢀResistanceꢀPullingꢀ
Up
P_OUT
R
Ω
ON-P
V+ = 4.5V, I
P_OUT
Output Leakage Current
Peak Output Current (Sourcing)
LOGIC INPUT (IN+, IN-)
Logic High Input Voltage
Logic Low Input Voltage
Logic Input Hysteresis
Logic Input Current
I
P_OUT = 0V
C = 10nF
-1
2.0
µA
A
LK-P
I
3
PK-P
L
V
V
V
IH
V
0.8
IL
V
300
10
mV
nA
pF
HYS
IN+ = IN- = V+ or 0V, V+ = 14V
(Note 3)
-1000
+1000
Logic Input Capacitance
C
IN
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MAX5048C
7A Sink/3A Source Current, 8ns,
SOT23, MOSFET Driver
Electrical Characteristics (continued)
(V+ = 12V, C = 0, T = -40°C to +125°C, unless otherwise noted. Typical values are specified at T = +25°C.) (Note 2)
L
A
A
SWITCHING CHARACTERISTICS (V+ = 14V) (Figure 2 and Note 3)
C = 1nF
5
19
37
4
L
Rise Time
t
C = 4.7nF
ns
ns
R
L
C = 10nF
L
C = 1nF
L
Fall Time
t
C = 4.7nF
10
18
7
F
L
C = 10nF
L
Turn-OnꢀDelayꢀTime
Turn-OffꢀDelayꢀTime
Break-Before-Make Time
t
C = 1nF
3
18
18
ns
ns
ns
D-ON
L
t
C = 1nF
3
7
D-OFF
L
5
SWITCHING CHARACTERISTICS (V+ = 4.5V) (Figure 2 and Note 3)
C = 1nF
4
13
28
4
L
Rise Time
Fall Time
t
C = 4.7nF
ns
ns
R
L
C = 10nF
L
C = 1nF
L
t
C = 4.7nF
7
F
L
C = 10nF
13
8
L
Turn-OnꢀDelayꢀTime
t
C = 1nF
2
2
21
21
ns
ns
ns
D-ON
L
Turn-OffꢀDelayꢀTime
t
C = 1nF
L
8
D-OFF
Break-Before-Make Time
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
5
Temperature rising
166
13
ºC
ºC
Note 2: All devices are production tested at T = +25°C. Limits over temperature are guaranteed by design.
A
Note 3:ꢀ Designꢀguaranteedꢀbyꢀbenchꢀcharacterization.ꢀLimitsꢀareꢀnotꢀproduction tested.
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MAX5048C
7A Sink/3A Source Current, 8ns,
SOT23, MOSFET Driver
Typical Operating Characteristics
(C = 1nF, T = +25°C, unless otherwise noted.)
L
A
PROPAGATION DELAY TIME
(LOW TO HIGH) vs. SUPPLY VOLTAGE
FALL TIME vs. SUPPLY VOLTAGE
RISE TIME vs. SUPPLY VOLTAGE
4.0
3.5
3.0
2.5
2.0
3.0
2.5
2.0
1.5
18
16
14
12
10
8
T
= +125°C
A
T
= +125°C
A
T
= +25°C
A
T
= +85°C
A
T
= +125°C
T
= +25°C
A
A
T
= +85°C
A
T
= +25°C
A
T
= +85°C
A
T
= -40°C
A
T
A
= 0°C
T
= 0°C
T
= -40°C
12
A
A
T
= 0°C
A
T
= -40°C
12
A
4
6
8
10
14
4
6
8
10
12
14
4
0
0
6
8
10
14
SUPPLY VOLTAGE, V+ (V)
SUPPLY VOLTAGE, V+ (V)
SUPPLY VOLTAGE, V+ (V)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE (C = 0nF)
L
PROPAGATION DELAY TIME
(HIGH TO LOW) vs. SUPPLY VOLTAGE
SUPPLY CURRRENT vs. LOAD
CAPACITANCE (V+ = 10V, f =100kHz)
3.0
2.5
2.0
1.5
1.0
0.5
0
18
16
14
12
10
8
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1MHz
T
= +125°C
A
500kHz
T
= +85°C
A
T
= +25°C
A
T
100kHz 75kHz
40kHz
T
= 0°C
A
= -40°C
12
A
4
6
8
10
12
14
4
6
8
10
14
500
1000
1500
2000
2500
SUPPLY VOLTAGE, V+ (V)
SUPPLY VOLTAGE, V+ (V)
LOAD CAPACITANCE (nF)
SUPPLY CURRENT vs. TEMPERATURE
(V+ = 10V, C = 0nF, f = 100kHz)
INPUT THRESHOLD VOLTAGE
vs. SUPPLY VOLTAGE (C = 0nF)
L
SUPPLY CURRENT vs. LOGIC INPUT
VOLTAGE (V+ = 10V, C = 0nF)
L
L
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
3.0
2.5
2.0
1.5
1.0
0.5
0
0.9
0.8
0.7
0.6
0.5
0.4
RISING
RISING
FALLING
FALLING
-40 -20
0
20 40 60 80 100 120
4
6
8
10
12
14
1
2
3
4
5
6
7
8
9
10 11 12 13 14
AMBIENT TEMPERATURE (°C)
SUPPLY VOLTAGE, V+ (V)
LOGIC INPUT VOLTAGE (V)
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MAX5048C
7A Sink/3A Source Current, 8ns,
SOT23, MOSFET Driver
Typical Operating Characteristics (continued)
(C = 1nF, T = +25°C, unless otherwise noted.)
L
A
LOGIC INPUT VOLTAGE vs. OUTPUT
VOLTAGE (V+ = +4V, C = 4.7nF)
LOGIC INPUT VOLTAGE vs. OUTPUT
VOLTAGE (V+ = +4V, C = 10nF)
LOGIC INPUT VOLTAGE vs. OUTPUT
VOLTAGE (V+ = +4V, C = 4.7nF)
L
L
L
MAX5048C toc10
MAX5048C toc11
MAX5048C toc12
IN+
2V/div
IN+
2V/div
IN+
2V/div
OUTPUT
2V/div
OUTPUT
2V/div
OUTPUT
2V/div
20ns/div
20ns/div
20ns/div
LOGIC INPUT VOLTAGE vs. OUTPUT
LOGIC INPUT VOLTAGE vs. OUTPUT
LOGIC INPUT VOLTAGE vs. OUTPUT
VOLTAGE (V+ = +14V, C = 10nF)
L
MAX5048C toc15
VOLTAGE (V+ = +4V, C = 10nF)
VOLTAGE (V+ = +14V, C = 4.7nF)
L
L
MAX5048C toc13
MAX5048C toc14
IN+
5V/div
IN+
5V/div
IN+
2V/div
OUTPUT
5V/div
OUTPUT
5V/div
OUTPUT
2V/div
20ns/div
20ns/div
20ns/div
LOGIC INPUT VOLTAGE vs. OUTPUT
VOLTAGE (V+ = +14V, C = 4.7nF)
LOGIC INPUT VOLTAGE vs. OUTPUT
VOLTAGE (V+ = +14V, C = 10nF)
L
L
MAX5048C toc16
MAX5048C toc17
IN+
5V/div
IN+
5V/div
OUTPUT
5V/div
OUTPUT
5V/div
20ns/div
20ns/div
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MAX5048C
7A Sink/3A Source Current, 8ns,
SOT23, MOSFET Driver
Pin Configuration
Pin Description
PIN
NAME
FUNCTION
Power-SupplyꢀInput.ꢀBypassꢀtoꢀGNDꢀ
with a minimum of 1µF low-ESR
ceramic capacitor.
TOP VIEW
1
V+
+
V+
P_OUT
N_OUT
1
2
3
6
5
4
IN+
IN-
Open-Drainꢀp-ChannelꢀOutput.ꢀ
Sources current for MOSFET turn-on.
2
P_OUT
MAX5048C
Open-Drainꢀn-ChannelꢀOutput.ꢀSinksꢀ
current for MOSFET turn-off.
3
4
5
N_OUT
GND
IN-
Ground
GND
Inverting Logic Input Terminal. Connect
toꢀGNDꢀwhenꢀnotꢀused.
Noninverting Logic Input Terminal.
Connect to V+ when not used.
6
IN+
Functional Diagram
V+
MAX5048C
IN+
IN-
P
N
P_OUT
BREAK-
BEFORE-
MAKE
N_OUT
CONTROL
GND
Figure 1. MAX5048C Functional Block Diagram
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MAX5048C
7A Sink/3A Source Current, 8ns,
SOT23, MOSFET Driver
Timing Diagram and Test Circuit
IN+
V
IH
V
IL
OUT
90%
10%
td-off
tf
td-on
tr
MAX5048C
V+
V+
P_OUT
N_OUT
IN+
IN-
IN+
IN-
OUT
C
L
GND
Figure 2. Timing Diagram and Test Circuit for IN+ Operation
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MAX5048C
7A Sink/3A Source Current, 8ns,
SOT23, MOSFET Driver
theꢀ V+,ꢀ P_OUT,ꢀ N_OUT,ꢀ and/orꢀ GNDꢀ pathsꢀ canꢀ causeꢀ
oscillations due to the very high di/dt that results when the
device is switched with any capacitive load. A minimum
of 1µF, low-ESR ceramic capacitor is recommended,
bypassingꢀ V+ꢀ toꢀ GNDꢀ andꢀ placedꢀ asꢀ closeꢀ asꢀ possibleꢀ
to the pins. When driving very large loads (e.g., 10nF)
at minimum rise time, 10µF or more of parallel storage
capacitance is recommended. A ground plane is highly
recommended to minimize ground return resistance and
series inductance. Care should be taken to place the
device as close as possible to the external MOSFET
being driven to further minimize board inductance and AC
path resistance.
Table 1. Truth Table
IN+
L
IN-
L
P_OUT
Off
N_OUT
On
L
H
L
Off
On
H
On
Off
H
H
Off
On
L = Logic-low.
H = Logic-high.
Detailed Description
Logic Inputs
Power Dissipation
The MAX5048C has a TTL inverting and noninverting
input that gives the user greater flexibility in control-
ling the MOSFET. Table 1 shows all the possible input
combinations and the corresponding output states.
Power dissipation of the device consists of three compo-
nents, caused by the quiescent current, capacitive charge
and discharge of internal nodes, and the output current
(either capacitive or resistive load). The sum of these
components must be kept below the maximum power-
dissipation limit corresponding value.
Undervoltage Lockout (UVLO)
When V+ is below the UVLO threshold, the output-
stage n-channel device is on and the p-channel is off,
independent of the state of the inputs. This holds the
outputs low. The UVLO is typically 3.45V with 200mV
typical hysteresis to avoid chattering.
The quiescent current is 0.5mA (typ). The current required
to charge and discharge the internal nodes is frequency
dependent (see the Typical Operating Characteristics).
The device’s approximate power dissipation when driving
a ground-referenced resistive load is:
Driver Outputs
2
Pꢀ=ꢀDꢀxꢀR
(MAX) x I
LOAD
ON
The device provides two separate outputs. One is an
open-drain p-channel, the other an open-drain n-channel.
They have distinct current sourcing/sinking capabilities
to independently control the rise and fall times of the
MOSFET gate. Add a resistor in series with P_OUT/
N_OUT to slow the corresponding rise/fall time of the
MOSFET gate.
whereꢀ Dꢀ isꢀ theꢀ fractionꢀ ofꢀ theꢀ periodꢀ thatꢀ theꢀ deviceꢀ
output pulls high, R (MAX) is the maximum pullup
ON
on-resistance of the device with the output high, and
is the output load current of the device.
I
LOAD
For capacitive loads, the approximate power dissipation is:
P = C
x (V+) 2 x FREQ
LOAD
where C
is the capacitive load, V+ is the supply
Applications Information
LOAD
voltage, and FREQ is the switching frequency.
Supply Bypassing, Device Grounding, and
Placement
PCB Layout Information
The MOSFET driver can source and sink large currents
to create very fast rise and fall edges at the gate of the
switching MOSFET. The high di/dt can cause unaccept-
able ringing if the trace lengths and impedances are not
well controlled. The following PCB layout guidelines are
recommended when designing with the MAX5048C:
Ample supply bypassing and device grounding are
extremely important because when large external
capacitive loads are driven, the peak current at the V+ pin
canꢀapproachꢀ3A,ꢀwhileꢀatꢀtheꢀGNDꢀpinꢀtheꢀpeakꢀcurrentꢀ
can approach 7A. V+ drops and ground shifts are forms
of negative feedback for inverters and, if excessive, can
cause multiple switching when the inverting input is used
and the input slew rate is low. The device driving the input
shouldꢀbeꢀreferencedꢀtoꢀtheꢀGNDꢀpin,ꢀespeciallyꢀwhenꢀtheꢀ
inverting input is used. Ground shifts due to insufficient
device grounding may disturb other circuits sharing the
same AC ground return path. Any series inductance in
●ꢀ Placeꢀatꢀleastꢀ1µFꢀdecouplingꢀceramicꢀcapacitorꢀfromꢀ
V+ꢀtoꢀGNDꢀasꢀcloseꢀasꢀpossibleꢀtoꢀtheꢀdevice.ꢀAtꢀleastꢀ
one storage capacitor of 10µF (min) should be located
on the PCB with a low resistance path to the V+ pin of
the device.
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MAX5048C
7A Sink/3A Source Current, 8ns,
SOT23, MOSFET Driver
●ꢀ ThereꢀareꢀtwoꢀACꢀcurrentꢀloopsꢀformedꢀbetweenꢀtheꢀ
device and the gate of the MOSFET being driven.
The MOSFET looks like a large capacitance from
gate to source when the gate is being pulled low. The
active current loop is from N_OUT of the device to the
MOSFETꢀgate,ꢀtoꢀtheꢀMOSFETꢀsource,ꢀandꢀtoꢀGNDꢀofꢀ
the device.
GNDꢀterminalꢀofꢀtheꢀdecouplingꢀcapacitor,ꢀtoꢀtheꢀV+ꢀ
terminal of the decoupling capacitor, and to the V+
terminal of the device. While the charging current
loop is important, the discharging current loop is also
critical. It is important to minimize the physical distance
and the impedance in these AC current loops.
●ꢀ InꢀaꢀmultilayerꢀPCB,ꢀtheꢀcomponentꢀsurfaceꢀlayerꢀsur-
roundingꢀ theꢀ deviceꢀ shouldꢀ consistꢀ ofꢀ aꢀ GNDꢀ planeꢀ
containing the discharging and charging current loops.
●ꢀ WhenꢀtheꢀgateꢀofꢀtheꢀMOSFETꢀisꢀbeingꢀpulledꢀhigh,ꢀ
the active current loop is from P_OUT of the device,
to the MOSFET gate, to the MOSFET source, to the
Typical Application Circuits
V
S
(4V TO 14V)
V+
V+
P_OUT
(4V TO 14V)
MAX5048C
V+
N_OUT
IN+
IN-
P_OUT
IN+
IN-
P
MAX5048C
N_OUT
GND
FROM PWM
CONTROLLER
(BUCK)
GND
Figure 3. Noninverting Application
V
OUT
V
S
V+
V+
P_OUT
(4V TO 14V)
V+
IN+
MAX5048C
P_OUT
V
OUT
MAX5048C
IN+
IN-
N_OUT
FROM PWM
CONTROLLER
(BOOST)
N_OUT
IN-
GND
GND
Figure 4. Boost Converter
Figure 5. MAX5048C in High-Power Synchronous Buck
Converter
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MAX5048C
7A Sink/3A Source Current, 8ns,
SOT23, MOSFET Driver
Ordering Information
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
TEMP
PART
PIN-
LOGIC
TOP
MARK
RANGE PACKAGE INPUT
-40°C to
+125°C
MAX5048CAUT+
6 SOT23
TTL
+ACSC
+Denotes a lead(Pb)-free/RoHS-compliant package.
PACKAGE
TYPE
PACKAGE
CODE
LAND PATTERN
NO.
OUTLINE NO.
21-0058
Chip Information
PROCESS: BiCMOS
6 SOT23
U6+8
90-0175
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MAX5048C
7A Sink/3A Source Current, 8ns,
SOT23, MOSFET Driver
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
1
11/12
1/15
Initial release
Updated Benefits and Features section
—
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2015 Maxim Integrated Products, Inc.
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D/A Converter, 1 Func, Serial Input Loading, 25us Settling Time, PDIP14, 0.300 INCH, PLASTIC, DIP-14
MAXIM
MAX504ESD+
D/A Converter, 1 Func, Serial Input Loading, 25us Settling Time, PDSO14, 0.150 INCH, SOIC-14
MAXIM
MAX504ESD+T
D/A Converter, 1 Func, Serial Input Loading, 25us Settling Time, PDSO14, 0.150 INCH, SOIC-14
MAXIM
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