MAX5142EUB-T [MAXIM]

D/A Converter, 1 Func, Serial Input Loading, 1us Settling Time, PDSO10, MICRO MAX PACKAGE-10;
MAX5142EUB-T
型号: MAX5142EUB-T
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

D/A Converter, 1 Func, Serial Input Loading, 1us Settling Time, PDSO10, MICRO MAX PACKAGE-10

文件: 总12页 (文件大小:410K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-1849; Rev 1; 5/01  
+3V/+5V, Serial-Input,  
Voltage-Output, 14-Bit DACs  
General Description  
Features  
The MAX5141–MAX5144 are serial-input, voltage-output,  
14-bit digital-to-analog converters (DACs) in tiny µMAX  
packages, 50% smaller than comparable DACs in an  
8-pin SO. They operate from low +3V (MAX5143/  
MAX5144) or +5V (MAX5141/MAX5142) single supplies.  
They provide 14-bit performance ( 1ꢀSꢁ ꢂIꢀ and DIꢀ)  
over temperature without any adjustments. The DAC out-  
put is unbuffered, resulting in a low supply current of  
120µA and a low offset error of 2ꢀSꢁs.  
o Miniature (3mm x 5mm) 8-Pin µMAX Package  
o Low 120µA Supply Current  
o Fast 1µs Settling Time  
o 25MHz SPI/QSPI/MICROWIRE-Compatible Serial  
Interface  
o V  
Range Extends to V  
DD  
REF  
o +5V (MAX5141/MAX5142) or +3V  
(MAX5143/MAX5144) Single-Supply Operation  
The DAC output range is 0V to V  
For bipolar opera-  
REF.  
tion, matched scaling resistors are provided in the  
MAX5142/MAX5144 for use with an external precision op  
o Full 14-Bit Performance Without Adjustments  
o Unbuffered Voltage Output Directly Drives 60k  
amp (such as the MAX400), generating a  
swing.  
V
REF  
output  
Loads  
o Power-On Reset Circuit Clears DAC Output to  
Code 0 (MAX5141/MAX5143) or Code 8192  
(MAX5142/MAX5144)  
A 16-bit serial word is used to load data into the DAC  
latch. The 25MHz, 3-wire serial interface is compatible  
with SPꢂ™/QSPꢂ™/MꢂCROWꢂRE™, and can interface  
directly with optocouplers for applications requiring isola-  
tion. A power-on reset circuit clears the DAC output to  
code 0 (MAX5141/MAX5143) or code 8192 (MAX5142/  
MAX5144) when power is initially applied.  
o Schmitt-Trigger Inputs for Direct Optocoupler  
Interface  
o Asynchronous CLR  
A logic low on CLR asynchronously clears the DAC out-  
put to code 0 (MAX5141/MAX5143) or code 8192  
(MAX5142/MAX5144), independent of the serial interface.  
Pin Configurations  
The MAX5141/MAX5143 are available in 8-pin µMAX  
packages and the MAX5142/MAX5144 are available in  
10-pin µMAX packages.  
TOP VIEW  
GND  
REF  
CS  
1
2
3
4
5
10  
9
GND  
1
2
3
4
8
7
6
5
REF  
CS  
V
DD  
V
DD  
Applications  
High-Resolution and Gain Adjustment  
ꢂndustrial Process Control  
MAX5141  
MAX5143  
MAX5142  
MAX5144  
SCLK  
DIN  
8
RFB  
INV  
OUT  
CLR  
SCLK  
DIN  
7
CLR  
OUT  
6
Automated Test Equipment  
µMAX  
µMAX  
Data-Acquisition Systems  
Ordering Information  
SUPPLY  
PART  
TEMP. RANGE  
PIN-PACKAGE  
INL (LSB)  
OUTPUT SWING  
RANGE (V)  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
8 µMAX  
10 µMAX  
8 µMAX  
1
1
1
1
5
5
3
3
Unipolar  
Bipolar  
Unipolar  
Bipolar  
MAX5141EUA  
MAX5142EUB  
MAX5143EUA  
MAX5144EUB  
10 µMAX  
SPI and QSPI are trademarks of Motorola, Inc.  
MICROWIRE is a trademark of National Semiconductor Corp.  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  
+3V/+5V, Serial-Input,  
Voltage-Output, 14-Bit DACs  
ABSOLUTE MAXIMUM RATINGS  
DD  
V
to GND..............................................................-0.3V to +6V  
Operating Temperature Ranges  
CS, SCLK, DIN, CLR to GND ...................................-0.3V to +6V  
REF to GND................................................-0.3V to (V + 0.3V)  
MAX514_ EUA...................................................-40°C to +85°C  
MAX514_ EUB...................................................-40°C to +85°C  
Storage Temperature Range.............................-65°C to +150°C  
Maximum Die Temperature..............................................+150°C  
Lead Temperature (soldering, 10s) .................................+300°C  
DD  
OUT, INV to GND .....................................................-0.3V to V  
DD  
RFB to INV...................................................................-6V to +6V  
RFB to GND.................................................................-6V to +6V  
Maximum Current into Any Pin............................................50mA  
Continuous Power Dissipation (T = +70°C)  
A
8-Pin µMAX (derate 4.5mW/°C above +70°C)...............362mW  
10-Pin µMAX (derate 5.6mW/°C above +70°C).............444mW  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
ELECTRICAL CHARACTERISTICS  
DD  
(V  
= +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), V  
= +2.5V, T = T  
to T  
, C = 10 F, GND = 0, R = ,  
REF  
A
MIN  
MAX  
L
p
L
unless otherwise noted. Typical values are at T = +25°C.)  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
STATIC PERFORMANCE—ANALOG SECTION  
Resolution  
N
14  
Bits  
LSB  
Differential Nonlinearity  
Integral Nonlinearity  
Zero-Code Offset Error  
Zero-Code Tempco  
Gain Error (Note 1)  
Gain-Error Tempco  
DAC Output Resistance  
DNL  
INL  
ZSE  
Guaranteed monotonic  
0.5  
0.5  
1
1
2
MAX514_  
LSB  
LSB  
ZS  
0.05  
ppm/°C  
LSB  
TC  
10  
0.1  
6.2  
1
ppm/°C  
kΩ  
R
(Note 2)  
OUT  
R /R  
FB INV  
Bipolar Resistor Matching  
%
0.03  
20  
Ratio error  
Bipolar Zero Offset Error  
Bipolar Zero Tempco  
LSB  
BZS  
0.5  
ppm/°C  
TC  
+2.7V V  
+4.5V V  
+3.3V (MAX5143/MAX5144)  
1
1
DD  
PSR  
Power-Supply Rejection  
LSB  
+5.5V (MAX5141/MAX5142)  
DD  
Reference Input Range  
V
R
(Note 3)  
2.0  
10  
6
V
V
REF  
DD  
Unipolar mode  
Bipolar mode  
Reference Input Resistance  
(Note 4)  
kΩ  
REF  
DYNAMIC PERFORMANCE—ANALOG SECTION  
Voltage-Output Slew Rate  
Output Settling Time  
DAC Glitch Impulse  
SR  
(Note 5)  
To 1/2LSB of FS  
15  
1
V/µs  
µs  
Major-carry transition  
7
nV-s  
Code = 0000 hex; CS = V  
;
DD  
Digital Feedthrough  
0.2  
nV-s  
SCLK, DIN = 0V to V  
levels  
DD  
2
_______________________________________________________________________________________  
+3V/+5V, Serial-Input,  
Voltage-Output, 14-Bit DACs  
ELECTRICAL CHARACTERISTICS (continued)  
(V  
= +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), V  
= +2.5V, T = T  
to T  
, C = 10 F, GND = 0, RL = ,  
DD  
REF  
A
MIN  
MAX  
L
p
unless otherwise noted. Typical values are at T = +25°C.)  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
DYNAMIC PERFORMANCE—REFERENCE SECTION  
Reference -3dB Bandwidth  
Reference Feedthrough  
Signal-to-Noise Ratio  
BW  
Code = 3FFF hex  
1
1
MHz  
Code = 0000 hex, V  
= 1V  
at 100kHz  
mV  
P-P  
REF  
P-P  
SNR  
92  
70  
170  
dB  
Code = 0000 hex  
Code = 3FFF hex  
Reference Input Capacitance  
C
INREF  
pF  
STATIC PERFORMANCE—DIGITAL INPUTS  
Input High Voltage  
Input Low Voltage  
Input Current  
V
2.4  
V
V
IH  
V
0.8  
1
IL  
I
IN  
µA  
pF  
V
Input Capacitance  
Hysteresis Voltage  
POWER SUPPLY  
C
(Note 6)  
3
10  
IN  
V
0.15  
H
MAX5143/MAX5144  
MAX5141/MAX5142  
2.7  
4.5  
3.6  
5.5  
Positive Supply Range (Note 7)  
Positive Supply Current  
Power Dissipation  
V
V
DD  
I
All digital inputs at V  
or GND  
0.12  
0.36  
0.60  
0.20  
mA  
mW  
DD  
DD  
MAX5143/MAX5144  
MAX5141/MAX5142  
All digital inputs at  
PD  
V
DD  
or GND  
TIMING CHARACTERISTICS  
(V  
= +2.7V to +3.3V (MAX5143/MAX5144), V  
= +4.5V to +5.5V (MAX5141/MAX5142), V  
= +2.5V, GND = 0, CMOS inputs,  
DD  
REF  
DD  
T
A
= T  
to T  
, unless otherwise noted. Typical values are at T = +25°C.) (Figure 1)  
MAX  
A
MIN  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
MHz  
ns  
SCLK Frequency  
f
25  
CLK  
SCLK Pulse Width High  
SCLK Pulse Width Low  
CS Low to SCLK High Setup  
CS High to SCLK High Setup  
SCLK High to CS Low Hold  
SCLK High to CS High Hold  
DIN to SCLK High Setup  
DIN to SCLK High Hold  
CLR Pulse Width Low  
t
20  
20  
15  
15  
35  
20  
15  
0
CH  
t
CL  
ns  
t
t
t
ns  
CSS0  
CSS1  
ns  
(Note 6)  
ns  
CSH0  
CSH1  
t
ns  
t
ns  
DS  
t
ns  
DH  
t
20  
ns  
CLW  
V
High to CS Low  
DD  
20  
µs  
(Power-Up Delay)  
Note 1: Gain error tested at V  
= +2.0V, +2.5V, and +3.0V (MAX5143/MAX5144) or V  
= +2.0V, +2.5V, +3.0V, and +5.0V  
REF  
REF  
(MAX5141/MAX5142).  
Note 2: R tolerance is typically 20%.  
OUT  
Note 3: Min/max range guaranteed by gain-error test. Operation outside min/max limits will result in degraded performance.  
Note 4: Reference input resistance is code dependent, minimum at 2155 hex in unipolar mode, 1155 hex in bipolar mode.  
Note 5: Slew-rate value is measured from 10% to 90%.  
Note 6: Guaranteed by design. Not production tested.  
Note 7: Guaranteed by power-supply rejection test and Timing Characteristics.  
_______________________________________________________________________________________  
3
+3V/+5V, Serial-Input, Voltage-Output, 14-Bit  
DACs  
Typical Operating Characteristics  
(V = +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), V  
= +2.5V, T = T  
to T  
, GND = 0, R = , unless otherwise  
DD  
REF  
A
MIN  
MAX  
L
noted. Typical values are at T = +25°C.)  
A
SUPPLY CURRENT  
vs. REFERENCE VOLTAGE  
SUPPLY CURRENT  
vs. REFERENCE VOLTAGE  
SUPPLY CURRENT vs. TEMPERATURE  
0.12  
0.11  
0.10  
0.09  
0.08  
0.07  
0.12  
0.11  
0.10  
0.09  
0.08  
0.07  
0.06  
0.05  
0.150  
V
= +5V  
0.125  
0.100  
0.075  
0.050  
0.025  
0
DD  
V
= +3V  
DD  
0.06  
0.05  
V
= +3V  
2.0  
V
= +5V  
DD  
DD  
0
0.5  
1.0  
1.5  
2.5  
3.0  
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0  
REFERENCE VOLTAGE (V)  
-40  
-40  
-40  
-15  
10  
35  
60  
85  
85  
85  
REFERENCE VOLTAGE (V)  
TEMPERATURE (°C)  
DIFFERENTIAL NONLINEARITY  
vs. TEMPERATURE  
ZERO-CODE OFFSET ERROR  
vs. TEMPERATURE  
INTEGRAL NONLINEARITY  
vs. TEMPERATURE  
0.2  
0.1  
0.4  
0.3  
0.2  
0.1  
0
0.8  
0.6  
0.4  
0.2  
0
+DNL  
+INL  
0
-0.1  
-0.2  
-0.3  
-0.4  
-DNL  
-0.1  
-0.2  
-0.2  
-0.4  
-INL  
-40  
-15  
10  
35  
60  
85  
-15  
10  
35  
60  
-40  
-15  
10  
35  
60  
85  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
DIFFERENTIAL NONLINEARITY vs. CODE  
INTEGRAL NONLINEARITY vs. CODE  
MAX5141 toc09  
GAIN ERROR vs. TEMPERATURE  
MAX5141 toc08  
0.5  
0.4  
1.0  
0.8  
0
-0.05  
-0.10  
-0.15  
-0.20  
-0.25  
-0.30  
0.3  
0.6  
0.2  
0.4  
0.1  
0.2  
0.0  
0.0  
-0.1  
-0.2  
-0.3  
-0.4  
-0.5  
-0.2  
-0.4  
-0.6  
-0.8  
-1.0  
-15  
10  
35  
60  
0
2.50k 5.00k 7.50k 10.00k 12.50k 15.00k  
CODE  
0
2.50k 5.00k 7.50k 10.00k 12.50k 15.00k  
CODE  
TEMPERATURE (°C)  
4
_______________________________________________________________________________________  
+3V/+5V, Serial-Input,  
Voltage-Output, 14-Bit DACs  
Typical Operating Characteristics (continued)  
(V = +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), V  
= +2.5V, T = T  
to T  
, GND = 0, R = , unless otherwise  
MAX  
L
DD  
REF  
A
MIN  
noted. Typical values are at T = +25°C.)  
A
REFERENCE CURRENT  
vs. DIGITAL INPUT CODE  
140  
FULL-SCALE STEP RESPONSE  
(FALLING)  
FULL-SCALE STEP RESPONSE  
(RISING)  
MAX5141/44 toc11  
MAX5141/44 toc12  
120  
100  
80  
60  
40  
20  
0
CS  
CS  
2V/div  
2V/div  
A
A
OUT  
2V/div  
OUT  
2V/div  
C = 20pF  
L
C = 20pF  
L
0
5k  
10k  
15k  
20k  
400ns/div  
400ns/div  
INPUT CODE  
MAJOR-CARRY GLITCH  
(RISING)  
MAJOR-CARRY GLITCH  
(FALLING)  
DIGITAL FEEDTHROUGH  
MAX5141/44 toc15  
MAX5141/44 toc13  
MAX5141/44 toc14  
CS  
1V/div  
CS  
1V/div  
D
IN  
2V/div  
A
A
A
OUT  
10mV/div  
OUT  
20mV/div  
OUT  
20mV/div  
C = 20pF  
L
C = 20pF  
L
50ns/div  
200ns/div  
200ns/div  
INTEGRAL NONLINEARITY vs.  
REFERENCE VOLTAGE  
UNIPOLAR POWER-ON GLITCH  
(REF = V  
)
DD  
MAX5141/44 toc17  
0.70  
0.65  
0.60  
0.55  
0.50  
0.45  
0.40  
V
DD  
2V/div  
V
OUT  
10mV/div  
50ms/div  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
REFERENCE VOLTAGE (V)  
_______________________________________________________________________________________  
5
+3V/+5V, Serial-Input,  
Voltage-Output, 14-Bit DACs  
Pin Descriptions  
PIN  
NAME  
FUNCTION  
MAX5141  
MAX5143  
MAX5142  
MAX5144  
1
2
3
4
1
2
3
4
REF  
CS  
Voltage Reference Input  
Chip-Select Input  
SCLK  
DIN  
Serial Clock Input. Duty cycle must be between 40% and 60%.  
Serial Data Input  
Clear Input. Logic low asynchronously clears the DAC to code 0  
(MAX5141/MAX5143) or code 8192 (MAX5142/MAX5144).  
5
6
5
6
7
CLR  
OUT  
INV  
DAC Output Voltage  
Junction of Internal Scaling Resistors. Connect to external op amps inverting input in  
bipolar mode.  
7
8
9
RFB  
Feedback Resistor. Connect to external op amps output in bipolar mode.  
Supply Voltage. Use +3V for MAX5143/MAX5144 and +5V for MAX5141/MAX5142.  
Ground  
V
DD  
8
10  
GND  
t
t
CSH1  
LDACS  
CS  
t
CSHO  
t
CSS1  
t
t
t
CL  
CSSO  
CH  
SCLK  
t
DH  
t
DS  
D13  
D12  
S0  
DIN  
Figure 1. Timing Diagram  
6
_______________________________________________________________________________________  
+3V/+5V, Serial-Input,  
Voltage-Output, 14-Bit DACs  
+2.5V  
MAX6166  
+3V/+5V  
1µF  
0.1µF  
0.1µF  
V
REF  
DD  
MC68XXXX  
UNIPOLAR  
OUT  
CS  
PCS0  
MOSI  
MAX495  
EXTERNAL OP AMP  
MAX5141  
MAX5142  
MAX5143  
MAX5144  
OUT  
DIN  
SCLK  
CLR  
SCLK  
IC1  
(GND)  
GND  
Figure 2a. Typical Operating Circuit—Unipolar Output  
+2.5V  
MAX6166  
+3V/+5V  
0.1µF  
V
1µF  
0.1µF  
+5V  
RFB  
MC68XXXX  
REF  
DD  
R
INV  
PCS0  
MOSI  
SCLK  
IC1  
CS  
R
INV  
FB  
BIPOLAR  
OUT  
EXTERNAL OP AMP  
MAX400  
DIN  
OUT  
SCLK  
MAX5142  
MAX5144  
-5V  
CLR  
(GND)  
GND  
Figure 2b. Typical Operating Circuit—Bipolar Output  
The MAX5141MAX5144 are composed of two  
matched DAC sections, with a 10-bit inverted R-2R  
DAC forming the ten LSBs and the four MSBs derived  
from 15 identically matched resistors. This architecture  
allows the lowest glitch energy to be transferred to the  
DAC output on major-carry transitions. It also lowers the  
DAC output impedance by a factor of eight compared  
Detailed Description  
The MAX5141MAX5144 voltage-output, 14-bit digital-  
to-analog converters (DACs) offer full 14-bit perfor-  
mance with less than 1LSB integral linearity error and  
less than 1LSB differential linearity error, thus ensuring  
monotonic performance. Serial data transfer minimizes  
the number of package pins required.  
_______________________________________________________________________________________  
7
+3V/+5V, Serial-Input,  
Voltage-Output, 14-Bit DACs  
to a standard R-2R ladder, allowing unbuffered opera-  
tion in medium-load applications.  
applied. This ensures that unwanted DAC output volt-  
ages will not occur immediately following a system  
power-up, such as after a loss of power.  
The MAX5142/MAX5144 provide matched bipolar offset  
resistors, which connect to an external op amp for bipo-  
lar output swings (Figure 2b).  
Applications Information  
Reference and Ground Inputs  
Digital Interface  
The MAX5141MAX5144 digital interface is a standard  
3-wire connection compatible with SPI/QSPI/  
MICROWIRE interfaces. The chip-select input (CS)  
frames the serial data loading at the data-input pin  
(DIN). Immediately following CSs high-to-low transition,  
the data is shifted synchronously and latched into the  
input register on the rising edge of the serial clock input  
(SCLK). After 16 bits (14 data bits, plus two subbits set  
to zero) have been loaded into the serial input register,  
it transfers its contents to the DAC latch on CSs low-to-  
high transition (Figure 3). Note that if CS is not kept low  
during the entire 16 SCLK cycles, data will be corrupt-  
ed. In this case, reload the DAC latch with a new 16-bit  
word.  
The MAX5141MAX5144 operate with external voltage  
references from +2V to V , and maintain 14-bit perfor-  
DD  
mance if certain guidelines are followed when selecting  
and applying the reference. Ideally, the references  
temperature coefficient should be less than 0.5ppm/°C to  
maintain 14-bit accuracy to within 1LSB over the -40°C to  
+85°C extended temperature range. Since this converter  
is designed as an inverted R-2R voltage-mode DAC, the  
input resistance seen by the voltage reference is code  
dependent. In unipolar mode, the worst-case input-resis-  
tance variation is from 11.5k(at code 2155 hex) to  
200k(at code 0000 hex). The maximum change in load  
current for a +2.5V reference is +2.5V / 11.5k= 217µA;  
therefore, the required load regulation is 28ppm/mA for a  
maximum error of 0.1LSB. This implies a reference out-  
put impedance of less than 72m. In addition, the sig-  
nal-path impedance from the voltage reference to the  
reference input must be kept low because it contributes  
directly to the load-regulation error.  
Clearing the DAC  
A 20ns (min) logic low pulse on CLR asynchronously  
clears the DAC buffer to code 0 in the MAX5141/  
MAX5143 and to code 8192 in the MAX5142/MAX5144.  
The requirement for a low-impedance voltage reference  
is met with capacitor bypassing at the reference inputs  
and ground. A 0.1µF ceramic capacitor with short leads  
between REF and GND provides high-frequency  
bypassing. A surface-mount ceramic chip capacitor is  
preferred because it has the lowest inductance. An  
additional 1µF between REF and GND provides low-fre-  
quency bypassing. A low-ESR tantalum, film, or organic  
semiconductor capacitor works well. Leaded capaci-  
tors are acceptable because impedance is not as criti-  
External Reference  
The MAX5141MAX5144 operate with external voltage  
references from +2V to V . The reference voltage  
DD  
determines the DACs full-scale output voltage.  
Power-On Reset  
The power-on reset circuit sets the output of the  
MAX5141/MAX5143 to code 0 and the output of the  
MAX5142/MAX5144 to code 8192 when V  
is first  
DD  
CS  
DAC  
UPDATED  
SCLK  
SUB-BITS  
DIN  
D13 D12 D11 D10 D9 D8 D7 D6  
MSB  
D5 D4 D3 D2 D1 D0 S1 S0  
LSB  
Figure 3. MAX5141–MAX5144 3-Wire Interface Timing Diagram  
8
_______________________________________________________________________________________  
+3V/+5V, Serial-Input,  
Voltage-Output, 14-Bit DACs  
cal at lower frequencies. The circuit can benefit from  
the DAC output resistance, which results in a gain error.  
To contribute less than 1/2LSB of gain error, the input  
resistance typically must be greater than:  
even larger bypassing capacitors, depending on the  
stability of the external reference with capacitive load-  
ing.  
6.25kΩ × 215 = 205MΩ  
Unbuffered Operation  
Unbuffered operation reduces power consumption as  
well as offset error contributed by the external output  
buffer. The R-2R DAC output is available directly at  
The settling time is affected by the buffer input capaci-  
tance, the DACs output capacitance, and PC board  
capacitance. The typical DAC output voltage settling  
time is 1µs for a full-scale step. Settling time can be sig-  
nificantly less for smaller step changes. Assuming a  
single time-constant exponential settling response, a  
full-scale step takes 10.4 time constants to settle to  
within 1/2LSB of the final output voltage. The time con-  
stant is equal to the DAC output resistance multiplied  
by the total output capacitance. The DAC output  
capacitance is typically 10pF. Any additional output  
capacitance increases the settling time.  
OUT, allowing 14-bit performance from +V  
to GND  
REF  
without degradation at zero scale. The DACs output  
impedance is also low enough to drive medium loads  
(R > 60k) without degradation of INL or DNL; only  
L
the gain error is increased by externally loading the  
DAC output.  
External Output Buffer Amplifier  
The requirements on the external output buffer amplifier  
change whether the DAC is used in unipolar or bipolar  
operational mode. In unipolar mode, the output amplifi-  
er is used in a voltage-follower connection. In bipolar  
mode (MAX5142/MAX5144 only), the amplifier operates  
with the internal scaling resistors (Figure 2b). In each  
mode, the DACs output resistance is constant and is  
independent of input code; however, the output amplifi-  
ers input impedance should still be as high as possible  
to minimize gain errors. The DACs output capacitance  
is also independent of input code, thus simplifying sta-  
bility requirements on the external amplifier.  
The external buffer amplifiers gain-bandwidth product  
is important because it increases the settling time by  
adding another time constant to the output response.  
The effective time constant of two cascaded systems,  
each with a single time-constant response, is approxi-  
mately the root square sum of the two time constants.  
The DAC outputs time constant is 1µs / 10.4 = 96ns,  
ignoring the effect of additional capacitance. If the time  
constant of an external amplifier with 1MHz bandwidth  
is 1 / 2π (1MHz) = 159ns, then the effective time con-  
stant of the combined system is:  
In bipolar mode, a precision amplifier operating with  
dual power supplies (such as the MAX400) provides  
the  
V
output range. In single-supply applications,  
REF  
2
2
96ns + 159ns  
= 186ns  
(
)
(
)
precision amplifiers with input common-mode ranges  
including GND are available; however, their output  
swings do not normally include the negative rail (GND)  
without significant degradation of performance. A sin-  
gle-supply op amp, such as the MAX495, is suitable if  
the application does not use codes near zero.  
This suggests that the settling time to within 1/2LSB of  
the final output voltage, including the external buffer  
amplifier, will be approximately 10.4 186ns = 1.93µs.  
Digital Inputs and Interface Logic  
The digital interface for the 14-bit DAC is based on a  
3-wire standard that is compatible with SPI, QSPI, and  
MICROWIRE interfaces. The three digital inputs (CS,  
DIN, and SCLK) load the digital input data serially into  
the DAC.  
Since the LSBs for a 14-bit DAC are extremely small  
(152.6µV for V  
= +2.5V), pay close attention to the  
REF  
external amplifiers input specification. The input offset  
voltage can degrade the zero-scale error and might  
require an output offset trim to maintain full accuracy if  
the offset voltage is greater than 1/2LSB. Similarly, the  
input bias current multiplied by the DAC output resis-  
tance (typically 6.25k) contributes to zero-scale error.  
Temperature effects also must be taken into considera-  
tion. Over the -40°C to +85°C extended temperature  
range, the offset voltage temperature coefficient (refer-  
enced to +25°C) must be less than 0.95µV/°C to add  
less than 1/2LSB of zero-scale error. The external  
amplifiers input resistance forms a resistive divider with  
A 20ns (min) logic low pulse to CLR clears the data in  
the DAC buffer.  
All of the digital inputs include Schmitt-trigger buffers to  
accept slow-transition interfaces. This means that opto-  
couplers can interface directly to the MAX5141–  
MAX5144 without additional external logic. The digital  
inputs are compatible with TTL/CMOS-logic levels.  
_______________________________________________________________________________________  
9
+3V/+5V, Serial-Input,  
Voltage-Output, 14-Bit DACs  
Unipolar Configuration  
Table 1. Unipolar Code Table  
Figure 2a shows the MAX5141MAX5144 configured for  
unipolar operation with an external op amp. The op amp  
is set for unity gain, and Table 1 lists the codes for this  
circuit. Bipolar MAX5142/MAX5144 can also be used in  
unipolar configuration by connecting RFB and INV to  
REF. This allows the DAC to power up to midscale.  
DAC LATCH CONTENTS  
MSB LSB  
1111 1111 1111 11  
ANALOG OUTPUT, V  
OUT  
V
V
(16,383 / 16,384)  
(8192 / 16,384) =  
(1 / 16,384)  
REF  
1/  
V
1000 0000 0000 00  
0000 0000 0000 01  
REF  
REF  
2
V
REF  
Bipolar Configuration  
Figure 2b shows the MAX5141MAX5144 configured  
for bipolar operation with an external op amp. The op  
Table 2. Bipolar Code Table  
amp is set for unity gain with an offset of -1/2V  
.
REF  
DAC LATCH CONTENTS  
Table 2 shows the offset binary codes for this circuit  
(less than 0.25 inches).  
ANALOG OUTPUT, V  
OUT  
MSB  
LSB  
+V  
+V  
0V  
-V  
(8191 / 8192)  
1111 1111 1111 11  
REF  
Power-Supply Bypassing and  
Ground Management  
(1 / 8192)  
1000 0000 0000 01  
1000 0000 0000 00  
0111 1111 1111 11  
0000 0000 0000 00  
REF  
Bypass V  
with a 0.1µF ceramic capacitor connected  
DD  
DD  
between V  
and GND. Mount the capacitor with short  
leads close to the device (less than 0.25 inches).  
(1 / 8192)  
REF  
REF  
-V  
(8192 / 8192) = -V  
REF  
Functional Diagrams  
V
V
DD  
DD  
RFB  
INV  
MAX5141  
MAX5143  
MAX5142  
MAX5144  
REF  
CS  
REF  
CS  
OUT  
OUT  
14-BIT DAC  
14-BIT DAC  
14-BIT DATA LATCH  
14-BIT DATA LATCH  
SCLK  
DIN  
SCLK  
DIN  
CONTROL  
LOGIC  
CONTROL  
LOGIC  
SERIAL INPUT REGISTER  
SERIAL INPUT REGISTER  
CLR  
CLR  
GND  
GND  
Chip Information  
TRANSISTOR COUNT: 2800  
PROCESS: BiCMOS  
10 ______________________________________________________________________________________  
+3V/+5V, Serial-Input,  
Voltage-Output, 14-Bit DACs  
________________________________________________________Package Information  
______________________________________________________________________________________ 11  
+3V/+5V, Serial-Input,  
Voltage-Output, 14-Bit DACs  
Package Information (continued)  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are  
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.  
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600_____________________12  
© 2001 Maxim Integrated Products  
Printed USA  
is a registered trademark of Maxim Integrated Products.  

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