MAX5360NEUK [MAXIM]
Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package; 低成本，低功耗， 6位DAC，与SOT23封装2线串行接口
| 型号： | MAX5360NEUK |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Low-Cost, Low-Power 6-Bit DACs with 2-Wire Serial Interface in SOT23 Package |
| 文件： | 总12页 (文件大小：323K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1785; Rev 1; 3/01
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
General Description
Features
The MAX5360/MAX5361/MAX5362 are low-cost, 6-bit
digital-to-analog converters (DACs) in miniature 5-pin
SOT23 packages with a simple 2-wire serial interface
that allows communication with multiple devices. The
MAX5360 has an internal +2V reference and operates
from a +2.7V to +3.6V supply. The MAX5361 has an
internal +4V reference and operates from a +4.5V to
+5.5V supply. The MAX5362 operates over the full
+2.7V to +5.5V supply range and has an internal refer-
✕
ꢀ 6-Bit Accuracy in a Tiny 5-Pin SOT23 Package
ꢀ Wide +2.7V to +5.5V Supply Range (MAX5362)
ꢀ 1µA Shutdown Mode
ꢀ Buffered Output Drives Resistive Loads
ꢀ Low Glitch Power-On-Reset to Zero DAC Output
ꢀ Fast I2C-Compatible Serial Interface
ence equal to 0.9
V
DD
.
ꢀ
ꢀ
-5% Full-Scale Error (MAX5362)
1LSB (max) INL/DNL
The fast-mode I2C™-compatible serial interface allows
communication at data rates up to 400kbps, minimizing
board space and reducing interconnect complexity in
many applications. Each device is available with one of
four factory-preset addresses (see Selector Guide).
ꢀ Low 230µA max Supply Current
Ordering Information
The MAX5360/MAX5361/MAX5362 also include an out-
put buffer, a low-power shutdown mode, and a power-
on reset that ensures the DAC outputs are at zero when
power is initially applied. In shutdown mode, the supply
current is reduced to less than 1µA and the output is
pulled down with a 10k resistor to GND.
PART
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
MAX5360_EUK-T*
MAX5361_EUK-T*
MAX5362_EUK-T*
5 SOT23-5
5 SOT23-5
5 SOT23-5
*See Selector Guide for address options.
The MAX5360/MAX5361/MAX5362 are available in
miniature 5-pin SOT23 packages.
Selector Guide
TOP
REFERENCE
MARK
PART
ADDRESS
Applications
MAX5360LEUK
MAX5360MEUK
MAX5360NEUK
MAX5360PEUK
MAX5361LEUK
MAX5361MEUK
MAX5361NEUK
MAX5361PEUK
MAX5362LEUK
MAX5362MEUK
MAX5362NEUK
MAX5362PEUK
0x60
0x62
0x64
0x66
0x60
0x62
0x64
0x66
0x60
0x62
0x64
0x66
+2.0V
+2.0V
+2.0V
+2.0V
+4.0V
+4.0V
+4.0V
+4.0V
✕
ADMM
ADMY
ADNE
ADMO
ADMU
ADNA
ADNG
ADMQ
ADMW
ADNC
ADNI
Automatic Tuning (VCO)
Power Amplifier Bias Control
Programmable Threshold Levels
Automatic Gain Control
Automatic Offset Adjustment
2
I C is a trademark of Philips Corp.
0.9
V
V
V
V
DD
DD
DD
DD
✕
✕
✕
0.9
0.9
0.9
Typical Operating Circuit
ADMS
+2.7V TO +5.5V
Pin Configuration
V
DD
TOP VIEW
OUT
1
2
3
5
4
SCL
SDA
C
V
DD
SDA
SCL
PX.0/SDA
MAX5360
MAX5361
MAX5362
OUT
GND
MAX5362
PX.1/SCL
GND
GND
V
DD
SOT23-5
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
ABSOLUTE MAXIMUM RATINGS
DD
OUT to GND ...............................................-0.3V to (V
V
to GND..............................................................-0.3V to +6V
5-Pin SOT23 (derate 7.1mW/°C above +70°C)...........571mW
Operating Temperature Range
+ 0.3V)
DD
SCL, SDA to GND.....................................................-0.3V to +6V
Maximum Current into Any Pin............................................50mA
MAX536__EUK-T ............................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Maximum Junction Temperature .....................................+150°C
Continuous Power Dissipation (T = +70°C)
A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= 2.7V to 3.6V (MAX5360); V
= 4.5V to 5.5V (MAX5361); V
= 2.7V to 5.5V (MAX5362); R =10k , C = 50pF, T = T
to
MIN
DD
DD
DD
L
L
A
T
MAX
, unless otherwise noted. Typical values are T = +25°C.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
STATIC ACCURACY
Resolution
6
Bits
LSB
LSB
mV
Integral Linearity Error
Differential Linearity Error
Offset Error
INL
(Note 1)
1
1
2
DNL
Guaranteed monotonic (Note 2)
Guaranteed monotonic (Note 2)
MAX5362 (Notes 2, 3)
V
OS
1
Offset Error Supply Rejection
60
dB
MAX5360/MAX5361
3
1
Offset Error Temperature
Coefficient
(Note 2)
ppm/°C
MAX5362
MAX5360/MAX5361
MAX5362
10
5
% of Ideal
FS
Full-Scale Error
Code = 63
Full-Scale Error Supply Rejection
Code = 63, MAX5360/MAX5361 (Note 4)
60
dB
MAX5360/MAX5361
40
10
Full-Scale Error Temperature
Coefficient
Code = 63
MAX5362
ppm/°C
DAC OUTPUT
MAX5360
MAX5361
1.8
3.6
✕
2
4
2.2
4.4
Internal Reference (Note 5)
REF
V
✕
✕
0.85
V
0.9
0.95
V
DD
MAX5362
V
DD
DD
Code = 63, 0 to 100µA
Code = 0, 0 to -100µA
0.5
0.5
10
Output Load Regulation
LSB
k
Output Resistance
V = 0 to V , power-down mode
OUT DD
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
Output Settling Time
Digital Feedthrough
Digital-Analog Glitch Impulse
Wake-Up Time
Positive and negative
To 1/2LSB, 50k and 50pF load (Note 6)
Code = 0, all digital inputs from 0 to V
Code 31 to 32
From software shutdown
0.4
20
2
40
50
V/µs
µs
nVs
nVs
µs
DD
2
_______________________________________________________________________________________
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
ELECTRICAL CHARACTERISTICS (continued)
(V
= 2.7V to 3.6V (MAX5360); V
= 4.5V to 5.5V (MAX5361); V
= 2.7V to 5.5V (MAX5362); R =10k , C = 50pF, T = T
to
DD
DD
DD
L
L
A
MIN
T
MAX
, unless otherwise noted. Typical values are T = +25°C.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER REQUIREMENTS
MAX5360
MAX5361
MAX5362
2.7
4.5
2.7
3.6
5.5
5.5
230
1
Supply Voltage
V
V
DD
No load, all digital inputs at 0 or V , code = 63
DD
150
Supply Current
I
µA
DD
Shutdown mode
DIGITAL INPUTS (SCL, SDA)
Input Low Voltage
✕
0.3
DD
V
DD
V
V
V
IL
✕
0.7
V
DD
Input High Voltage
V
IH
✕
0.05
V
Input Hysteresis
V
hys
V
Input Capacitance
C
(Note 7)
10
pF
µA
ns
IN
Input Leakage Current
Pulse Width of Spike Suppressed
I
10
50
i
t
SP
0
DIGITAL OUTPUT (SDA) (open drain)
I
I
= 3mA
= 6mA
0
0
0.4
0.6
SINK
Output Low Voltage
V
OL
V
SINK
V
min to V max,
IL
IH
I
I
= 3mA
= 6mA
250
250
SINK
Output Fall Time
t
of
bus capacitance
10pF to 400pF
ns
SINK
TIMING CHARACTERISTICS
(V
= 2.7V to 3.6V (MAX5360); V
= 4.5V to 5.5V (MAX5361); V
= 2.7V to 5.5V (MAX5362); R =10k , C = 50pF, T = T
to
DD
DD
DD
L
L
A
MAX
T
MIN
, Figure 3, unless otherwise noted. Typical values are T = +25°C.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SCL Clock Frequency
f
0
400
kHz
SCL
Bus-Free Time Between a
STOP and a START Condition
t
1.3
0.6
µs
µs
BUF
Hold Time (Repeated)
START Condition
t
HD, STA
Low Period of the SCL Clock
High Period of the SCL Clock
t
1.3
0.6
µs
µs
LOW
t
HIGH
_______________________________________________________________________________________
3
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
TIMING CHARACTERISTICS (continued)
(V
= 2.7V to 3.6V (MAX5360); V
= 4.5V to 5.5V (MAX5361); V
= 2.7V to 5.5V (MAX5362); R =10k , C = 50pF, T = T
to
MAX
DD
DD
DD
L
L
A
T
MIN
, Figure 3, unless otherwise noted. Typical values are T = +25°C.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Setup Time for a Repeated
START Condition
t
0.6
µs
SU, STA
Data Hold Time
Data Setup Time
t
0
0.9
µs
ns
HD, DAT
t
100
SU, DAT
Rise Time of Both SDA and
SCL Signals
t
300
300
ns
r
Fall Time of Both SDA and
SCL Signals
t
ns
µs
pF
f
Setup Time for STOP Condition
t
0.6
SU, STO
Capacitive Load for Each
Bus Line
C
400
b
Note 1: Guaranteed from code 1 to code 63.
Note 2: The offset value extrapolated from the range over which the INL is guaranteed.
Note 3: MAX5362, tested at V
Note 4: MAX5360, tested at V
Note 5: Actual output voltage at full scale is 63/64
= 5V 10%.
= 3V 10%; MAX5361, tested at V
DD
DD
= 5V 10%.
DD
✕
V
REF
.
Note 6: Output settling time is measured by taking the code from code 1 to code 63, and from code 63 to code 1.
Note 7: Guaranteed by design.
Typical Operating Characteristics
(V
= 3V (MAX5360), V
= 5V (MAX5361/MAX5362), T = +25°C, unless otherwise noted.)
DD
DD A
INTEGRAL NONLINEARITY
vs. TEMPERATURE
INTEGRAL NONLINEARITY
vs. SUPPLY VOLTAGE
INTEGRAL NONLINEARITY vs. CODE
0
0.030
0.025
0.020
0
-0.025
-0.050
0.015
0.010
0.005
0
-0.005
-0.010
-0.015
-0.020
-0.025
-0.030
-0.025
-0.035
-0.040
-0.045
-0.050
-40 -20
0
20
40
60
80
100
2.5
3.0
3.5
4.0
4.5
5.0
5.5
0
25
50
75
TEMPERATURE ( C)
SUPPLY VOLTAGE (V)
CODE
4
_______________________________________________________________________________________
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
Typical Operating Characteristics (continued)
(V
= 3V (MAX5360), V
= 5V (MAX5361/MAX5362), T = +25°C, unless otherwise noted.)
DD
DD A
DIFFERENTIAL NONLINEARITY
DIFFERENTIAL NONLINEARITY
vs. TEMPERATURE
vs. SUPPLY VOLTAGE
DIFFERENTIAL NONLINEARITY vs. CODE
0
0
0.010
-0.005
-0.005
0.005
0
-0.010
-0.015
-0.020
-0.010
-0.015
-0.020
-0.025
-0.005
-0.010
-0.015
-0.020
-0.025
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-40 -20
0
20
40
60
80
100
0
25
50
75
SUPPLY VOLTAGE (V)
TEMPERATURE ( C)
CODE
OFFSET ERROR vs. SUPPLY VOLTAGE
OFFSET ERROR vs. TEMPERATURE
TOTAL UNADJUSTED ERROR vs. CODE
0
0.15
0.10
0.05
0
0
-0.25
-0.50
-0.25
-0.05
-0.10
-0.15
-0.50
-0.20
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-40 -20
0
20
40
60
80
100
0
25
50
75
SUPPLY VOLTAGE (V)
TEMPERATURE ( C)
CODE
FULL-SCALE ERROR vs. TEMPERATURE
FULL-SCALE ERROR vs. TEMPERATURE
SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5360/1/2-11
MAX5360/1/2-10
0.75
0.50
0.25
0
1.2
0.75
0.50
0.25
0
1.2
0.8
0.4
0
200
MAX5361
180
160
0.8
0.4
0
MAX5361
MAX5360
MAX5360
MAX5362
140
120
MAX5360
MAX5361
MAX5362
100
80
MAX5362
-0.25
-0.50
-0.4
-0.8
-0.25
-0.50
-0.4
-0.8
60
40
20
NO LOAD
-0.75
-1.2
-0.75
-1.2
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-40 -20
0
20
40
60
80
100
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
TEMPERATURE ( C)
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
Typical Operating Characteristics (continued)
(V
= 3V (MAX5360), V
= 5V (MAX5361/MAX5362), T = +25°C, unless otherwise noted.)
DD
DD A
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SUPPLY CURRENT vs. TEMPERATURE
SUPPLY CURRENT vs. CODE
1.0
08
160
160
155
150
145
140
135
MAX5361
= 5V
MAX5362
= 5V
155
150
145
140
135
V
DD
V
DD
MAX5361
MAX5362
MAX5360
0.6
0.4
0.2
MAX5360
= 5V
MAX5360
V = 3V
DD
V
DD
0
130
130
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-40 -20
0
20
40
60
80
100
0
8
16 24 32 40 48 56
CODE
64
SUPPLY VOLTAGE (V)
TEMPERATURE ( C)
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
OUTPUT VOLTAGE ON POWER-UP
OUTPUT LOAD REGULATION
MAX5360/1/2-17
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.8
A
OUT
50mV/div
0.6
0.4
0.2
0
V
V
= 5V
= 3V
DD
DD
B
C
V
DD
0.2
0.1
0
2V/div
D
E
4 s/div
0
1
2
3
4
5
6
7
8
9
10
-40 -20
0
20
40
60
80
100
LOAD CURRENT (mA)
TEMPERATURE ( C)
A: MAX5361/MAX5362, V = 4.5V, FULL-SCALE OR SOURCING
DD
B: MAX5360, FULL-SCALE, V = 2.7V SINKING, V = 5V SOURCING
DD
DD
C: MAX5360, FULL-SCALE, V = 2.7V, SOURCING
DD
D: ZERO CODE, V = 2.7V, SINKING
DD
E: ZERO CODE, V = 5.5V SINKING
DD
6
_______________________________________________________________________________________
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
Typical Operating Characteristics (continued)
(V
= 3V (MAX5360), V
= 5V (MAX5361/MAX5362), T = +25°C, unless otherwise noted.)
A
DD
DD
MAX5360
OUTPUT VOLTAGE
ENTERING SHUTDOWN
MAX5360
OUTPUT SETTLING FROM
1/4 FS TO 3/4 FS
MAX5360
OUTPUT VOLTAGE
EXITING SHUTDOWN
OUT
500mV/div
OUT
0.5V/div
OUT
500mV/div
SDA
3V/div
SDA
3V/div
SDA
3V/div
1 s/div
1 s/div
10 s/div
MAX5360
OUTPUT SETTLING
1/4LSB STEP-UP
MAX5360
OUTPUT SETTLING FROM
3/4 FS TO 1/4 FS
MAX5360
OUTPUT SETTLING
1/4LSB STEP-DOWN
OUT
20mV/div
AC-COUPLED
OUT
20mV/div
AC-COUPLED
OUT
0.5V/div
SDA
3V/div
SDA
3V/div
SDA
3V/div
2 s/div
2 s/div
1 s/div
0 x 7F TO 0 x 80
01111111 TO 10000000
0 x 80 TO 0 x 7F
10000000 TO 01111111
Pin Description
PIN
1
NAME
FUNCTION
OUT
DAC Voltage Output
Ground
2
GND
3
V
Power-Supply Input
Serial Data Input
Serial Clock Input
DD
4
SDA
SCL
5
_______________________________________________________________________________________
7
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
V
DD
V
REF
CURRENT-
STEERING
DAC
OUT
REF
SW1
SW2
SW255
255
SDA
SCL
MAX5360
MAX5361
MAX5362
DATA LATCH
6 + 2
CONTROL
LOGIC
10k
SERIAL INPUT
REGISTER
OUT
GND
Figure 1. Functional Diagram
Figure 2. Current-Steering Topology
Table 1. Unipolar Code Current
OUTPUT VOLTAGE
MAX5361
DAC CODE
6 BITS + 2 SUBBITS
MAX5360
MAX5362
✕
✕
✕
✕
2V (63/64)
4V (63/64)
0.9
V
(63/64)
/ 2
111111 (00)
100000 (00)
000001 (00)
000000 (00)
DD
✕
0.9
V
1V
31mV
0
2V
62mV
0
DD
DD
✕
0.9
V
/ 64
0
current is then converted to a voltage across a resistor,
and this voltage is buffered by the output buffer amplifier.
Detailed Description
The MAX5360/MAX5361/MAX5362 voltage-output, 6-bit
DACs offer full 6-bit performance with less than 1LSB
integral nonlinearity (INL) error and less than 1LSB dif-
ferential nonlinearity (DNL) error ensuring monotonic
performance. The devices use a simple two-wire, fast-
mode I2C-compatible serial interface that operates up
to 400kHz. The MAX5360/MAX5361/MAX5362 include
an internal reference, an output buffer, and low-current
shutdown mode, making them ideal for low-power,
highly integrated applications. Figure 1 shows the
devices’ functional diagram.
Output Voltage
Table 1 shows the relationship between the DAC code
and the analog output voltage. The 6-bit DAC code is
binary unipolar with 1LSB = (V
/ 64). The MAX5360/
REF
MAX5361 have a full-scale output voltage of (+2V -
1LSB) and (+4V - 1LSB), respectively, set by the inter-
nal references. The MAX5362 has a full-scale output
✕
voltage of (0.9
V
DD
- 1LSB). Each device accepts 8-bit
DAC codes, but the accuracy is guaranteed only for
6 bits.
Analog Section
The MAX5360/MAX5361/MAX5362 employ a current-
steering DAC topology as shown in Figure 2. At the
core of the DAC is a reference voltage-to-current con-
verter (V/I) that generates a reference current. This cur-
rent is mirrored to 255 equally weighted current
sources. DAC switches control the outputs of these cur-
rent mirrors, so only the desired fraction of the total cur-
rent-mirror currents is steered to the DAC output. The
Output Buffer
The DAC voltage output is an internally buffered unity-
gain follower that typically slews at 0.4V/µs. The out-
put can swing from 0 to full scale. With a 1/4 FS to 3/4
FS output transition, the amplifier outputs typically settle
to 1/2LSB in less than 5µs when loaded with 10k in
parallel with 50pF. The buffer amplifiers are stable with
any combination of resistive loads >10k and capaci-
tive loads <50pF.
8
_______________________________________________________________________________________
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
SDA
SCL
t
BUF
t
,
t ,
SU STA
SU DAT
t
,
HD STA
t
,
SU STO
t
t ,
HD DAT
LOW
t
HIGH
t
,
HD STA
t
t
F
R
START CONDITION
REPEATED START CONDITION
STOP CONDITION START CONDITION
Figure 3. Two-Wire Serial Interface Timing Diagram
Shutdown Mode
V
DD
The MAX5360/MAX5361/MAX5362 include a software-
controlled shutdown mode that reduces the supply cur-
rent to <1µA. All internal circuitry is disabled and an
internal 10k resistor is placed from OUT to GND to
ensure 0V at OUT while in shutdown. The device enters
shutdown in less than 5µs and exits shutdown in less
than 50µs.
C
SDA
SCL
SCL
V
DD
R *
S
MAX5360M
2V REFERENCE
SDA
OUT
OFFSET ADJUSTMENT
Digital Section
Serial interface
The MAX5360/MAX5361/MAX5362 use a simple two-
wire serial interface requiring only two I/O lines (two-
wire bus) of a standard microprocessor (µP) port.
Figure 3 shows the timing diagram for signals on the 2-
wire bus.
SCL
V
DD
MAX5361N
4V REFERENCE
SDA
OUT
THRESHOLD ADJUSTMENT
The two bus lines (SDA and SCL) must be high when
the bus is not in use. The MAX5360/MAX5361/
MAX5362 are receive-only devices (slaves) and must
be controlled by a bus master device. Figure 4 shows a
typical application where multiple devices can be con-
nected to the bus provided they have different address
settings. External pullup resistors are not necessary on
these lines (when driven by push-pull drivers), though
the MAX5360/MAX5361/MAX5362 can be used in
applications where pullup resistors are required (such
as in I2C systems) to maintain compatibility with exist-
ing circuitry. The serial interface operates at SCL rates
up to 400kHz. The SDA state is allowed to change only
while SCL is low, with the exception of START and
STOP conditions as shown in Figure 5. Each transmis-
sion consists of a START condition sent by the bus
master device, followed by the MAX5360/MAX5361/
MAX5362’s preset slave address, a power-mode bit,
SCL
V
DD
MAX5362P
REFERENCE
V
DD
GAIN ADJUSTMENT
SDA
OUT
R * IS OPTIONAL.
S
Figure 4. Typical Application Circuit
Power-On Reset
The MAX5360/MAX5361/MAX5362 have a power-on
reset circuit to set the DAC’s output to 0 when V is
DD
first applied or when V
dips below 1.7V. This ensures
DD
that unwanted DAC output voltages will not occur
immediately following a system startup, such as after a
loss of power. The output glitch on startup is typically
<50mV.
_______________________________________________________________________________________
9
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
Slave Address
The MAX5360/MAX5361/MAX5362 are available with
one of four preset slave addresses. Each address
option is identified by the suffix L, M, N, or P added to
the part number. The address is defined as the 7 most
significant bits (MSBs) sent by the master after a
START condition. The address options are 0x60, 0x62,
0x64, and 0x66 (left justified with LSB set to 0). The 8th
bit, typically used to define a write or read protocol,
sets the device’s power mode (SHDN); the device is
powered down when SHDN is set to 1. During a device
search routine, the MAX5360/MAX5361/MAX5362
acknowledge both options (SHDN = 0 or SHDN = 1)
but does not change its power state if a stop condition
(or restart) is issued immediately. The second byte
(DAC data) must be sent/received for the device to
update both power mode and DAC output.
SDA
SCL
START CONDITION
STOP CONDITION
Figure 5. Start and Stop Conditions
DAC Data
The 6-bit DAC data is decoded as straight binary MSB
the DAC data (6 bits + 2 subbits), and finally, a STOP
condition (Figure 6). The bus is then free for another
transmission.
first with 1LSB = (V
/ 64) and converted into the cor-
REF
responding analog voltage as shown in Table 1. Two
subbits complete the data byte; these 2 bits should be
set to zero since they are not tested to guaranteed-
monotonic performance.
SDA’s state is sampled, and therefore must remain sta-
ble while SCL is high. Data is transmitted in 8-bit bytes.
Nine clock cycles are required to transfer each byte to
the MAX5360/MAX5361/MAX5362. Release SDA during
the 9th clock cycle as the selected device acknowl-
edges the receipt of the byte, by pulling SDA low dur-
ing this time. A series resistor on the SDA line may be
needed if the master’s output is forced high while the
selected device acknowledges (Figure 4).
After receiving the data byte, the MAX5360/MAX5361/
MAX5362 acknowledge its receipt and expect a STOP
condition, at which point the DAC output is updated.
The devices update the output and the power mode
only if the second byte is clocked in (SHDN = 0) or out
(SHDN = 1) of the device. When SHDN = 1, the master
will read all ones when clocking out a data byte. The
MAX5360/MAX5361/MAX5362 do not drive SDA except
for the acknowledge bit.
SLAVE ADDRESS BYTE
DAC CODE
0
0
4
X
D6
D2
13
S1
16
ACK
1
2
1
3
0
5
X
6
SHDN
8
ACK
9
D4
11
D3
12
D1
14
D0
15
S0
SDA
SCL
MSB
LSB
MSB
LSB
1
7
10
17
18
START
CONDITION
STOP
CONDITION
Figure 6. Complete Serial Transmission
10 ______________________________________________________________________________________
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
typical I2C application. The communication protocol
V
supports the standard I2C 8-bit communications. The
general call address is ignored, and CBUS formats are
not supported. The MAX5360/MAX5361/MAX5362
address is compatible with the 7-bit I2C addressing
protocol only. No 10-bit formats are supported.
RESTART protocol is supported, but an immediate
STOP condition is necessary to update the DAC.
DD
C
SDA SCL
SCL
V
DD
Applications Information
MAX5360L
2V REFERENCE
SDA
Digital Inputs and Interface Logic
OUT
OFFSET ADJUSTMENT
The serial 2-wire interface has logic levels defined as
✕
✕
V
OL
= 0.3
V
and V
= 0.7
V
DD
. All of the inputs
DD
OH
include Schmitt-trigger buffers to accept slow-transition
interfaces. This means that optocouplers can interface
directly to the MAX5360/MAX5361/MAX5362 without
additional external logic. The digital inputs are compati-
ble with CMOS logic levels and must not be driven with
SCL
V
DD
MAX5361M
4V REFERENCE
SDA
OUT
THRESHOLD ADJUSTMENT
voltages higher than V
.
DD
Power-Supply Bypassing and Layout
Careful PC board layout is important for best system
performance. To reduce crosstalk and noise injection,
keep analog and digital signals separate. Ensure that
the ground return from GND to the supply ground is
short and low impedance; a ground plane is recom-
SCL
V
DD
MAX5362P
REFERENCE
V
DD
GAIN ADJUSTMENT
SDA
OUT
mended. Bypass V
with a 0.1µF to ground as close
DD
as possible to the device. If the supply is excessively
noisy, connect a 10 resistor in series with the supply
2
Figure 7. I C Typical Application
and V , and add additional capacitance
DD
I2C Compatibility
Chip Information
The MAX5360/MAX5361/MAX5362 are compatible with
existing I2C systems. SCL and SDA are high-imped-
ance inputs; SDA has an open drain that pulls the data
line low during the 9th clock pulse. Figure 7 shows a
TRANSISTOR COUNT: 2910
PROCESS: BiCMOS
______________________________________________________________________________________ 11
Low-Cost, Low-Power 6-Bit DACs with
2-Wire Serial Interface in SOT23 Package
Package Information
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2001 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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