MAX5381LEUK+ [MAXIM]
D/A Converter, 1 Func, Serial Input Loading, 20us Settling Time, PDSO5, MINIATURE, SOT-23, 5 PIN;
| 型号： | MAX5381LEUK+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | D/A Converter, 1 Func, Serial Input Loading, 20us Settling Time, PDSO5, MINIATURE, SOT-23, 5 PIN |
| 文件： | 总12页 (文件大小：326K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1641; Rev 1; 1/01
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
General Description
Features
The MAX5380/MAX5381/MAX5382 are low-cost, 8-bit
digital-to-analog converters (DACs) in miniature 5-pin
SOT23 packages, with a simple 2-wire serial interface
that allows communication with multiple devices. The
MAX5380 has an internal +2V reference and operates
from a +2.7V to +3.6V supply. The MAX5381 has an
internal +4V reference and operates from a +4.5V to
+5.5V supply. The MAX5382 operates over the full
+2.7V to +5.5V supply range and has an internal refer-
ꢀ 8-Bit Accuracy in a Miniature 5-Pin SOT23
ꢀ Wide +2.7V to +5.5V Supply Range (MAX5382)
ꢀ Low 230µA max Supply Current
ꢀ 1µA Shutdown Mode
ꢀ Buffered Output Drives Resistive Loads
ꢀ Low-Glitch Power-On Reset to Zero DAC Output
ence equal to 0.9 x V
2
.
DD
ꢀ Fast I2C-Compatible Serial Interface
ꢀ < 5ꢀ Full-Scale ꢁrror (MAX5382)
ꢀ < 1LSB max IꢂLꢃDꢂL
The fast-mode I C™-compatible serial interface allows
communication at data rates up to 400kbps, minimizing
board space and reducing interconnect complexity
in many applications. Each device is available with
one of four factory-preset addresses (see Selector
Guide).
Ordering Information
These DACs also include an output buffer, a low-power
shutdown mode, and a power-on reset that ensures the
DAC outputs are at zero when power is initially applied.
In shutdown mode, supply current is reduced to less
than 1µA and the output is pulled down to GND with a
10k resistor.
PART
TꢁMP. RAꢂGꢁ
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIꢂ-PACKAGꢁ
MAX5380_EUK-T
MAX5381_EUK-T
MAX5382_EUK-T
5 SOT23
5 SOT23
5 SOT23
Selector Guide
Applications
Automatic Tuning (VCO)
RꢁFꢁRꢁꢂCꢁ
(V)
TOP
MARK
PART
ADDRꢁSS
Power-Amplifier Bias Control
Programmable Threshold Levels
Automatic Gain Control
MAX5380LEUK
MAX5380MEUK
MAX5380NEUK
MAX5380PEUK
MAX5381LEUK
MAX5381MEUK
MAX5381NEUK
MAX5381PEUK
MAX5382LEUK
MAX5382MEUK
MAX5382NEUK
MAX5382PEUK
0x60
0x62
0x64
0x66
0x60
0x62
0x64
0x66
0x60
0x62
0x64
0x66
+2.0
+2.0
+2.0
+2.0
+4.0
+4.0
+4.0
+4.0
ADMN
ADMZ
ADFN
ADMP
ADMV
ADNB
ADNH
ADML
ADMX
ADND
ADNJ
ADNT
Automatic Offset Adjustment
Typical Operating Circuit
0.9 x V
0.9 x V
0.9 x V
0.9 x V
DD
DD
DD
DD
+2.7V TO +5.5V
V
DD
C
Pin Configuration
V
DD
TOP VIEW
SDA
SCL
PX.0/SDA
OUT
OUT
GND
1
2
5
SCL
MAX5382
PX.1/SCL
GND
GND
MAX5380
MAX5381
MAX5382
V
DD
3
4
SDA
2
I C is a trademark of Philips Corp.
SOT23-5
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
ABSOLUTꢁ MAXIMUM RATIꢂGS
DD
V
to GND..............................................................-0.3V to +6V
Operating Temperature Ranges
OUT, SCL, SDA to GND ...........................................-0.3V to +6V
Maximum Current into Any Pin............................................50mA
MAX538_ _EUK-T .............................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Maximum Junction Temperature .....................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Continuous Power Dissipation (T = +70°C)
A
5-Pin SOT23 (derate 7.1mW/°C above +70°C).............571mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ꢁLꢁCTRICAL CHARACTꢁRISTICS
(V
= +2.7V to +3.6V (MAX5380), V
= +4.5V to +5.5V (MAX5381), V
= +2.7V to +5.5V (MAX5382); R = 10k ; C = 50pF,
DD L L
DD
DD
T
A
= T
to T
, unless otherwise noted. Typical values are T = +25°C.)
MAX A
MIN
PARAMꢁTꢁR
SYMBOL
COꢂDITIOꢂS
MIꢂ
TYP
MAX
UꢂITS
STATIC ACCURACY
Resolution
8
Bits
LSB
LSB
mV
Integral Linearity Error
Differential Linearity Error
Offset Error
INL
(Note 1)
1
1
DNL
Guaranteed monotonic
(Note 2)
1
25
Offset Error Supply Rejection
MAX5382 (Notes 2, 3)
60
dB
MAX5380/MAX5381
MAX5382
3
Offset Error Temperature
Coefficient
(Note 2)
ppm/°C
1
MAX5380/MAX5381
MAX5382
10
5
% of
ideal FS
Full-Scale Error
Code = 255
Full-Scale Error Supply Rejection
Code = 255, MAX5380/MAX5281 (Note 4)
50
dB
MAX5380/MAX5381
40
10
Full-Scale Error Temperature
Coefficient
Code = 255
MAX5382
ppm/°C
DAC OUTPUT
MAX5380
MAX5381
1.8
3.6
2
4
2.2
4.4
Internal Reference (Note 5)
REF
V
0.85 x
V
DD
0.9 x
V
DD
0.95 x
V
DD
MAX5382
Code = 255, 0 to 100µA
Code = 0, 0 to 100µA
0.5
0.5
10
Output Load Regulation
LSB
k
Output Resistance
V = 0 to V , power-down mode
OUT DD
DYꢂAMIC PꢁRFORMAꢂCꢁ
Voltage Output Slew Rate
Output Settling Time
Positive and negative
0.4
20
2
V/µs
µs
To 1/2 LSB, 50k and 50pF load (Note 6)
Digital Feedthrough
Code = 0, all digital inputs from 0 to V
Code 127 to 128
nVs
nVs
µs
DD
Digital-Analog Glitch Impulse
Wake-Up Time
40
50
From software shutdown
2
_______________________________________________________________________________________
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
ꢁLꢁCTRICAL CHARACTꢁRISTICS (continued)
(V
= +2.7V to +3.6V (MAX5380), V
= +4.5V to +5.5V (MAX5381), V
= +2.7V to +5.5V (MAX5382); R = 10k ; C = 50pF,
DD L L
DD
DD
T
A
= T
to T
, unless otherwise noted. Typical values are T = +25°C.)
MAX A
MIN
PARAMꢁTꢁR
SYMBOL
COꢂDITIOꢂS
MIꢂ
TYP
MAX
UꢂITS
POWꢁR RꢁQUIRꢁMꢁꢂTS
MAX5380
MAX5381
MAX5382
2.7
4.5
2.7
3.6
5.5
5.5
230
1
Supply Voltage
V
V
DD
No load, all digital inputs at 0 or V , code = 255
DD
150
Supply Current
I
µA
DD
Shutdown mode
DIGITAL IꢂPUTS (SCL, SDA)
Input Low Voltage
V
0.3 x V
V
V
V
IL
DD
Input High Voltage
Input Hysteresis
V
IH
0.7 x V
DD
V
HYS
0.05 x V
10
DD
Input Capacitance
C
IN
(Note 7)
pF
µA
ns
Input Leakage Current
Pulse Width of Spike Suppressed
I
IN
10
50
t
SP
0
DIGITAL OUTPUT (SDA, open drain)
I
= 3mA
= 6mA
0.4
0.6
SINK
Output Low Voltage
V
OL
V
I
SINK
V
to V
,
IL(MAX)
IH(MIN)
I
I
= 3mA
= 6mA
250
250
SINK
Output Fall Time
t
bus capacitance =
10pF to 400pF
ns
OF
SINK
TIMIꢂG CHARACTꢁRISTICS
(Figure 3; V
= +2.7V to +3.6V (MAX5380), V
= +4.5V to +5.5V (MAX5381), V
= +2.7V to +5.5V (MAX5382); R = 10k ;
DD L
DD
DD
C = 50pF, T = T
to T
, unless otherwise noted. Typical values are T = +25°C.) (Note 7)
MAX A
L
A
MIN
PARAMꢁTꢁR
SCL Clock Frequency
SYMBOL
COꢂDITIOꢂS
MIꢂ
TYP
MAX
UꢂITS
f
0
400
kHz
SCL
Bus Free Time Between a
STOP and a START Condition
t
1.3
0.6
µs
µs
BUF
Hold Time Repeated for a
START Condition
t
t
HD:STA
Low Period of the SCL Clock
High Period of the SCL Clock
t
1.3
0.6
µs
µs
LOW
t
HIGH
Setup Time for a Repeated
START Condition
0.6
µs
SU:STA
HD:DAT
Data Hold Time
Data Setup Time
t
0
0.9
µs
ns
t
100
SU:DAT
_______________________________________________________________________________________
3
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
TIMIꢂG CHARACTꢁRISTICS (continued)
(Figure 3; V
= +2.7V to +3.6V (MAX5380), V
= +4.5V to +5.5V (MAX5381), V
= +2.7V to +5.5V (MAX5382); R = 10k ;
DD L
DD
DD
C = 50pF, T = T
to T
, unless otherwise noted. Typical values are T = +25°C.) (Note 7)
MAX A
L
A
MIN
PARAMꢁTꢁR
SYMBOL
COꢂDITIOꢂS
MIꢂ
TYP
MAX
UꢂITS
Rise Time of Both SDA and
SCL Signals
t
r
300
ns
Fall Time of Both SDA and
SCL Signals
t
300
400
ns
µs
pF
f
Setup Time for STOP Condition
t
0.6
SU:STO
Capacitive Load for Each
Bus Line
C
b
ꢂote 1: Guaranteed from code 5 to code 255.
ꢂote 2: The offset value extrapolated from the range over which the INL is guaranteed.
ꢂote 3: MAX5382 tested at V
ꢂote 4: MAX5380 tested at V
= +5V 10%.
= +3V 10%, MAX5381 tested at V
DD
DD
= 5V 10%.
DD
ꢂote 5: Actual output voltages at full scale are 255/256 x V
.
REF
ꢂote 6: Output settling time is measured by taking the code from code 5 to 255, and from code 255 to 5.
ꢂote 7: Guaranteed by design.
Typical Operating Characteristics
(V
= +3.0V (MAX5380), V
= +5.0V (MAX5381/MAX5382); R = 10k , T = +25°C, unless otherwise noted.)
DD
DD L A
INTEGRAL NONLINEARITY
vs. SUPPLY VOLTAGE
INTEGRAL NONLINEARITY
vs. TEMPERATURE
INTEGRAL NONLINEARITY vs. CODE
0.075
0.050
0.025
0
0
0
-0.05
-0.05
-0.10
-0.15
-0.10
-0.15
-0.025
-0.050
-0.075
-0.100
-0.20
-0.20
0
50
100
150
200
250
300
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-40 -20
0
20
40
60
80
100
CODE
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
4
_______________________________________________________________________________________
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
Typical Operating Characteristics (continued)
(V
= +3.0V (MAX5380), V
= +5.0V (MAX5381/MAX5382); R = 10k , T = +25°C, unless otherwise noted.)
DD
DD L A
DIFFERENTIAL NONLINEARITY
vs. SUPPLY VOLTAGE
DIFFERENTIAL NONLINEARITY
vs. TEMPERATURE
DIFFERENTIAL NONLINEARITY vs. CODE
0
0
0.04
-0.02
-0.02
0.02
0
-0.04
-0.06
-0.08
-0.04
-0.06
-0.08
-0.10
-0.02
-0.04
-0.06
-0.08
-0.10
2.5
3.0
3.5
4.0
4.5
5.0
5.5
0
50
100
150
200
250
300
-40 -20
0
20
40
60
80
100
SUPPLY VOLTAGE (V)
CODE
TEMPERATURE (°C)
TOTAL UNADJUSTED ERROR vs. CODE
OFFSET ERROR vs. TEMPERATURE
OFFSET ERROR vs. SUPPLY VOLTAGE
0.45
0.30
0.15
0
0
0
-0.5
-0.5
-1.0
-1.5
-1.0
-1.5
-0.15
-0.30
-0.45
-0.60
-2.0
-2.0
0
50
100
150
200
250
300
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-40 -20
0
20
40
60
80
100
CODE
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
FULL-SCALE ERROR vs. SUPPLY VOLTAGE
FULL-SCALE ERROR vs. TEMPERATURE
MAX5380/1/2-10
MAX5380/1/2-11
200
3
2
1.2
3
2
1.2
0.8
0.4
0
MAX5381
MAX5380
MAX5382
180
160
0.8
0.4
0
MAX5381
MAX5380
MAX5380
MAX5381
140
120
1
1
MAX5382
100
80
0
0
MAX5382
-1
-2
-0.4
-0.8
-1
-2
-0.4
-0.8
60
40
20
NO LOAD
3.0
0
-3
-1.2
5.5
-3
-1.2
100
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.5
3.5
4.0
4.5
5.0
-40 -20
0
20
40
60
80
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
_______________________________________________________________________________________
5
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
Typical Operating Characteristics (continued)
(V
= +3.0V (MAX5380), V
= +5.0V (MAX5381/MAX5382); R = 10k , T = +25°C, unless otherwise noted.)
DD
DD L A
SUPPLY CURRENT vs. CODE
SUPPLY CURRENT vs. TEMPERATURE
160
155
150
145
140
135
160
155
150
145
140
135
NO LOAD
MAX5381, V = +5.0V
DD
MAX5381
MAX5382
MAX5382, V = +5.0V
DD
MAX5380, V = +5.0V
DD
MAX5380
MAX5380, V = +3.0V
DD
NO LOAD
130
130
0
32 64 96 128 160 192 224 256
CODE
-40 -20
0
20
40
60
80
100
TEMPERATURE (°C)
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
1.0
0.8
1.0
0.8
0.6
0.4
0.2
0.6
0.4
0.2
0
V
V
= +5.0V
= +3.0V
DD
DD
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-40 -20
0
20
40
60
80
100
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
OUTPUT LOAD REGULATION
OUTPUT VOLTAGE ON POWER-UP
MAX5380/1/2-17
4.5
4.0
3.5
3.0
2.5
2.0
1.5
A
OUT
50mV/div
B
C
V
DD
0.2
0.1
0
2V/div
D
E
0
1
2
3
4
5
6
7
8
9
10
4 s/div
LOAD CURRENT (mA)
A: MAX5361/MAX5362, V = 4.5V FULL-SCALE OR SOURCING
DD
B: MAX5360, FULL-SCALE, V = 2.7V SINKING, V = 5.0V SOURCING
DD
DD
C: MAX5360, FULL-SCALE, V = 2.7V SOURCING
DD
D: ZERO CODE, V = 2.7V SINKING
DD
E: ZERO CODE, V = 5.5V SINKING
DD
6
_______________________________________________________________________________________
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
Typical Operating Characteristics (continued)
(V
= +3.0V (MAX5380), V
= +5.0V (MAX5381/MAX5382); R = 10k , T = +25°C, unless otherwise noted.)
DD
DD L A
OUTPUT SETTLING
FROM 1/4 FS TO 3/4 FS
OUTPUT VOLTAGE EXITING SHUTDOWN
OUTPUT VOLTAGE ENTERING SHUTDOWN
OUT
500mV/div
OUT
0.5V/div
OUT
500mV/div
SDA
3V/div
SDA
3V/div
SDA
3V/div
10 s/div
1 s/div
1 s/div
MAX5380
MAX5380, SHDN TO 0x80
MAX5380, 0x80 TO SHDN
OUTPUT SETTLING
1LSB STEP UP
OUTPUT SETTLING
1LSB STEP DOWN
OUTPUT SETTLING
FROM 3/4 FS TO 1/4 FS
OUT
20mV/div
AC-COUPLED
OUT
0.5V/div
OUT
20mV/div
AC-COUPLED
SDA
3V/div
SDA
3V/div
SDA
3V/div
2 s/div
1 s/div
2 s/div
MAX5380, 0x7F TO 0x80
MAX5380
MAX5380, 0x80 TO 0x7F
Pin Description
PIꢂ
ꢂAMꢁ
FUꢂCTIOꢂ
1
2
3
4
5
OUT
GND
DAC Voltage Output
Ground
V
DD
Power-Supply Input
Serial Data Input
Serial Clock Input
SDA
SCL
_______________________________________________________________________________________
7
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
V
DD
V
REF
CURRENT-
STEERING
DAC
OUT
REF
SW1
SW2
SW255
255
SDA
SCL
MAX5380
MAX5381
MAX5382
DATA LATCH
8
CONTROL
LOGIC
10k
SERIAL INPUT
REGISTER
OUT
GND
Figure 1. Functional Diagram
Figure 2. Current-Steering Topology
Table 1. Unipolar Code Output Voltage
OUTPUT VOLTAGꢁ
MAX5381
DAC CODꢁ
MAX5380
MAX5382
1111 1111
1000 0000
0000 0001
0000 0000
2V x (255 / 256)
4V x (255 / 256)
0.9 x V
x (255 / 256)
DD
+1V
7.8mV
0
+2V
15.6mV
0
0.9 x V / 2
DD
0.9 x V / 256
DD
0
currents is steered to the DAC output. The current is
then converted to a voltage across a resistor, and this
voltage is buffered by the output buffer amplifier.
Detailed Description
The MAX5380/MAX5381/MAX5382 voltage-output, 8-bit
digital-to-analog converters (DACs) offer full 8-bit perfor-
mance with less than 1LSB integral nonlinearity error
and less than 1LSB differential nonlinearity error, ensur-
ing monotonic performance. The devices use a simple
Output Voltage
Table 1 shows the relationship between the DAC code
and the analog output voltage. The 8-bit DAC code is
2
2-wire, fast-mode I C-compatible serial interface that
binary unipolar with 1LSB = V
/ 256. The MAX5380/
REF
operates at up to 400kHz. The MAX5380/MAX5381/
MAX5382 include an internal reference, an output
buffer, and a low-current shutdown mode, which make
these devices ideal for low-power, highly integrated
applications (See Figure 1. Functional Diagram).
MAX5381 have a full-scale output voltage of (+2V -
1LSB) and (+4V - 1LSB), respectively, set by the internal
references. The MAX5382 has a full-scale output volt-
age of (0.9 x V
- 1LSB).
DD
Output Buffer
Analog Section
The MAX5380/MAX5381/MAX5382 employ a current-
steering DAC topology as shown in Figure 2. At the core
of the DAC is a reference voltage-to-current converter
(V/I) that generates a reference current. This current is
mirrored to 255 equally weighted current sources. DAC
switches control the outputs of these current mirrors so
that only the desired fraction of the total current-mirror
The DAC voltage output is an internally buffered unity-
gain follower that typically slews at 0.4V/µs. The out-
put can swing from 0 to full scale. With a 1/4 FS to 3/4
FS output transition, the amplifier outputs typically settle
to 1/2LSB in less than 5µs when loaded with 10k in
parallel with 50pF. The buffer amplifiers are stable with
any combination of resistive loads >10k and capaci-
tive loads <50pF.
8
_______________________________________________________________________________________
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
SDA
SCL
t
BUF
t
t
SU: STA
SU: DAT
t
HD: STA
t
SU: STO
t
t
HD: DAT
LOW
t
HIGH
t
HD: STA
t
R
t
F
START CONDITION
REPEATED START CONDITION
STOP CONDITION START CONDITION
Figure 3. 2-Wire Serial Interface Timing Diagram
after a loss of power. The output glitch at startup is typi-
cally less than 50mV.
V
DD
C
Shutdown Mode
The MAX5380/MAX5381/MAX5382 include a software-
controlled shutdown mode that reduces the supply cur-
rent to <1µA. All internal circuitry is disabled, and an
internal 10k resistor is placed from OUT to GND to
ensure 0V at OUT while in shutdown. The device enters
shutdown in less than 5µs and exits shutdown in less
than 50µs.
SDA
SCL
SCL
V
DD
R *
S
MAX5380M
2V REFERENCE
SDA
OUT
OFFSET ADJUSTMENT
SCL
V
DD
Digital Section
Serial Interface
The MAX5380/MAX5381/MAX5382 use a simple 2-wire
serial interface requiring only two I/O lines (2-wire bus)
of a standard microprocessor (µP) port. Figure 3 shows
the timing diagram for signals on the 2-wire bus.
MAX5381N
4V REFERENCE
SDA
OUT
THRESHOLD ADJUSTMENT
SCL
V
DD
The two bus lines (SDA and SCL) must be high when
the bus is not in use. The MAX5380/MAX5381/
MAX5382 are receive-only devices (slaves) and must
be controlled by a bus master device. Figure 4 shows a
typical application where up to four devices can be
connected to the bus, provided they have different
address settings. External pull-up resistors are not nec-
essary on these lines (when driven by push-pull dri-
vers), though these DACs can be used in applications
MAX5382P
REFERENCE
V
DD
GAIN ADJUSTMENT
SDA
OUT
*R IS OPTIONAL.
S
Figure 4. Typical Application Circuit
2
where pull-up resistors are required (such as in I C
Power-On Reset
systems) to maintain compatibility with existing circuit-
ry. The serial interface operates at SCL rates up to
400kHz. The SDA state is allowed to change only while
SCL is low, with the exception of START and STOP con-
ditions as shown in Figure 5. Each transmission con-
sists of a START condition sent by the bus master
The MAX5380/MAX5381/MAX5382 have a power-on
reset circuit to set the DAC’s output to 0 when V
is
DD
first applied or when V
dips below 1.7V (typ). This
DD
ensures that unwanted DAC output voltages will not
occur immediately following a system startup, such as
_______________________________________________________________________________________
9
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
define a write or read protocol, sets the device’s power
mode (SHDN). The device is powered-down when
SHDN is set to one. During a device search routine, the
MAX5380/MAX5381/MAX5382 acknowledge both
options (SHDN = 0 or SHDN = 1), but do not change
their power state if a stop condition (or restart) is issued
immediately. The second byte (DAC data) must be
sent/received for the device to update both power
mode and DAC output.
SDA
SCL
START CONDITION
STOP CONDITION
Figure 5. START and STOP Conditions
DAC Data
The 8-bit DAC data is decoded as straight binary MSB
first with 1LSB = V
/ 256 and converted into the cor-
REF
device, followed by the MAX5380/MAX5381/MAX5382s’
preset slave address, a power-mode bit, the DAC data,
and finally, a STOP condition (Figure 6). The bus is then
free for another transmission.
responding analog voltage as shown in Table 1. After
receiving the data byte, the devices acknowledge its
receipt and expect a STOP condition, at which point
the DAC output is updated.
SDA’s state is sampled and therefore must remain sta-
ble while SCL is high. Data is transmitted in 8-bit bytes.
Nine clock cycles are required to transfer each byte to
the MAX5380/MAX5381/MAX5382. Release SDA during
the 9th clock cycle since the selected device acknowl-
edges receipt of the byte by pulling SDA low during
this time. A series resistor on the SDA line may be
needed if the master’s output is forced high while the
selected device acknowledges (Figure 4).
The MAX5380/MAX5381/MAX5382 update the output
and the power mode only if the second byte is clocked
in (SHDN = 0) or out (SHDN = 1) of the device. When
SHDN = 1, the master will read all ones when clocking
out a data byte. The MAX5380/MAX5381/MAX5382 do
not drive SDA except for the acknowledge bit.
2
I C Compatibility
The MAX5380/MAX5381/MAX5382 are compatible with
2
existing I C systems. SCL and SDA are high-imped-
Slave Address
The MAX5380/MAX5381/MAX5382 are available with
one of four preset slave addresses. Each address
option is identified by the suffix L, M, N, or P added to
the part number. The address is defined as the 7MSBs
sent by the master after a START condition. The
address options are 0x60, 0x62, 0x64, 0x66 (left justi-
fied with LSB set to 0). The 8th bit, typically used to
ance inputs; SDA has an open drain that pulls the data
line low during the 9th clock pulse. Figure 7 shows a
2
typical I C application. The communication protocol
supports standard I C 8-bit communications. The gen-
eral call address is ignored, and CBUS formats are not
supported. The devices’ address is compatible with the
7-bit I C addressing protocol only. No 10-bit formats
2
2
SLAVE ADDRESS BYTE
DAC CODE
0
0
A
D7
D4
D1
ACK
1
1
0
A
1
SHDN
8
ACK
9
D6
D5
D3
D2
D0
2
SDA
MSB
LSB
MSB
LSB
10
1
17
18
START
CONDITION
STOP
CONDITION
A
2
A
1
*
0
L
0
1
0
1
M
N
P
0
1
1
*SEE ORDERING INFORMATION.
Figure 6. A Complete Serial Transmission
10 ______________________________________________________________________________________
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
Applications Information
V
DD
Digital Inputs and Interface Logic
C
The serial 2-wire interface has logic levels defined as
IL
SDA SCL
V
= 0.3 x V and V = 0.7 x V . All inputs include
DD IH DD
Schmitt trigger buffers to accept slow-transition inter-
faces. This means that optocouplers can interface
directly to the MAX5380/MAX5381/MAX5382 without
additional external logic. The digital inputs are compati-
ble with CMOS logic levels and must not be driven with
SCL
V
DD
MAX5380L
2V REFERENCE
SDA
voltages higher than V
.
DD
OUT
OFFSET ADJUSTMENT
Power-Supply Bypassing and Layout
Careful printed circuit board layout is important for best
system performance. To reduce crosstalk and noise
injection, keep analog and digital signals separate.
Ensure that the ground return from GND to the supply
ground is short and low impedance; a ground plane is
SCL
V
DD
MAX5381M
4V REFERENCE
SDA
OUT
THRESHOLD ADJUSTMENT
recommended. Bypass V
with a 0.1µF capacitor to
DD
ground as close as possible to the device. If the supply
is excessively noisy, connect a 10 resistor in series
SCL
V
DD
with the supply and V
tance.
and add additional capaci-
DD
MAX5382N
REFERENCE
V
DD
GAIN ADJUSTMENT
SDA
OUT
Chip Information
TRANSISTOR COUNT: 2910
2
Figure 7. Typical I C Application
are supported. RESTART protocol is supported, but an
immediate STOP condition is necessary to update the
DAC. The 8th bit of the address byte, typically used to
indicate a read or write protocol, is used in the MAX5380/
MAX5381/MAX5382 to enter or exit shutdown mode.
When MAX5380/MAX5381/MAX5382 are addressed in
2
I C read mode, they enter shutdown mode.
______________________________________________________________________________________ 11
Low-Cost, Low-Power, 8-Bit DACs with
2-Wire Serial Interface in SOT23
Package Information
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2001 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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