MAX614EPA_技术文档

19-0188; Rev 0; 11/93

Du a l-S lo t P CMCIA

An a lo g P o w e r Co n t ro lle rs

3/MAX614

_______________Ge n e ra l De s c rip t io n

____________________________Fe a t u re s

The MAX613/MAX614 contain switches for the VPP

supply-voltage lines for Personal Computer Memory

Card International Association (PCMCIA) Release 2.0

card slots. These ICs also contain level-translator out-

puts to switch the PCMCIA card VCC.

♦ Logic Compatible with Industry-Standard PCMCIA

Digital Controllers:

Intel 82365SL

Intel 82365SL DF

Vadem VG-365

The MAX613 allows digital control of two separate VPP

lines that can be switched between 0V, VCC, +12V,

and high impedance. It also includes level shifters that

allow the control of N-channel power MOSFETs for con-

necting and disconnecting the slot VCC supply voltage.

Vadem VG-465

Vadem VG-468

Cirrus Logic CL-PD6710

Cirrus Logic CL-PD6720

♦ 0V/VCC/+12V/High-Impedance VPP Outputs

♦ Internal 1.6Ω VPP Power Switches

♦ 10µA Quiescent Supply Current

♦ Break-Before-Make Switching

♦ VCC Switch Control

The MAX614 controls a single VPP supply-voltage line

and includes one level shifter in an 8-pin package.

________________________Ap p lic a t io n s

Notebook and Palmtop Computers

Personal Organizers

______________Ord e rin g In fo rm a t io n

Digital Cameras

Handiterminals

PART

TEMP. RANGE

0°C to +70°C

-40°C to +85°C

0°C to +70°C

-40°C to +85°C

PIN-PACKAGE

14 Plastic DIP

14 SO

Bar-Code Readers

MAX613CPD

MAX613CSD

MAX613EPD

MAX613ESD

MAX614CPA

MAX614CSA

MAX614EPA

MAX614ESA

14 Plastic DIP

14 SO

_________________P in Co n fig u ra t io n s

8 Plastic DIP

8 SO

8 Plastic DIP

8 SO

TOP VIEW

GND

AVPP1

AVPP0

BVPP1

BVPP0

VCC1

VPPIN

VCCIN

AVPP

BVPP

SHDN

DRV3

DRV5

1

2

3

4

5

6

7

14

13

12

11

10

9

MAX613

_________Typ ic a l Op e ra t in g Circ u it

+5V

+12V

VCC0

8

DIP/SO

VCCIN

VPPIN

VCC

5

DRV3

VCC

PCMCIA

SLOT

GND

AVPP1

AVPP0

VCC0

VPPIN

VCCIN

AVPP

DRV

1

2

3

4

8

7

6

5

PC CARD

SOCKET

CONTROLLER

MAX613

AVPP

BVPP

VPP1

MAX614

VPP2

DIP/SO

________________________________________________________________ Maxim Integrated Products

1

Ca ll t o ll fre e 1 -8 0 0 -9 9 8 -8 8 0 0 fo r fre e s a m p le s o r lit e ra t u re .

Du a l-S lo t P CMCIA

An a lo g P o w e r Co n t ro lle rs

ABSOLUTE MAXIMUM RATINGS

VCCIN to GND.............................................................+7V, -0.3V

VPPIN to GND ........................................................+13.2V, -0.3V

DRV5, DRV3, DRV to GND ........................(VPPIN + 0.3V), -0.3V

AVPP, BVPP to GND..................................(VPPIN + 0.3V), -0.3V

All Other Pins to GND ...............................(VCCIN + 0.3V), -0.3V

Operating Temperature Ranges:

MAX61_C__ ........................................................0°C to +70°C

MAX61_E__ .....................................................-40°C to +85°C

Storage Temperature Range .............................-65°C to +160°C

Lead Temperature (soldering, 10sec) .............................+300°C

Continuous Power Dissipation (T = +70°C)

A

8-Pin Plastic DIP (derate 9.09mW/°C above +70°C) ....727mW

8-Pin SO (derate 5.88mW/°C above +70°C).......................471mW

14-Pin Plastic DIP (derate 10.00mW/°C above +70°C).......800mW

14-Pin SO (derate 8.33mW/°C above +70°C) ..............667mW

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

3/MAX614

ELECTRICAL CHARACTERISTICS

(VCCIN = +5V, VPPIN = +12V, T = T

A

to T , unless otherwise noted.)

MAX

MIN

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

POWER REQUIREMENTS

VCCIN Input Voltage Range

VPPIN Input Voltage Range

2.85

0

5.5

12.6

1

V

–———

0.05

2.25

0.05

2

SHDN = 0V

MAX613

VPPIN Supply Current

(12V Mode)

–———

µA

AVPP = BVPP = VPPIN = 12.6V

10

1

SHDN = VCCIN

MAX614

MAX613

–———

SHDN = 0V

VPPIN Supply Current

(5V Mode)

VPPIN = 12.6V,

AVPP = BVPP= VCCIN

–———

SHDN = VCCIN

0.05

2.25

0.05

3.5

MAX614

MAX613

–———

SHDN = 0V

VPPIN Supply Current

(0V Mode)

–———

AVPP = BVPP = 0V

AVPP = BVPP = VPPIN

AVPP = BVPP = VCCIN

AVPP = BVPP = 0V

SHDN = VCCIN

MAX614

MAX613

–———

SHDN = 0V

VCCIN Supply Current

(12V Mode)

–———

20

SHDN = VCCIN

3.5

MAX614

MAX613

–———

3.5

10

50

10

SHDN = 0V

VCCIN Supply Current

(5V Mode)

–———

22

SHDN = VCCIN

3.5

MAX614

MAX613

–———

3.5

SHDN = 0V

VCCIN Supply Current

(0V Mode)

–———

20

SHDN = VCCIN

MAX614

3.5

2

_______________________________________________________________________________________

Du a l-S lo t P CMCIA

An a lo g P o w e r Co n t ro lle rs

3/MAX614

ELECTRICAL CHARACTERISTICS (continued)

(VCCIN = +5V, VPPIN = +12V, T = T

A

to T , unless otherwise noted.)

MAX

MIN

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

DC CHARACTERISTICS

VPPIN = 11.4V, 0mA < I

< 120mA (12V mode)

1.60

2.45

50

LOAD

Ω

AVPP, BVPP Switch Resistance

VCCIN = 4.5V, 0mA < I

< 1mA (5V mode)

< 1mA (0V mode)

30

135

1

LOAD

VPPIN = 11.4V, 0mA < I

High-impedance mode

300

75

DRV, DRV3, DRV5 Leakage Current

DRV, DRV3, DRV5 Output Voltage Low

LOGIC SECTION

nA

V

I

= 1mA

0.1

0.4

LOAD

µA

V

Logic Input Leakage Current

Logic Input High

1

2.4

Logic Input Low

0.8

V

_VCC_ to DRV_ Propagation Delay

50

ns

__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s

(Circuit of Figure 1, T_A= +25°C, unless otherwise noted.)

AVPP SWITCH RESISTANCE

(12V MODE)

AVPP SWITCH RESISTANCE

(5V MODE)

110

90

2.6

2.2

1.8

VPPIN = +12.0V

AVPP1 = 0V

AVPP0 = VCCIN

+125°C

+85°C

+25°C

70

50

30

10

+125°C

VCCIN = +5.0V

AVPP0 = 0V

AVPP1 = +5.0V

1.4

1.0

+25°C

-55°C

10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5

VPPIN (V)

2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5

VCCIN (V)

AVPP SWITCHING 5V TO 12V

AVPP SWITCHING 12V TO 5V

+5V

AVPP1

+5V

AVPP1

0V

+12V

AVPP

+5V

1µs/div

2µs/div

C

VPPIN

= 1µF, AVPP0 = AVPP1, C = 0.1µF

AVPP

C

VPPIN

= 1µF, AVPP0 = AVPP1, C = 0.1µF

AVPP

_______________________________________________________________________________________

3

Du a l-S lo t P CMCIA

An a lo g P o w e r Co n t ro lle rs

______________________________________________________________P in De s c rip t io n

NAME

FUNCTION

MAX613 MAX614

1

2

3

4

5

6

1

2

GND

AVPP1

AVPP0

BVPP1

BVPP0

VCC1

Ground

Logic inputs that control the voltage on AVPP (see Table 1 in Detailed Description).

3

—

Logic inputs that control the voltage on BVPP (see Table 2 in Detailed Description).

Logic input that controls the state of DRV3 and DRV5 (see Table 3 in Detailed Description).

Logic input that controls the state of DRV on the MAX614. On the MAX613, both VCC0 and

VCC1 control the state of DRV3 and DRV5 (see Table 3 in Detailed Description).

7

—

8

4

VCC0

DRV

Open-drain power MOSFET gate-driver output used to switch the slot VCC supply voltage.

DRV sinks current when VCC0 is high and goes high impedance when VCC0 is low.

5

3/MAX614

Open-drain power MOSFET gate-driver output used to switch the slot VCC supply voltage (see

Table 3 in Detailed Description).

—

6

DRV5

DRV3

Open-drain power MOSFET gate-driver output used to switch the slot VCC supply voltage (see

Table 3 in Detailed Description).

9

–———

SHDN

Logic-level shutdown input. When SHDN is low, DRV3 and DRV5 sink current regardless of the state of

–———

10

11

12

VCC0 and VCC1. When SHDN is high, DRV3 and DRV5 are controlled by VCC0 and VCC1.

Switched output, controlled by BVPP1 and BVPP0, that outputs 0V, +5V, or +12V. BVPP can

also be programmed to go high impedance (see Table 2 in Detailed Description).

BVPP

AVPP

Switched output, controlled by AVPP1 and AVPP0, that outputs 0V, +5V, or +12V. AVPP can

also be programmed to go high impedance (see Table 1 in Detailed Description).

13

14

7

8

VCCIN

VPPIN

+5V power input

+12V power input. VPPIN can have 0V or +5V applied as long as VCCIN > 2.85V.

Thus, systems with less than 60mA current capability

_______________De t a ile d De s c rip t io n

from +12V cannot program two 8-bit flash chips simulta-

neously, and need separate controls for VPP1 and VPP2.

Figure 1 shows an example of a power-control circuit

using the MAX613 to control VPP1 and VPP2 separately.

Figure 1’s circuit uses a MAX662 charge-pump DC-DC

converter to convert +5V to +12V at 30mA output current

capability without an inductor. When higher VPP cur-

rent is required, the MAX734 can supply 120mA.

VP P S w it c h in g

The MAX613/MAX614 a llow s imp le s witc hing of

PCMCIA card VPP to 0V, +5V, and +12V. On-chip

power MOSFETs connect AVPP and BVPP to either

GND, VCCIN, or VPPIN. The AVPP0 and AVPP1 control

logic inputs determine AVPP’s state. Likewise, BVPP0

and BVPP1 control BVPP. AVPP and BVPP can also be

programmed to be high impedance.

Use the MAX614 for single-slot applications that do

not re q uire a s e p a ra te VPP1 a nd VPP2. Fig ure 2

shows the MAX614 interfaced to the Vadem VG-465

single-slot controller.

Each PCMCIA card slot has two VPP voltage inputs

labeled VPP1 and VPP2. Typically, VPP1 supplies the

flash chips that store the low-order byte of the 16-bit

words, and VPP2 supplies the chips that contain the

high-order byte. Programming the high-order bytes

separately from the low-order bytes may be necessary

to minimize +12V current consumption. A single 8-bit

flash chip typically requires at most 30mA of +12V VPP

current during erase or programming.

To p re ve nt VPP ove rs hoot re s ulting from p a ra s itic

ind uc ta nc e in the +12V s up p ly, the VPPIN b yp a s s

capacitor’s value must be at least 10 times greater than

the capacitance from AVPP or BVPP to GND; the AVPP

and BVPP bypass capacitors must be at least 0.01µF.

4

_______________________________________________________________________________________

Du a l-S lo t P CMCIA

An a lo g P o w e r Co n t ro lle rs

3/MAX614

+5V

100k

1

⁄

Si9956DY

M1

2

VPPIN VCCIN VCC1

DRV3

PCMCIA

SLOT A

A: V 1_EN0 (A_VPP1EN0)

PP

VCC

MAX613 AVPP0

AVPP1

A:V 1_EN1 (A_VPP1EN1)

PP

VPP1

VPP2

AVPP

BVPP

1µF

A:V 2_EN0 (A_VPP2EN0)

PP

BVPP0

A:V 2_EN1 (A_VPP2EN1)

PP

BVPP1

A:V _EN (A_VCCEN)

CC

VCC0

GND

0.1µF

INTEL 82365SL

VADEM VG-365

or

VADEM VG-468)

100k

1

⁄

Si9956DY

M2

2

VPPIN VCCIN VCC1

B:V 1_EN0 (B_VPP1EN0)

PP

DRV3

AVPP0

AVPP1

BVPP0

BVPP1

VCC0

PCMCIA

SLOT B

VCC

B:V 1_EN1 (B_VPP1EN1)

PP

B:V 2_EN0 (B_VPP2EN0)

PP

MAX613

AVPP

VPP1

B:V 2_EN1 (B_VPP2EN1)

PP

1µF

B:V _EN (B_VCCEN)

CC

VPP2

BVPP

VCC

VSS

0.1µF

GND

4.7µF

0.1µF

4.7µF

VCC

GND

VOUT

SHDN

0.22µF

C1+

C1-

C2+

C2-

MAX662

Figure 1. MAX613 Dual Slot, Separate VPP1 and VPP2, 5V Only VCC Operating Circuit

+12V

+5V

32.76kHz

50% DUTY CYCLE

4.5V MIN

9.97V (WITH

100kΩ LOAD)

100k

10nF

VPPIN VCCIN

DRV

PCMCIA

SLOT

VADEM

VG-465

0.1µF

10nF

AVPP0

AVPP1

VPP1EN0

VPP1EN1

VPP2EN0

VPP2EN1

VCCEN

VCC

MAX614

1µF

NOTE:

1. ALL DIODES 1N4148.

2. OSCILLATOR FREQUENCY CAN BE

VPP1

VPP2

AVPP

INCREASED FOR HIGHER OUTPUT POWER.

4.5V MIN

VCC0

GND

Figure 3. Charge Pump

Figure 2. MAX614 Single-Slot Application

_______________________________________________________________________________________

5

Du a l-S lo t P CMCIA

An a lo g P o w e r Co n t ro lle rs

VCC S w it c h in g

The MAX613/MAX614 contain level shifters that simplify

driving external power MOSFETs to switch PCMCIA card

VCC. While a PCMCIA card is being inserted into the

socket, the VCC pins on the card edge connector should

be powered down to 0V to prevent “hot insertion” that

may damage the PCMCIA card. The MAX613/MAX614

MOSFET drivers are open drain. Their rise time is con-

trolled by an external pull-up resistor, allowing slow turn-

on of VCC power to the PCMCIA card.

Table 3. MAX613 DRV3 and DRV5 Control

–———

Logic (SHDN = VCCIN)

LOGIC INPUT

OUTPUT

VCC1

VCC0

DRV3

0V

DRV5

0V

0

1

0

1

0

1

HI-Z

0V

HI-Z

0V

The DRV3 and DRV5 pins on the MAX613 and the DRV

pin on the MAX614 are open-drain outputs pulled down

with internal N-channel devices. The gate drive to

the s e inte rna l N-c ha nne l d e vic e s is p owe re d from

VCCIN, regardless of VPPIN’s voltage. If VCCIN is left

unconnected or less than 2V is applied to VCCIN, the

DRV3/DRV5/DRV gate drivers will not sink current.

0V

The gates of M1 and M2 can be pulled up to any 10V to

20V source, and do not need to be pulled up to VPPIN.

Typically, the +12V used for VPPIN is supplied from a

+5V to +12V switching regulator. To save power, the

+5V to +12V switching regulator can be shut down

when not using the VPP programming voltage, allowing

VPPIN to fall below +5V.

3/MAX614

To switch VCC (M1 and M2 in Figure 1), use external

N-channel power MOSFETs. M1 and M2 should be

log ic -le ve l N-c ha nne l p owe r MOSFETs with low on

re sista nc e . The Motorola MTP3055EL a nd Silic onix

Si9956DY MOSFETs are both good choices. Turn on

M1 and M2 by pulling their gates above +5V. With the

gates pulled up to VPPIN as shown in Figure 1, VPPIN

should be at least 10V so that with VCC = 5.5V, M1 and

M2 have at least 4.5V of gate drive.

In this case, M1 and M2 should not be pulled up to

VPPIN, since M1 and M2 cannot be turned on reliably

when VPPIN falls below +10V. Any clock source can

be used to generate a high-side gate-drive voltage by

using capacitors and diodes to build an inexpensive

charge pump. Figure 3 shows a charge-pump circuit

that generates 10V from a +5V logic clock source.

Table 1. AVPP Control Logic

__________Ap p lic a t io n s In fo rm a t io n

The MAX613 contains all the gate drivers and switch-

ing c irc uitry ne e d e d to s up p ort a +3.3V/+5V VCC

PCMCIA s lot with minima l e xte rna l c omp one nts .

Figure 4 shows the analog power control necessary to

support two dual voltage PCMCIA slots. The A:VCC

and B:VCC pins on the Intel 82365SL DF power the

drivers for the control signals that directly connect to

the PCMCIA card.

LOGIC INPUT

OUTPUT

AVPP1

AVPP0

AVPP

0V

0

1

0

1

0

1

VCCIN

VPPIN

HI-Z

A 3.3V card needs 3.3V logic-level control signals and

the capability to program VPP1 and VPP2 to 3.3V. The

MAX613’s VCCIN is switched with slot VCC, so AVPP0

= 1 a nd AVPP1 = 0 c a us e s AVPP = s lot VCC.

Likewise, A:VCC and B:VCC are connected to VCCIN,

so the Intel 82365SL DF control signals to the PCMCIA

card are the right logic levels.

Table 2. BVPP Control Logic

LOGIC INPUT

OUTPUT

PCMCIA c a rd inte rfa c e c ontrolle rs othe r tha n the

Inte l 82365SL DF c a n be use d with Fig ure 4’s c ir-

c uit. Ta b le 4 s hows the p ins on the Cirrus Log ic

CL-PD6720 tha t p e rform the s a me func tion a s the

Inte l 82365SL DF p ins.

BVPP1

BVPP0

BVPP

0V

0

1

0

1

0

1

VCCIN

VPPIN

HI-Z

6

_______________________________________________________________________________________

Du a l-S lo t P CMCIA

An a lo g P o w e r Co n t ro lle rs

3/MAX614

+5V

+3.3V

1M

MOTOROLA

2N7002LT1

Si9956DY

1M

NIHON

E10QS03

A:V

CC

1

⁄

SILICONIX

Si9956DY

2

VCCIN

DRV3

VPPIN

A:V _EN0

PP

AVPP0

AVPP1

BVPP0

BVPP1

VCC0

A:V _EN1

PP

PCMCIA

SLOT A

DRV5

VCC

MAX613

VPP1

VPP2

GND

AVPP

BVPP

GND

A:V _EN0

CC

A:V _EN1

CC

VCC1

INTEL

82365SL DF

+5V

+3.3V

SUMIDA CD54 18µH

T1

1M

E10QS03

2N7002LT1

Si9956DY

E10QS03

LX

V+

V

OUT

SHDN

1nF

B:V

CC

33µF

1

⁄

Si9956DY

2

MAX734

CC

V

REF

VCCIN

VPPIN

AVPP0

33µF

GND

SS

DRV3

B:V _EN0

PP

B:V _EN1

PP

AVPP1

BVPP0

BVPP1

VCC0

PCMCIA

SLOT B

DRV5

VCC

MAX613

VPP1

VPP2

GND

AVPP

BVPP

GND

B:V _EN0

CC

B:V _EN1

CC

VCC1

Figure 4. Mixed 3.3V/5V VCC Application Circuit

_______________________________________________________________________________________

7

Du a l-S lo t P CMCIA

An a lo g P o w e r Co n t ro lle rs

_________________Ch ip To p o g ra p h ie s

Table 4. Interchangeable Interface

Controllers

MAX613

INTEL

82365SL DF

A:V

CIRRUS LOGIC

GND

VPPIN VCCIN

CL-PD6720

AVPP1

AVPP0

A_SLOT_VCC

A_VPP_VCC

A_VPP_PGM

A_-VCC_5

CC

A:V _EN0

PP

AVPP

BVPP

A:V _EN1

PP

A:V _EN0

CC

BVPP1

BVPP0

A:V _EN1

A_-VCC_3

CC

B:V

B_SLOT_VCC

B_VPP_VCC

B_VPP_PGM

B_-VCC_5

CC

SHDN

3/MAX614

V:V _EN0

PP

B:V _EN1

PP

B:V _EN0

CC

B:V _EN1

B_-VCC_3

CC

VCC1 VCC0 DRV5

DRV3

TRANSISTOR COUNT: 982;

SUBSTRATE CONNECTED TO GND.

MAX614

GND

VPPIN

VCCIN

AVPP

AVPP1

AVPP0

VCC0

DRV

TRANSISTOR COUNT: 982;

SUBSTRATE CONNECTED TO GND.

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

8

___________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 (4 0 8 ) 7 3 7 -7 6 0 0


型号：	MAX614EPA
厂家：	MAXIM INTEGRATED PRODUCTS
描述：	Dual-Slot PCMCIA Analog Power Controllers 双槽PCMCIA模拟电源控制器控制器 PC
文件：	总8页 (文件大小：102K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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