MAX6301_10 [MAXIM]
+5V, Low-Power μP Supervisory Circuits with Adjustable Reset/Watchdog; + 5V ，低功耗微处理器监控电路，带有可调节复位/看门狗
| 型号： | MAX6301_10 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | +5V, Low-Power μP Supervisory Circuits with Adjustable Reset/Watchdog |
| 文件： | 总12页 (文件大小：155K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1078; Rev 4; 9/10
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
1–MAX6304
_______________General Description
____________________________Features
o Adjustable Reset Threshold
The MAX6301–MAX6304* low-power microprocessor
(µP) supervisory circuits provide maximum adjustability
for reset and watchdog functions. The reset threshold
can be adjusted to any voltage above 1.22V, using
external resistors. In addition, the reset and watchdog
timeout periods are adjustable using external capaci-
tors. A watchdog select pin extends the watchdog time-
out period to 500x. The reset function features immunity
to power-supply transients.
o Adjustable Reset Timeout
o Adjustable Watchdog Timeout
o 500x Watchdog Timeout Multiplier
o 4µA Supply Current
o RESET or RESET Output Options
o Push-Pull or Open-Drain Output Options
o Guaranteed RESET Asserted At or Above
These four devices differ only in the structure of their reset
outputs (see the Selector Guide). The MAX6301–MAX6304
are available in the space-saving 8-pin µMAX® package,
as well as 8-pin PDIP and SO packages.
V
CC
= 1V (MAX6301/MAX6303)
o Power-Supply Transient Immunity
o Watchdog Function can be Disabled
o PDIP/SO/µMAX Packages Available
Applications
Embedded Controllers
Medical Equipment
Intelligent Instruments Critical µP Monitoring
Ordering Information
Portable Equipment
Set-Top Boxes
Computers
PART
TEMP RANGE
PIN-PACKAGE
Battery-Powered
MAX6301CPA
0°C to +70°C
8 PDIP
Computers/Controllers
MAX6301CSA
MAX6301CUA
MAX6301EPA
MAX6301ESA
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
8 SO
Selector Guide
FEATURE MAX6301 MAX6302 MAX6303 MAX6304
8 µMAX
8 PDIP
8 SO
Active-Low
Reset
√
—
√
—
√
√
—
—
√
—
√
Devices are available in both leaded and lead(Pb)-free/RoHS-
compliant packaging. Specify lead-free by adding the “+
symbol at the end of the part number when ordering.
Active-High
Reset
”
Ordering Information continued at end of data sheet.
Open-Drain
Reset Output
√
—
√
Push-Pull
Reset Output
Typical Operating Circuit
—
—
V
IN
8-PDIP/SO/ 8-PDIP/SO/ 8-PDIP/SO/ 8-PDIP/SO/
µMAX µMAX µMAX µMAX
Pin-Package
MAX6301
ONLY
R1
R2
Pin Configuration
1
2
8
7
R
L
V
RESET IN
GND
CC
TOP VIEW
0.1µF
V
RESET IN
1
2
3
4
8
7
6
5
CC
RESET
(RESET)
RESET
RESET (RESET)
GND
SRT
MAX6301
MAX6302
MAX6303
MAX6304
WDI
µP
MAX6301
R
L
MAX6302
ONLY
MAX6302
MAX6303
MAX6304
WDS
3
4
WDI
6
5
SWT
SRT
I/O
SWT
WDS
DIP/SO/µMAX
C
C
SWT
SRT
( ) ARE FOR MAX6302/MAX6304.
WDS = 0 FOR NORMAL MODE
WDS = 1 FOR EXTENDED MODE
( ) ARE FOR MAX6302/MAX6304.
µMAX is a registered trademark of Maxim Integrated Products, Inc.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
ABSOLUTE MAXIMUM RATINGS
CC....................................................................................
V
-0.3V to +7.0V
Continuous Power Dissipation (T = +70°C)
A
RESET IN, SWT, SRT..................................-0.3V to (V
WDI, WDS..............................................................-0.3V to +7.0V
RESET, RESET
+ 0.3V)
PDIP (derate 9.09mW/°C above +70°C)......................727mW
SO (derate 5.88mW/°C above +70°C).........................471mW
µMAX (derate 4.10mW/°C above +70°C) ....................330mW
Operating Temperature Range
CC
MAX6301… .......................................................-0.3V to +7.0V
MAX6302/MAX6303/MAX6304...............-0.3V to (V
Input Current
+ 0.3V)
MAX630_C_A......................................................0°C to +70°C
MAX630_E_A...................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow)
CC
V
............................................................................... 20mA
CC
GND.............................................................................. 20mA
Output Current
RESET, RESET.............................................................. 20mA
Lead(Pb)-free...............................................................+260°C
Containing Lead (Pb)...................................................+240°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= +2V to +5.5V, T = T
A
to T
, unless otherwise noted. Typical values are at V
= +5V and T = +25°C.)
CC A
CC
MIN
MAX
1–MAX6304
PARAMETER
SYMBOL
CONDITIONS
MAX6301C/MAX6303C
MIN
1.00
1.20
1.31
TYP
MAX
5.50
5.50
5.50
7.0
UNITS
V
Operating Voltage Range
(Note 1)
V
MAX6301E/MAX6303E
MAX6302/MAX6304
No load
CC
Supply Current (Note 2)
I
4.0
µA
CC
RESET TIMER
V
V
falling, V
= 5.0V
= 5.0V
1.195
1.220
1.240
20
1.245
1.265
RESET IN
RESET IN
CC
Reset Input Threshold Voltage
V
V
TH
rising, V
CC
Reset Input Hysteresis
V
mV
nA
HYST
Reset Input Leakage Current
I
0.01
1
RESET IN
V
V
≥ 4.5V, I
= 0.8mA
V
- 0.4
CC
CC
CC
SOURCE
= 2V, I
= 0.4mA
V
- 0.4
CC
Reset Output-Voltage High
(MAX6302/MAX6303/MAX6304)
SOURCE
V
V
V
OH
MAX6302/MAX6304, V
R = 10kΩ
= 1.31V,
V
-
CC
0.3
CC
L
V
V
≥ 4.5V, I
= 3.2mA
0.4
0.4
CC
CC
SINK
= 2V, I
= 1.6mA
SINK
Reset Output-Voltage Low
(MAX6301/MAX6303/MAX6304
V
= 1V, I
= 50µA,
CC
SINK
V
OL
0.3
0.3
T
A
= 0°C to +70°C
MAX6301/
MAX6303
V
= 1.2V, I
= 100µA,
CC
SINK
T
A
= -40°C to +85°C
V
to Reset Delay
t
t
V
= falling at 1mV/µs
CC
63
µs
µs
CC
RD
Reset Input Pulse Width
t
Comparator overdrive = 50mV
= 1500pF
26
RI
Reset Timeout Period (Note 3)
C
2.8
4.0
5.2
1
ms
RP
SRT
MAX6301, V
= V
RESET
CC
Reset Output Leakage Current
µA
MAX6302, V
= V
1
RESET
GND
2
_______________________________________________________________________________________
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
1–MAX6304
ELECTRICAL CHARACTERISTICS (continued)
(V
= +2V to +5.5V, T = T
A
to T
, unless otherwise noted. Typical values are at V
= +5V and T = +25°C.)
CC A
CC
MIN
MAX
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
WATCHDOG TIMER
V
0.7 x V
IH
CC
WDI, WDS Input Threshold
V
V
0.3 x V
CC
IL
V
V
= 4.5V to 5.5V
30
60
CC
CC
WDI Pulse Width
t
ns
WP
= 2V to 4.5V
WDI, WDS Leakage Current
Extended mode disabled
Extended mode enabled
1
µA
µA
ms
s
WDI Sink/Source Current (Note 4)
70
4.0
2.0
WDS = GND, C
= 1500pF
2.8
1.4
5.2
2.6
SWT
Watchdog Timeout Period
(Note 3)
t
WD
WDS = V , C
= 1500pF
CC SWT
Note 1: Reset is guaranteed valid from the selected reset threshold voltage down to the minimum V
.
CC
Note 2: WDS = V , WDI unconnected.
CC
Note 3: Precision timing currents of 500nA are present at both the SRT and SWT pins. Timing capacitors connected to these nodes
must have low leakage consistent with these currents to prevent timing errors.
Note 4: The sink/source is supplied through a resistor, and is proportional to V
(Figure 8). At V
= 2V, it is typically 24µA.
CC
CC
__________________________________________Typical Operating Characteristics
(C
= C
= 1500pF, T = +25°C, unless otherwise noted.)
SRT A
SWT
EXTENDED-MODE
WATCHDOG TIMEOUT PERIOD vs. C
NORMAL-MODE
WATCHDOG TIMEOUT PERIOD vs. C
(WDS = GND)
RESET TIMEOUT PERIOD
SWT
SWT
vs. C
SRT
(WDS = V
)
CC
10,000
10,000
10,000
V
= 5V
CC
V
= 5V
V
= 5V
CC
CC
1000
100
10
1000
100
10
1000
100
10
1
1
1
0
0
0.1
0.001 0.01
0.1
1
10
100
1000
0.001 0.01
0.1
1
10
100
1000
0.001 0.01
0.1
1
10
100
1000
C
(nF)
SRT
C
(nF)
C
(nF)
SWT
SWT
_______________________________________________________________________________________
3
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
____________________________Typical Operating Characteristics (continued)
(C
= C
= 1500pF, T = +25°C, unless otherwise noted.)
SRT A
SWT
RESET AND NORMAL-MODE
WATCHDOG TIMEOUT PERIOD
vs. TEMPERATURE
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAXIMUM TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE (V
)
RST
120
110
100
90
4.2
4.0
3.8
3.6
3.4
3.2
3.0
2.8
4.20
4.15
4.10
4.05
4.00
3.95
3.90
3.85
SEE THE NEGATIVE-GOING
TRANSIENTS SECTION
RESET DEASSERTED
NO LOAD
V
= 5.0V
CC
V
CC
RESET OCCURS
ABOVE THE CURVE
80
70
60
50
40
30
20
10
0
V
= 4.60V
RST
2.6
3.80
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGE (V)
0
200
400
600
800
1000
-60 -40 -20
0
20 40 60 80 100
1–MAX6304
RESET THRESHOLD OVERDRIVE (mV)
TEMPERATURE (°C)
SUPPLY CURRENT
vs. TEMPERATURE
RESET IN THRESHOLD VOLTAGE
vs. TEMPERATURE
5.00
4.75
4.50
4.25
4.00
3.75
3.50
3.25
3.00
2.75
2.50
1.226
RESET DEASSERTED
NO LOAD
1.224
1.222
1.220
V
= 5.0V
= 2.0V
CC
1.218
1.216
1.214
V
CC
-60 -40 -20
0
20 40 60 80 100
-60 -40 -20
0
20 40 60 80 100
TEMPERATURE (°C)
TEMPERATURE (°C)
V
TO RESET DELAY
RESET AND WATCHDOG
TIMEOUT vs. SUPPLY VOLTAGE
CC
vs. TEMPERATURE (V FALLING)
CC
76
72
68
64
60
56
4.16
4.12
4.08
4.04
4.00
3.96
V
FALLING AT 1mV/µs
CC
52
-60 -40 -20
0
20 40 60 80 100
2
3
4
5
6
TEMPERATURE (°C)
V
(V)
CC
4
_______________________________________________________________________________________
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
1–MAX6304
Pin Description
PIN
1
NAME
FUNCTION
Reset Input. High-impedance input to the reset comparator. Connect this pin to the center point of an
external resistor voltage-divider network to set the reset threshold voltage. The reset threshold voltage is
RESET IN
GND
calculated as follows: V
= 1.22 x (R1 + R2)/R2 (see the Typical Operating Circuit).
RST
2
Ground
Set Reset-Timeout Input. Connect a capacitor between this input and ground to select the reset timeout
3
SRT
period (t ). Determine the period as follows: t = 2.67 x C
, with C
in pF and t in µs (see the
SRT RP
RP
RP
SRT
Typical Operating Circuit).
Set Watchdog-Timeout Input. Connect a capacitor between this input and ground to select the basic
watchdog timeout period (t ). Determine the period as follows: t = 2.67 x C , with C in pF and
4
5
SWT
WDS
WD
WD
SWT
SWT
t
in µs. The watchdog function can be disabled by connecting this pin to ground.
WD
Watchdog-Select Input. This input selects the watchdog mode. Connect to ground to select normal mode
and the basic watchdog timeout period. Connect to V to select extended mode, multiplying the basic
CC
timeout period by a factor of 500. A change in the state of this pin resets the watchdog timer to zero.
Watchdog Input. A rising or falling transition must occur on this input within the selected watchdog timeout
period, or a reset pulse will occur. The capacitor value selected for SWT and the state of WDS determine
the watchdog timeout period. The watchdog timer clears and restarts when a transition occurs on WDI or
WDS. The watchdog timer is cleared when reset is asserted and restarted after reset deasserts. In the
6
WDI
extended watchdog mode (WDS = V ), the watchdog function can be disabled by driving WDI with a
CC
three-stated driver or by leaving WDI unconnected.
RESET changes from high to low whenever the monitored voltage (V
)
IN
Open-Drain, Active-Low Reset
Output (MAX6301)
drops below the selected reset threshold (V
). RESET remains low as
RST
RESET
long as V is below V
. Once V exceeds V
, RESET remains low
RST
IN
RST
IN
(MAX6301/
MAX6303)
for the reset timeout period and then goes high. The watchdog timer
Push-Pull, Active-Low Reset
Output (MAX6303)
triggers a reset pulse (t ) whenever the watchdog timeout period (t
RP
)
WD
is exceeded.
7
8
RESET changes from low to high whenever the monitored voltage (V
)
IN
Open-Drain, Active-High Reset
Output (MAX6302)
drops below the selected reset threshold (V
). RESET remains high as
RST
RESET
(MAX6302/
MAX6304
long as V is below V
. Once V exceeds V
, RESET remains high
RST
IN
RST
IN
for the reset timeout period and then goes low. The watchdog timer
Push-Pull, Active-High Reset
Output (MAX6304)
triggers a reset pulse (t ) whenever the watchdog timeout period (t
RP
)
WD
is exceeded.
V
Supply Voltage. Bypass to ground with a 0.1µF capacitor placed as close as possible to the pin.
CC
_______________________________________________________________________________________
5
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
Detailed Description
V
IN
Reset Function/Output
The reset output is typically connected to the reset input
of a µP. A µP’s reset input starts or restarts the µP in a
known state. The MAX6301–MAX6304 µP supervisory
circuits provide the reset logic to prevent code-execution
errors during power-up, power-down, and brownout
conditions (see the Typical Operating Circuit).
R1
R2
RESET IN
V
CC
0.1µF
MAX6301
For the MAX6301/MAX6303, RESET changes from high
MAX6302
MAX6303
MAX6304
to low whenever the monitored voltage (V ) drops
IN
below the reset threshold voltage (V
). RESET
. Once V
, RESET remains low for the reset timeout
RST
remains low as long as V is below V
IN
RST
IN
exceeds V
R1 + R2
R2
RST
V
= 1.22
RST
(
)
period, then goes high. When a reset is asserted due to
a watchdog timeout condition, RESET stays low for the
reset timeout period. Any time reset asserts, the watch-
dog timer clears. At the end of the reset timeout period,
RESET goes high and the watchdog timer is restarted
from zero. If the watchdog timeout period is exceeded
again, then RESET goes low again. This cycle contin-
ues unless WDI receives a transition.
Figure 1. Calculating the Reset Threshold Voltage (V
)
RST
1–MAX6304
and R2 can have very high values to minimize current
consumption. Set R2 to some conveniently high value
(1MΩ, for example) and calculate R1 based on the desired
reset threshold voltage, using the following formula:
On power-up, once V
reaches 1V, RESET is guaran-
CC
teed to be a logic-low. For information about applica-
tions where V is less than 1V, see the Ensuring a
⎛
⎞
VRST
R1= R2 ×
−1
⎟
Ω
( )
CC
⎜
V
⎝
⎠
TH
Valid RESET/RESET Output Down to V = 0V (MAX6303/
CC
MAX6304) section. As V
rises, RESET remains low.
, the reset timer starts and
CC
Watchdog Timer
The watchdog circuit monitors the µP’s activity. If the µP
does not toggle the watchdog input (WDI) within t
(user selected), reset asserts. The internal watchdog
timer is cleared by reset, by a transition at WDI (which
can detect pulses as short as 30ns), or by a transition
at WDS. The watchdog timer remains cleared while
reset is asserted; as soon as reset is released, the timer
starts counting (Figure 2).
When V rises above V
IN
RST
RESET remains low. When the reset timeout period
ends, RESET goes high.
WD
On power-down, once V goes below V
, RESET
RST
IN
goes low and is guaranteed to be low until V
drops
CC
below 1V. For information about applications where
V
is less than 1V, see the Ensuring a Valid
CC
RESET/RESET Output Down to V
= 0V (MAX6303/
CC
MAX6304) section.
The MAX6301–MAX6304 feature two modes of watchdog
timer operation: normal mode and extended mode. In
normal mode (WDS = GND), the watchdog timeout
period is determined by the value of the capacitor con-
nected between SWT and ground (see the Selecting
the Reset and Watchdog Timeout Capacitor section). In
The MAX6302/MAX6304 active-high RESET output is
the inverse of the MAX6301/MAX6303 active-low
RESET output, and is guaranteed valid for V
> 1.31V.
CC
Reset Threshold
These supervisors monitor the voltage on RESET IN.
The MAX6301–MAX6304 have an adjustable reset
extended mode (WDS = V ), the watchdog timeout
CC
period is multiplied by 500. For example, in the extended
mode, a 1µF capacitor gives a watchdog timeout period
of 22 minutes (see the Extended-Mode Watchdog
threshold voltage (V
) set with an external resistor
RST
voltage-divider (Figure 1). Use the following formula to
calculate V (the point at which the monitored voltage
RST
Timeout Period vs. C
Operating Characteristics).
graph in the Typical
SWT
triggers a reset):
In extended mode, the watchdog function can be
disabled by leaving WDI unconnected or by three-stating
the driver connected to WDI. In this mode, the watchdog
input is internally driven low during the watchdog timeout
period, then momentarily pulses high, resetting the
V
× R1+ R2
(
)
TH
V
V
( )
RST =
R2
where V
TH
is the desired reset threshold voltage and
is the reset input threshold (1.22V). Resistors R1
RST
V
6
_______________________________________________________________________________________
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
1–MAX6304
V
V
CC
t
t
RP
WD
WDI
0V
CC
RESET
0V
NORMAL MODE (WDS = GND)
Figure 2a. Watchdog Timing Diagram, WDS = GND
V
V
CC
t
x 500
t
RP
WD
WDI
0V
CC
RESET
0V
EXTENDED MODE (WDS = V
)
CC
Figure 2b. Watchdog Timing Diagram, WDS = V
CC
watchdog counter. When WDI is left unconnected, the
watchdog timer is cleared by this internal driver just
before the timeout period is reached (the internal driver
V
CC
pulls WDI high at about 94% of t ). When WDI is
WD
three-stated, the maximum allowable leakage current of
the device driving WDI is 10µA.
V
CC
GND
MAX6301
MAX6302
MAX6303
MAX6304
0.1µF
In normal mode (WDS = GND), the watchdog timer
cannot be disabled by three-stating WDI. WDI is a
high-impedance input in this mode. Do not leave WDI
unconnected in normal mode.
SRT
SWT
C
SRT
C
SWT
Applications Information
Selecting the Reset and Watchdog
Timeout Capacitor
t
t
WD
2.67
RP
C
=
C
=
SRT
SWT
The reset timeout period is adjustable to accommodate
a variety of µP applications. Adjust the reset timeout
2.67
in pF
in µs
C
t
C
in pF
in µs
SRT
RP
SWT
t
WD
period (t ) by connecting a specific value capacitor
RP
(C
) between SRT and ground (Figure 3). Calculate
SRT
the reset timeout capacitor as follows:
C
SRT
= t /2.67
RP
Figure 3. Calculating the Reset (C
Timeout Capacitor Values
) and Watchdog (C
)
SRT
SWT
_______________________________________________________________________________________
7
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
V
IN
V
CC
V
CC
V
CC
80C51
V
R1
R2
MAX6302
V
CC
CC
RESET IN
V
CC
RST
RESET
*
0.1µF
MAX6301
WDI
I/O
I/O
I/O
MAX6302
MAX6303
MAX6304
WDS
GND
GND
R1 + R2
R2
V
RST
= 1.22
(
)
*THREE-STATE LEAKAGE MUST BE < 10µA.
Figure 4. Monitoring Votlages Other than V
Figure 5. Wake-Up Timer
CC
with C
in pF and t in µs. C must be a low-leak-
SRT
watchdog timeout period ends, a reset is applied on
the 80C51, waking it up to perform tasks. While the µP
is performing tasks, the 80C51 pulls WDS low (select-
ing normal mode), and the MAX6302 monitors the µP
for hang-ups. When the µP finishes its tasks, it puts
itself back into sleep mode, drives WDS high, and
starts the cycle over again. This is a power-saving tech-
nique, since the µP is operating only part of the time
and the MAX6302 has very low quiescent current.
SRT
RP
1–MAX6304
age (< 10nA) type capacitor. Ceramic is recommended.
The watchdog timeout period is adjustable to accom-
modate a variety of µP applications. With this feature,
the watchdog timeout can be optimized for software
execution. The programmer can determine how often
the watchdog timer should be serviced. Adjust the
watchdog timeout period (t ) by connecting a specif-
ic value capacitor (C
WD
) between SWT and ground
SWT
(Figure 3). For normal-mode operation, calculate the
watchdog timeout capacitor as follows:
Adding a Manual Reset Function
A manual reset option can easily be implemented by con-
necting a normally open momentary switch in parallel with
R2 (Figure 6). When the switch is closed, the voltage on
RESET IN goes to zero, initiating a reset. When the
switch is released, the reset remains asserted for the
reset timeout period and then is cleared. The pushbut-
ton switch is effectively debounced by the reset timer.
C
SWT
= t
/ 2.67
WD
where C
is in pF and t
is in µs. C
must be a
SWT
SWT
WD
low-leakage (< 10nA) type capacitor. Ceramic is
recommended.
Monitoring Voltages Other than V
CC
The Typical Operating Circuit monitors V . Voltages
CC
other than V
can easily be monitored, as shown in
CC
V
CC
Figure 4. Calculate V
Threshold section.
as shown in the Reset
RST
Wake-Up Timer
R1
R2
In some applications, it is advantageous to put a µP
into sleep mode, periodically wake it up to perform
checks and/or tasks, then put it back into sleep mode.
The MAX6301 family of supervisors can easily accom-
modate this technique. Figure 5 illustrates an example
using the MAX6302 and an 80C51.
RESET IN
V
CC
0.1µF
MAX6301
MAX6302
MAX6303
MAX6304
In Figure 5, just before the µC puts itself into sleep
mode, it pulls WDS high. The µC’s I/O pins maintain
their logic levels while in sleep mode and WDS remains
high. This places the MAX6302 in extended mode,
increasing the watchdog timeout 500 times. When the
Figure 6. Adding a Manual Reset Function
8
_______________________________________________________________________________________
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
1–MAX6304
RESET TO
OTHER SYSTEM
COMPONENTS
TO RESET
GENERATOR
V
CC
V
CC
WDI
µP
WATCHDOG
TIMER
MAX6301
V
CC
0.1µF
4.7kΩ
GND
MAX6301
MAX6302
MAX6303
MAX6304
WDS
TO MODE
CONTROL
RESET
RESET
Figure 7. Interfacing to µPs with Bidirectional Reset I/O Pins
Figure 8. Watchdog Input Structure
Interfacing to µPs with
Bidirectional Reset Pins
Since RESET is open-drain, the MAX6301 interfaces
easily with µPs that have bidirectional reset pins, such
as the Motorola 68HC11 (Figure 7). Connecting RESET
directly to the µP’s reset pin with a single pullup allows
either device to assert reset.
Watchdog Input Current
Extended Mode
In extended mode (WDS = V ), the WDI input is inter-
CC
nally driven through a buffer and series resistor from
the watchdog counter (Figure 8). When WDI is left
unconnected, the watchdog timer is serviced within the
watchdog timeout period by a very brief low-high-low
pulse from the counter chain. For minimum watchdog
input current (minimum overall power consumption),
leave WDI low for the majority of the watchdog timeout
period, pulsing it low-high-low (> 30ns) once within the
period to reset the watchdog timer. If instead WDI is
externally driven high for the majority of the timeout
period, typically 70µA can flow into WDI.
Negative-Going V
Transients
CC
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these supervisors
are relatively immune to short-duration negative-going
transients (glitches). The Maximum Transient Duration vs.
Reset Threshold Overdrive graph in the Typical
Operating Characteristics shows this relationship.
The area below the curves of the graph is the region in
which these devices typically do not generate a reset
pulse. This graph was generated using a negative-
Normal Mode
In normal mode (WDS = GND), the internal buffer that
drives WDI is disabled. In this mode, WDI is a standard
CMOS input and leakage current is typically 100pA,
regardless of whether WDI is high or low.
going pulse applied to V , starting above the actual
IN
reset threshold (V
) and ending below it by the mag-
RST
nitude indicated (reset-threshold overdrive). As the
magnitude of the transient increases (farther below the
reset threshold), the maximum allowable pulse width
Ensuring a Valid RESET/RESET Output
Down to V
= 0V (MAX6303/MAX6304)
CC
When V
falls below 1V, RESET/RESET current sinking
CC
decreases. Typically, a V
transient that goes 100mV
CC
(sourcing) capabilities decline drastically. In the case
of the MAX6303, high-impedance CMOS-logic inputs
connected to RESET can drift to undetermined
voltages. This presents no problem in most applica-
tions, since most µPs and other circuitry do not operate
below the reset threshold and lasts 50µs or less will not
cause a reset pulse to be issued.
with V
below 1V.
CC
_______________________________________________________________________________________
9
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
V
V
CC
CC
100kΩ
MAX6304
MAX6303
V
V
CC
CC
0.1µF
0.1µF
RESET
RESET
100kΩ
GND
GND
Figure 10. Ensuring RESET Valid to V
= 0V
CC
Figure 9. Ensuring RESET Valid to V
= 0V
CC
In those applications where RESET must be valid down
to 0V, adding a pulldown resistor between RESET and
ground sinks any stray leakage currents, holding
RESET low (Figure 9). The value of the pulldown resistor
is not critical; 100kΩ is large enough not to load RESET
and small enough to pull RESET to ground. For applica-
tions using the MAX6304, a 100kΩ pullup resistor
START
1–MAX6304
SET WDI
LOW
between RESET and V
will hold RESET high when
CC
V
CC
falls below 1V (Figure 10).
SUBROUTINE OR
PROGRAM LOOP
SET WDI HIGH
Watchdog-Software Considerations
To help the watchdog timer monitor software execution
more closely, set and reset the watchdog input at differ-
ent points in the program, rather than pulsing the
watchdog input high-low-high or low-high-low. This
technique avoids a stuck loop in which the watchdog
timer would continue to be reset within the loop, keeping
the watchdog from timing out.
RETURN
END
Figure 11 shows an example of a flow diagram where
the I/O driving the watchdog input is set high at the
beginning of the program, set low at the beginning of
every subroutine or loop, then set high again when the
program returns to the beginning. If the program should
hang in any subroutine the problem would quickly be
corrected, since the I/O is continually set low and the
watchdog timer is allowed to time out, causing a reset
or interrupt to be issued. When using extended mode,
as described in the Watchdog Input Current section,
this scheme does result in higher average WDI input
current than does the method of leaving WDI low for the
majority of the timeout period and periodically pulsing it
low-high-low.
Figure 11. Watchdog Flow Diagram
should be kept as short as possible. Traces carrying
high-speed digital signals and traces with large voltage
potentials should be routed as far from these pins as
possible. Leakage currents and stray capacitance
(e.g., a scope probe) at these pins could cause errors
in the reset and/or watchdog timeout period. When
evaluating these parts, use clean prototype boards to
ensure accurate reset and watchdog timeout periods.
RESET IN is a high-impedance input that is typically
driven by a high-impedance resistor-divider network
(e.g., 1MΩ to 10MΩ). Minimize coupling to transient sig-
nals by keeping the connections to this input short. Any
DC leakage current at RESET IN (e.g., a scope probe)
causes errors in the programmed reset threshold. Note
that sensitive pins are located on the GND side of the
device, away from the digital I/O, to simplify board layout.
Layout Considerations
SRT and SWT are precision current sources. When
developing the layout for the application, be careful to
minimize board capacitance and leakage currents
around these pins. Traces connected to these pins
10 ______________________________________________________________________________________
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
1–MAX6304
Ordering Information (continued)
Chip Information
PROCESS: CMOS
PART
TEMP RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
8 PDIP
8 SO
MAX6302CPA
MAX6302CSA
MAX6302CUA
MAX6302EPA
MAX6302ESA
MAX6303CPA
MAX6303CSA
MAX6303CUA
MAX6303EPA
MAX6303ESA
MAX6304CPA
MAX6304CSA
MAX6304CUA
MAX6304EPA
MAX6304ESA
Package Information
8 µMAX
8 PDIP
8 SO
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in
the package code indicates RoHS status only. Package draw-
ings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
8 PDIP
8 SO
LAND
PATTERN NO.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE NO.
8 µMAX
8 PDIP
8 SO
—
8 PDIP
8 SO
P8-1
S8-2
U8-1
21-0043
21-0041
21-0036
90-0096
90-0092
8 PDIP
8 SO
8 µMAX
8 µMAX
8 PDIP
8 SO
Devices are available in both leaded and lead(Pb)-free/RoHS-
compliant packaging. Specify lead-free by adding the “+
”
symbol at the end of the part number when ordering.
______________________________________________________________________________________ 11
+5V, Low-Power µP Supervisory Circuits
with Adjustable Reset/Watchdog
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
2
7/96
12/05
3/07
Initial release
—
1, 11
1
Added lead-free notation.
Updated Typical Operating Circuit.
Updated Pin Description, Applications Information, Figure 3, and Package
Information.
3
4
3/09
9/10
5, 7, 11
Updated Absolute Maximum Ratings, correct part number.
2, 9, 11, 12
1–MAX6304
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2010 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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