MAX6424UK30+T [MAXIM]
Power Supply Support Circuit, Fixed, 1 Channel, +3VV, BICMOS, PDSO5, LEAD FREE, MO-178AA, SOT-23, 5 PIN;
| 型号： | MAX6424UK30+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Power Supply Support Circuit, Fixed, 1 Channel, +3VV, BICMOS, PDSO5, LEAD FREE, MO-178AA, SOT-23, 5 PIN 信息通信管理 光电二极管 |
| 文件： | 总10页 (文件大小：1158K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MAX6340/MAX6421–
MAX6426
Low-Power, SC70/SOT µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
General Description
The MAX6340/MAX6421–MAX6426 low-power micropro-
cessor supervisor circuits monitor system voltages from
1.6V to 5V. These devices perform a single function: they
assert a reset signal whenever the V
falls below its reset threshold. The reset output remains
asserted for the reset timeout period after V rises
above the reset threshold. The reset timeout is externally
set by a capacitor to provide more flexibility.
Benefits and Features
● Monitor System Voltages from 1.6V to 5V
● Capacitor-Adjustable Reset Timeout Period
● Low Quiescent Current (1.6µA typ)
supply voltage
CC
● Three RESET Output Options
Push-Pull RESET
CC
Push-Pull RESET
Open-Drain RESET
● Guaranteed Reset Valid to V
= 1V
CC
The MAX6421/MAX6424 have an active-low, push-
pull reset output. The MAX6422 has an active-high, push-
pull reset output and the MAX6340/MAX6423/ MAX6425/
MAX6426 have an active-low, open-drain reset output.
The MAX6421/MAX6422/MAX6423 are offered in 4-pin
SC70 or SOT143 packages. The MAX6340/MAX6424/
MAX6425/MAX6426 are available in 5-pin SOT23-5
packages.
● Immune to Short V
Transients
CC
● Small 4-Pin SC70, 4-Pin SOT143, and 5-Pin SOT23
Packages
● MAX6340 Pin Compatible with LP3470
● MAX6424/MAX6425 Pin Compatible with
NCP300–NCP303, MC33464/MC33465,
S807/S808/S809, and RN5VD
● MAX6426 Pin Compatible with PST92XX
Applications
● Portable Equipment
● Battery-Powered Computers/Controllers
● Automotive
Typical Operating Circuit, Selector Guide, and Ordering
Information appear at end of data sheet.
● Medical Equipment
● Intelligent Instruments
● Embedded Controllers
● Critical µP Monitoring
● Set-Top Boxes
● Computers
Pin Configurations
TOP VIEW
V
CC
1
2
4
3
RESET
MAX6421X
MAX6422X
MAX6423X
(RESET)
SRT
GND
SC70
( ) ARE FOR THE MAX6422
Pin Configurations continued at end of data sheet.
19-2440; Rev 7; 1/16
MAX6340/MAX6421–
MAX6426
Low-Power, SC70/SOT µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
Absolute Maximum Ratings
All Voltages Referenced to GND
Continuous Power Dissipation (T = +70°C)
A
V
.......................................................................-0.3V to +6.0V
4-Pin SC70 (derate 3.1mW/°C above +70°C).............245mW
4-Pin SOT143 (derate 4mW/°C above +70°C) ...........320mW
5-Pin SOT23 (derate 7.1mW/°C above +70°C) ..........571mW
Operating Temperature Range......................... -40°C to +125°C
Storage Temperature Range........................... .-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
CC
SRT, RESET, RESET (push-pull)............. -0.3V to (V
+ 0.3V)
CC
RESET (open drain).............................................-0.3V to +6.0V
Input Current (all pins)......................................................±20mA
Output Current (RESET, RESET)....................................±20mA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V
= 1V to 5.5V, T = T
to T
, unless otherwise specified. Typical values are at V
= 5V and T = +25°C.) (Note 1)
CC A
CC
A
MIN
MAX
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
5.5
UNITS
Supply Voltage Range
V
1.0
V
CC
V
V
≤ 5.0V
≤ 3.3V
2.5
1.9
1.6
4.2
CC
3.4
Supply Current
I
µA
CC
CC
VCC ≤ 2.0V
2.5
T
T
= +25°C
V
- 1.5%
V
V
+ 1.5%
+ 2.5%
A
TH
TH
V
Reset Threshold Accuracy
V
TH
V
CC
= -40°C to +125°C
V
- 2.5%
A
TH
TH
Hysteresis
to Reset Delay
V
4 x V
80
mV
µs
HYST
TH
V
t
V
falling at 1mV/µs
CC
RD
CC
C
C
= 1500pF
= 0
3.00
4.375
0.275
240
5.75
SRT
SRT
SRT
Reset Timeout Period
t
ms
RP
V
V
Ramp Current
I
V
V
V
V
V
V
V
V
V
= 0 to 0.65V; V
= 1.6V to 5V
rising)
RAMP
nA
V
SRT
RAMP
CC
V
Ramp Threshold
= 1.6V to 5V (V
0.65
33
TH-RAMP
SRT
CC
RAMP Threshold Hysteresis
falling threshold
mV
RAMP
≥ 1.0V, I
= 50µA
0.3
0.3
0.4
CC
CC
CC
CC
CC
CC
SINK
SINK
SINK
RESET Output Voltage Low
V
≥ 2.7V, I
≥ 4.5V, I
≥ 1.8V, I
= 1.2mA
= 3.2mA
V
OL
= 200µA
0.8 x V
0.8 x V
0.8 x V
SOURCE
CC
CC
CC
RESET Output Voltage High,
V
≥ 2.25V, I
= 500µA
V
OH
SOURCE
Push-Pull
≥ 4.5V, I
= 800µA
SOURCE
RESET Output Leakage Current,
I
V
> V , reset not asserted
1.0
µA
LKG
CC
TH
Open-Drain
V
V
V
V
V
V
V
≥ 1.0V, I
≥ 1.8V, I
≥ 2.7V, I
≥ 4.5V, I
≥ 1.8V, I
≥ 2.7V, I
≥ 4.5V, I
= 1µA
0.8 x V
0.8 x V
0.8 x V
0.8 x V
CC
CC
CC
CC
CC
CC
CC
SOURCE
SOURCE
SOURCE
SOURCE
CC
CC
CC
CC
= 150µA
= 500µA
= 800µA
RESET Output Voltage High
RESET Output Voltage Low
V
V
V
OH
= 500µA
0.3
0.3
0.4
SINK
SINK
SINK
V
= 1.2mA
= 3.2mA
OL
Note 1: Devices production tested at +25°C. Overtemperature limits are guaranteed by design.
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MAX6340/MAX6421–
MAX6426
Low-Power, SC70/SOT µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
Typical Operating Characteristics
(V
= 5V, C
= 1500pF, T = +25°C, unless otherwise noted.)
CC
SRT
A
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
RESET TIMEOUT PERIOD
vs. TEMPERATURE
RESET TIMEOUT PERIOD vs. C
SRT
4.30
4.25
4.20
4.15
4.10
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
10,000
1000
100
10
C
= 1500pF
SRT
T
= +125°C
A
T
A
= +25°C
T
= -40°C
A
1
0
0
0.1
1
2
3
4
5
6
-50 -25
0
25
50
75 100 125
0.001 0.01
0.1
1
10
100
1000
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
C
(nF)
SRT
RESET TIMEOUT PERIOD
vs. TEMPERATURE
MAXIMUM TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
V
TO RESET DELAY
CC
vs. TEMPERATURE (V FALLING)
CC
600
550
500
450
400
160
150
140
130
120
175
150
125
100
75
V
FALLING AT 1mVs
CC
C
= 0
SRT
RESET OCCURS
ABOVE THE CURVE
350
300
110
100
50
25
250
200
90
80
V
TH
= 2.95V
800
0
-50 -25
0
25
50
75 100 125
0
200
400
600
1000
-50 -25
0
25
75 100 125
50
TEMPERATURE (°C)
RESET THRESHOLD OVERDRIVE (mV)
TEMPERATURE (°C)
POWER-UP/POWER-DOWN
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
CHARACTERISTIC
1.006
1.004
1.002
1.000
0.998
0.996
0.994
V
TH
= 1.6V
V
CC
1V/div
1V/div
RESET
400s/div
-50 -25
0
25
50
75 100 125
TEMPERATURE (°C)
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MAX6340/MAX6421–
MAX6426
Low-Power, SC70/SOT µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
Pin Description
PIN
MAX6421
MAX6424
MAX6425
MAX6340
SOT23
MAX6422
MAX6423
MAX6426
SOT23
NAME
FUNCTION
SOT143 SC70
SOT23
Set Reset Timeout Input. Connect a capacitor between
SRT and ground to set the timeout period. Determine the
1
3
3
5
1
SRT
6
period as follows: t
= 2.73 × 10 × C
+ 275µs with
RP
SRT
t
in seconds and C
in farads
RP
SRT
2
3
4
1
—
2
2
—
1
3
4
2
2, 3
—
5
GND
N.C.
Ground
Not Internally Connected. Can be connected to GND
Supply Voltage and Reset Threshold Monitor Input
V
CC
RESET changes from high to low whenever V
drops
CC
below the selected reset threshold voltage. RESET
5
1
4
RESET
remains low for the reset timeout period after V
the reset threshold
exceeds
CC
4
4
RESET changes from low to high whenever V
drops
CC
below the selected reset threshold voltage. RESET
—
—
—
RESET
remains high for the reset timeout period after V
exceeds the reset threshold
CC
Detailed Description
3.3V
Reset Output
V
The reset output is typically connected to the reset input of
a µP. A µP’s reset input starts or restarts the µP in a known
state. The MAX6340/MAX6421–MAX6426 µP superviso-
ry circuits provide the reset logic to prevent code-execu-
tion errors during power-up, power-down, and brownout
conditions (see Typical Operating Characteristics).
CC
5.0V
LASER-TRIMMED
RESISTORS
10kΩ
V
REF
RESET
N
5V
SYSTEM
RESET changes from high to low whenever V
drops
exceeds the
CC
below the threshold voltage. Once V
CC
RESET
TIMEOUT
SRT
threshold voltage, RESET remains low for the capaci-
tor-adjustable reset timeout period.
MAX6340
MAX6423
MAX6425
MAX6426
C
SRT
GND
The MAX6422 active-high RESET output is the inverse
logic of the active-low RESET output. All device outputs
are guaranteed valid for V
> 1V.
CC
Figure 1. MAX6340/MAX6423/MAX6425/MAX6426 Open-Drain
RESET Output Allows Use with Multiple Supplies
The MAX6340/MAX6423/MAX6425/MAX6426 are open-
drain RESET outputs. Connect an external pullup resistor
to any supply from 0 to 5.5V. Select a resistor value large
enough to register a logic low when RESET is asserted
and small enough to register a logic high while supply-
ing all input current and leakage paths connected to the
RESET line. A 10kΩ to 100kΩ pullup is sufficient in most
applications.
Selecting a Reset Capacitor
The reset timeout period is adjustable to accommodate
a variety of µP applications. Adjust the reset timeout
period (t ) by connecting a capacitor (C
) between
RP
SRT
SRT and ground. Calculate the reset timeout capacitor
as follows:
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MAX6340/MAX6421–
MAX6426
Low-Power, SC70/SOT µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
6
C
= (t
- 275µs) / (2.73 5 10 )
SRT
RP
Applications Information
Interfacing to Other Voltages for Logic
Compatibility
The open-drain outputs of the MAX6340/MAX6423/
MAX6425/MAX6426 can be used to interface to µPs with
other logic levels. As shown in Figure 1, the open-drain
output can be connected to voltages from 0 to 5.5V. This
allows for easy logic compatibility to various µPs.
where t
is in seconds and C
is in farads.
RP
SRT
The reset delay time is set by a current/capacitor-con-
trolled ramp compared to an internal 0.65V reference. An
internal 240nA ramp current source charges the external
capacitor. The charge to the capacitor is cleared when a
reset condition is detected. Once the reset condition is
removed, the voltage on the capacitor ramps according to
the formula: dV/dt = I/C. The C
0.65V to deassert the reset. C
(<10nA) type capacitor; ceramic is recommended.
capacitor must ramp to
must be a low-leakage
SRT
SRT
Wired-OR Reset
To allow auxiliary circuitry to hold the system in reset,
an external open-drain logic signal can be connected
to the open-drain RESET of the MAX6340/MAX6423/
MAX6425/MAX6426, as shown in Figure 2. This config-
uration can reset the µP, but does not provide the reset
timeout when the external logic signal is released.
Operating as a Voltage Detector
The MAX6340/MAX6421–MAX6426 can be operated in
a voltage detector mode by floating the SRT pin. The
reset delay times for V
rising above or falling below the
CC
threshold are not significantly different. The reset output
is deasserted smoothly without false pulses.
Negative-Going V
Transients
CC
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these supervisors
are relatively immune to short-duration negative-go-
ing transients (glitches). The graph Maximum Transient
Duration vs. Reset Threshold Overdrive in the Typical
Operating Characteristics shows this relationship.
V
CC
The area below the curve of the graph is the region in
which these devices typically do not generate a reset
pulse. This graph was generated using a negative-going
V
DD
10kΩ
MAX6340
MAX6423
MAX6425
MAX6426
pulse applied to V , starting above the actual reset
CC
µP
threshold (V ) and ending below it by the magnitude
TH
indicated (reset-threshold overdrive). As the magnitude of
the transient decreases (farther below the reset thresh-
old), the maximum allowable pulse width decreases.
RESET
RESET
N
Typically, a V
transient that goes 100mV below the
CC
GND
reset threshold and lasts 50µs or less does not cause a
reset pulse to be issued.
Ensuring a Valid RESET or RESET
OPEN-DRAIN
LOGIC
Down to V
= 0
CC
When V
falls below 1V, RESET/RESET current-sinking
CC
N
(sourcing) capabilities decline drastically. In the case of
the MAX6421/MAX6424, high-impedance CMOS-logic
inputs connected to RESET can drift to undetermined
voltages. This presents no problems in most applications,
since most µPs and other circuitry do not operate with
Figure 2. Wired-OR Reset Circuit
V
below 1V.
CC
In those applications where RESET must be valid down
to zero, adding a pulldown resistor between RESET
and ground sinks any stray leakage currents, holding
RESET low (Figure 3). The value of the pulldown resis-
tor is not critical; 100kΩ is large enough not to load
RESET and small enough to pull RESET to ground. For
applications using the MAX6422, a 100kΩ pullup resis-
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MAX6340/MAX6421–
MAX6426
Low-Power, SC70/SOT µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
Table 1. Reset Threshold Voltage Suffix
V
CC
SUFFIX
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
MIN
TYP
MAX
1.614
1.707
1.845
1.948
2.050
2.153
2.243
2.371
2.460
2.563
2.691
2.768
2.870
2.998
3.075
3.152
3.280
3.383
3.485
3.558
3.690
3.793
3.895
3.998
4.100
4.203
4.305
4.408
4.484
4.613
4.741
4.818
4.920
5.023
5.125
1.536
1.623
1.755
1.853
1.950
2.048
2.133
2.313
2.340
2.438
2.559
2.633
2.730
2.852
2.925
2.998
3.120
3.218
3.315
3.413
3.510
3.608
3.705
3.803
3.900
3.998
4.095
4.193
4.266
4.388
4.509
4.583
4.680
4.778
4.875
1.575
1.665
1.800
1.900
2.000
2.100
2.188
2.313
2.400
2.500
2.625
2.700
2.800
2.925
3.000
3.075
3.200
3.300
3.400
3.500
3.600
3.700
3.800
3.900
4.000
4.100
4.200
4.300
4.375
4.500
4.625
4.700
4.800
4.900
5.000
V
CC
MAX6421
MAX6424
RESET
100k
GND
Figure 3. Ensuring RESET Valid to V
= 0
CC
V
CC
100k
V
CC
MAX6422
RESET
GND
Figure 4. Ensuring RESET Valid to V
= 0
CC
tor between RESET and VCC holds RESET high when
VCC falls below 1V (Figure 4). Open-drain RESET ver-
sions are not recommended for applications requiring
valid logic for V
down to zero.
CC
Layout Consideration
SRT is a precise current source. When developing the
layout for the application, be careful to minimize board
capacitance and leakage currents around this pin. Traces
connected to SRT should be kept as short as possible.
Traces carrying high-speed digital signals and traces with
large voltage potentials should be routed as far from SRT
as possible. Leakage current and stray capacitance (e.g.,
a scope probe) at this pin could cause errors in the reset
timeout period. When evaluating these parts, use clean
prototype boards to ensure accurate reset periods.
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MAX6340/MAX6421–
MAX6426
Low-Power, SC70/SOT µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
Standard Versions Table
PART*
OUTPUT STAGE
PART*
OUTPUT STAGE
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
MAX6340UK16+T
MAX6340UK22+T
MAX6340UK26+T
MAX6340UK29+T
MAX6340UK46+T
MAX6421US16+T
MAX6421XS16+T
MAX6421US22+T
MAX6421XS22+T
MAX6421US26+T
MAX6421XS26+T
MAX6421US29+T
MAX6421XS29+T
MAX6421US46+T
MAX6421XS46+T
MAX6422US16+T
MAX6422XS16+T
MAX6422US22+T
MAX6422XS22+T
MAX6422US26+T
MAX6422XS26+T
MAX6422US29+T
MAX6422XS29+T
MAX6422US46+T
MAX6422XS46+T
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
MAX6423US16+T
MAX6423XS16+T
MAX6423US22+T
MAX6423XS22+T
MAX6423US26+T
MAX6423XS26+T
MAX6423US29+T
MAX6423XS29+T
MAX6423US46+T
MAX6423XS46+T
MAX6424UK16+T
MAX6424UK22+T
MAX6424UK26+T
MAX6424UK29+T
MAX6424UK46+T
MAX6425UK16+T
MAX6425UK22+T
MAX6425UK26+T
MAX6425UK29+T
MAX6425UK46+T
MAX6426UK16+T
MAX6426UK22+T
MAX6426UK26+T
MAX6426UK29+T
MAX6426UK46+T
*Sample stock is generally held on all standard versions. Contact
factory for availability of nonstandard versions.
Typical Operating Circuit
V
CC
V
CC
LASER-TRIMMED
RESISTORS
P
V
REF
RESET
RESET
RESET
SRT
TIMEOUT
MAX6421
MAX6424
C
SRT
GND
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MAX6340/MAX6421–
MAX6426
Low-Power, SC70/SOT µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
Pin Configurations (continued)
TOP VIEW
SRT
1
2
3
5
4
RESET RESET
1
2
3
5
4
SRT
N.C.
MAX6340
MAX6424
MAX6425
GND
V
CC
V
GND
N.C.
CC
SOT23
SOT23
SRT
GND
GND
1
2
3
5
4
V
GND
1
2
4
3
RESET
CC
MAX6421U
MAX6422U
MAX6423U
(RESET)
MAX6426
V
CC
SRT
RESET
SOT143
SOT23
Selector Guide
PART
PUSH-PULL RESET
PUSH-PULL RESET
OPEN-DRAIN RESET
PIN-PACKAGE
5 SOT23
MAX6340
MAX6421
MAX6422
MAX6423
MAX6424
MAX6425
MAX6426
—
✔
—
—
✔
—
—
—
—
✔
—
—
—
—
✔
—
—
✔
—
✔
✔
4 SOT143/SC70
4 SOT143/SC70
4 SOT143/SC70
5 SOT23
5 SOT23
5 SOT23
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MAX6340/MAX6421–
MAX6426
Low-Power, SC70/SOT µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
Ordering Information
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PART
TEMP RANGE
PIN-PACKAGE
5 SOT23-5
5 SOT23-5
4 SC70-4
MAX6340UK_ _+T
MAX6340UK_ _/V+T
MAX6421XS_ _+T
MAX6421US_ _+T
MAX6421US_ _-T
MAX6422XS_ _+T
MAX6422US_ _+T
MAX6422US_ _-T
MAX6423XS_ _+T
MAX6423US_ _+T
MAX6423US_ _-T
MAX6424UK_ _+T
MAX6424UK_ _-T
MAX6425UK_ _+T
MAX6425UK_ _-T
MAX6426UK_ _+T
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
4 SOT143-4
4 SOT143-4
4 SC70-4
PACKAGE
PACKAGE OUTLINE
LAND
PATTERN NO.
TYPE
CODE
X4+1
U4+1
U5+2
NO.
4 SC70
4 SOT143
5 SOT23
21-0098
21-0052
21-0057
90-0187
90-0183
90-0174
4 SOT143-4
4 SOT143-4
4 SC70-4
4 SOT143-4
4 SOT143-4
5 SOT23-5
5 SOT23-5
5 SOT23-5
5 SOT23-5
5 SOT23-5
Note: The MAX6340/MAX6421–MAX6426 are available with factory-trimmed
reset thresholds from 1.575V to 5.0V in approximately 0.1V increments.
Insert the desired nominal reset threshold suffix (from Table 1) into the
blanks. There are 50 standard versions with a required order increment
of 2500 pieces. Sample stock is generally held on standard versions
only (see Standard Versions Table). Required order increment is
10,000 pieces for nonstandard versions. Contact factory for availability.
All devices are available in tape-and-reel only.
Devices are available in both leaded and lead-free packaging.
“+” Denotes Lead(Pb)-free packages and “-” denotes leaded packages.
For top mark information, please go to https://www.maximinte-
grated.com/en/design/packaging/topmark/
Chip Information
TRANSISTOR COUNT: 295
PROCESS: BiCMOS
Maxim Integrated
│ 9
www.maximintegrated.com
MAX6340/MAX6421–
MAX6426
Low-Power, SC70/SOT µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
Revision History
REVISION
REVISION
DATE
PAGES
DESCRIPTION
CHANGED
NUMBER
5
3/14
Added /V OPN to Ordering Information
1
Added lead-free part numbers to Ordering Information table and removed top
mark information from Standard Versions table
6
7
12/15
1, 8
Changed MAX6340UK_ _/V-T to MAX6340UK_ _/V+T in Ordering
Information table
1/16
9
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2016 Maxim Integrated Products, Inc.
│ 10
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