MAX6426UK35-T
更新时间:2024-09-18 03:07:44
品牌:MAXIM
描述:Low-Power SC70/SOT µ.P Reset Circuits with Capacitor-Adjustable Reset Timeout Delay
MAX6426UK35-T 概述
Low-Power SC70/SOT µ.P Reset Circuits with Capacitor-Adjustable Reset Timeout Delay
低功耗SC70 / SOT &# 181.P复位电路,带有电容可调的复位超时周期\n
MAX6426UK35-T 数据手册
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PDF下载19-2440; Rev 2; 10/02
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
General Description
Features
The MAX6340/MAX6421–MAX6426 low-power micro-
processor supervisor circuits monitor system voltages
from 1.6V to 5V. These devices perform a single function:
o Monitor System Voltages from 1.6V to 5V
o Capacitor-Adjustable Reset Timeout Period
o Low Quiescent Current (1.6µA typ)
o Three RESET Output Options
they assert a reset signal whenever the V
supply volt-
CC
age falls below its reset threshold. The reset output
remains asserted for the reset timeout period after V
CC
rises above the reset threshold. The reset timeout is exter-
nally set by a capacitor to provide more flexibility.
Push-Pull RESET
Push-Pull RESET
Open-Drain RESET
The MAX6421/MAX6424 have an active-low, push-
pull reset output. The MAX6422 has an active-high,
push-pull reset output and the MAX6340/MAX6423/
MAX6425/MAX6426 have an active-low, open-drain
reset output. The MAX6421/MAX6422/MAX6423 are
offered in 4-pin SC70 or SOT143 packages. The
MAX6340/MAX6424/MAX6425/MAX6426 are available
in 5-pin SOT23-5 packages.
o Guaranteed Reset Valid to V
= 1V
CC
o Immune to Short V
Transients
CC
o Small 4-Pin SC70, 4-Pin SOT143, and 5-Pin SOT23
Packages
o MAX6340 Pin Compatible with LP3470
o MAX6424/MAX6425 Pin Compatible with
NCP300–NCP303, MC33464/MC33465,
S807/S808/S809, and RN5VD
Applications
o MAX6426 Pin Compatible with PST92XX
Portable Equipment
Battery-Powered Computers/Controllers
Automotive
Ordering Information
PART
TEMP RANGE
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
PIN-PACKAGE
5 SOT23-5
4 SC70-4
Medical Equipment
Intelligent Instruments
Embedded Controllers
Critical µP Monitoring
Set-Top Boxes
MAX6340UK_ _-T
MAX6421XS_ _-T
MAX6421US_ _-T
MAX6422XS_ _-T
MAX6422US_ _-T
MAX6423XS_ _-T
MAX6423US_ _-T
MAX6424UK_ _-T
MAX6425UK_ _-T
MAX6426UK_ _-T
4 SOT143-4
4 SC70-4
4 SOT143-4
4 SC70-4
Computers
4 SOT143-4
5 SOT23-5
5 SOT23-5
5 SOT23-5
Pin Configurations
Note: The MAX6340/MAX6421–MAX6426 are available with fac-
tory-trimmed reset thresholds from 1.575V to 5.0V in approxi-
mately 0.1V increments. Insert the desired nominal reset
threshold suffix (from Table 1) into the blanks. There are 50 stan-
dard versions with a required order increment of 2500 pieces.
Sample stock is generally held on standard versions only (see
Standard Versions Table). Required order increment is 10,000
pieces for nonstandard versions. Contact factory for availability.
All devices are available in tape-and-reel only.
TOP VIEW
V
CC
1
2
4
3
RESET
(RESET)
MAX6421X
MAX6422X
MAX6423X
SRT
GND
SC70
Typical Operating Circuit appears at end of data sheet.
Selector Guide appears at end of data sheet.
( ) ARE FOR THE MAX6422
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
ABSOLUTE MAXIMUM RATINGS
All Voltages Referenced to GND
Continuous Power Dissipation (T = +70°C)
A
V
........................................................................-0.3V to +6.0V
4-Pin SC70 (derate 3.1ꢀW/°C above +70°C)..............245ꢀW
4-Pin SOT143 (derate 4ꢀW/°C above +70°C).............320ꢀW
5-Pin SOT23 (derate 7.1ꢀW/°C above +70°C)............571ꢀW
Operating Teꢀperature Range .........................-40°C to +125°C
Storage Teꢀperature Range.............................-65°C to +150°C
Junction Teꢀperature......................................................+150°C
Lead Teꢀperature (soldering, 10s) .................................+300°C
CC
SRT, RESET, RESET (push-pull).................-0.3V to (V
+ 0.3V)
CC
RESET (open drain)...............................................-0.3V to +6.0V
Input Current (all pins)...................................................... 20ꢀA
Output Current (RESET, RESET) ...................................... 20ꢀA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= 1V to 5.5V, T = T
A
to T
, unless otherwise specified. Typical values are at V
= 5V and T = +25°C.) (Note 1)
CC A
CC
MIN
MAX
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
5.5
UNITS
Supply Voltage Range
V
1.0
V
CC
V
V
V
≤ 5.0V
≤ 3.3V
≤ 2.0V
2.5
1.9
1.6
4.2
CC
CC
CC
Supply Current
I
3.4
µA
CC
2.5
T
T
= +25°C
V
V
- 1.5%
V
+ 1.5%
+ 2.5%
A
A
TH
TH
TH
TH
V
Reset Threshold Accuracy
V
TH
V
CC
= -40°C to +125°C
- 2.5%
4 x V
V
Hysteresis
to Reset Delay
V
ꢀV
µs
HYST
TH
V
t
V
falling at 1ꢀV/µs
80
CC
RD
CC
C
C
= 1500pF
= 0
3.00
4.375
0.275
240
5.75
SRT
SRT
SRT
Reset Tiꢀeout Period
t
ꢀs
RP
V
V
Raꢀp Current
I
V
V
V
V
V
V
V
V
V
= 0 to 0.65V; V = 1.6V to 5V
nA
V
SRT
SRT
RAMP
CC
Raꢀp Threshold
V
= 1.6V to 5V (V rising)
RAMP
0.65
33
TH-RAMP
CC
RAMP Threshold Hysteresis
falling threshold
ꢀV
RAMP
≥ 1.0V, I
= 50µA
0.3
0.3
0.4
CC
CC
CC
CC
CC
CC
SINK
SINK
SINK
RESET Output Voltage Low
V
V
≥ 2.7V, I
≥ 4.5V, I
≥ 1.8V, I
= 1.2ꢀA
= 3.2ꢀA
V
OL
= 200µA
= 500µA
0.8 x V
0.8 x V
0.8 x V
SOURCE
CC
CC
CC
RESET Output Voltage High,
Push-Pull
V
≥ 2.25V, I
OH
SOURCE
≥ 4.5V, I
= 800µA
SOURCE
RESET Output Leakage Current,
Open-Drain
I
V
> V , reset not asserted
1.0
µA
LKG
CC
TH
V
V
V
V
V
V
V
≥ 1.0V, I
≥ 1.8V, I
≥ 2.7V, I
≥ 4.5V, I
≥ 1.8V, I
≥ 2.7V, I
≥ 4.5V, I
= 1µA
0.8 x V
0.8 x V
0.8 x V
0.8 x V
CC
CC
CC
CC
CC
CC
CC
SOURCE
SOURCE
SOURCE
SOURCE
CC
CC
CC
CC
= 150µA
= 500µA
= 800µA
RESET Output Voltage High
RESET Output Voltage Low
V
V
V
OH
= 500µA
0.3
0.3
0.4
SINK
SINK
SINK
V
= 1.2ꢀA
= 3.2ꢀA
OL
Note 1: Devices production tested at +25°C. Overteꢀperature liꢀits are guaranteed by design.
2
_______________________________________________________________________________________
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
Typical Operating Characteristics
(V
= 5V, C
= 1500pF, T = +25°C, unless otherwise noted.)
CC
SRT
A
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
RESET TIMEOUT PERIOD
vs. TEMPERATURE
RESET TIMEOUT PERIOD vs. C
SRT
4.30
4.25
4.20
4.15
4.10
4.0
10,000
1000
100
10
C
= 1500pF
SRT
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
T
= +125°C
A
T
= +25°C
A
T
= -40°C
A
1
0.1
0
1
2
3
4
5
6
-50 -25
0
25
50
75 100 125
1000
100
0.001 0.01
0.1
1
10
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
C
(nF)
SRT
RESET TIMEOUT PERIOD
vs. TEMPERATURE
MAXIMUM TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
V
TO RESET DELAY
CC
vs. TEMPERATURE (V FALLING)
CC
600
550
500
450
400
175
150
125
100
75
160
150
140
130
120
V
FALLING AT 1mVµs
CC
C
= 0
SRT
RESET OCCURS
ABOVE THE CURVE
350
300
110
100
50
25
250
200
90
80
V
= 2.95V
800
TH
0
-50 -25
0
25
50
75 100 125
0
200
400
600
1000
-50 -25
0
25
75 100 125
50
TEMPERATURE (°C)
RESET THRESHOLD OVERDRIVE (mV)
TEMPERATURE (°C)
POWER-UP/POWER-DOWN
CHARACTERISTIC
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
1.006
V
= 1.6V
TH
V
CC
1.004
1.002
1.000
0.998
0.996
0.994
1V/div
1V/div
RESET
400µs/div
-50 -25
0
25
50
75 100 125
TEMPERATURE (°C)
_______________________________________________________________________________________
3
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
Pin Description
PIN
MAX6421
MAX6422
MAX6423
MAX6424
MAX6425
MAX6340
SOT23
MAX6426 NAME
SOT23
FUNCTION
SOT143
SC70
SOT23
Set Reset Tiꢀeout Input. Connect a capacitor between SRT
and ground to set the tiꢀeout period. Deterꢀine the period as
1
3
3
5
1
SRT
follows: t = 2.73 ✕ 106 ✕ C
+ 275µs with t in seconds
RP
RP
SRT
and C
in farads.
SRT
2
3
4
1
—
2
2
—
1
3
4
2
2, 3
—
5
GND
N.C.
Ground
Not Internally Connected. Can be connected to GND.
Supply Voltage and Reset Threshold Monitor Input
V
CC
RESET changes froꢀ high to low whenever V
drops below
CC
the selected reset threshold voltage. RESET reꢀains low for
5
1
4
RESET
the reset tiꢀeout period after V
threshold.
exceeds the reset
CC
4
4
RESET changes froꢀ low to high whenever V
drops below
CC
the selected reset threshold voltage. RESET reꢀains high for
—
—
—
RESET
the reset tiꢀeout period after V
threshold.
exceeds the reset
CC
Detailed Description
3.3V
Reset Output
V
CC
The reset output is typically connected to the reset input
of a µP. A µP’s reset input starts or restarts the µP in a
known state. The MAX6340/MAX6421–MAX6426 µP
supervisory circuits provide the reset logic to prevent
code-execution errors during power-up, power-down,
and brownout conditions (see Typical Operating
Characteristics).
5.0V
LASER-TRIMMED
RESISTORS
10kΩ
V
REF
RESET
N
5V
SYSTEM
RESET changes froꢀ high to low whenever V
drops
CC
RESET
TIMEOUT
SRT
below the threshold voltage. Once V
exceeds the
CC
MAX6340
MAX6423
MAX6425
MAX6426
C
SRT
threshold voltage, RESET reꢀains low for the capacitor-
adjustable reset tiꢀeout period.
GND
The MAX6422 active-high RESET output is the inverse
logic of the active-low RESET output. All device outputs
are guaranteed valid for V
> 1V.
CC
Figure 1. MAX6340/MAX6423/MAX6425/MAX6426 Open-Drain
The MAX6340/MAX6423/MAX6425/MAX6426 are open-
drain RESET outputs. Connect an external pullup resis-
tor to any supply froꢀ 0 to 5.5V. Select a resistor value
large enough to register a logic low when RESET is
asserted and sꢀall enough to register a logic high
while supplying all input current and leakage paths
connected to the RESET line. A 10kΩ to 100kΩ pullup
is sufficient in ꢀost applications.
RESET Output Allows Use with Multiple Supplies
Selecting a Reset Capacitor
The reset tiꢀeout period is adjustable to accoꢀꢀodate
a variety of µP applications. Adjust the reset tiꢀeout
period (t ) by connecting a capacitor (C
) between
RP
SRT
SRT and ground. Calculate the reset tiꢀeout capacitor
as follows:
4
_______________________________________________________________________________________
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
C
= (t - 275µs) / (2.73 ✕ 106)
SRT
RP
Applications Information
Interfacing to Other Voltages for Logic
Compatibility
where t is in seconds and C
is in farads.
RP
SRT
The reset delay tiꢀe is set by a current/capacitor-con-
trolled raꢀp coꢀpared to an internal 0.65V reference.
An internal 240nA raꢀp current source charges the
external capacitor. The charge to the capacitor is
cleared when a reset condition is detected. Once the
reset condition is reꢀoved, the voltage on the capacitor
The open-drain outputs of the MAX6340/MAX6423/
MAX6425/MAX6426 can be used to interface to µPs with
other logic levels. As shown in Figure 1, the open-drain
output can be connected to voltages froꢀ 0 to 5.5V. This
allows for easy logic coꢀpatibility to various µPs.
raꢀps according to the forꢀula: dV/dt = I/C. The C
SRT
capacitor ꢀust raꢀp to 0.65V to deassert the reset.
ꢀust be a low-leakage (<10nA) type capacitor;
Wired-OR Reset
To allow auxiliary circuitry to hold the systeꢀ in reset,
an external open-drain logic signal can be connected
to the open-drain RESET of the MAX6340/MAX6423/
MAX6425/MAX6426, as shown in Figure 2. This config-
uration can reset the µP, but does not provide the reset
tiꢀeout when the external logic signal is released.
C
SRT
ceraꢀic is recoꢀꢀended.
Operating as a Voltage Detector
The MAX6340/MAX6421–MAX6426 can be operated in a
voltage detector ꢀode by floating the SRT pin. The reset
delay tiꢀes for V
rising above or falling below the
CC
threshold are not significantly different. The reset output is
deasserted sꢀoothly without false pulses.
Negative-Going V Transients
CC
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these supervisors
are relatively iꢀꢀune to short-duration negative-going
transients (glitches). The graph Maxiꢀuꢀ Transient
Duration vs. Reset Threshold Overdrive in the Typical
Operating Characteristics shows this relationship.
The area below the curve of the graph is the region in
which these devices typically do not generate a reset
pulse. This graph was generated using a negative-
V
going pulse applied to V , starting above the actual
CC
CC
reset threshold (V ) and ending below it by the ꢀagni-
TH
tude indicated (reset-threshold overdrive). As the ꢀag-
nitude of the transient decreases (farther below the
reset threshold), the ꢀaxiꢀuꢀ allowable pulse width
V
DD
10kΩ
MAX6340
decreases. Typically, a V
transient that goes 100ꢀV
CC
below the reset threshold and lasts 50µs or less does
not cause a reset pulse to be issued.
MAX6423
MAX6425
MAX6426
µP
Ensuring a Valid RESET or RESET
RESET
RESET
Down to V
CC
= 0
When V
falls below 1V, RESET/RESET current-sink-
CC
N
ing (sourcing) capabilities decline drastically. In the
case of the MAX6421/MAX6424, high-iꢀpedance
CMOS-logic inputs connected to RESET can drift to
undeterꢀined voltages. This presents no probleꢀs in
ꢀost applications, since ꢀost µPs and other circuitry
GND
do not operate with V
below 1V.
CC
OPEN-DRAIN
LOGIC
In those applications where RESET ꢀust be valid down
to zero, adding a pulldown resistor between RESET
and ground sinks any stray leakage currents, holding
RESET low (Figure 3). The value of the pulldown resis-
tor is not critical; 100kΩ is large enough not to load
RESET and sꢀall enough to pull RESET to ground. For
applications using the MAX6422, a 100kΩ pullup resis-
N
Figure 2. Wired-OR Reset Circuit
_______________________________________________________________________________________
5
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
Table 1. Reset Threshold Voltage Suffix
V
CC
SUFFIX
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
MIN
TYP
MAX
1.614
1.707
1.845
1.948
2.050
2.153
2.243
2.371
2.460
2.563
2.691
2.768
2.870
2.998
3.075
3.152
3.280
3.383
3.485
3.558
3.690
3.793
3.895
3.998
4.100
4.203
4.305
4.408
4.484
4.613
4.741
4.818
4.920
5.023
5.125
1.536
1.623
1.755
1.853
1.950
2.048
2.133
2.313
2.340
2.438
2.559
2.633
2.730
2.852
2.925
2.998
3.120
3.218
3.315
3.413
3.510
3.608
3.705
3.803
3.900
3.998
4.095
4.193
4.266
4.388
4.509
4.583
4.680
4.778
4.875
1.575
1.665
1.800
1.900
2.000
2.100
2.188
2.313
2.400
2.500
2.625
2.700
2.800
2.925
3.000
3.075
3.200
3.300
3.400
3.500
3.600
3.700
3.800
3.900
4.000
4.100
4.200
4.300
4.375
4.500
4.625
4.700
4.800
4.900
5.000
V
CC
MAX6421
MAX6424
RESET
100kΩ
GND
Figure 3. Ensuring RESET Valid to V
= 0
CC
V
CC
100kΩ
V
CC
MAX6422
RESET
GND
Figure 4. Ensuring RESET Valid to V
= 0
CC
tor between RESET and V
holds RESET high when
falls below 1V (Figure 4). Open-drain RESET ver-
sions are not recoꢀꢀended for applications requiring
valid logic for V down to zero.
CC
V
CC
CC
Layout Consideration
SRT is a precise current source. When developing the
layout for the application, be careful to ꢀiniꢀize board
capacitance and leakage currents around this pin.
Traces connected to SRT should be kept as short as
possible. Traces carrying high-speed digital signals
and traces with large voltage potentials should be rout-
ed as far froꢀ SRT as possible. Leakage current and
stray capacitance (e.g., a scope probe) at this pin
could cause errors in the reset tiꢀeout period. When
evaluating these parts, use clean prototype boards to
ensure accurate reset periods.
6
_______________________________________________________________________________________
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
Standard Versions Table
PART*
OUTPUT STAGE
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Push-Pull RESET
TOP MARK
KADC
ADUF
KADU
ADUK
KADW
ADUM
KADX
ADUN
KAEA
PART*
OUTPUT STAGE
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
TOP MARK
AEBE
AEBG
AEBI
MAX6340UK16-T
MAX6340UK22-T
MAX6340UK26-T
MAX6340UK29-T
MAX6340UK46-T
MAX6421US16-T
MAX6421XS16-T
MAX6421US22-T
MAX6421XS22-T
MAX6421US26-T
MAX6421XS26-T
MAX6421US29-T
MAX6421XS29-T
MAX6421US46-T
MAX6421XS46-T
MAX6422US16-T
MAX6422XS16-T
MAX6422US22-T
MAX6422XS22-T
MAX6422US26-T
MAX6422XS26-T
MAX6422US29-T
MAX6422XS29-T
MAX6422US46-T
MAX6422XS46-T
MAX6423US16-T
MAX6423XS16-T
MAX6423US22-T
MAX6423XS22-T
MAX6423US26-T
MAX6423XS26-T
MAX6423US29-T
MAX6423XS29-T
MAX6423US46-T
MAX6423XS46-T
MAX6424UK16-T
MAX6424UK22-T
MAX6424UK26-T
MAX6424UK29-T
MAX6424UK46-T
MAX6425UK16-T
MAX6425UK22-T
MAX6425UK26-T
MAX6425UK29-T
MAX6425UK46-T
MAX6426UK16-T
MAX6426UK22-T
MAX6426UK26-T
MAX6426UK29-T
MAX6426UK46-T
AEBJ
AEBM
KADA
ACU
KADE
ACY
KADG
ADA
ADUQ
ADUF
ADUK
ADUM
ADUN
ADUQ
ADUG
ADUS
ADUU
ADUV
ADUY
ADUH
ADVA
ADVC
ADVD
ADVG
KADH
ADB
Push-Pull RESET
Push-Pull RESET
Push-Pull RESET
KADK
ADE
Push-Pull RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
Open-Drain RESET
KABD
ACV
KADM
ADG
KADO
ADI
KADP
ADJ
KADS
ADM
*Sample stock is generally held on all standard versions. Contact
factory for availability of nonstandard versions.
Typical Operating Circuit
V
CC
V
CC
LASER-TRIMMED
RESISTORS
µP
V
REF
RESET
RESET
RESET
TIMEOUT
SRT
C
SRT
MAX6421
MAX6424
GND
_______________________________________________________________________________________
7
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
Pin Configurations (continued)
TOP VIEW
SRT
1
2
3
5
4
RESET
RESET
1
2
3
5
4
SRT
N.C.
MAX6340
MAX6424
MAX6425
GND
N.C.
V
CC
V
GND
CC
SOT23
SOT23
SRT
1
2
3
5
4
V
GND
1
2
4
3
RESET
CC
(RESET)
MAX6421U
MAX6422U
MAX6423U
MAX6426
GND
GND
V
SRT
CC
RESET
SOT143
SOT23
Selector Guide
PART
PUSH-PULL RESET
PUSH-PULL RESET
OPEN-DRAIN RESET
PIN-PACKAGE
5 SOT23
MAX6340
MAX6421
MAX6422
MAX6423
MAX6424
MAX6425
—
✔
—
—
✔
✔
—
—
✔
4 SOT143/SC70
4 SOT143/SC70
4 SOT143/SC70
5 SOT23
—
—
✔
—
—
—
—
✔
—
5 SOT23
Chip Information
TRANSISTOR COUNT: 295
PROCESS: BiCMOS
8
_______________________________________________________________________________________
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
Package Information
(The package drawing(s) in this data sheet ꢀay not reflect the ꢀost current specifications. For the latest package outline inforꢀation,
go to www.maxim-ic.com/packages.)
_______________________________________________________________________________________
9
Low-Power, SC70/SOT µP Reset Circuits with
Capacitor-Adjustable Reset Timeout Delay
Package Information (continued)
(The package drawing(s) in this data sheet ꢀay not reflect the ꢀost current specifications. For the latest package outline inforꢀation,
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2002 Maxiꢀ Integrated Products
Printed USA
is a registered tradeꢀark of Maxiꢀ Integrated Products.
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