MAX669EUB/V+T [MAXIM]
1.8V to 28V Input, PWM Step-Up Controllers in μMAX; 1.8V至28V输入， PWM升压型控制器在μMAX
| 型号： | MAX669EUB/V+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 1.8V to 28V Input, PWM Step-Up Controllers in μMAX |
| 文件： | 总18页 (文件大小：332K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-4778; Rev 2; 1/12
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
8/MAX69
General Description
Features
o 1.8V Minimum Start-Up Voltage (MAX669)
The MAX668/MAX669 constant-frequency, pulse-width-
modulating (PWM), current-mode DC-DC controllers are
designed for a wide range of DC-DC conversion applica-
tions including step-up, SEPIC, flyback, and isolated-
output configurations. Power levels of 20W or more can
be controlled with conversion efficiencies of over 90%.
The 1.8V to 28V input voltage range supports a wide
range of battery and AC-powered inputs. An advanced
BiCMOS design features low operating current (220µA),
adjustable operating frequency (100kHz to 500kHz),
soft-start, and a SYNC input allowing the MAX668/
MAX669 oscillator to be locked to an external clock.
o Wide Input Voltage Range (1.8V to 28V)
o Tiny 10-Pin µMAX Package
o Current-Mode PWM and Idle Mode™ Operation
o Efficiency over 90%
o Adjustable 100kHz to 500kHz Oscillator or
SYNC Input
o 220µA Quiescent Current
o Logic-Level Shutdown
o Soft-Start
Applications
Cellular Telephones
DC-DC conversion efficiency is optimized with a low
100mV current-sense voltage as well as with Maxim’s
proprietary Idle Mode™ control scheme. The controller
operates in PWM mode at medium and heavy loads for
lowest noise and optimum efficiency, then pulses only as
needed (with reduced inductor current) to reduce oper-
ating current and maximize efficiency under light loads.
A logic-level shutdown input is also included, reducing
supply current to 3.5µA.
Telecom Hardware
LANs and Network Systems
POS Systems
Ordering Information
PART
MAX668EUB
MAX669EUB
MAX669EUB/V+T
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
The MAX669, optimized for low input voltages with a
guaranteed start-up voltage of 1.8V, requires boot-
strapped operation (IC powered from boosted output). It
supports output voltages up to 28V. The MAX668 oper-
ates with inputs as low as 3V and can be connected in
either a bootstrapped or non-bootstrapped (IC powered
from input supply or other source) configuration. When
not bootstrapped, it has no restriction on output voltage.
Both ICs are available in an extremely compact 10-pin
µMAX package.
10 µMAX
10 µMAX
10 µMAX
Idle Mode is a trademark of Maxim Integrated Products.
+ Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
/V Denotes an automotive qualified part.
Note: Devices are also available in a lead(Pb)-free/RoHS-com-
pliant package. Specify lead-free by adding “+” to the part
number when ordering.
Pin Configuration
Typical Operating Circuit
V
IN
= 1.8V to 28V
TOP VIEW
V
OUT
= 28V
V
CC
SYNC/
SHDN
EXT
CS+
LDO
FREQ
GND
REF
1
2
3
4
5
10 SYNC/SHDN
9
8
7
6
V
CC
FREQ
MAX668
MAX669
EXT
MAX669
PGND
CS+
FB
PGND
FB
LDO
REF
µMAX
GND
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
ABSOLUTE MAXIMUM RATINGS
CC
V
to GND ..........................................................-0.3V to +30V
Continuous Power Dissipation (T = +70°C)
A
PGND to GND.................................................................... 0.3V
SYNC/SHDN to GND.............................................-0.3V to +30V
10-Pin µMAX (derate 5.6mW/°C above +70°C)............444mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering,10sec) ..............................+300°C
Soldering Temperature (Reflow)......................................+300°C
Lead(Pb)-Free Packages..............................................+260°C
Packages Containing Lead(Pb)....................................+240°C
EXT, REF to GND.....................................-0.3V to (V
+ 0.3V)
LDO
LDO, FREQ, FB, CS+ to GND ................................ -0.3V to +6V
LDO Output Current...........................................-1mA to +20mA
REF Output Current..............................................-1mA to +1mA
LDO Short Circuit to GND .........................................Momentary
REF Short Circuit to GND..........................................Continuous
ELECTRICAL CHARACTERISTICS
(V
= V
= +5V, R
= 200kΩ, T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
LDO
OSC
CC
A
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PWMCONTROLLER
8/MAX69
MAX668
MAX669
3
28
28
Input Voltage Range, V
V
CC
1.8
Input Voltage Range with V
FB Threshold
Tied to LDO
2.7
5.5
V
V
CC
1.225
1.250
0.013
1.275
Typically 0.013% per mV on CS+;
+ range is 0 to 100mV for 0 to full
load current.
FB Threshold Load Regulation
FB Threshold Line Regulation
V
CS
%/mV
%/%
Typically 0.012% per % duty factor on
EXT; EXT duty factor for a step-up is:
0.012
100% (1 – V /V
)
IN OUT
FB Input Current
V
= 1.30V
1
20
115
25
1
nA
mV
mV
µA
µA
µA
FB
Current Limit Threshold
85
5
100
15
Idle Mode Current-Sense Threshold
CS+ Input Current
CS+ forced to GND
= 1.30V, V = 3V to 28V
0.2
220
3.5
V
CC
Supply Current (Note 1)
V
FB
350
6
CC
Shutdown Supply Current (V
)
CC
SYNC/SHDN = GND, V
= 28V
CC
REFERENCEANDLDOREGULATORS
5V ≤ V
≤ 28V
CC
4.50
2.65
5.00
2.50
5.50
5.50
2.60
(includes LDO dropout)
LDO load =
∞ to 400Ω
LDO Output Voltage
V
V
3V ≤ V
(includes LDO dropout)
≤ 28V
CC
Sensed at LDO, falling edge,
hysteresis = 1%, MAX668 only
Undervoltage Lockout Threshold
2.40
REF Output Voltage
No load, C
= 0.22µF
1.225
1.250
-2
1.275
-10
V
mV
V
REF
REF Load Regulation
REF load = 0 to 50µA
REF Undervoltage Lockout Threshold
OSCILLATOR
Rising edge, 1% hysteresis
1.0
1.1
1.2
R
R
R
= 200kΩ 1%
= 100kΩ 1%
= 500kΩ 1%
225
425
85
250
500
100
275
575
115
OSC
OSC
OSC
Oscillator Frequency
kHz
2
_______________________________________________________________________________________
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
8/MAX69
ELECTRICAL CHARACTERISTICS (continued)
(V
= V
= +5V, R
= 200kΩ, T = 0°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.)
OSC
A A
LDO
CC
PARAMETER
CONDITIONS
= 200kΩ 1%
MIN
87
TYP
90
MAX
93
UNITS
R
R
R
OSC
OSC
OSC
Maximum Duty Cycle
= 100kΩ 1%
= 500kΩ 1%
86
90
94
%
86
90
94
Minimum EXT Pulse Width
290
20
ns
%
Minimum SYNC Input-Pulse Duty Cycle
Minimum SYNC Input Low Pulse Width
SYNC Input Rise/Fall Time
45
50
200
200
500
ns
Not tested
ns
SYNC Input Frequency Range
100
kHz
µs
70
SYNC/SHDN Falling Edge to Shutdown Delay
3.0V < V < 28V
2.0
1.5
CC
V
SYNC/SHDN Input High Voltage
SYNC/SHDN Input Low Voltage
SYNC/SHDN Input Current
1.8V < V < 3.0V (MAX669)
CC
3.0V < V < 28V
0.45
0.30
3.0
CC
V
1.8V < V < 3.0V (MAX669)
CC
V
V
= 5V
0.5
1.5
1
SYNC/SHDN
SYNC/SHDN
µA
= 28V
6.5
EXT Sink/Source Current
EXT On-Resistance
EXT forced to 2V
EXT high or low
A
2
5
Ω
ELECTRICAL CHARACTERISTICS
(V
= V
= +5V, R
= 200kΩ, T = -40°C to +85°C, unless otherwise noted.) (Note 2)
OSC
A
LDO
CC
PARAMETER
CONDITIONS
MIN
MAX
UNITS
PWMCONTROLLER
MAX668
MAX669
3
28
28
Input Voltage Range, V
V
CC
1.8
2.7
1.22
Input Voltage Range with V
FB Threshold
Tied to LDO
5.5
1.28
20
V
CC
V
FB Input Current
V
FB
= 1.30V
nA
mV
mV
µA
µA
µA
Current-Limit Threshold
85
3
115
27
Idle Mode Current-Sense Threshold
CS+ Input Current
CS+ forced to GND
= 1.30V, V = 3V to 28V
1
V
CC
Supply Current (Note 1)
V
FB
350
6
CC
Shutdown Supply Current (V
)
CC
SYNC/SHDN = GND, V
= 28V
CC
REFERENCEANDLDOREGULATORS
5V ≤ V
≤ 28V
CC
4.50
2.65
2.40
5.50
5.50
2.60
(includes LDO dropout)
LDO load =
∞ to 400Ω
LDO Output Voltage
V
3V ≤ V
(includes LDO dropout)
≤ 28V
CC
Sensed at LDO, falling edge,
hysteresis = 1%, MAX669 only
LDO Undervoltage Lockout Threshold
V
_______________________________________________________________________________________
3
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
ELECTRICAL CHARACTERISTICS (continued)
(V
= V
= +5V, R
= 200kΩ, T = -40°C to +85°C, unless otherwise noted.)
OSC
A
LDO
CC
PARAMETER
CONDITIONS
MIN
MAX
1.28
-10
UNITS
REF Output Voltage
No load, C
= 0.22µF
1.22
V
mV
V
REF
REF Load Regulation
REF Undervoltage Lockout Threshold
OSCILLATOR
REF load = 0 to 50µA
Rising edge, 1% hysteresis
1.0
1.2
R
OSC
R
OSC
R
OSC
R
OSC
R
OSC
R
OSC
= 200kΩ 1%
=100kΩ 1%
= 500kΩ 1%
= 200kΩ 1%
= 100kΩ 1%
= 500kΩ 1%
222
425
85
278
575
115
93
Oscillator Frequency
Maximum Duty Cycle
kHz
%
87
86
94
86
94
8/MAX69
Minimum SYNC Input-Pulse Duty Cycle
Minimum SYNC Input Low Pulse Width
SYNC Input Rise/Fall Time
45
%
ns
200
200
500
Not tested
3.0V < V < 28V
ns
SYNC Input Frequency Range
100
2.0
1.5
kHz
CC
V
V
SYNC/SHDN Input High Voltage
SYNC/SHDN Input Low Voltage
1.8V < V < 3.0V (MAX669)
CC
3.0V < V < 28V
0.45
0.30
3.0
6.5
5
CC
1.8V < V < 3.0V (MAX669)
CC
V
V
= 5V
SYNC/SHDN
SYNC/SHDN
µA
SYNC/SHDN Input Current
= 28V
EXT On-Resistance
EXT high or low
Ω
Note 1: This is the V
current consumed when active but not switching. Does not include gate-drive current.
CC
Note 2: Limits at T = -40°C are guaranteed by design.
A
4
_______________________________________________________________________________________
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
8/MAX69
Typical Operating Characteristics
(Circuits of Figures 2, 3, 4, and 5; T = +25°C; unless otherwise noted.)
A
MAX668 EFFICIENCY vs.
LOAD CURRENT (V = 12V)
EFFICIENCY vs. LOAD CURRENT
MAX668 EFFICIENCY vs.
LOAD CURRENT (V = 24V)
(V
OUT
= 5V)
OUT
OUT
95
90
85
80
75
70
95
90
85
80
75
70
95
90
85
80
75
70
65
60
55
50
V
= 3.6V
IN
V
= 12V
IN
V
= 3.3V
IN
V
= 8V
IN
V
= 2.7V
IN
V
= 5V
IN
V
= 2V
IN
V
= 5V
IN
NON-BOOTSTRAPPED
FIGURE 4
R4 = 200kΩ
BOOTSTRAPPED
FIGURE 3
R4 = 200kΩ
NON-BOOTSTRAPPED
FIGURE 4
R4 = 200kΩ
1
10
100
1000
10,000
1
10
100
1000
10,000
1
10
100
1000
10,000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
SUPPLY CURRENT vs.
SUPPLY VOLTAGE
NO-LOAD SUPPLY CURRENT vs.
SUPPLY VOLTAGE
MAX669 MINIMUM START-UP VOLTAGE
vs. LOAD CURRENT
1200
1000
800
600
400
200
0
4000
3500
3000
2500
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 12V
OUT
CURRENT INTO V PIN
CC
V
= 5V
OUT
BOOTSTRAPPED
FIGURE 2
R4 = 200kΩ
R
OSC
= 500kΩ
V
= 12V
OUT
MAX669
2000
1500
1000
500
0
BOOTSTRAPPED
FIGURE 2
MAX668
10
0
5
15
20
25
30
0
2
4
6
8
10
12
0
100 200 300 400 500 600 700 800 900 1000
LOAD CURRENT (mA)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY CURRENT vs.
TEMPERATURE
LDO DROPOUT VOLTAGE vs.
LDO CURRENT
SHUTDOWN CURRENT vs.
SUPPLY VOLTAGE
290
270
250
230
210
190
170
150
300
250
200
150
100
50
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
MAX669
R
= 100kΩ
OSC
V
= 3V
IN
MAX668
R
= 200kΩ
= 500kΩ
OSC
V
= 4.5V
IN
R
OSC
CURRENT INTO V PIN
CC
0
-40 -20
0
20
40
60
80 100
0.1
1
10 20
0
5
10
15
20
25
30
TEMPERATURE (°C)
LDO CURRENT (mA)
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Typical Operating Characteristics (continued)
(Circuits of Figures 2, 3, 4, and 5; T = +25°C; unless otherwise noted.)
A
REFERENCE VOLTAGE vs.
TEMPERATURE
SWITCHING FREQUENCY vs. R
OSC
1.250
500
450
400
350
300
250
200
150
100
50
1.249
1.248
1.247
1.246
1.245
1.244
1.243
1.242
1.241
8/MAX69
V
CC
= 5V
V
CC
= 5V
1.240
0
-40 -20
0
20
40
60
80 100
0
100
200
R
300
(kΩ)
400
500
TEMPERATURE (°C)
OSC
EXT RISE/FALL TIME vs.
CAPACITANCE
SWITCHING FREQUENCY vs.
TEMPERATURE
60
50
40
30
20
10
0
600
500
400
300
200
100
0
100kΩ
t , V = 3.3V
R
CC
165kΩ
t , V = 3.3V
F
CC
499kΩ
t , V = 5V
R
CC
V
= 5V
t , V = 5V
IN
F
CC
100
1000
10,000
-40 -20
0
20
40
60
80 100
CAPACITANCE (pF)
TEMPERATURE (°C)
6
_______________________________________________________________________________________
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
8/MAX69
Typical Operating Characteristics (continued)
(Circuits of Figures 2, 3, 4, and 5; T = +25°C; unless otherwise noted.)
A
ENTERING SHUTDOWN
EXITING SHUTDOWN
0V
SHUTDOWN
VOLTAGE
5V/div
OUTPUT
VOLTAGE
5V/div
0V
0V
INDUCTOR
CURRENT
2A/div
0A
0V
OUTPUT
VOLTAGE
5V/div
SHUTDOWN
VOLTAGE
5V/div
200µs/div
500µs/div
MAX668, V = 5V, V
LOW VOLTAGE, NON-BOOTSTRAPPED
= 12V, LOAD = 1.0A,
OUT
IN
MAX668, V = 5V, V
LOW VOLTAGE, NON-BOOTSTRAPPED
= 12V, LOAD = 1.0A, R = 100kΩ,
OSC
IN
OUT
LIGHT-LOAD SWITCHING WAVEFORM
HEAVY-LOAD SWITCHING WAVEFORM
V
OUT
V
OUT
100mV/div
AC-COUPLED
200mV/div
AC-COUPLED
Q1, DRAIN
5V/div
Q1, DRAIN
5V/div
0V
0A
0V
0A
I
I
L
L
1A/div
1A/div
1µs/div
1µs/div
MAX668, V = 5V, V
LOW VOLTAGE, NON-BOOTSTRAPPED
= 12V, I
= 0.1A,
MAX668, V = 5V, V
LOW VOLTAGE, NON-BOOTSTRAPPED
= 12V, I
= 1.0A,
IN
OUT
LOAD
IN
OUT
LOAD
LOAD-TRANSIENT RESPONSE
LINE-TRANSIENT RESPONSE
OUTPUT
VOLTAGE
OUTPUT
VOLTAGE
AC-COUPLED
100mV/div
100mV/div
AC-COUPLED
LOAD
CURRENT
1A/div
INPUT
VOLTAGE
5V/div
0V
1ms/div
20ms/div
MAX668, V = 5V, V
= 12V, I = 0.1A TO 1.0A,
LOAD
= 5V TO 8V, V
= 12V, LOAD = 1.0A,
MAX668, V
IN
OUT
IN
OUT
LOW VOLTAGE, NON-BOOTSTRAPPED
HIGH VOLTAGE, NON-BOOTSTRAPPED
_______________________________________________________________________________________
7
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Pin Description
PIN
NAME
FUNCTION
5V On-Chip Regulator Output. This regulator powers all internal circuitry including the EXT gate driver.
Bypass LDO to GND with a 1µF or greater ceramic capacitor.
1
LDO
Oscillator Frequency Set Input. A resistor from FREQ to GND sets the oscillator from 100kHz (R
10
=
OSC
500kΩ) to 500kHz (R
= 100kΩ). f
= 5 x 10 / R
. R
OSC OSC
is still required if an external clock is used
2
FREQ
OSC
OSC
at SYNC/SHDN. (See SYNC/SHDN and FREQ Inputs section.)
3
4
5
6
7
8
GND
REF
Analog Ground
1.25V Reference Output. REF can source 50µA. Bypass to GND with a 0.22µF ceramic capacitor.
Feedback Input. The FB threshold is 1.25V.
FB
CS+
PGND
EXT
Positive Current-Sense Input. Connect a current-sense resistor, R , between CS+ and PGND.
CS
Power Ground for EXT Gate Driver and Negative Current-Sense Input
External MOSFET Gate-Driver Output. EXT swings from LDO to PGND.
8/MAX69
Input Supply to On-Chip LDO Regulator. V accepts inputs up to 28V. Bypass to GND with a 0.1µF ceramic
CC
capacitor.
9
V
CC
Shutdown control and Synchronization Input. There are three operating modes:
• SYNC/SHDN low: DC-DC off.
• SYNC/SHDN high: DC-DC on with oscillator frequency set at FREQ by R
• SYNC/SHDN clocked: DC-DC on with operating frequency set by SYNC clock input. DC-DC conversion
SYNC/
SHDN
10
.
OSC
cycles initiate on rising edge of input clock.
28V. Bootstrapping is required because the MAX669
does not have undervoltage lockout, but instead drives
Detailed Description
The MAX668/MAX669 current-mode PWM controllers
operate in a wide range of DC-DC conversion applica-
tions, including boost, SEPIC, flyback, and isolated out-
put configurations. Optimum conversion efficiency is
maintained over a wide range of loads by employing
both PWM operation and Maxim’s proprietary Idle
Mode control to minimize operating current at light
loads. Other features include shutdown, adjustable
internal operating frequency or synchronization to an
external clock, soft start, adjustable current limit, and a
wide (1.8V to 28V) input range.
EXT with an open-loop, 50% duty-cycle start-up oscilla-
tor when LDO is below 2.5V. It switches to closed-loop
operation only when LDO exceeds 2.5V. If a non-boot-
strapped connection is used with the MAX669 and if
V
(the input voltage) remains below 2.7V, the output
CC
voltage will soar above the regulation point. Table 2
recommends the appropriate device for each biasing
option.
Table 1. MAX668/MAX669 Comparison
FEATURE
MAX668
MAX669
MAX668 vs. MAX669 Differences
Differences between the MAX668 and MAX669 relate
to their use in bootstrapped or non-bootstrapped cir-
cuits (Table 1). The MAX668 operates with inputs as
low as 3V and can be connected in either a boot-
strapped or non-bootstrapped (IC powered from input
supply or other source) configuration. When not boot-
strapped, the MAX668 has no restriction on output volt-
age. When bootstrapped, the output cannot exceed
28V.
V
CC
Input
3V to 28V
1.8V to 28V
Range
Bootstrapped or nonboot-
strapped. V can be con-
Must be boot-
strapped (V
CC
CC
Operation nected to input, output, or
must be connect-
other voltage source such as ed to boosted out-
a logic supply.
put voltage, V
).
OUT
Under-
voltage
Lockout
IC stops switching for LDO
below 2.5V.
No
The MAX669 is optimized for low input voltages (down
to 1.8V) and requires bootstrapped operation (IC pow-
When LDO is
above 2.5V
ered from V
) with output voltages no greater than
OUT
Soft-Start
Yes
8
_______________________________________________________________________________________
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
8/MAX69
PWM Controller
The heart of the MAX668/MAX669 current-mode PWM
controller is a BiCMOS multi-input comparator that
simultaneously processes the output-error signal, the
current-sense signal, and a slope-compensation ramp
(Figure 1). The main PWM comparator is direct sum-
ming, lacking a traditional error amplifier and its associ-
ated phase shift. The direct summing configuration
approaches ideal cycle-by-cycle control over the out-
put voltage since there is no conventional error amp in
the feedback path.
Bootstrapped/Non-Bootstrapped Operation
Low-Dropout Regulator (LDO)
Several IC biasing options, including bootstrapped and
non-bootstrapped operation, are made possible by an
on-chip, low-dropout 5V regulator. The regulator input is
at V , while its output is at LDO. All MAX668/MAX669
CC
functions, including EXT, are internally powered from
LDO. The V -to-LDO dropout voltage is typically
CC
200mV (300mV max at 12mA), so that when V
than 5.2V, LDO is typically V
in dropout, the MAX668/MAX669 still operate with V
is less
CC
- 200mV. When LDO is
CC
CC
In PWM mode, the controller uses fixed-frequency, cur-
rent-mode operation where the duty ratio is set by the
as low as 3V (as long as LDO exceeds 2.7V), but with
reduced amplitude FET drive at EXT. The maximum
CC
input/output voltage ratio (duty ratio = (V
- V ) / V
IN IN
V
input voltage is 28V.
OUT
in the boost configuration). The current-mode feedback
loop regulates peak inductor current as a function of
the output error signal.
LDO can supply up to 12mA to power the IC, supply
gate charge through EXT to the external FET, and sup-
ply small external loads. When driving particularly large
FETs at high switching rates, little or no LDO current
may be available for external loads. For example, when
switched at 500kHz, a large FET with 20nC gate charge
requires 20nC x 500kHz, or 10mA.
At light loads the controller enters Idle Mode. During
Idle Mode, switching pulses are provided only as need-
ed to service the load, and operating current is mini-
mized to provide best light-load efficiency. The
minimum-current comparator threshold is 15mV, or 15%
V
and LDO allow a variety of biasing connections to
CC
of the full-load value (I
) of 100mV. When the con-
MAX
optimize efficiency, circuit quiescent current, and full-
load start-up behavior for different input and output
voltage ranges. Connections are shown in Figures 2, 3,
4, and 5. The characteristics of each are outlined in
Table 1.
troller is synchronized to an external clock, Idle Mode
occurs only at very light loads.
V
CC
LDO
MAX669 ONLY
1.25V
LOW-VOLTAGE
START-UP
OSCILLATOR
EXT
0
1
MUX
LDO
R1
ANTISAT
552k
PGND
(MAX669 ONLY)
UVLO
MAX668
MAX669
R2
276k
REF
1.25V
R3
276k
MAIN PWM
COMPARATOR
+A
-A
FB
X6
X1
X1
CURRENT SENSE
+C
CS+
-C
+S
-S
BIAS
OSC
SYNC/SHDN
FREQ
SLOPE COMPENSATION
OSC
I
100mV
15mV
MAX
S
R
Q
I
MIN
Figure 1. MAX668/MAX669 Functional Diagram
_______________________________________________________________________________________
9
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
V
= 1.8V to 12V
IN
C1
L1
V
= 12V @ 0.5A
OUT
1
9
8
6
LDO
EXT
N1
R1
D1
C8
C5
C6
C4
C2
MAX669
CS+
V+
R2
R3
7
5
PGND
FB
SYNC/
SHDN
10
4
REF
3
C7
2
C3
GND
FREQ
R4
8/MAX69
Figure 2. MAX669 High-Voltage Bootstrapped Configuration
V
= 1.8V to 5V
IN
C1
68µF
10V
L1
4.7µH
V
OUT
= 5V @ 1A
1
8
6
LDO
EXT
CS+
N1
D1
MBRS340T3
C2
1µF
C6
0.1µF
C4
68µF
10V
C5
68µF
10V
MAX669
FDS6680
IRF7401
9
R2
75k
1%
R1
0.02Ω
V
CC
7
5
PGND
FB
SYNC/
SHDN
10
4
R3
24.9k
1%
REF
C7
220pF
3
2
C3
0.22µF
GND
FREQ
R4
100k
1%
Figure 3. MAX669 Low-Voltage Bootstrapped Configuration
Bootstrapped Operation
age range extends below 2.7V, then bootstrapped
operation with the MAX669 is the only option.
With bootstrapped operation, the IC is powered from
the circuit output (V
). This improves efficiency
OUT
With V
connected to V
, as in Figure 2, EXT volt-
CC
OUT
when the input voltage is low, since EXT drives the FET
with a higher gate voltage than would be available from
the low-voltage input. Higher gate voltage reduces the
FET on-resistance, increasing efficiency. Other (unde-
sirable) characteristics of bootstrapped operation are
increased IC operating power (since it has a higher
operating voltage) and reduced ability to start up with
high load current at low input voltages. If the input volt-
age swing is 5V when V
is 5.2V or more, and V
-
CC
CC
0.2V when V
is less than 5.2V. If the output voltage
CC
does not exceed 5.5V, the on-chip regulator can be
disabled by connecting V to LDO (Figure 3). This
CC
eliminates the LDO forward drop and supplies maxi-
mum gate drive to the external FET.
10 ______________________________________________________________________________________
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
8/MAX69
V
= 3V to 12V
IN
C1
68µF
20V
L1
4.7µH
V
= 12V @ 1A
OUT
1
9
8
6
LDO
EXT
CS+
N1
D1
MBRS340T3
C4
1µF
C8
0.1µF
C5
68µF
20V
C6
68µF
20V
MAX668
FDS6680
R2
218k
1%
R1
0.02Ω
V
CC
C2
0.1µF
7
5
PGND
FB
SYNC/
SHDN
10
4
R3
24.9k
1%
REF
C7
220pF
3
2
C3
GND
FREQ
0.22µF
R4
100k
1%
Figure 4. MAX668 High-Voltage Non-Bootstrapped Configuration
V
= 2.7V to 5.5V
IN
C1
68µF
10V
L1
4.7µH
V
OUT
= 12V @ 1A
1
9
8
6
LDO
EXT
CS+
N1
D1
MBRS340T3
FDS6680
C2
1µF
C4
68µF
20V
C5
68µF
20V
C6
0.1µF
MAX668
R2
218k
1%
R1
0.02Ω
V
CC
7
5
PGND
FB
/
SYNC
SHDN
10
4
R3
24.9k
1%
REF
C7
220pF
3
2
C3
GND
FREQ
0.22µF
R4
100k
1%
Figure 5. MAX668 Low-Voltage Non-Bootstrapped Configuration
Non-Bootstrapped Operation
nect to V . Also note that only the MAX668 can be
CC
With non-bootstrapped operation, the IC is powered
used with non-bootstrapped operation.
from the input voltage (V ) or another source, such as
IN
If the input voltage does not exceed 5.5V, the on-chip
a logic supply. Non-bootstrapped operation (Figure 4)
is recommended (but not required) for input voltages
above 5V, since the EXT amplitude (limited to 5V by
LDO) at this voltage range is no higher than it would be
with bootstrapped operation. Note that non-boot-
strapped operation is required if the output voltage
exceeds 28V, since this level is too high to safely con-
regulator can be disabled by connecting V
to LDO
CC
(Figure 5). This eliminates the regulator forward drop
and supplies the maximum gate drive to the external
FET for lowest on-resistance. Disabling the regulator
also reduces the non-bootstrapped minimum input volt-
age from 3V to 2.7V.
______________________________________________________________________________________ 11
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Table 2. Bootstrapped and Non-Bootstrapped Configurations
INPUT
VOLTAGE
RANGE* (V) RANGE (V)
OUTPUT
VOLTAGE
USE
WITH:
CONFIGURATION FIGURE
COMMENTS
Connect V
to V
. Provides maximum external
OUT
CC
High-Voltage,
Bootstrapped
Figure
2
FET gate drive for low-voltage (Input <3V) to high-
MAX669
1.8 to 28
3V to 28
voltage (output >5.5V) boost circuits. V
exceed 28V.
cannot
OUT
Connect V
to V
and LDO. Provides maxi-
CC
OUT
Low-Voltage,
Bootstrapped
Figure
3
MAX669
MAX668
1.8 to 5.5
3 to 28
2.7 to 5.5
mum possible external FET gate drive for low-volt-
age designs, but limits V to 5.5V or less.
OUT
Connect V to V . Provides widest input and out-
IN
CC
High-Voltage,
Non-Bootstrapped
Figure
4
V
to ∞
to ∞
put range, but external FET gate drive is reduced for
V below 5V.
IN
IN
IN
X
Connect V to V
and LDO. FET gate-drive
CC
IN
amplitude = V for logic-supply (input 3V to 5.5V) to
IN
Low-Voltage,
Non-Bootstrapped
Figure
5
MAX668
MAX668
2.7 to 5.5
V
high-voltage (output >5.5V) boost circuits. IC oper-
ating power is less than in Figure 4, since IC current
does not pass through the LDO regulator.
Connect VCC and LDO to a separate supply
(V ) that powers only the IC. FET gate-drive
BIAS
Extra IC supply,
Non-Bootstrapped
Not
Restricted
None
V
IN
to ∞
amplitude = V
output voltage range (V
. Input power source (V and
BIAS IN)
) are not restricted,
OUT
except that V
must exceed V .
OUT
IN
* For standard step-up DC-DC circuits (as in Figures 2, 3, 4, and 5), regulation cannot be maintained if V exceeds V
IN
. SEPIC
OUT
and transformer-based circuits do not have this limitation.
In addition to the configurations shown in Table 2, the
following guidelines may help when selecting a config-
uration:
3) If V is in the 3V to 4.5V range (i.e., 1-cell Li-Ion or
IN
3-cell NiMH battery range), bootstrapping V
from
CC
V
OUT
, although not required, may increase overall
efficiency by increasing gate drive (and reducing
FET resistance) at the expense of quiescent power
consumption.
1) If V is ever below 2.7V, V
must be boot-
CC
IN
strapped to V
and the MAX669 must be used. If
OUT
V
V
never exceeds 5.5V, LDO may be shorted to
OUT
and V
to eliminate the dropout voltage of
4) If V always exceeds 4.5V, V
should be tied to
CC
OUT
IN
CC
the LDO regulator.
V
, since bootstrapping from V
does not
OUT
IN
increase gate drive from EXT but does increase
quiescent power dissipation.
2) If V is greater than 3.0V, V
can be powered
CC
IN
from V , rather than from V
(non-bootstrapped).
IN
OUT
This can save quiescent power consumption, espe-
cially when V is large. If V never exceeds
OUT
IN
CC
5.5V, LDO may be shorted to V
nate the dropout voltage of the LDO regulator.
and V to elimi-
IN
12 ______________________________________________________________________________________
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
8/MAX69
1) Noise considerations may dictate setting (or syn-
chronizing) f above or below a certain frequency
SYNC/SHDN and FREQ Inputs
The SYNC/SHDN pin provides both external-clock syn-
chronization (if desired) and shutdown control. When
SYNC/SHDN is low, all IC functions are shut down. A
logic high at SYNC/SHDN selects operation at a fre-
OSC
or band of frequencies, particularly in RF applica-
tions.
2) Higher frequencies allow the use of smaller value
(hence smaller size) inductors and capacitors.
quency set by R
, connected from FREQ to GND.
OSC
The relationship between f
and R
is:
OSC
OSC
3) Higher frequencies consume more operating power
both to operate the IC and to charge and discharge
the gate of the external FET. This tends to reduce
efficiency at light loads; however, the MAX668/
MAX669’s Idle Mode feature substantially increases
light-load efficiency.
R
= 5 x 1010 / f
OSC
OSC
So a 500kHz operating frequency, for example, is set
with R = 100kΩ.
OSC
Rising clock edges on SYNC/SHDN are interpreted as
synchronization inputs. If the sync signal is lost while
SYNC/SHDN is high, the internal oscillator takes over at
the end of the last cycle and the frequency is returned
4) Higher frequencies may exhibit poorer overall effi-
ciency due to more transition losses in the FET;
however, this shortcoming can often be nullified by
trading some of the inductor and capacitor size
benefits for lower-resistance components.
to the rate set by R . If sync is lost with SYNC/SHDN
OSC
low, the IC waits for 70µs before shutting down. This
maintains output regulation even with intermittent sync
signals. When an external sync signal is used, Idle
Mode switchover at the 15mV current-sense threshold
is disabled so that Idle Mode only occurs at very light
The oscillator frequency is set by a resistor, R
, con-
OSC
nected from FREQ to GND. R
must be connected
OSC
whether or not the part is externally synchronized R
is in each case:
OSC
loads. Also, R
should be set for a frequency 15%
OSC
below the SYNC clock rate:
= 5 x 1010 / (0.85 x f
R
OSC
= 5 x 1010 / f
OSC
R
)
SYNC
OSC(SYNC)
when not using an external clock.
= 5 x 1010 / (0.85 x f
R
)
SYNC
OSC(SYNC)
when using an external clock, f
Soft-Start
.
SYNC
The MAX668/MAX669 feature a “digital” soft start which
is preset and requires no external capacitor. Upon
start-up, the peak inductor increments from 1/5 of the
Setting the Output Voltage
The output voltage is set by two external resistors (R2
and R3, Figures 2, 3, 4, and 5). First select a value for
R3 in the 10kΩ to 1MΩ range. R2 is then given by:
value set by R , to the full current-limit value, in five
CS
steps over 1024 cycles of f
or f
. For example,
OSC
SYNC
with an f
of 200kHz, the complete soft-start
OSC
R2 = R3 [(V
/ V
) – 1]
REF
OUT
sequence takes 5ms. See the Typical Operating
Characteristics for a photo of soft-start operation. Soft-
start is implemented: 1) when power is first applied to
the IC, 2) when exiting shutdown with power already
applied, and 3) when exiting undervoltage lockout. The
MAX669’s soft-start sequence does not start until LDO
reaches 2.5V.
where V
is 1.25V.
REF
Determining Inductance Value
For most MAX668/MAX669 boost designs, the inductor
value (L ) can be derived from the following equa-
IDEAL
tion, which picks the optimum value for stability based
on the MAX668/MAX669’s internally set slope compen-
sation:
Design Procedure
L
= V
/ (4 x I
x f
)
OSC
IDEAL
OUT
OUT
The MAX668/MAX669 can operate in a number of DC-
DC converter configurations including step-up, SEPIC
(single-ended primary inductance converter), and fly-
back. The following design discussions are limited to
step-up, although SEPIC and flyback examples are
shown in the Application Circuits section.
The MAX668/MAX669 allow significant latitude in induc-
tor selection if L
may happen if L
is not a convenient value. This
is a not a standard inductance
IDEAL
IDEAL
(such as 10µH, 22µH, etc.), or if L
is too large to
IDEAL
be obtained with suitable resistance and saturation-cur-
rent rating in the desired size. Inductance values small-
Setting the Operating Frequency
The MAX668/MAX669 can be set to operate from
100kHz to 500kHz. Choice of operating frequency will
depend on number of factors:
er than L
may be used with no adverse stability
IDEAL
effects; however, the peak-to-peak inductor current
(I ) will rise as L is reduced. This has the effect of
LPP
raising the required I
also requiring larger output capacitance to maintain a
for a given output power and
LPK
______________________________________________________________________________________ 13
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
given output ripple. An inductance value larger than
may also be used, but output-filter capacitance
old NFETs that specify on-resistance with a gate-
L
source voltage (V ) of 2.7V or less. When selecting an
GS
IDEAL
must be increased by the same proportion that L has to
NFET, key parameters can include:
L
. See the Capacitor Selection section for more
IDEAL
1) Total gate charge (Q )
g
information on determining output filter values.
2) Reverse transfer capacitance or charge (C
)
RSS
Due the MAX668/MAX669’s high switching frequencies,
inductors with a ferrite core or equivalent are recom-
mended. Powdered iron cores are not recommended
due to their high losses at frequencies over 50kHz.
3) On-resistance (R
)
DS(ON)
4) Maximum drain-to-source voltage (V
)
DS(MAX)
5) Minimum threshold voltage (V
)
TH(MIN)
At high switching rates, dynamic characteristics (para-
meters 1 and 2 above) that predict switching losses
Determining Peak Inductor Current
The peak inductor current required for a particular out-
put is:
may have more impact on efficiency than R
DS(ON),
which predicts DC losses. Q includes all capacitances
g
I
= I
+ (I
/ 2)
LPEAK
LDC
LPP
associated with charging the gate. In addition, this
parameter helps predict the current needed to drive the
gate at the selected operating frequency. The continu-
ous LDO current for the FET gate is:
where I
is the average DC input current and I
is
LDC
LPP
and
the inductor peak-to-peak ripple current. The I
LDC
8/MAX69
I
terms are determined as follows:
LPP
I
(V
+ V )
OUT OUT D
I
= Q x f
g OSC
GATE
I
=
LDC
(V – V
)
IN
SW
For example, the MMFT3055L has a typical Q of 7nC
g
(at V = 5V); therefore, the I
current at 500kHz is
3.5mA. Use the FET manufacturer’s typical value for Q
GS
GATE
where V is the forward voltage drop across the
D
g
Schottky rectifier diode (D1), and V
across the external FET, when on.
is the drop
SW
in the above equation, since a maximum value (if sup-
plied) is usually too conservative to be of use in esti-
mating I
.
(V – V ) (V
+ V – V )
GATE
IN
SW
OUT
(V
D
IN
I
=
LPP
L x f
+ V )
Diode Selection
OSC
OUT
D
where L is the inductor value. The saturation rating of
The MAX668/MAX669’s high switching frequency
demands a high-speed rectifier. Schottky diodes are
recommended for most applications because of their
fast recovery time and low forward voltage. Ensure that
the diode’s average current rating is adequate using
the diode manufacturer’s data, or approximate it with
the following formula:
the selected inductor should meet or exceed the calcu-
lated value for I , although most coil types can be
LPEAK
operated up to 20% over their saturation rating without
difficulty. In addition to the saturation criteria, the induc-
tor should have as low a series resistance as possible.
For continuous inductor current, the power loss in the
inductor resistance, P , is approximated by:
LR
I
- I
LPEAK
OUT
I
= I
+
2
P
≅ (I
x V
/ V ) x R
DIODE
OUT
LR
OUT
OUT
IN
L
3
where R is the inductor series resistance.
L
Also, the diode reverse breakdown voltage must
exceed V . For high output voltages (50V or above),
Once the peak inductor current is selected, the current-
sense resistor (R ) is determined by:
OUT
CS
Schottky diodes may not be practical because of this
voltage requirement. In these cases, use a high-speed
silicon rectifier with adequate reverse voltage.
R
= 85mV / I
LPEAK
CS
For high peak inductor currents (>1A), Kelvin sensing
connections should be used to connect CS+ and
Capacitor Selection
PGND to R . PGND and GND should be tied together
CS
Output Filter Capacitor
The minimum output filter capacitance that ensures sta-
bility is:
at the ground side of R
.
CS
Power MOSFET Selection
The MAX668/MAX669 drive a wide variety of N-channel
power MOSFETs (NFETs). Since LDO limits the EXT
output gate drive to no more than 5V, a logic-level
NFET is required. Best performance, especially at low
input voltages (below 5V), is achieved with low-thresh-
(7.5V x L / L
)
IDEAL
x f
C
=
OUT(MIN)
(2πR
x V
)
OSC
CS
IN(MIN)
where V
is the minimum expected input voltage.
OUT(MIN)
IN(MIN)
Typically C
, though sufficient for stability, will
14 ______________________________________________________________________________________
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
8/MAX69
not be adequate for low output voltage ripple. Since
In bootstrapped configurations with the MAX668 or
MAX669, there may be circumstances where full load
current can only be applied after the circuit has started
and the output is near its set value. As the input voltage
drops, this limitation becomes more severe. This char-
acteristic of all bootstrapped designs occurs when the
MOSFET gate is not fully driven until the output voltage
rises. This is problematic because a heavily loaded out-
put cannot rise until the MOSFET has low on-resis-
output ripple in boost DC-DC designs is dominated by
capacitor equivalent series resistance (ESR), a capaci-
tance value 2 or 3 times larger than C
is typi-
OUT(MIN)
cally needed. Low-ESR types must be used. Output
ripple due to ESR is:
V
= I x ESR
LPEAK COUT
RIPPLE(ESR)
Input Capacitor
tance. In such situations, low-threshold FETs (V
<
The input capacitor (C ) in boost designs reduces the
IN
TH
V
) are the most effective solution. The Typical
current peaks drawn from the input supply and reduces
IN(MIN)
Operating Characteristics section shows plots of start-
up voltage versus load current for a typical boot-
strapped design.
noise injection. The value of C is largely determined
IN
by the source impedance of the input supply. High
source impedance requires high input capacitance,
particularly as the input voltage falls. Since step-up DC-
DC converters act as “constant-power” loads to their
input supply, input current rises as input voltage falls.
Consequently, in low-input-voltage designs, increasing
Layout Considerations
Due to high current levels and fast switching waveforms
that radiate noise, proper PC board layout is essential.
Protect sensitive analog grounds by using a star ground
configuration. Minimize ground noise by connecting
GND, PGND, the input bypass-capacitor ground lead,
and the output-filter ground lead to a single point (star
ground configuration). Also, minimize trace lengths to
reduce stray capacitance, trace resistance, and radiat-
ed noise. The trace between the external gain-setting
resistors and the FB pin must be extremely short, as
must the trace between GND and PGND.
C
and/or lowering its ESR can add as many as five
IN
percentage points to conversion efficiency. A good
starting point is to use the same capacitance value for
C
as for C
.
IN
OUT
Bypass Capacitors
, three ceramic bypass
OUT
In addition to C and C
IN
capacitors are also required with the MAX668/MAX669.
Bypass REF to GND with 0.22µF or more. Bypass LDO
to GND with 1µF or more. And bypass V
to GND with
CC
Application Circuits
0.1µF or more. All bypass capacitors should be located
as close to their respective pins as possible.
Low-Voltage Boost Circuit
Figure 3 shows the MAX669 operating in a low-voltage
boost application. The MAX669 is configured in the
bootstrapped mode to improve low input voltage per-
formance. The IRF7401 N-channel MOSFET was select-
ed for Q1 in this application because of its very low
Compensation Capacitor
Output ripple voltage due to C
ESR affects loop
OUT
stability by introducing a left half-plane zero. A small
capacitor connected from FB to GND forms a pole with
the feedback resistance that cancels the ESR zero. The
optimum compensation value is:
0.7V gate threshold voltage (V ). This circuit provides
GS
a 5V output at greater than 2A of output current and
operates with input voltages as low as 1.8V. Efficiency
is typically in the 85% to 90% range.
ESR
COUT
C
= C
x
OUT
FB
(R2 x R3) / (R2 + R3)
+12V Boost Application
Figure 5 shows the MAX668 operating in a 5V to 12V
boost application. This circuit provides output currents
of greater than 1A at a typical efficiency of 92%. The
MAX668 is operated in non-bootstrapped mode to mini-
mize the input supply current. This achieves maximum
light-load efficiency. If input voltages below 5V are
used, the IC should be operated in bootstrapped mode
to achieve best low-voltage performance.
where R2 and R3 are the feedback resistors (Figures 2,
3, 4, and 5). If the calculated value for C results in a
FB
non-standard capacitance value, values from 0.5C to
FB
1.5C will also provide sufficient compensation.
FB
Applications Information
Starting Under Load
In non-bootstrapped configurations (Figures 4 and 5),
the MAX668 can start up with any combination of out-
put load and input voltage at which it can operate when
already started. In other words, there are no special
limitations to start-up in non-bootstrapped circuits.
4-Cell to +5V SEPIC Power Supply
Figure 6 shows the MAX668 in a SEPIC (single-ended
primary inductance converter) configuration. This con-
figuration is useful when the input voltage can be either
______________________________________________________________________________________ 15
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
larger or smaller than the output voltage, such as when
Isolated +5V to +5V Power Supply
converting four NiMH, NiCd, or Alkaline cells to a 5V
output. The SEPIC configuration is often a good choice
for combined step-up/step-down applications.
The circuit of Figure 7 provides a 5V isolated output at
400mA from a 5V input power supply. Transformer T1
provides electrical isolation for the forward path of the
converter, while the TLV431 shunt regulator and
MOC211 opto-isolator provide an isolated feedback
error voltage for the converter. The output voltage is set
by resistors R2 and R3 such that the mid-point of the
divider is 1.24V (threshold of TLV431). Output voltage
can be adjusted from 1.24V to 6V by selecting the
proper ratio for R2 and R3. For output voltages greater
than 6V, substitute the TL431 for the TLV431, and use
2.5V as the voltage at the midpoint of the voltage-
divider.
The N-channel MOSFET (Q1) must be selected to with-
stand a drain-to-source voltage (V ) greater than the
DS
sum of the input and output voltages. The coupling
capacitor (C2) must be a low-ESR type to achieve max-
imum efficiency. C2 must also be able to handle high
ripple currents; ordinary tantalum capacitors should not
be used for high-current designs.
The circuit in Figure 6 provides greater than 1A output
current at 5V when operating with an input voltage from
3V to 25V. Efficiency will typically be between 70% and
85%, depending upon the input voltage and output cur-
rent.
8/MAX69
V
IN
3V to 25V
22µF x 3
@ 35V
L1
CTX5-4
4.9µH
D1
40V
9
10
V
OUT
5V @ 1A
V
LDO
SHDN
CC
C2
1
2
10µF @ 35V
C3
68µF x 3
Q1
30V
FDS6680
FREQ MAX668
8
6
EXT
CS+
1µF
4
5
R3
REF
100k
0.22µF
R4
0.02Ω
FB
GND
3
R1
75k
PGND
7
C4
520pF
R2
25k
D1: MBR5340T3, 3A, 40V SCHOTTKY DIODE
R4: WSL-2512-R020F, 0.02Ω
C3: AVX TPSZ686M020R0150, 68µF, 150mΩ ESR
Figure 6. MAX668 in SEPIC Configuration
16 ______________________________________________________________________________________
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
8/MAX69
MBR0540L
47µH
V
IN
= +5V
+5V @ 400mA
T1
1:2
220µF
10V
220µF
10V
1µF
MBR0540L
+5V RETURN
LDO
V
CC
IRF7603
EXT
CS+
SHDN
MAX668
FB
0.1Ω
PGND
REF
FREQ
GND
0.22µF
100k
R2
301k
1%
510Ω
MOC211
10k
0.1µF
TLV431
0.068µF
610Ω
R3
100k
1%
T1: COILTRONICS CTX03-14232
Figure 7. Isolated +5V to +5V at 400mA Power Supply
Package Information
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a "+", "#", or
"-" in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing per-
tains to the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
21-0061
LAND PATTERN NO.
90-0330
10 µMAX
U10-2
______________________________________________________________________________________ 17
1.8V to 28V Input, PWM Step-Up
Controllers in µMAX
Revision History
REVISION REVISION
DESCRIPTION
PAGES
CHANGED
NUMBER
DATE
Added automotive qualified part and updated lead-free and leaded soldering
temperatures
2
1/12
1, 2
8/MAX69
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in
the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2012 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
相关型号：
MAX6700
Low-Voltage, High-Accuracy, Triple/Quad Voltage レP Supervisory Circuits in SOT Package
MAXIM
MAX6700-MAX6710
Low-Voltage, High-Accuracy, Triple/Quad Voltage レP Supervisory Circuits in SOT Package
MAXIM
MAX6700UT
Low-Voltage, High-Accuracy, Triple/Quad Voltage μP Supervisory Circuits in SOT Package
MAXIM
MAX6700UT+
Power Supply Support Circuit, Adjustable, 3 Channel, BICMOS, PDSO6, LEAD FREE, MO-178AB, SOT-23, 6 PIN
MAXIM
MAX6700UT-T
Low-Voltage, High-Accuracy, Triple/Quad Voltage レP Supervisory Circuits in SOT Package
MAXIM
MAX6700_05
Low-Voltage, High-Accuracy, Triple/Quad Voltage uP Supervisory Circuits in SOT Package
MAXIM
MAX6701
Low-Voltage, SOT23 レP Supervisors with Power- Fail In/Out, Manual Reset, and Watchdog Timer
MAXIM
MAX6701-08
Low-Voltage, SOT23 uP Supervisors with Power-Fail In/Out, Manual Reset, and Watchdog Timer
MAXIM
MAX6701-08_03
Low-Voltage, SOT23 レP Supervisors with Power- Fail In/Out, Manual Reset, and Watchdog Timer
MAXIM
©2020 ICPDF网 联系我们和版权申明