MAX6732AUTYVD5+T
更新时间：2024-11-09 05:02:38
品牌：MAXIM
描述：Power Supply Management Circuit, Adjustable, 1 Channel, BICMOS, PDSO6, LEAD FREE, MO-178AB, SOT-23, 6 PIN
概述
数据手册MAX6732AUTYVD5+T 概述
Power Supply Management Circuit, Adjustable, 1 Channel, BICMOS, PDSO6, LEAD FREE, MO-178AB, SOT-23, 6 PIN
MAX6732AUTYVD5+T 数据手册
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Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
General Description
Features
♦ V 1 (Primary Supply) Reset Threshold Voltages
The MAX6730A–MAX6735A single-/dual-/triple-voltage
microprocessor (µP) supervisors feature a watchdog
timer and manual reset capability. The MAX6730A–
MAX6735A offer factory-set reset thresholds for moni-
toring voltages from +0.9V to +5V and an adjustable
reset input for monitoring voltages down to +0.63V. The
combination of these features significantly improves
system reliability and accuracy when compared to sep-
arate ICs or discrete components.
CC
from +1.575V to +4.63V
♦ V 2 (Secondary Supply) Reset Threshold
CC
Voltages from +0.79V to +3.08V
♦ Adjustable RSTIN Threshold for Monitoring Voltages
Down to +0.63V (MAX6734A/MAX6735A Only)
♦ Six Reset Timeout Options
♦ Watchdog Timer with Independent Watchdog Output
35s (min) Initial Watchdog Startup Period
The active-low reset output asserts and remains asserted
for the reset timeout period after all the monitored volt-
ages exceed their respective thresholds. Multiple factory-
set reset threshold combinations reduce the number of
external components required. The MAX6730A/
MAX6731A monitor a single fixed voltage, the MAX6732A/
MAX6733A monitor two fixed voltages, and the
MAX6734A/MAX6735A monitor two fixed voltages and one
adjustable voltage. All devices are offered with six mini-
mum reset timeout periods ranging from 1.1ms to 1120ms.
1.12s (min) Normal Watchdog Timeout Period
♦ Manual Reset Input (MAX6730A/MAX6731A/
MAX6734A/MAX6735A)
♦ Guaranteed Reset Valid down to
V
1 or V 2 = +0.8V
CC
CC
♦ Push-Pull RESET or Open-Drain RESET Output
♦ Immune to Short V Transients
CC
The MAX6730A–MAX6735A feature a watchdog timer
with an independent watchdog output. The watchdog
timer prevents system lockup during code execution
errors. A watchdog startup delay of 54s after reset
asserts allows system initialization during power-up.
The watchdog operates in normal mode with a 1.68s
delay after initialization. The MAX6730A/MAX6732A/
MAX6734A provide an active-low, open-drain watch-
dog output. The MAX6731A/MAX6733A/MAX6735A
provide an active-low, push-pull watchdog output.
♦ Low Supply Current: 14µA (typ) at +3.6V
♦ Small 6-Pin and 8-Pin SOT23 Packages
Ordering Information
PART*
PIN-PACKAGE
6 SOT23-6
6 SOT23-6
6 SOT23-6
6 SOT23-6
8 SOT23-8
8 SOT23-8
PKG CODE
U6-1
MAX6730AUT_D_ -T
MAX6731AUT_D_ -T
MAX6732AUT_ _D_ -T
MAX6733AUT_ _D_ -T
MAX6734AKA_ _D_ -T
MAX6735AKA_ _D_ -T
U6-1
Other features include a manual reset input (MAX6730A/
MAX6731A/MAX6734A/MAX6735A) and push-pull reset
output (MAX6731A/MAX6733A/MAX6735A) or open-
drain reset output (MAX6730A/MAX6732A/MAX6734A).
The MAX6730A–MAX6733A are offered in a tiny 6-pin
SOT23 package. The MAX6734A/MAX6735A are offered
in an 8-pin, space-saving SOT23 package. All devices
are fully specified over the extended -40°C to +125°C
temperature range.
U6-1
U6-1
K8S-3
K8S-3
All devices specified over the -40°C to +125°C operating tem-
perature range.
*Note: Insert the threshold level suffixes for V 1 and V
2
CC
CC
(Table 1) after “UT” or “KA.” For the MAX6730A/MAX6731A,
Applications
Multivoltage Systems
Telecom/Networking Equipment
Computers/Servers
Portable/Battery-Operated Equipment
Industrial Equipment
Printer/Fax
insert only the V 1 threshold suffix after the “UT.” Insert the
reset timeout delay (Table 2) after “D” to complete the part num-
CC
ber. For example, the MAX6732AUTLTD3-T provides a V
1
CC
threshold of +4.625V, a V 2 threshold of +3.075V, and a
CC
210ms reset timeout period. Sample stock is generally held on
standard versions only (see the Standard Versions table).
Standard versions have an order increment requirement of 2500
pieces. Nonstandard versions have an order increment require-
ment of 10,000 pieces. Contact factory for availability.
Devices are available in both leaded and lead-free packaging.
Specify lead-free by replacing “T” with “+T” when ordering.
Set-Top Boxes
Typical Operating Circuit and Pin Configurations appear at
end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
ABSOLUTE MAXIMUM RATINGS
Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
V
1, V 2, RSTIN, MR, WDI to GND.....................-0.3V to +6V
CC
CC
RST, WDO to GND (open drain)...............................-0.3V to +6V
RST, WDO to GND (push-pull).................-0.3V to (V 1 + 0.3V)
Input Current/Output Current (all pins) ...............................20mA
CC
Continuous Power Dissipation (T = +70°C)
A
6-Pin SOT23-6 (derate 8.7mW/°C above +70°C) ........696mW
8-Pin SOT23-8 (derate 8.9mW/°C above +70°C) ........714mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V 1 = V 2 = +0.8V to +5.5V, T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
A
CC
CC
PARAMETER
SYMBOL
1,
CONDITIONS
MIN
TYP
MAX
UNITS
V
CC
Supply Voltage
0.8
5.5
V
V
2
CC
V
1 < +5.5V, all I/O connections
CC
15
10
4
39
28
11
9
open, outputs not asserted
I 1
CC
V
1 < +3.6V, all I/O connections
CC
open, outputs not asserted
Supply Current
µA
V
2 < +3.6V, all I/O connections
CC
open, outputs not asserted
I
2
CC
V
2 < +2.75V, all I/O connections
CC
3
open, outputs not asserted
L (falling)
4.500
4.250
3.000
2.850
2.550
2.250
2.125
1.620
1.530
4.625
4.375
3.075
2.925
2.625
2.313
2.188
1.665
1.575
4.750
4.500
3.150
3.000
2.700
2.375
2.250
1.710
1.620
M (falling)
T (falling)
S (falling)
V
1 Reset Threshold
CC
V
1
TH
R (falling)
V
Z (falling)
Y (falling)
W (falling)
V (falling)
2
_______________________________________________________________________________________
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
ELECTRICAL CHARACTERISTICS (continued)
(V 1 = V 2 = +0.8V to +5.5V, T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
A
CC
CC
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
3.075
2.925
2.625
2.313
2.188
1.665
1.575
1.388
1.313
1.110
1.050
0.833
0.788
20
MAX
3.150
3.000
2.700
2.375
2.250
1.710
1.620
1.425
1.350
1.140
1.080
0.855
0.810
UNITS
T (falling)
S (falling)
R (falling)
Z (falling)
Y (falling)
W (falling)
V (falling)
I (falling)
H (falling)
G (falling)
F (falling)
E (falling)
D (falling)
3.000
2.850
2.550
2.250
2.125
1.620
1.530
1.350
1.275
1.080
1.020
0.810
0.765
V
2 Reset Threshold
V
2
TH
V
CC
Reset Threshold Tempco
Reset Threshold Hysteresis
ppm/oC
%
V
Referenced to V typical
0.5
HYST
TH
V
1 = (V 1 + 100mV) to
CC TH
(V 1 - 100mV) or
TH
V
_ to RST Output Delay
CC
t
45
µs
RD
V
2 = (V 2 + 75mV) to
CC TH
(V 2 - 75mV)
TH
D1
D2
D3
D5
D6
D4
1.1
8.8
1.65
13.2
210
2.2
17.6
280
140
280
560
1120
Reset Timeout Period
t
ms
RP
420
560
840
1120
2240
1680
ADJUSTABLE RESET COMPARATOR INPUT (MAX6734A/MAX6735A)
RSTIN Input Threshold
RSTIN Input Current
V
611
626.5
642
mV
nA
mV
µs
RSTIN
RSTIN
I
-100
+100
RSTIN Hysteresis
3
RSTIN to Reset Output Delay
t
V
to (V - 30mV)
RSTIN
22
RSTIND
RSTIN
MANUAL RESET INPUT (MAX6730A/MAX6731A/MAX6734A/MAX6735A)
V
0.3 × V
1
CC
IL
MR Input Threshold
V
V
0.7 × V
1
CC
IH
MR Minimum Pulse Width
MR Glitch Rejection
1
µs
ns
ns
kΩ
100
200
50
MR to Reset Output Delay
MR Pullup Resistance
t
MR
25
80
_______________________________________________________________________________________
3
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
ELECTRICAL CHARACTERISTICS (continued)
(V 1 = V 2 = +0.8V to +5.5V, T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
A
CC
CC
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
WATCHDOG INPUT
First watchdog period after reset
timeout period
t
35
54
72
WD-L
Watchdog Timeout Period
s
t
Normal mode
(Note 2)
1.12
50
1.68
2.24
WD-S
WDI Pulse Width
WDI Input Voltage
t
ns
V
WDI
V
0.3 × V
1
CC
IL
V
0.7 × V
1
CC
IH
WDI Input Current
I
WDI = 0V or V 1
CC
-1
+1
µA
WDI
RESET/WATCHDOG OUTPUT
V
1 or V 2 ≥ +0.8V,
CC
= 1µA, output asserted
CC
0.3
0.3
0.3
0.3
0.4
I
SINK
V
1 or V 2 ≥ +1.0V,
CC CC
I
= 50µA, output asserted
SINK
V
1 or V 2 ≥ +1.2V,
RST/WDO Output Low Voltage
(Push-Pull or Open Drain)
CC
CC
V
V
OL
I
= 100µA, output asserted
SINK
V
1 or V 2 ≥ +2.7V,
CC CC
I
= 1.2mA, output asserted
SINK
V
1 or V 2 ≥ +4.5V,
CC CC
I
= 3.2mA, output asserted
SINK
V
1 ≥ +1.8V, I
= 200µA,
= 500µA,
= 800µA,
CC
SOURCE
0.8 × V
0.8 × V
0.8 × V
1
1
1
CC
CC
CC
output not asserted
V 1 ≥ +2.7V, I
CC
RST/WDO Output High Voltage
(Push-Pull Only)
SOURCE
V
V
OH
output not asserted
V
1 ≥ +4.5V, I
CC
SOURCE
output not asserted
RST/WDO Output Open-Drain
Leakage Current
Output not asserted
0.5
µA
Note 1: Devices tested at T = +25°C. Overtemperature limits are guaranteed by design and not production tested.
A
Note 2: Parameter guaranteed by design.
4
_______________________________________________________________________________________
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Typical Operating Characteristics
(V 1 = +5V, V 2 = +3.3V, T = +25°C, unless otherwise noted.)
CC
CC
A
SUPPLY CURRENT vs. TEMPERATURE
(V 1 = +5V, V 2 = +3.3V)
SUPPLY CURRENT vs. TEMPERATURE
SUPPLY CURRENT vs. TEMPERATURE
(V 1 = +3.3V, V 2 = +2.5V)
(V 1 = +2.5V, V 2 = +1.8V)
CC
CC
CC
CC
CC
CC
20
20
18
16
14
12
10
8
20
18
16
14
12
10
8
TOTAL
18
16
14
12
10
8
TOTAL
I
1
CC
TOTAL
I
1
CC
I
1
CC
6
6
6
4
4
4
I
2
CC
I
2
CC
I
2
CC
2
2
2
0
0
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
SUPPLY CURRENT vs. TEMPERATURE
NORMALIZED THRESHOLD VOLTAGE
vs. TEMPERATURE
(V 1 = +1.8V, V 2 = +1.2V)
CC
CC
20
18
16
14
12
10
8
1.008
1.007
1.006
1.005
1.004
1.003
1.002
1.001
1.000
0.999
0.998
TOTAL
I
1
CC
I
6
4
2
2
CC
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
5
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Typical Operating Characteristics (continued)
(V 1 = +5V, V 2 = +3.3V, T = +25°C, unless otherwise noted.)
CC
CC
A
NORMALIZED TIMEOUT PERIOD
vs. TEMPERATURE
MAXIMUM V
vs. RESET THRESHOLD OVERDRIVE
TRANSIENT DURATION
CC_
MR TO RESET OUTPUT DELAY
MAX6730A-35A toc08
10,000
1000
100
1.020
1.016
1.012
1.008
1.004
1.000
0.996
0.992
0.988
0.984
0.980
RST ASSERTS
ABOVE THIS LINE
MR
2V/div
RST
2V/div
10
-40 -25 -10
5
20 35 50 65 80 95 110 125
1
10
100
1000
40ns/div
TEMPERATURE (°C)
RESET THRESHOLD OVERDRIVE (mV)
V
CC_
TO RESET OUTPUT DELAY
vs. TEMPERATURE
RSTIN TO RESET OUTPUT DELAY
vs. TEMPERATURE
20
24
22
20
18
16
14
12
75mV OVERDRIVE
19
18
17
16
15
14
13
12
11
10
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
6
_______________________________________________________________________________________
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Pin Description
PIN
NAME
FUNCTION
MAX6730A MAX6732A MAX6734A
MAX6731A MAX6733A MAX6735A
Active-Low Reset Output. The MAX6730A/MAX6732A/MAX6734A provide an
open-drain output. The MAX6731A/MAX6733A/MAX6735A provide a push-pull
1
2
1
2
1
2
RST
output. RST asserts low when any of the following conditions occur: V 1 or
CC
V
2 drops below its preset threshold, RSTIN drops below its reset threshold,
CC
or MR is driven low. Open-drain versions require an external pullup resistor.
GND Ground
Active-Low Watchdog Output. The MAX6730A/MAX6732A/MAX6734A provide
an open-drain WDO output. The MAX6731A/MAX6733A/MAX6735A provide a
push-pull WDO output. WDO asserts low when no low-to-high or high-to-low
transition occurs on WDI within the watchdog timeout period (t ) or if an
WD
3
3
4
WDO
undervoltage-lockout condition exists for V 1, V 2, or RSTIN. WDO
CC
CC
deasserts without a timeout period when V 1, V 2, and RSTIN exceed their
CC
CC
reset thresholds, or when the manual reset input is deasserted. Open-drain
versions require an external pullup resistor.
Active-Low Manual Reset Input. Drive MR low to force a reset. RST remains
asserted as long as MR is low and for the reset timeout period after MR releases
4
5
—
5
5
3
MR
high. MR has a 50kΩ pullup resistor to V 1; leave MR open or connect to
CC
V
1 if unused.
CC
Watchdog Input. If WDI remains high or low for longer than the watchdog
timeout period, the internal watchdog timer expires and the watchdog output
asserts low. The internal watchdog timer clears whenever RST asserts or a
rising or falling edge on WDI is detected. The watchdog has an initial watchdog
timeout period (35s min) after each reset event and a short timeout period
(1.12s min) after the first valid WDI transition. Floating WDI does not disable the
watchdog timer function.
WDI
Primary Supply-Voltage Input. V 1 provides power to the device when it is
CC
6
6
4
8
6
V
V
1
2
CC
greater than V 2. V 1 is the input to the primary reset threshold monitor.
CC
CC
Secondary Supply-Voltage Input. V 2 provides power to the device when it is
CC
—
CC
greater than V 1. V 2 is the input to the secondary reset threshold monitor.
CC
CC
Undervoltage Reset Comparator Input. RSTIN provides a high-impedance
comparator input for the adjustable reset monitor. RST asserts low if the voltage
—
—
7
RSTIN at RSTIN drops below the 626mV internal reference voltage. Connect a resistive
voltage-divider to RSTIN to monitor voltages higher than 626mV. Connect
RSTIN to V 1 or V 2 if unused.
CC
CC
_______________________________________________________________________________________
7
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Table 1. Reset Voltage Threshold Suffix Guide**
Table 2. Reset Timeout Period Suffix Guide
ACTIVE TIMEOUT PERIOD
V
1 NOMINAL
VOLTAGE
V
2 NOMINAL
VOLTAGE
TIMEOUT
PERIOD SUFFIX
CC
CC
PART NUMBER
SUFFIX
MIN (ms)
1.1
MAX (ms)
2.2
THRESHOLD(V)
4.625
4.375
4.375
3.075
2.925
2.625
3.075
2.925
2.625
3.075
2.925
2.625
3.075
2.925
2.625
3.075
2.925
2.625
2.313
2.188
2.313
2.188
2.313
2.188
2.313
2.188
1.665
1.575
1.665
1.575
1.665
1.575
THRESHOLD (V)
3.075
2.925
2.625
2.313
2.188
2.188
1.665
1.575
1.575
1.388
1.313
1.313
1.110
1.050
1.050
0.833
0.788
0.788
1.665
1.575
1.388
1.313
1.110
1.050
0.833
0.788
1.388
1.313
1.110
1.050
0.833
0.788
D1
D2
D3
D5
D6
D4
LT
MS
MR
TZ
SY
RY
TW
SV
RV
TI
SH
RH
TG
SF
RF
TE
SD
RD
ZW
YV
ZI
YH
ZG
YF
ZE
YD
WI
VH
WG
VF
8.8
17.6
140
280
280
560
560
1120
2240
1120
Detailed Description
Supply Voltages
The MAX6730A–MAX6735A microprocessor (µP) super-
visors maintain system integrity by alerting the µP to fault
conditions. The MAX6730A–MAX6735A monitor one to
three supply voltages in µP-based systems and assert
an active-low reset output when any monitored supply
voltage drops below its preset threshold. The output
state remains valid for V 1 or V 2 greater than +0.8V.
CC
CC
Threshold Levels
The two-letter code in the Reset Voltage Threshold
Suffix Guide (Table 1) indicates the threshold level
combinations for V 1 and V 2.
CC
CC
Reset Output
The MAX6730A–MAX6735A feature an active-low reset
output (RST). RST asserts when the voltage at either
V
V
1 or V 2 falls below the voltage threshold level,
CC
CC
drops below its threshold, or MR is driven low
RSTIN
(Figure 1). RST remains low for the reset timeout period
(Table 2) after V 1, V 2, and RSTIN increase above
CC
CC
their respective thresholds and after MR releases high.
Whenever V 1, V 2, or RSTIN go below the reset
threshold before the end of the reset timeout period, the
internal timer restarts. The MAX6730A/MAX6732A/
MAX6734A provide an open-drain RST output, and the
MAX6731A/MAX6733A/MAX6735A provide a push-pull
RST output.
WE
VD
CC
CC
**Standard versions are shown in bold and are available in a
D3 timeout option only. Standard versions require 2500-piece
order increments and are typically held in sample stock. There
is a 10,000-piece order increment on nonstandard versions.
Other threshold voltages may be available; contact factory
for availability.
8
_______________________________________________________________________________________
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
V
V
RSTIN
1,
CC
V
TH
V
CC
(MIN)
2
CC
t
t
RP
RP
RST
WDO
MR
Figure 1. RST, WDO, and MR Timing Diagram
Manual Reset Input
Many µP-based products require manual reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic-low on MR
asserts the reset output, clears the watchdog timer,
and deasserts the watchdog output. Reset remains
asserted while MR is low and for the reset timeout peri-
V
EXT_TH
R1
MAX6734A
MAX6735A
od (t ) after MR returns high. An internal 50kΩ pullup
RP
resistor allows MR to be left open if unused. Drive MR
with CMOS-logic levels or with open-drain/collector out-
puts. Connect a normally open momentary switch from
MR to GND to create a manual reset function; external
debounce circuitry is not required. Connect a 0.1µF
capacitor from MR to GND to provide additional noise
immunity when driving MR over long cables or if the
device is used in a noisy environment.
RSTIN
R2
GND
Figure 2. Monitoring a Third Voltage
Adjustable Input Voltage (RSTIN)
The MAX6734A/MAX6735A provide an additional high-
impedance comparator input with a 626mV threshold to
monitor a third supply voltage. To monitor a voltage
higher than 626mV, connect a resistive divider to the
circuit as shown in Figure 2 to establish an externally
controlled threshold voltage, V
.
EXT_TH
(R1+ R2)
V
= 626mV ×
EXT_TH
R2
_______________________________________________________________________________________
9
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
The RSTIN comparator derives power from V 1, and
CC
The usual watchdog timeout period (1.12s min) begins
after the initial watchdog timeout period (t ) expires
the input voltage must remain less than or equal to
WD-L
V
1. Low leakage current at RSTIN allows the use of
or after the first transition on WDI (Figure 3). During nor-
mal operating mode, the supervisor asserts the WDO
output if the µP does not update the WDI with a valid
transition (high to low or low to high) within the standard
CC
large-valued resistors, resulting in reduced power con-
sumption of the system.
Watchdog
The watchdog feature monitors µP activity through
the watchdog input (WDI). A rising or falling edge on
timeout period (t ) (1.12s min).
WD-S
Connect MR to WDO to force a system reset in the
event that no rising or falling edge is detected at WDI
within the watchdog timeout period. WDO asserts low
when no edge is detected by WDI, the RST output
asserts low, the watchdog counter immediately clears,
and WDO returns high. The watchdog counter restarts,
using the long watchdog period, when the reset timeout
period ends (Figure 4).
WDI within the watchdog timeout period (t ) indi-
WD
cates normal µP operation. WDO asserts low if WDI
remains high or low for longer than the watchdog
timeout period. Floating WDI does not disable the
watchdog timer.
The MAX6730A–MAX6735A include a dual-mode
watchdog timer to monitor µP activity. The flexible time-
out architecture provides a long-period initial watchdog
mode, allowing complicated systems to complete
lengthy boots, and a short-period normal watchdog
mode, allowing the supervisor to provide quick alerts
when processor activity fails. After each reset event
Ensuring a Valid Reset
Output Down to V
= 0V
CC
The MAX6730A–MAX6735A guarantee proper opera-
tion down to V = +0.8V. In applications that require
CC
valid reset levels down to V
= 0V, use a 100kΩ pull-
CC
(V
CC
power-up, brownout, or manual reset), there is a
down resistor from RST to GND. The resistor value
long initial watchdog period of 35s (min). The long
watchdog period mode provides an extended time for
the system to power up and fully initialize all µP and
system components before assuming responsibility for
routine watchdog updates.
used is not critical, but it must be large enough not to
load the reset output when V
is above the reset
CC
threshold. For most applications, 100kΩ is adequate.
Note that this configuration does not work for the open-
drain outputs of MAX6730A/MAX6732A/MAX6734A.
V
V
RSTIN
1,
CC
V
TH
V
CC
(MIN)
2
CC
t
RP
RST
WDO
WDI
<t
WD-L
<t
WD-S
<t
WD-S
>t
WD-S
<t
WD-S
<t
WD-S
t
WD-S
Figure 3. Watchdog Input/Output Timing Diagram (MR and WDO Not Connected)
10 ______________________________________________________________________________________
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
V
V
RSTIN
1,
CC
V
TH
V
CC
(MIN)
2
CC
t
RP
t
RP
RST
WDO
<t
WD-L
<t
WD-S
>t
WD-S
<t
WD-L
WDI
MR
t
MR
Figure 4. Watchdog Input/Output Timing Diagram (MR and WDO Connected)
Applications Information
Interfacing to µPs with Bidirectional
V
2
V
CC
1
CC
Reset Pins
Microprocessors with bidirectional reset pins can inter-
face directly with the open-drain RST output options.
However, conditions might occur in which the push-pull
output versions experience logic contention with the
bidirectional reset pin of the µP. Connect a 10kΩ resis-
tor between RST and the µP’s reset I/O port to prevent
logic contention (Figure 5).
RESET TO
OTHER
SYSTEM
V
V
1
CC
COMPONENTS
MAX6731A
MAX6733A
MAX6735A
10k
Ω
µP
RST
RESET
2
CC
Falling V
Transients
CC
The MAX6730A–MAX6735A µP supervisors are relative-
GND
GND
ly immune to short-duration falling V _ transients
CC
(glitches). Small glitches on V _ are ignored by the
CC
MAX6730A–MAX6735A, preventing undesirable reset
pulses to the µP. The Typical Operating Characteristics
Figure 5. Interfacing to µPs with Bidirectional Reset I/O
show Maximum V
Transient Duration vs. Reset
CC_
______________________________________________________________________________________ 11
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Threshold Overdrive graph, for which reset pulses are
Functional Diagram
not generated. The graph was produced using falling
V
CC
_ pulses, starting above V and ending below the
TH
reset threshold by the magnitude indicated (reset
threshold overdrive). The graph shows the maximum
V
1
MR
CC
pulse width that a falling V
transient typically might
CC
V
1
CC
have without causing a reset pulse to be issued. As the
amplitude of the transient increases (i.e., goes further
below the reset threshold), the maximum allowable
pulse width decreases. A 0.1µF bypass capacitor
MAX6730A–
MAX6735A
MR
PULLUP
mounted close to V _ provides additional transient
CC
V
1
V
1
V 2
CC
CC
CC
immunity.
V
2
V
CC
REF
RESET
TIMEOUT
PERIOD
RESET
OUTPUT
DRIVER
RST
Watchdog Software Considerations
Setting and resetting the watchdog input at different
points in the program rather than “pulsing” the watch-
dog input high-low-high or low-high-low helps the
watchdog timer closely monitor software execution.
This technique avoids a “stuck” loop, in which the
watchdog timer continues to be reset within the loop,
preventing the watchdog from timing out. Figure 6
shows an example flow diagram in which the I/O dri-
ving the watchdog input is set high at the beginning of
the program, set low at the beginning of every subrou-
tine or loop, and then set high again when the program
returns to the beginning. If the program “hangs” in any
subroutine, the I/O continually asserts low (or high),
and the watchdog timer expires, issuing a reset or
interrupt.
V
1
CC
WDO
WDI
WATCHDOG
TIMER
RSTIN
V
1
CC
REF
V
/ 2
REF
GND
START
SET WDI
HIGH
PROGRAM
CODE
SUBROUTINE OR
PROGRAM LOOP
SET WDI LOW
HANG IN
SUBROUTINE
SUBROUTINE
COMPLETED
RETURN
Figure 6. Watchdog Flow Diagram
12 ______________________________________________________________________________________
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Standard Versions
PART
TOP MARK
+ACIV
PART
TOP MARK
+ACIX
+ACJA
+ACIY
+ACJF
+ACJC
+ACJG
+ACJJ
+ACJI
MAX6733AUTZGD3-T
MAX6733AUTYDD3-T
MAX6733AUTVHD3-T
MAX6733AUTWGD3-T
MAX6733AUTVDD3-T
MAX6734AKALTD3-T
MAX6734AKASYD3-T
MAX6734AKASVD3-T
MAX6734AKARVD3-T
MAX6734AKASHD3-T
MAX6734AKATGD3-T
MAX6734AKASDD3-T
MAX6734AKAZWD3-T
MAX6734AKAYHD3-T
MAX6734AKAZGD3-T
MAX6734AKAYDD3-T
MAX6734AKAVHD3-T
MAX6734AKAWGD3-T
MAX6734AKAVDD3-T
MAX6735AKALTD3-T
MAX6735AKASYD3-T
MAX6735AKASVD3-T
MAX6735AKARVD3-T
MAX6735AKASHD3-T
MAX6735AKATGD3-T
MAX6735AKASDD3-T
MAX6735AKAZWD3-T
MAX6735AKAZID3-T
MAX6735AKAYHD3-T
MAX6735AKAZGD3-T
MAX6735AKAYDD3-T
MAX6735AKAVHD3-T
MAX6735AKAWGD3-T
MAX6735AKAVDD3-T
MAX6730AUTLD3-T
MAX6730AUTSD3-T
MAX6730AUTRD3-T
MAX6730AUTZD3-T
MAX6730AUTVD3-T
MAX6731AUTLD3-T
MAX6731AUTTD3-T
MAX6731AUTSD3-T
MAX6731AUTRD3-T
MAX6731AUTZD3-T
MAX6731AUTVD3-T
MAX6732AUTLTD3-T
MAX6732AUTSYD3-T
MAX6732AUTSVD3-T
MAX6732AUTRVD3-T
MAX6732AUTSHD3-T
MAX6732AUTTGD3-T
MAX6732AUTSDD3-T
MAX6732AUTZWD3-T
MAX6732AUTYHD3-T
MAX6732AUTZGD3-T
MAX6732AUTYDD3-T
MAX6732AUTVHD3-T
MAX6732AUTWGD3-T
MAX6732AUTVDD3-T
MAX6733AUTLTD3-T
MAX6733AUTSYD3-T
MAX6733AUTSVD3-T
MAX6733AUTRVD3-T
MAX6733AUTSHD3-T
MAX6733AUTTGD3-T
MAX6733AUTSDD3-T
MAX6733AUTZWD3-T
MAX6733AUTYHD3-T
+ACIT
+ACIR
+ACIS
+ACIQ
+AENS
+AENZ
+AENY
+AENU
+AENX
+AEOA
+AENV
+AEOI
+ACJH
+ACJL
+ACJK
+ACHU
+ACHZ
+ACHY
+ACHV
+ACHX
+ACIA
+ACHW
+ACIH
+ACIF
+AEOG
+AEOH
+AEOF
+AEOD
+AEOE
+AEOC
+AEOJ
+AEOO
+AEON
+AEOK
+AEOM
+AEOP
+AEOL
+AEOX
+AEOW
+AEOU
+AEOV
+AEOT
+AEOR
+AEOS
+AEOQ
+ACIG
+ACIE
+ACIC
+ACID
+ACIB
+ACII
+ACIN
+ACIM
+ACIJ
+ACIL
+ACIO
+ACIK
+ACIW
+ACIU
Note: Sample stock is generally held on standard versions only. Standard versions have an order increment requirement of 2500
pieces. Nonstandard versions have an order increment requirement of 10,000 pieces. Contact factory for availability of nonstandard
versions.
______________________________________________________________________________________ 13
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Pin Configurations
TOP VIEW
RST
GND
WDI
1
2
3
4
8
7
6
5
V 1
CC
RST
GND
WDO
1
2
3
6
5
4
V
1
RST
GND
WDO
1
2
3
6
5
4
V
1
CC
CC
RSTIN
MAX6730A
MAX6731A
MAX6732A
MAX6733A
MAX6734A
MAX6735A
WDI
MR
WDI
V
CC
2
WDO
MR
V
2
CC
SOT23-6
SOT23-6
SOT23-8
Typical Operating Circuit
___________________Chip Information
TRANSISTOR COUNT: 1073
+1.8V
PROCESS: BiCMOS
+0.9V
V
CORE
+3.3V
V
(I/O)
V
DD
(MEMORY)
CC
V 2
CC
V 1
CC
RSTIN
RST
WDI
RESET
MAX6734A
MAX6735A
µP
I/O
NMI
WDO
PUSHBUTTON
SWITCH
MR
GND
GND
Selector Guide
VOLTAGE
MONITORS
WATCHDOG
INPUT
WATCHDOG
OUTPUT
PART NUMBER
RST OUTPUT
MANUAL RESET
MAX6730A
MAX6731A
MAX6732A
MAX6733A
MAX6734A
MAX6735A
1
1
2
2
3
3
Open Drain
Push-Pull
√
√
√
√
√
√
√
√
Open Drain
Push-Pull
Open Drain
Push-Pull
—
—
√
Open Drain
Push-Pull
Open Drain
Push-Pull
Open Drain
Push-Pull
√
14 ______________________________________________________________________________________
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, SOT 6L BODY
1
21-0058
G
1
______________________________________________________________________________________ 15
Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
SEE DETAIL "A"
SYMBOL
MIN
0.90
0.00
0.90
0.22
0.08
2.80
2.60
1.50
0.30
MAX
1.45
0.15
1.30
0.38
0.22
3.00
3.00
1.75
0.60
e
b
A
C
L
A1
A2
b
C
D
E
C
C
L
E1
L
E
E1
L
0.25 BSC.
L2
e
PIN 1
I.D. DOT
(SEE NOTE 6)
0.65 BSC.
1.95 REF.
e1
0
0°
8°
e1
D
C
C
L
L2
A2
A
GAUGE PLANE
A1
SEATING PLANE
C
0
L
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF
HEEL OF THE LEAD PARALLEL TO SEATING PLANE C.
DETAIL "A"
3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR.
4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING.
5. COPLANARITY 4 MILS. MAX.
6. PIN 1 I.D. DOT IS 0.3 MM Ø MIN. LOCATED ABOVE PIN 1.
PROPRIETARYINFORMATION
TITLE:
7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD
BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP.
PACKAGE OUTLINE, SOT-23, 8L BODY
8. MEETS JEDEC MO178 VARIATION BA.
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0078
E
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2006 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
Heaney
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