MAX6817 [MAXIM]
【15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers; ± 15kV ESD保护，单/双/八通道， CMOS开关去抖
| 型号： | MAX6817 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 【15kV ESD-Protected, Single/Dual/Octal, CMOS Switch Debouncers |
| 文件： | 总12页 (文件大小：190K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-4770; Rev 1; 1/99
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
7/MAX618
Ge n e ra l De s c rip t io n
Fe a t u re s
The MAX6816/MAX6817/MAX6818 are single, dual, and
octal switch debouncers that provide clean interfacing
of mechanical switches to digital systems. They accept
one or more bouncing inputs from a mechanical switch
and produce a clean digital output after a short, preset
qualification delay. Both the switch opening bounce
and the switch closing bounce are removed. Robust
switch inputs handle ±25V levels and are ±15kV ESD-
protected for use in harsh industrial environments. They
feature single-supply operation from +2.7V to +5.5V.
Undervoltage lockout circuitry ensures the output is in
the correct state upon power-up.
♦ Robust Inputs can Exceed Power Supplies
up to ±25V
♦ ESD Protection for Input Pins
±15kV—Human Body Model
±8kV—IEC 1000-4-2, Contact Discharge
±15kV—IEC 1000-4-2, Air-Gap Discharge
♦ Small SOT Packages (4 and 6 pins)
♦ Single-Supply Operation from +2.7V to +5.5V
♦ Single (MAX6816), Dual (MAX6817), and Octal
(MAX6818) Versions Available
The single MAX6816 and dual MAX6817 are offered in
SOT packages and require no external components.
Their low supply current makes them ideal for use in
portable equipment.
♦ No External Components Required
♦ 6µA Supply Current
♦ Three-State Outputs for Directly Interfacing
The MAX6818 octal switch debouncer is designed for
data-bus interfacing. The MAX6818 monitors switches
and provides a switch change-of-state output (CH),
simplifying microprocessor (µP) polling and interrupts.
Additionally, the MAX6818 has three-state outputs con-
trolled by an enable (EN) pin, and is pin-compatible
with the ‘LS573 octal latch (except for the CH pin),
allowing easy interfacing to a digital data bus.
Switches to µP Data Bus (MAX6818)
♦ Switch Change-of-State Output Simplifies
Polling and Interrupts (MAX6818)
♦ Pin-Compatible with ’LS573 (MAX6818)
Ord e rin g In fo rm a t io n
PIN-
SOT
Ap p lic a t io n s
PART
TEMP. RANGE
PACKAGE TOP MARK
µP Switch Interfacing
Industrial Instruments
PC-Based Instruments
Portable Instruments
Automotive Applications
Membrane Keypads
MAX6816EUS-T -40°C to +85°C 4 SOT143
MAX6817EUT-T -40°C to +85°C 6 SOT23-6
KABA
AAAU
—
MAX6818EAP
-40°C to +85°C 20 SSOP
Note: There is a minimum order increment of 2500 pieces for
SOT packages.
P in Co n fig u ra t io n s
Typ ic a l Op e ra t in g Circ u it
TOP VIEW
V
CC
V
CC
4
GND
1
MAX6816
MAX6816
µP
MECHANICAL
SWITCH
0.1µF
IN
3
OUT
2
IN
OUT
RESET
DEBOUNCED
OUTPUT
GND
SOT143
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
ABSOLUTE MAXIMUM RATINGS
Voltage (with respect to GND)
Continuous Power Dissipation (T = +70°C)
A
V
.......................................................................-0.3V to +6V
4-Pin SOT143 (derate 4.0mW/°C above +70°C)..........320mW
6-Pin SOT23 (derate 8.7mW/°C above +70°C)............691mW
20-Pin SSOP (derate 8.0mW/°C above +70°C) ...........640mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
CC
IN_ (Switch Inputs) ..............................................-30V to +30V
EN.........................................................................-0.3V to +6V
OUT_, CH ...............................................-0.3V to (V + 0.3V)
OUT Short-Circuit Duration
CC
(One or Two Outputs to GND)....................................Continuous
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = +2.7V to +5.5V, T = -40°C to +85°C, unless otherwise noted. Typical values are at V = +5V, T = +25°C.) (Note 1)
CC
A
CC
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
Operating Voltage Range
Supply Current
V
2.7
5.5
20
V
CC
I
CC
V
CC
= 5V, I
= 0, IN_ = V
CC
6
µA
OUT
MAX6818
MAX6816/MAX6817
20
20
40
50
60
Debounce Duration
t
ms
V
DP
80
V
0.8
IL
Input Threshold
V
= 5V
2.4
2.0
CC
V
IH
V
V
CC
= 2.7V
Input Hysteresis
300
63
mV
kΩ
mA
V
Input Pull-Up Resistance
IN Input Current
32
100
±1
I
V = ±15V
IN
IN
7/MAX618
Input Voltage Range
Undervoltage-Lockout Threshold
V
-25
25
IN
1.9
2.6
0.4
V
V
OL
I
= 1.6mA
SINK
V
ns
V
OUT_, CH Output Voltage
EN Pulse Width
V
OH
I
= 0.4mA
V
- 1.0
SOURCE
CC
t
200
EN
V
CC
= 5V
0.8
0.8
1.7
1.1
2.4
2.0
±1
EN Threshold
V
CC
= 2.7V
I
µA
ns
EN Input Current
IL
EN Low to Out Active
Propagation Delay
t
R
R
R
= 10kΩ, C = 100pF
100
100
PE
PD
PC
L
L
L
L
EN High to Out Three-State
Propagation Delay
t
t
= 1kΩ, C = 15pF
ns
L
EN Low to CH Out High
Propagation Delay
= 10kΩ, C = 50pF
100
±10
ns
L
V
OUT
= 0 or V
µA
OUT_ Three-State Leakage Current
CC
ESD CHARACTERISTICS
IEC1000-4-2 Air Discharge
±15
±8
ESD Protection
IN_
IEC1000-4-2 Contact Discharge
Human Body Model
kV
±15
Note 1: MAX6816 and MAX6817 production testing is done at T = +25°C; over-temperature limits are guaranteed by design.
A
2
_______________________________________________________________________________________
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
7/MAX618
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(T = +25°C, unless otherwise noted.)
A
DEBOUNCE OF CLOSING SWITCH
DEBOUNCE OF OPENING SWITCH
SUPPLY CURRENT vs. TEMPERATURE
7
6
5
4
3
2
1
0
V
= 5V
CC
5V
5V
-5V
4V
-5V
4V
V
CC
= 3V
0
0
V
CC
= 5V
V
CC
= 5V
10ms/div
10ms/div
-50
-25
0
25
50
75
100
TEMPERATURE (°C)
MAX6818 EN INPUT LOGIC THRESHOLD
vs. SUPPLY VOLTAGE
OUTPUT LOGIC LEVEL
vs. SUPPLY VOLTAGE
5
4
3
2
1
0
6
5
4
3
2
1
V
, I
= 0.4mA
OH SOURCE
V , I
OL SINK
= 1.6mA
0
2
2
3
4
5
6
3
4
5
6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
V
CC
UNDERVOLTAGE LOCKOUT
vs. TEMPERATURE
DEBOUNCE DELAY PERIOD
vs. TEMPERATURE
5
4
3
2
1
0
50
45
40
35
30
V
= 3V
= 5V
CC
V
CC
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
3
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
P in De s c rip t io n
PIN
NAME
FUNCTION
MAX6816
MAX6817
MAX6818
1
2
2
—
1, 3
—
—
4, 6
—
5
10
—
GND
IN
Ground
Switch Input
—
—
3
—
IN1, IN2
IN1–IN8
OUT
Switch Inputs
Switch Inputs
CMOS Debounced Output
2–9
—
—
—
4
—
OUT2, OUT1
OUT8–OUT1
CMOS Debounced Outputs
CMOS Debounced Outputs
+2.7V to +5.5V Supply Voltage
12–19
20
V
CC
Active-Low, Three-State Enable Input for outputs. Resets CH.
Tie to GND to “always enable” outputs.
—
—
—
—
1
EN
CH
Change-of-State Output. Goes low on switch input change of
state. Resets on EN. Leave unconnected if not used.
11
D
Q
OUT
V
CC
V
CC
D
Q
LOAD
COUNTER
V
CC
OSC.
R
7/MAX618
R
PU
UNDER-
VOLTAGE
LOCKOUT
IN
MAX6816
MAX6817
MAX6818
ESD
PROTECTION
Figure 1. Block Diagram
input does not equal the output, the XNOR gate issues
a counter reset. When the switch input state is stable
for the full qualification period, the counter clocks the
flip-flop, updating the output. Figure 2 shows the typical
opening and closing switch debounce operation. On
the MAX6818, the c ha ng e outp ut (CH) is up d a te d
simultaneously with the switch outputs.
_______________De t a ile d De s c rip t io n
Th e o ry o f Op e ra t io n
The MAX6816/MAX6817/MAX6818 a re d e s ig ne d to
eliminate the extraneous level changes that result from
interfacing with mechanical switches (switch bounce).
Virtually all mechanical switches bounce upon opening
or closing. These switch debouncers remove bounce
whe n a s witc h op e ns or c los e s b y re q uiring tha t
sequentially clocked inputs remain in the same state for
a number of sampling periods. The output does not
change until the input is stable for a duration of 40ms.
Un d e rvo lt a g e Lo c k o u t
The undervoltage lockout circuitry ensures that the out-
puts are at the correct state on power-up. While the sup-
p ly volta g e is b e low the und e rvolta g e thre s hold
(typically 1.9V), the debounce circuitry remains trans-
parent. Switch states are present at the logic outputs
without delay.
The circuit block diagram (Figure 1) shows the func-
tiona l b loc ks c ons is ting of a n on-c hip os c illa tor,
counter, exclusive-NOR gate, and D flip-flop. When the
4
_______________________________________________________________________________________
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
7/MAX618
t
DP
EN
t
EN
IN1
1
V
1
V
/2 CC
/2 CC
t
PE
t
OUT1–OUT8
PD
OUT NORMALLY
LOW
OUT1
1
V
/2 CC
V
OL
+ 0.5V
- 0.5V
t
PE
OUT NORMALLY
HIGH
1
V
V
/2 CC
OH
OUT1–OUT8
CH
IN2
t
PD
t
PC
1
V
/2 CC
OUT2
Figure 4. MAX6818 µP-Interface Timing Diagram
CH
+V
CC
MAX6818 ONLY
+V
CC
0.1µF
Figure 2. Input Characteristics
SW1
EN
CH
I/O
IN1
IN8
µP
IRQ
20V
MAX6818
IN
0
(20V/div)
-20V
OUT1
OUT8
D0
D7
SW8
4V
OUT
(2V/div)
0
Figure 5. MAX6818 Typical µP Interfacing Circuit
20ms/div
approximately 0.5mA (up to 4mA for eight inputs) from
the V supply. Driving an input to +25V will cause
CC
Figure 3. Switch Input ±25V Fault Tolerance
approximately 0.32mA of current (up to 2.6mA for eight
inputs) to flow back into the V supply. If the total sys-
CC
Ro b u s t S w it c h In p u t s
tem V supply current is less than the current flowing
CC
The switch inputs on the MAX6816/MAX6817/MAX6818
have overvoltage clamping diodes to protect against
d a ma g ing fa ult c ond itions . Switc h inp ut volta g e s
can safely swing ±25V to ground (Figure 3). Proprietary
ESD-p rote c tion s truc ture s p rote c t a g a ins t hig h
ESD encountered in harsh industrial environments,
me mb ra ne ke yp a d s , a nd p orta b le a p p lic a tions .
The y a re d e s ig ne d to withs ta nd ± 15kV p e r the
IEC1000-4-2 Air Gap Discharge Test and ±8kV per the
IEC1000-4-2 Contact Discharge Test.
back into the V
supply, V
will rise above normal
CC
CC
levels. In some low-current systems, a zener diode on
may be required.
V
CC
±1 5 k V ES D P ro t e c t io n
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against electro-
static discharges encountered during handling and
a s s e mb ly. The MAX6816/MAX6817/MAX6818 ha ve
extra protection against static electricity. Maxim's engi-
neers have developed state-of-the-art structures to pro-
tect against ESD of ±15kV at the switch inputs without
Since there are 63kΩ (typical) pull-up resistors con-
nected to each input, driving an input to -25V will draw
_______________________________________________________________________________________
5
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
R 1M
C
R 1500Ω
D
R 50M to 100M
C
R 330Ω
D
DISCHARGE
RESISTANCE
CHARGE-CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
CHARGE CURRENT
LIMIT RESISTOR
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
C
100pF
STORAGE
CAPACITOR
s
C
s
150pF
STORAGE
CAPACITOR
SOURCE
SOURCE
Figure 6a. Human Body ESD Test Model
Figure 7a. IEC1000-4-2 ESD Test Model
I
I 100%
P
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
r
100%
90%
AMPERES
36.8%
10%
0
TIME
0
t
RL
7/MAX618
t
DL
CURRENT WAVEFORM
10%
Figure 6b. Human Body Current Waveform
t
t = 0.7ns to 1ns
r
30ns
damage. The ESD structures withstand high ESD in all
s ta te s : norma l op e ra tion, s hutd own, a nd p owe re d
down. After an ESD event, the MAX6816/MAX6817/
MAX6818 keep working without latchup, whereas other
s olutions c a n la tc h a nd mus t b e p owe re d d own to
remove latchup.
60ns
Figure 7b. IEC1000-4-2 ESD Generator Current Waveform
Human Body Model
Figure 6a shows the Human Body Model and Figure 6b
shows the current waveform it generates when dis -
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
e s t, whic h is the n d is c ha rg e d into the te s t d e vic e
through a 1.5kΩ resistor.
ESD protection can be tested in various ways; these
products are characterized for protection to the follow-
ing limits:
1) ±15kV using the Human Body Model
2) ±8kV using the Contact-Discharge method specified
in IEC1000-4-2
3) ±15kV using IEC1000-4-2’s Air-Gap method.
IEC1000-4-2
The IEC1000-4-2 standard covers ESD testing and per-
formance of finished equipment; it does not specifically
re fe r to inte g ra te d c irc uits . The MAX6816/
MAX6817/MAX6818 help you design equipment that
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
6
_______________________________________________________________________________________
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
7/MAX618
meets Level 4 (the highest level) of IEC1000-4-2, with-
out the need for additional ESD-protection compo-
nents.
Machine Model
The Ma c hine Mod e l for ESD te s ts a ll p ins us ing a
200pF storage capacitor and zero discharge resis-
tance. Its objective is to emulate the stress caused by
contact that occurs with handling and assembly during
manufacturing.
The major difference between tests done using the
Human Body Model and IEC1000-4-2 is higher peak
current in IEC1000-4-2, because series resistance is
lower in the IEC1000-4-2 model. Hence, the ESD with-
stand voltage measured to IEC1000-4-2 is generally
lowe r tha n tha t me a s ure d us ing the Huma n Bod y
Model. Figure 7a shows the IEC1000-4-2 model and
Figure 7b shows the current waveform for the 8kV,
IEC1000-4-2, Level 4, ESD Contact-Discharge test.
MAX6 8 1 8 µP In t e rfa c in g
The MAX6818 has an output enable (EN) input that
allows switch outputs to be three-stated on the µP data
bus until polled by the µP. Also, state changes at the
switch inputs are detected, and an output (CH) goes low
after the debounce period to signal the µP. Figure 4
shows the timing diagram for enabling outputs and read-
ing data. If the output enable is not used, tie EN to GND
to “always enable’’ the switch outputs. If EN is low, CH is
always high. If a change of state is not required, leave
CH unconnected.
The Air-Gap test involves approaching the device with
a c ha rg e d p rob e . The Conta c t-Dis c ha rg e me thod
connects the probe to the device before the probe is
energized.
P in Co n fig u ra t io n s (c o n t in u e d )
TOP VIEW
EN
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
1
2
3
4
5
6
7
8
9
20 V
CC
19 OUT1
18 OUT2
17 OUT3
16 OUT4
15 OUT5
14 OUT6
13 OUT7
12 OUT8
11 CH
IN1
GND
IN2
1
2
3
6
5
4
OUT1
MAX6818
MAX6817
V
CC
OUT2
SOT23-6
GND 10
SSOP
___________________Ch ip In fo rm a t io n
MAX6816 TRANSISTOR COUNT: 284
MAX6817 TRANSISTOR COUNT: 497
MAX6818 TRANSISTOR COUNT: 2130
SUBSTRATE CONNECTED TO GND
_______________________________________________________________________________________
7
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
P a c k a g e In fo rm a t io n
7/MAX618
8
_______________________________________________________________________________________
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
7/MAX618
P a c k a g e In fo rm a t io n (c o n t in u e d )
_______________________________________________________________________________________
9
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
P a c k a g e In fo rm a t io n (c o n t in u e d )
7/MAX618
10 ______________________________________________________________________________________
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
7/MAX618
NOTES
______________________________________________________________________________________ 11
±1 5 k V ES D-P ro t e c t e d , S in g le /Du a l/Oc t a l,
CMOS S w it c h De b o u n c e rs
NOTES
7/MAX618
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 4 0 8 -7 3 7 -7 6 0 0
© 1999 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
相关型号：
©2020 ICPDF网 联系我们和版权申明