MAX6896PALT+ [MAXIM]
Power Supply Support Circuit, Adjustable, 1 Channel, BICMOS, PDSO6, 1 X 1.50 MM, ROHS COMPLIANT, UDFN-6;
| 型号： | MAX6896PALT+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Power Supply Support Circuit, Adjustable, 1 Channel, BICMOS, PDSO6, 1 X 1.50 MM, ROHS COMPLIANT, UDFN-6 监控 |
| 文件： | 总15页 (文件大小：535K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-3673; Rev 6; 11/09
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
General Description
Features
♦ 1.8% Accurate Adjustable Threshold Over
The MAX6895–MAX6899 is a family of small, low-power,
voltage-monitoring circuits with sequencing capability.
These miniature devices offer tremendous flexibility with
an adjustable threshold capable of monitoring down to
0.5V and an external capacitor-adjustable time delay.
These devices are ideal for use in power-supply
sequencing, reset sequencing, and power-switching
applications. Multiple devices can be cascaded for
complex sequencing applications.
Temperature
♦ Operate from V
of 1.5V to 5.5V
CC
♦ Capacitor-Adjustable Delay
♦ Active-High/-Low Enable Input Options
♦ Active-High/-Low Output Options
♦ Open-Drain (28V Tolerant)/Push-Pull Output
Options
♦ Low Supply Current (10µA, typ)
♦ Fully Specified from -40°C to +125°C
A high-impedance input with a 0.5V threshold allows an
external resistive divider to set the monitored threshold.
The output asserts (OUT = high or OUT = low) when
the input voltage rises above the 0.5V threshold and the
enable input is asserted (ENABLE = high or ENABLE =
low). When the voltage at the input falls below 0.5V or
when the enable input is deasserted (ENABLE = low or
ENABLE = high), the output deasserts (OUT = low or
OUT = high). All devices provide a capacitor-program-
mable delay time from when the input rises above 0.5V
to when the output is asserted. The MAX689_A versions
provide the same capacitor-adjustable delay from when
enable is asserted to when the output asserts. The
MAX689_P devices have a 1µs propagation delay from
when enable is asserted to when the output asserts.
♦ Ultra-Small 6-Pin µDFN Package or Thin SOT23
Package
Ordering Information
PART
PIN-PACKAGE
TOP MARK
+AW
MAX6895AALT+
MAX6895AAZT+
MAX6895PALT+T
MAX6895PAZT+
MAX6896AALT+
MAX6896AAZT+
MAX6896PALT+T
MAX6896PAZT+
6 µDFN-6
6 Thin SOT23-6
+AADK
+AX
6 µDFN-6
6 Thin SOT23-6
+AADL
+AY
6 µDFN-6
6 Thin SOT23-6
+AADO
+AZ
The MAX6895A/P offers an active-high enable input
and an active-high push-pull output. The MAX6896A/P
offers an active-low enable input and an active-low
push-pull output. The MAX6897A/P offers an active-
high enable input and an active-high open-drain output.
Finally, the MAX6898A/P offers an active-low enable
input and an active-low open-drain output. The
MAX6899A/P offers an active-low enable with an active-
high push-pull output.
6 µDFN-6
6 Thin SOT23-6
+AADP
Ordering Information continued at end of data sheet.
Note: All devices are specified over the -40°C to +125°C oper-
ating temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
All devices operate from a 1.5V to 5.5V supply voltage
and are fully specified over the -40°C to +125°C operat-
ing temperature range. These devices are available in
ultra-small 6-pin µDFN (1.0mm x 1.5mm) and thin
SOT23 (1.60mm x 2.90mm) packages.
Pin Configurations
TOP VIEW
V
CDELAY
5
OUT
4
CC
6
Applications
MAX6895
MAX6897
MAX6899
Automotive
Computers/Servers
Critical µP Monitoring
Set-Top Boxes
Telecom
Medical Equipment
Intelligent Instruments
Portable Equipment
1
2
3
ENABLE
(ENABLE)
GND
IN
μDFN
Typical Operating Circuit and Selector Guide appear at end
of data sheet.
( ) FOR MAX6899 ONLY.
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
ABSOLUTE MAXIMUM RATINGS
Package Junction-to-Ambient Thermal Resistance (θ ) (Note 1)
V , ENABLE, ENABLE, IN....................................-0.3V to +6V
CC
JA
6-Pin µDFN..................................................................477°C/W
OUT, OUT (push-pull) ................................-0.3V to (V
OUT, OUT (open-drain)..........................................-0.3V to +30V
CDELAY......................................................-0.3V to (V + 0.3V)
+ 0.3V)
CC
6-Pin Thin SOT23 ........................................................110°C/W
Package Junction-to-Case Thermal Resistance (θ ) (Note 1)
JC
CC
6-Pin Thin SOT23 ..........................................................50°C/W
Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Output Current (all pins)................................................... 20mA
Continuous Power Dissipation (T = +70°C)
A
6-Pin µDFN (derate 2.1mW/°C above +70°C)...........167.7mW
6-Pin Thin SOT23 (derate 9.1mW/°C above +70°C) ...727.3mW
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four
layer board. For detailed information on package thermal considerations refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= 1.5V to 5.5V, T = -40°C to +125°C, unless otherwise specified. Typical values are at V
= 3.3V and T = +25°C, unless
CC A
CC
A
otherwise noted.) (Note 2)
PARAMETER
SUPPLY
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Operating Voltage Range
Undervoltage Lockout (Note 3)
V
1.5
5.5
1.35
20
V
V
CC
UVLO
V
V
falling
1.20
CC
CC
V
Supply Current
I
= 3.3V, no load
10
µA
CC
CC
IN
Threshold Voltage
Hysteresis
V
V
V
V
rising, 1.5V < V
falling
< 5.5V
CC
0.491
-15
0.5
5
0.509
+15
V
TH
IN
IN
IN
V
mV
nA
HYST
Input Current (Note 4)
CDELAY
I
= 0V or V
CC
IN
Delay Charge Current
Delay Threshold
I
200
250
1.00
130
300
1.05
500
nA
V
CD
V
CDELAY rising
0.95
TCD
CDELAY Pulldown Resistance
ENABLE/ENABLE
Input Low Voltage
Input High Voltage
Input Leakage Current
R
Ω
CDELAY
V
0.4
V
V
IL
V
1.4
IH
I
ENABLE, ENABLE = V
or GND
-100
+100
nA
LEAK
CC
2
_______________________________________________________________________________________
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
ELECTRICAL CHARACTERISTICS (continued)
(V
= 1.5V to 5.5V, T = -40°C to +125°C, unless otherwise specified. Typical values are at V
= 3.3V and T = +25°C, unless
CC A
CC
A
otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OUT/OUT
V
≥ 1.2V, I
= 90µA,
CC
SINK
0.3
MAX6895/MAX6897/MAX6899 only
Output Low Voltage (Open-Drain
or Push-Pull)
V
V
OL
V
V
≥ 2.25V, I
= 0.5mA
0.3
0.4
CC
CC
SINK
≥ 4.5V, I
= 1mA
SINK
0.8 x
V
V
≥ 2.25V, I
= 500µA
CC
CC
SOURCE
V
CC
Output High Voltage (Push-Pull)
V
V
OH
0.8 x
≥ 4.5V, I
= 800µA
SOURCE
V
CC
Output Open-Drain Leakage
Current
I
Output high impedance, V
= 28V
OUT
1
µA
LKG
TIMING
C
C
= 0µF
40
190
16
2
µs
ms
µs
CDELAY
CDELAY
t
V
V
rising
falling
DELAY
IN
IN
IN to OUT/OUT Propagation
Delay
= 0.047µF
t
DL
Startup Delay (Note 5)
ms
ENABLE/ENABLE Minimum Input
Pulse Width
t
1
µs
ns
ns
PW
ENABLE/ENABLE Glitch
Rejection
100
150
ENABLE/ENABLE to OUT/OUT
Delay
t
From device enabled to device disabled
OFF
From device disabled to device enabled
(P version)
t
t
150
20
ns
µs
PROPP
ENABLE/ENABLE to OUT/OUT
Delay
C
= 0µF
CDELAY
From device disabled
to device enabled
(A version)
PROPA
C
= 0.047µF
190
ms
CDELAY
Note 2: All devices are production tested at T = +25°C. Limits over temperature are guaranteed by design.
A
Note 3: When V falls below the UVLO threshold, the outputs will deassert (OUT goes low, OUT goes high). When V
falls below
CC
CC
1.2V, the out annot be determined.
Note 4: Guaranteed by design.
Note 5: During the initial power-up, V must exceed 1.5V for at least 2ms before the output is guaranteed to be in the correct state.
CC
_______________________________________________________________________________________
3
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
Typical Operating Characteristics
(V
= 3.3V and T = +25°C, unless otherwise noted.)
A
CC
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SUPPLY CURRENT
vs. TEMPERATURE
IN THRESHOLD
vs. TEMPERATURE
15
14
20
18
16
14
12
10
8
0.5010
0.5008
0.5006
0.5004
0.5002
0.5000
0.4998
0.4996
0.4994
0.4992
0.4990
13
12
11
10
9
8
7
6
5
4
3
2
1
0
V
= 5V
CC
V
= 3V
CC
V
= 1.5V
CC
6
4
2
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
(V)
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
V
TEMPERATURE (°C)
TEMPERATURE (°C)
CC
OUT DELAY
vs. C
OUTPUT LOW VOLTAGE
vs. SINK CURRENT
OUTPUT HIGH VOLTAGE
vs. SOURCE CURRENT
CDELAY
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1.5
1.2
0.9
0.6
0.3
0
V
= 5V
CC
V
= 1.5V
CC
V
= 3V
CC
V
= 5V
CC
V
= 3V
CC
V
= 1.5V
CC
0
0
100 200 300 400 500 600 700 800 900 1000
(nF)
0
2
4
6
8
10 12 14 16 18 20
(mA)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
(mA)
C
I
SOURCE
CDELAY
I
SINK
ENABLE TURN-ON/OFF DELAY
(MAX6895A)
MAXIMUM TRANSIENT DURATION
vs. INPUT OVERDRIVE
ENABLE TURN-ON/OFF (MAX6896P)
MAX6895 toc08
MAX6895 toc09
600
500
400
300
200
100
0
V
V
OUT
2V/div
OUT
2V/div
RESET
OCCURS
V
V
ENABLE
2V/div
ENABLE
2V/div
0
10 20 30 40 50 60 70 80 90 100
100ns/div
40ms/div
V
(mV)
OVERDRIVE
4
_______________________________________________________________________________________
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
Pin Description
PIN
MAX6895/
MAX6897
MAX6896/
MAX6898
MAX6899
NAME
ENABLE
ENABLE
FUNCTION
THIN
SOT23
THIN
SOT23
THIN
SOT23
µDFN
µDFN
µDFN
Active-High Logic-Enable Input. Drive ENABLE low to
immediately deassert the output to its false state (OUT = low or
OUT = high) independent of V . With V above V , drive
IN
IN
TH
1
1
—
—
—
—
1
ENABLE high to assert the output to its true state (OUT = high
or OUT = low) after the adjustable delay period (MAX689_A) or
a 150ns propagation delay (MAX689_P).
Active-Low Logic-Enable Input. Drive ENABLE high to
immediately deassert the output to its false state (OUT = low or
OUT = high) independent of V . With V above V , drive
IN
IN
TH
—
—
1
1
1
ENABLE low to assert the output to its true state (OUT = high or
OUT = low) after the adjustable delay period (MAX689_A) or a
150ns propagation delay (MAX689_P).
2
3
2
3
2
3
2
3
2
3
2
3
GND
IN
Ground
High-Impedance Monitor Input. Connect IN to an external
resistive divider to set the desired monitored threshold. The
output changes state when V rises above 0.5V and when V
IN
IN
falls below 0.495V.
Active-High Sequencer/Monitor Output, Push-Pull
(MAX6895/MAX6899) or Open-Drain (MAX6897). OUT is
asserted to its true state (OUT = high) when V is above V
IN
TH
and the enable input is in its true state (ENABLE = high or
4
4
—
—
4
4
OUT
ENABLE = low) for the capacitor-adjusted delay period. OUT is
deasserted to its false state (OUT = low) immediately after V
IN
drops below V - 5mV or the enable input is in its false state
TH
(ENABLE = low or ENABLE = high). The open-drain version
requires an external pullup resistor.
Active-Low Sequencer/Monitor Output, Push-Pull (MAX6896) or
Open-Drain (MAX6898). OUT is asserted to its true state (O UT =
low) when V is above V and the enable input is in its true state
IN
TH
(ENABLE = high or E NABLE = low) after the CDELAY adjusted
timeout period. OUT is deasserted to its false state (O UT = high)
—
—
4
4
—
—
OUT
immediately after V drops below V - 5mV or the enable input
IN
TH
is in its false state (ENABLE = low or E NABLE = high). The open-
drain version requires an external pullup resistor.
Capacitor-Adjustable Delay. Connect an external capacitor
(C
) from CDELAY to GND to set the IN to OUT (and
CDELAY
ENABLE to OUT or ENABLE to OUT for A version devices)
5
6
6
5
5
6
6
5
5
6
6
5
CDELAY
delay period. t = (C
x 4.0 x 106) + 40µs. There is a
DELAY
CDELAY
fixed short delay (40µs, typ) for the output deasserting when V
IN
falls below V
.
TH
Supply Voltage Input. Connect a 1.5V to 5.5V supply to V
to
CC
V
power the device. For noisy systems, bypass with a 0.1µF
ceramic capacitor to GND.
CC
_______________________________________________________________________________________
5
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
Table 1. MAX6895/MAX6897 Output
ENABLE (MAX6895)
ENABLE (MAX6899)
IN
ENABLE
Low
OUT
V
CC
V
V
V
< V
< V
> V
Low
IN
IN
IN
TH
TH
TH
High
Low
IN
Low
Low
LOGIC
0.5V
OUT = V
(MAX6895)
CC
OUT
V
> V
High
IN
TH
OUT = high impedance
(MAX6897)
250nA
Table 2. MAX6896/MAX6898 Output
1.0V
IN
ENABLE
OUT
MAX6895
MAX6899
OUT = V
(MAX6896)
CC
V
< V
Low
IN
TH
OUT = high impedance
(MAX6898)
OUT = V
(MAX6896)
CC
CDELAY
GND
V
V
V
< V
> V
> V
High
Low
IN
IN
IN
TH
TH
TH
OUT = high impedance
(MAX6898)
Low
Figure 1. MAX6895/MAX6899 Functional Diagram
OUT = V
(MAX6896)
CC
High
OUT = high impedance
(MAX6898)
Detailed Description
The MAX6895–MAX6899 is a family of ultra-small, low-
power, sequencing/supervisory circuits. These devices
provide adjustable voltage monitoring for inputs down to
0.5V. They are ideal for use in power-supply sequenc-
ing, reset sequencing, and power-switching applica-
tions. Multiple devices can be cascaded for complex
sequencing applications.
Table 3. MAX6899 Output
IN
ENABLE
Low
OUT
Low
Low
High
Low
V
V
V
V
< V
< V
> V
> V
IN
IN
IN
IN
TH
TH
TH
TH
High
Voltage monitoring is performed through a high-imped-
ance input (IN) with an internally fixed 0.5V threshold.
When the voltage at IN falls below 0.5V or when the
enable input is deasserted (ENABLE = low or ENABLE =
high), the output deasserts (OUT goes low or OUT goes
Low
High
Supply Input (V
CC
)
CC
The device operates with a V
supply voltage from
high). When V rises above 0.5V and the enable input is
IN
1.5V to 5.5V. To maintain a 1.8% accurate threshold,
must be above 1.5V. When V falls below the
asserted (ENABLE = high or ENABLE = low), the output
asserts (OUT goes high or OUT goes low) after a capaci-
tor-programmable time delay.
V
CC
CC
UVLO threshold, the output deasserts. When V
falls
CC
below 1.2V the output state cannot be determined. For
noisy systems, connect a 0.1µF ceramic capacitor from
With V above 0.5V, the enable input can be used to
IN
turn the output on or off. After the enable input is assert-
ed, the output turns on with a capacitor-programmable
delay period (A version) or with a 150ns propagation
delay (P version). Tables 1, 2, and 3 detail the output
state depending on the various input and enable condi-
tions.
V
to GND as close to the device as possible. For the
CC
push-pull active-high output option, a 100kΩ external
pulldown resistor to ground ensures the correct logic
state for V
down to 0.
CC
6
_______________________________________________________________________________________
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
Monitor Input (IN)
Connect the center point of a resistive divider to IN to
monitor external voltages (see R1 and R2 of the Typical
asserts (OUT goes high or OUT goes low). When the
output asserts, C is immediately discharged.
CDELAY
Adjust the delay (t
) from when V rises above
DELAY
IN
Operating Circuit). IN has a rising threshold of V
=
V
TH
(with ENABLE high or ENABLE low) to OUT going
high (OUT going low) according to the equation:
TH
0.5V and a falling threshold of 0.495V (5mV hysteresis).
When V rises above V and ENABLE is high (or
IN
TH
6
t
= C
x 4.0 x 10 + 40µs
DELAY
CDELAY
ENABLE is low) OUT goes high (OUT goes low) after
the programmed t period. When V falls below
where C
to GND.
is the external capacitor from CDELAY
CDELAY
DELAY
IN
0.495V, OUT goes low (OUT goes high) after a 16µs
delay. IN has a maximum input current of 15nA so
large-value resistors are permitted without adding sig-
nificant error to the resistive divider.
For adjustable delay devices (A version), when V
>
IN
0.5V and ENABLE goes from low to high (ENABLE
goes from high to low) the output asserts after a t
DELAY
period. For nonadjustable delay devices (P version)
there is a 1µs propagation delay from when the enable
input is asserted to when the output asserts. Figures 2
through 5 show the timing diagrams for the adjustable
and fixed delay versions, respectively.
Adjustable Delay (CDELAY)
When V rises above V with ENABLE high (ENABLE
IN
TH
low), the internal 250nA current source begins charging
an external capacitor connected from CDELAY to GND.
When the voltage at CDELAY reaches 1V, the output
V
CC
V
UVLO
IN
V
TH
V
TH
t < t
PROPA
ENABLE
OUT
t
t
PROPA
t
PROPA
DELAY
t
t
OFF
DL
Figure 2. MAX6895A/MAX6897A Timing Diagram
_______________________________________________________________________________________
7
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
V
CC
V
UVLO
IN
t < t
PROPA
ENABLE
OUT
t
t
PROPA
t
PROPA
DELAY
t
t
DL
OFF
Figure 3. MAX6896A/MAX6898A Timing Diagram
V
CC
V
UVLO
IN
t > t
PW
ENABLE
OUT
t
DELAY
t
DL
t
OFF
t
t
PROPP
PROPP
Figure 4. MAX6895P/MAX6897P Timing Diagram
8
_______________________________________________________________________________________
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
V
CC
V
UVLO
IN
t > t
PW
ENABLE
OUT
t
DELAY
t
DL
t
OFF
t
t
PROPP
PROPP
Figure 5. MAX6896P/MAX6898P Timing Diagram
V
CC
V
UVLO
IN
V
TH
V
TH
t < t
PROPA
ENABLE
OUT
t
t
PROPA
t
PROPA
DELAY
t
t
OFF
DL
Figure 6. MAX6899A Timing Diagram
_______________________________________________________________________________________
9
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
V
CC
V
UVLO
IN
t > t
PW
ENABLE
OUT
t
DELAY
t
t
OFF
t
t
PROPP
DL
PROPP
Figure 7. MAX6899P Timing Diagram
Enable Input (ENABLE or ENABLE)
The MAX6895/MAX6897 offer an active-high enable
input (ENABLE), while the MAX6896/MAX6898/MAX6899
Applications Information
Input Threshold
The MAX6895–MAX6899 monitor the voltage on IN with
an external resistive divider (see R1 and R2 in the
Typical Operating Circuit). Connect R1 and R2 as close
to IN as possible. R1 and R2 can have very high values
to minimize current consumption due to low IN leakage
currents ( 15nA max). Set R2 to some conveniently
high value (1MΩ, for example) and calculate R1 based
on the desired monitored voltage using the following
formula:
offer an active-low enable input (ENABLE). With V above
IN
V
, drive ENABLE high (ENABLE low) to force OUT high
TH
(OUT low) after the adjustable delay time (A versions). For
P version devices, when V > 0.5V and enable is assert-
IN
ed, the output asserts after typically 150ns.
The enable input has logic-high and logic-low voltage
thresholds of 1.4V and 0.4V, respectively. For both ver-
sions, when V > 0.5V, drive ENABLE low (ENABLE
IN
high) to force OUT low (OUT high) within 150ns typ.
⎡
⎢
⎣
⎤
V
MONITOR
Output (OUT or OUT)
The MAX6895/MAX6899 offer an active-high, push-pull
output (OUT), and the MAX6896 offers an active-low
push-pull output (OUT). The MAX6897 offers an active-
high open-drain output (OUT), and the MAX6898 offers
an active-low open-drain output (OUT).
R1= R2 ×
−1
⎥
⎦
V
IN
where V
IN
is the desired monitored voltage and
is the detector input threshold (0.5V).
MONITOR
V
Push-pull output devices are referenced to V . Open-
CC
drain outputs can be pulled up to 28V.
10 ______________________________________________________________________________________
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
used with a p-channel MOSFET in an overvoltage pro-
tection circuit. Figure 9 shows the MAX6895 in a low-
voltage sequencing application using an n-channel
MOSFET. Figure 10 shows the MAX6895 used in a mul-
tiple-output sequencing application.
Pullup Resistor Values
(MAX6897/MAX6898)
The exact value of the pullup resistors for the open-
drain outputs is not critical, but some consideration
should be made to ensure the proper logic levels when
the device is sinking current. For example, if V
=
CC
Using an n-Channel Device for Sequencing
In higher power applications, using an n-channel device
reduces the loss across the MOSFETs as it offers a
lower drain-to-source on-resistance. However, an n-
2.25V and the pullup voltage is 28V, you would try to
keep the sink current less than 0.5mA as shown in the
Electrical Characteristics table. As a result, the pullup
resistor should be greater than 56kΩ. For a 12V pullup,
the resistor should be larger than 24kΩ. It should be
noted that the ability to sink current is dependent on the
channel MOSFET requires a sufficient V
voltage to
GS
fully enhance it for a low R
. The application in
DS_ON
Figure 9 shows the MAX6895 in a switch sequencing
application using an n-channel MOSFET.
V
supply voltage.
CC
Typical Application Circuits
Figures 8, 9, 10 show typical applications for the
MAX6895–MAX6899. Figure 8 shows the MAX6895
Similarly, if a higher voltage is present in the system, the
open-drain version can be used in the same manner.
1.2V INPUT
5V BUS
3.3V ALWAYS ON
1.2V OUTPUT
N
P
0 TO 28V
MONITORED
3.3V
ENABLE
V
CC
ENABLE
V
CC
R
PULLUP
R1
R1
OUT
OUT
MAX6895
MAX6897
IN
IN
CDELAY
CDELAY
R2
R2
C
CDELAY
GND
GND
Figure 9. Low-Voltage Sequencing Using an n-Channel MOSFET
Figure 8. Overvoltage Protection
______________________________________________________________________________________ 11
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
2.5V
1.2V
3.3V
1.8V
5V BUS
DC-DC
EN
DC-DC
EN
DC-DC
DC-DC
EN
EN
SYSTEM
ENABLE
V
V
CC
ENABLE
IN
V
ENABLE
IN
V
ENABLE
IN
CC
ENABLE
IN
CC
CC
MAX6895
MAX6895
MAX6895
MAX6895
OUT
OUT
OUT
OUT
GND
GND
GND
GND
C
C
C
C
CDELAY
CDELAY
CDELAY
CDELAY
Figure 10. Multiple-Output Sequencing
12 ______________________________________________________________________________________
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
Selector Guide
PART
ENABLE INPUT
OUTPUT
INPUT (IN) DELAY
ENABLE DELAY
MAX6895AALT+T
Active-High
Active-High, Push-Pull
Capacitor Adjustable
Capacitor Adjustable
MAX6895AAZT+T
MAX6895PALT+T
MAX6895PAZT+T
MAX6896AALT+T
MAX6896AAZT+T
MAX6896PALT+T
MAX6896PAZT+T
MAX6897AALT+T
MAX6897AAZT+T
MAX6897PALT+T
MAX6897PAZT+T
MAX6898AALT+T
MAX6898AAZT+T
MAX6898PALT+T
MAX6898PAZT+T
MAX6899AALT+T
MAX6899AAZT+T
MAX6899PALT+T
MAX6899PAZT+T
Active-High
Active-High
Active-High
Active-Low
Active-Low
Active-Low
Active-Low
Active-High
Active-High
Active-High
Active-High
Active-Low
Active-Low
Active-Low
Active-Low
Active-Low
Active-Low
Active-Low
Active-Low
Active-High, Push-Pull
Active-High, Push-Pull
Active-High, Push-Pull
Active-Low, Push-Pull
Active-Low, Push-Pull
Active-Low, Push-Pull
Active-Low, Push-Pull
Active-High, Open-Drain
Active-High, Open-Drain
Active-High, Open-Drain
Active-High, Open-Drain
Active-Low, Open-Drain
Active-Low, Open-Drain
Active-Low, Open-Drain
Active-Low, Open-Drain
Active-High, Push-Pull
Active-High, Push-Pull
Active-High, Push-Pull
Active-High, Push-Pull
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
Capacitor Adjustable
150ns Delay
150ns Delay
Capacitor Adjustable
Capacitor Adjustable
150ns Delay
150ns Delay
Capacitor Adjustable
Capacitor Adjustable
150ns Delay
150ns Delay
Capacitor Adjustable
Capacitor Adjustable
150ns Delay
150ns Delay
Capacitor Adjustable
Capacitor Adjustable
150ns Delay
150ns Delay
Typical Operating Circuit
Ordering Information (continued)
PART
PIN-PACKAGE
TOP MARK
+BA
1.5V TO 5.5V
MAX6897AALT+
MAX6897AAZT+
MAX6897PALT+T
MAX6897PAZT+
MAX6898AALT+
MAX6898AAZT+
MAX6898PALT+T
MAX6898PAZT+
MAX6899AALT+
MAX6899AAZT+
MAX6899PALT+T
MAX6899PAZT+
6 µDFN-6
6 Thin SOT23-6
+AADQ
+BB
0.1μF
ENABLE
V
CC
6 µDFN-6
6 Thin SOT23-6
+AADR
+BD
R1
OUT
6 µDFN-6
6 Thin SOT23-6
+AADS
+BC
MAX6895
6 µDFN-6
IN
6 Thin SOT23-6
+AADT
+LO
6 µDFN-6
CDELAY
6 Thin SOT23-6
+AADM
+LP
R2
C
6 µDFN-6
CDELAY
GND
6 Thin SOT23-6
+AADN
Note: All devices are specified over the -40°C to +125°C oper-
ating temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
______________________________________________________________________________________ 13
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
Pin Configurations (continued)
TOP VIEW
TOP VIEW
V
CDELAY
5
OUT
4
CC
+
6
ENABLE
1
2
3
6
5
4
CDELAY
GND
IN
V
CC
MAX6895
MAX6897
MAX6896
MAX6898
OUT
1
2
3
THIN SOT23
ENABLE
GND
IN
μDFN
TOP VIEW
+
ENABLE
1
2
3
6
5
4
CDELAY
GND
IN
V
CC
MAX6896
MAX6898
MAX6899
OUT
(OUT)
THIN SOT23
( ) FOR MAX6899 ONLY.
Package Information
Chip Information
For the latest package outline information, go to
PROCESS: BiCMOS
www.maxim-ic.com/package.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
21-0147
6 µDFN
L611-1
Z6-1
6 Thin SOT23
21-0114
14 ______________________________________________________________________________________
Ultra-Small, Adjustable
Sequencing/Supervisory Circuits
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
DESCRIPTION
CHANGED
10/07
—
1, 13, 18
5
6
Corrected Absolute Maximum Ratings and made style corrections to Electrical
Characteristics and TOC8 and TOC9
11/09
2–5
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2009 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
相关型号：
MAX6896PALT-T
Power Supply Support Circuit, Adjustable, 1 Channel, BICMOS, PDSO6, 1.50 X 1 MM, 0.80 MM HEIGHT, MICRO, DFN-6
MAXIM
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