MAX71637ECD+_技术文档

EVALUATION KIT AVAILABLE

MAX71617/MAX71637

Energy Measurement SoCs

● ARM Cortex-M3 Features

General Description

• 1MB Flash

The MAX71617 is a low-power, single-phase energy mea-

surement system-on-chip (SoC), and the MAX71637 is a

low-power polyphase energy measurement SoC. Based

on an ARM Cortex®-M3 core, the devices can run modern

operating systems that monitor and report energy usage

and implement communications stacks. In addition to the

main administrative core, the devices include a MAXQ30

CPU core to perform metering functions and a discrete

compute engine for the DSP related tasks necessary for

accurate energy monitoring and measurement, last cycle

analysis, and FFT functions to compute the frequency

spectra of the selected channel.

• 64KB Code RAM

• 64KB System RAM

• Six UART Channels

• Seven Timer Channels

2

• I C Master/Slave Peripheral

• Three SPI Peripherals

• Smart Card Interface

● MAXQ30 Features

• 64KB Program RAM

• 8KB Data RAM

• 16KB Page RAM

The DSP core provides the following energy and power

measurement features in registers:

• Four Meter Pulse Outputs (Configurable)

2

• Two I C Master/Slave Peripherals

• SPI Master/Slave Peripheral

• 50-Segment,ꢀ6-CommonꢀLCDꢀInterface

●

Activeꢀenergyꢀandꢀpowerꢀperꢀphaseꢀandꢀsum

Apparentꢀenergyꢀandꢀpowerꢀperꢀphaseꢀandꢀsum

Reactiveꢀenergyꢀandꢀpowerꢀperꢀphaseꢀandꢀsum

LineꢀvoltageꢀandꢀcurrentꢀRMS

● Security Features Reduce or Eliminate Common

Security Threats

• Built-In Cryptographic Modules Ensure

Communications Are Kept Secure

• Tamper Detect Inputs Ensure Attempts to Breach

the Case Are Recorded and Reported

• Two Independent Cores Ensures Compliance with

All Current and Future Security Requirements

NeutralꢀcurrentꢀRMS

Currentꢀvectorꢀsum,ꢀthree-phaseꢀplusꢀneutral

Lineꢀfrequency

Fundamentalꢀfrequency

Totalꢀharmonicsꢀofꢀactiveꢀpower,ꢀreactiveꢀpower,ꢀvolt-

age, and currents

● Analog Front-End

• Sevenꢀ(MAX71637)ꢀorꢀFourꢀ(MAX71617)ꢀ24-BitꢀΣΔ

A/D Converters

●

Securityꢀfeatures

• Three (MAX71637) or Two (MAX71617) Voltage

Inputs

• Four (MAX71637) or Three (MAX71617)

Differential Current Inputs

Features and Beneﬁts

● Multicore Design: ARM Cortex-M3 Application Core

Operating at Up to 108MHz, Plus MAXQ30 32-Bit

Core with Single-Cycle Hardware Multiply Operating

at 36MHz, Plus a Compute Engine for DSP

Functions

Applications

● Smart and Secure Single-Phase Energy Meters

● Smart and Secure Polyphase Energy Meters

● Watt-Hour Accuracy of 0.1% at Up to 5,000:1

●

MID/WELMEC-CompliantꢀMeters

Dynamic Range

●

SampleꢀFrequencyꢀConfigurable;ꢀΣΔꢀSampleꢀRateꢀ

Configurable Up to 9.83MHz

Ordering Information appears at end of data sheet.

● Flexible Analog Input Configuration Support Current

Transformers, Shunts, or Rogowski Coils

● 2.7V to 3.6V Operating Voltage

For related parts and recommended products to use with this part, refer

to www.maximintegrated.com/MAX71617.related.

●

Single 32.768kHz Crystal Provides All Operating Clocks

Cortex is a registered trademark of ARM Ltd.

19-7306; Rev 0; 3/14

MAX71617/MAX71637

Energy Measurement SoCs

Absolute Maximum Ratings

(VoltageꢀonꢀallꢀpinsꢀwithꢀrespectꢀtoꢀGND.)

XIN,ꢀXOUT............................................................-0.5V to +3.0V

RGNDꢀandꢀAGND.................................................-0.2V to +0.2V

SEG and SEGDIO, Configured as Digital Inputs......-0.3V to +3.6V

V

.......................................................................-0.5V to +3.6V

Digital Pins, Configured as Inputs.......................... -0.5V to V

DD

AVDD....................................................................-0.5V to +3.6V

RVDD ...................................................................-0.5V to +3.6V

ESD Stress on All Pins.............................................. ±2kV, HBM

Operating Temperature Range......................... -40°C to +85°C

Storage Temperature Range........................... -65°C to +150°C

V

, V

..........................................................-0.5V to +3.8V

BAT RTC

ADC0–ADC10 ...................................... -0.5V to (V

+ 0.5V)

AVDD

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these

or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect

device reliability.

(Note 1)

Package Thermal Characteristics

LQFP

Junction-to-AmbientꢀThermalꢀResistanceꢀ(θ ) ..........45°C/W

Junction-to-CaseꢀThermalꢀResistanceꢀ(θ )...............16°C/W

JC

JA

Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer

board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.

Electrical Characteristics

(Limitsꢀareꢀ100%ꢀproductionꢀtestedꢀatꢀT ꢀ=ꢀ+22°C.ꢀLimitsꢀoverꢀtheꢀoperatingꢀtemperatureꢀrangeꢀandꢀrelevantꢀsupplyꢀvoltageꢀrangeꢀ

A

are guaranteed by design and characterization. Typical values are not guaranteed. V

= V

= V = 3.0V to 3.6V, T = -40°C to

AVDD IO A

DD

+85°C, unless otherwise specified.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

POWER

Digital Supply Voltage

V

3.6

3.8

V

DD

RST

Analog Supply Voltage

V

2.7

2.0

AVDD

Supply Voltage, Remote Interfaces

Supply Voltage, Backup Battery

Supply Voltage, RTC Battery

V

RVDD

V

BAT

V

RTC

1.95

±0.05

Reset Threshold

V

RST

2.07

±0.05

Power Fail Warning Threshold

V

PFW

I

(Noteꢀ2)

(Noteꢀ3)

(Noteꢀ2)

(Noteꢀ3)

55

24

19

3

mA

µA

DD1

DD2

DD1

DD2

Supply Current, Digital

Supply Current, Analog

Stop Mode Current, Digital

Stop Mode Current, Analog

Dynamic Current

I

V

= V

= 3.3V

STOP

DD

AVDD

210

0.98

±25

7

DD

AVDD

(Noteꢀ4)ꢀ

mA/MHz

nA

MSNꢀmodeꢀ(Noteꢀ5)

BRNꢀmodeꢀ(Noteꢀ6)

mA

µA

V

Current

I

BAT

RTC

VBAT

LCD_ONLYꢀmodeꢀ(Noteꢀ7)ꢀ

6

SLPꢀmode,ꢀV

= 3.3V, V

= 0V

2

µA

BAT

RTC

MSNꢀmodeꢀ(Noteꢀ5)

SLPꢀmode,ꢀV = 0V, V

±25

1.6

nA

V

I

VRTC

= 3.3V

RTC

µA

BAT

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MAX71617/MAX71637

Energy Measurement SoCs

Electrical Characteristics (continued)

(Limitsꢀareꢀ100%ꢀproductionꢀtestedꢀatꢀT ꢀ=ꢀ+22°C.ꢀLimitsꢀoverꢀtheꢀoperatingꢀtemperatureꢀrangeꢀandꢀrelevantꢀsupplyꢀvoltageꢀrangeꢀ

A

are guaranteed by design and characterization. Typical values are not guaranteed. V

= V

= V = 3.0V to 3.6V, T = -40°C to

AVDD IO A

DD

+85°C, unless otherwise specified.)

PARAMETER

CRYSTAL OSCILLATOR

Oscillator Frequency

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

f

32768

108

Hz

RTC

NominalꢀOperatingꢀFrequency,ꢀ

Application Core

MHz

NominalꢀOperatingꢀFrequency,ꢀ

DSP Core

36

MHz

NominalꢀOperatingꢀFrequency,ꢀ

Compute Engine

T

V

= +25°C, V

= 0V,

A

DD

Frequency Variation with Voltage

±1

ppm

ms

= 2.0V to 3.8V

RTC

Startup Time

900

LOGIC LEVELS

DigitalꢀHighꢀLevel

V

At temp corners

2.0

V

IH

DigitalꢀLowꢀLevel

V

0.8

IL

DigitalꢀHighꢀLevel,ꢀRSTN

DigitalꢀLowꢀLevel,ꢀRSTN

Input Hysteresis, All GPIO Pins

InputꢀLeakage

0.8V

V

IO

0.3V

V

IO

50

mV

µA

V

= V

-1

+1

IN

IO

Input Pullup Current

DigitalꢀHigh-LevelꢀOutputꢀVoltage

DigitalꢀLow-LevelꢀOutputꢀVoltage

LCD

Pullup enabled, V = 0V

-30.0

V - 0.4

IO

-1.5

IN

V

6mA

OH

V

0.4

7

V

OL

V

= 3.3V,

LCD

V

Current

any multiplex mode,

noꢀoutputꢀloading,ꢀLCDꢀpinsꢀopen

µA

LCD

V

REF

NominalꢀReferenceꢀVoltage

V

T

= +22°C

1.195

±1.5

V

REF

A

Variation with Power Supply

V

= 3.0V to 3.6V

mV/V

AVDD

Deviation from Predicted Variation

with Temperature

±40

ppm/°C

ADC

mV

peak

Usable Input Range

Input Impedance

-250

30

+250

50

kΩ

FIR_LENꢀ=ꢀ11,ꢀ5.46kHzꢀsampleꢀrate

FIR_LENꢀ=ꢀ15

92

LSBꢀSize

nV/LSB

118

FIR_LENꢀ=ꢀ11,ꢀ5.46kHzꢀsampleꢀrate

FIR_LENꢀ=ꢀ15

±3375000

±2621440

Digital Full Scale

Input Offset

LSB

-10

+10

mV

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MAX71617/MAX71637

Energy Measurement SoCs

Electrical Characteristics (continued)

(Limitsꢀareꢀ100%ꢀproductionꢀtestedꢀatꢀT ꢀ=ꢀ+22°C.ꢀLimitsꢀoverꢀtheꢀoperatingꢀtemperatureꢀrangeꢀandꢀrelevantꢀsupplyꢀvoltageꢀrangeꢀ

A

are guaranteed by design and characterization. Typical values are not guaranteed. V

= V

= V = 3.0V to 3.6V, T = -40°C to

AVDD IO A

DD

+85°C, unless otherwise specified.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

250mV

-75

THD, Voltage Channel

(Noteꢀ8)

P-P

dB

20mV

-86

-102

-87

P-P

Preamp off, 250mV

-90

P-P

THD, Current Channel

(Noteꢀ8)

Preamp off, 20mV

dB

P-P

Preamp on, 20mV

-84

Current Channel 0 Preamp Gain

Gain Variation with Supply Voltage

8.90

±0.18

V/V

%

Preamp on

Gain Variation with Temperature

-180

-100

+180

+100

ppm/°C

Current Channel Phase Shift

Phase Shift Variation

0.03

m°

All channels, preamp off

ADC0, preamp on

900

100

InputꢀNoise

nV/√Hz

T

= +22°C, guaranteed by design,

A

Crosstalk

-108

-97

dB

not production tested

FLASH MEMORY (Note 9)

t

Mass erase

20

ms

ME

Flash Erase Time

t

Page erase

PE

Flash Programming Time

Endurance

t

Per long word

20

µs

PROG

Numberꢀofꢀwrite/eraseꢀcycles

10,000

10

Cycles

Years

Data Retention

T = +85°C

A

Note 2: Application core operating at 108MHz, metering core operating at 36MHz, instruction cache on, AES operating in 128 bit

mode, one DMA channel actively copying data from application core code RAM to application core system RAM, all timers

active and running (timer 0/1, timer 1/2, timer 2/4, timer 3/8, timer 4/16, timer 5/32, timer 6/64), random number generator

running, application core running from flash and fetching data from flash, MAXQ30 runnning in tight loop, MAXQ30 timer

operatingꢀinꢀtimerꢀmode,ꢀallꢀLCDꢀsegmentsꢀenabledꢀbutꢀnoꢀloadꢀonꢀLCDꢀpins,ꢀallꢀADCꢀchannelsꢀoperating,ꢀRTCꢀwatchdogꢀ

operating, CE running, V

= V

= 3.3V.

DD

AVDD

Note 3: Application core operating at 27MHz, metering core operating at 36MHz, instruction cache on, AES operating in 128 bit

mode, one DMA channel actively copying data from application core code RAM to application core system RAM, all timers

active and running (timer 0/1, timer 1/2, timer 2/4, timer 3/8, timer 4/16, timer 5/32, timer 6/64), random number generator

running, application core running from flash and fetching data from flash, MAXQ30 running in tight loop, MAXQ30 timer

operatingꢀinꢀtimerꢀmode,ꢀallꢀLCDꢀsegmentsꢀenabledꢀbutꢀnoꢀloadꢀonꢀLCDꢀpins,ꢀallꢀADCꢀchannelsꢀoperating,ꢀRTCꢀwatchdogꢀ

operating, CE running, V

= V

= 3.3V.

DD

AVDD

Note 4:

Note 5:

V

= V

= 3.3V, ADC off, application core off, compute engine off, all peripherals off, computed at user core frequen-

DD

AVDD

cies of 108MHz and 13.5MHz.

f

= 108MHz; f

= f

= 36MHz; all peripherals and security engines disabled, all GPIO pins

APPLICATION_CORE

DSP_CORE

CE

configured for output and not externally connected. V

= V

= 3.3V.

DD

AVDD

Note 6:ꢀ Applicationꢀcoreꢀhalted,ꢀmeteringꢀcoreꢀrunningꢀatꢀ36MHzꢀreadingꢀdataꢀfromꢀRAM,ꢀLCDꢀoff,ꢀCEꢀoff,ꢀADCꢀoff,ꢀperipheralsꢀoff,ꢀ

V

= V = 0V, V = V = 3.3V.

DD

AVDD

BAT

RTC

Note 7:ꢀ Allꢀcoreꢀregulatorsꢀoff,ꢀLCDꢀoperatingꢀwithoutꢀload,ꢀV

= 3.3V, V

= 0.0V.

BAT

RTC

Note 8: Computed using a 64k point Fast Fourier Transform, Blackman-Harris window, 65Hz input frequency.

Note 9: must be greater than 1.8V to support flash write/erase operations.

V

DD

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MAX71617/MAX71637

Energy Measurement SoCs

Typical Application Circuit (WYE Connected Load, Current Transformer Sensors)

CURRENT TRANSFORMERS

A

NEUTRAL

B

LOAD

C

NEUTRAL

GND

ADC0

} IA

ADC1

ADC8 (VA)

ADC2

} IB

RESISTOR

DIVIDERS

ADC3

MAX71637

ADC9 (VB)

ADC4

} IC

ADC5

ADC10 (VC)

ADC6

ADC7

} IN*

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MAX71617/MAX71637

Energy Measurement SoCs

Typical Application Circuit (WYE Connected Load, Shunt Sensors)

SHUNT CURRENT SENSORS

C

NEUTRAL

B

LOAD

A

NEUTRAL

3 x 71M6xx3

71M6xx3

GND

ADC0

} IN*

ADC1

RESISTOR-

DIVIDERS

ADC10 (VC)

ADC6

} IC

ADC7

ADC9 (VB)

MAX71637

ADC4

} IB

ADC5

ADC8 (VA)

ADC2

ADC3

} IA

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MAX71617/MAX71637

Energy Measurement SoCs

Pin Conﬁguration

TOP VIEW

99 98 97 96 95 94 93 92 91

+

1

TMPDOUT1

TMPDOUT0

P1.3

90

89

88

87

86

85

84

83

82

81

80

79

78

77

76

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

AMISOS

V_1P2

2

3

V_1P8

P1.4

4

P0.14

P0.13

P0.12

P0.11

P0.10

P0.9

P1.5

5

6

P1.6

7

P1.7

P1.8

8

P1.9

9

P1.10

P1.11

V_IO

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

GND

V_IO

P0.8

GND

P0.7

P1.13

P1.14

P1.15

P1.16

P1.20

P1.19

P1.22

P1.21

GND

P0.6

MAX71617

MAX71637

P0.5

P0.4

P0.3

P0.2

P0.1

P0.0

P1.18

GND

COM2

COM0

COM4

V_LCD

P1.17

COM5

COM3

COM1

P1.12

MGPIO0

MGPIO1

MGPIO2

RSTN

TMPDIN0

TMPDIN1

32KHZIN

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

*FOR MAX71617 ONLY.

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MAX71617/MAX71637

Energy Measurement SoCs

Pin Description

PRIMARY

FUNCTION

SECONDARY

FUNCTION

DESCRIPTION

(MAX71617) (MAX71637)

1

TMPDOUT1

TMPDOUT0

P1.3

Tamper Detect Output 1

2

Tamper Detect Output 0

3

SEG35/ISORST

SEG36/ISoCLK

SEG37/ISOIO

SEG38/MISO1

SEG39/MOSI1

SEG40/SCLK1

SEG41/SSEL1

SEG42/TXD3

SEG43/RXD3

GPIOꢀ1.3/LCDꢀSegmentꢀ35/ISOꢀUARTꢀReset

GPIOꢀ1.4/LCDꢀSegmentꢀ36/ISOꢀUARTꢀClock

GPIOꢀ1.5/LCDꢀSegmentꢀ37/ISOꢀUARTꢀI/O

GPIOꢀ1.6/LCDꢀSegmentꢀ38ꢀSPIꢀPortꢀ1ꢀMISO

GPIOꢀ1.7/LCDꢀSegmentꢀ39/SPIꢀPortꢀ1ꢀMOSI

GPIOꢀ1.8/LCDꢀSegmentꢀ40/SPIꢀPortꢀ1ꢀSCLK

GPIOꢀ1.9/LCDꢀSegmentꢀ41/SPIꢀPortꢀ1ꢀSSEL

GPIOꢀ1.10/LCDꢀSegmentꢀ42/UARTꢀ3ꢀTransmitꢀData

GPIOꢀ1.11/LCDꢀSegmentꢀ43/UARTꢀ3ꢀReceiveꢀData

I/O Power

4

P1.4

5

P1.5

6

P1.6

7

P1.7

8

P1.8

9

10

9

10

P1.9

P1.10

P1.11

11

12, 80, 101

V

IO

13, 22, 55,

69, 81, 93,

102, 115

13, 22, 55,

69, 81, 93,

102, 115

GND

Digital Ground

14

15

16

17

14

15

16

17

P1.13

P1.14

P1.15

P1.16

SEG45

SEG46

SEG47

SEG48

GPIOꢀ1.13/LCDꢀSegmentꢀ45

GPIOꢀ1.14/LCDꢀSegmentꢀ46

GPIOꢀ1.15/LCDꢀSegmentꢀ47

GPIOꢀ1.16/LCDꢀSegmentꢀ48

GPIO 1.20/UART 2 Receive Data/Timer 1 I/O/SPI Port 0

MOSI

18

19

20

21

18

19

20

21

P1.20

P1.19

P1.22

P1.21

RXD2/TCLK1/MOSI0

TXD2/TCLK0/MISO0

RXD1/TCLK3/SSEL0

TXD1/TCLK2/SCLK0

GPIO 1.19/UART 2 Transmit Data/Timer 0 I/O/SPI Port 0

MISO

GPIO 1.22/UART 1 Receive Data/Timer 3 I/O/SPI Port 0

SSEL

GPIO 1.21/UART 1 Transmit Data/Timer 2 I/O/SPI Port 0

SCLK

23

COM2

COM0

COM4

LCDꢀCommonꢀPinꢀ2

LCDꢀCommonꢀPinꢀ0

LCDꢀCommonꢀPinꢀ4

LCDꢀSupply

24

25

26

V

LCD

27

RSTN

TMPDIN0

TMPDIN1

32KHZꢀIN

32KHZ OUT

AGND

Device Reset

28

29

28

29

Tamper Detect Input 0

Tamper Detect Input 1

Crystal In

30

31

Crystal Out

32, 36, 41

Analog Ground

ADC Input 0, Positive Input to Converter 0, typically Phase A

Positive Current Input

33

ADC0

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MAX71617/MAX71637

Energy Measurement SoCs

Pin Description (continued)

PRIMARY

FUNCTION

SECONDARY

FUNCTION

DESCRIPTION

(MAX71617) (MAX71637)

ADCꢀInputꢀ1,ꢀNegativeꢀInputꢀtoꢀConverterꢀ0,ꢀtypicallyꢀPhaseꢀ

AꢀNegativeꢀCurrentꢀInput

34

ADC1

35

37

35

37

V

Reference Voltage

Analog Power

REF

AVDD

ADC Input 8, Single-Ended Input to Converter 4, typically

Phase A Voltage Input

38

39

38

39

—

40

ADC8

ADC Input 9, Single-Ended Input to Converter 5, typically

Phase B Voltage Input

ADC9

N.C.

40, 50–53

—

NoꢀConnection

ADC Input 10, Single-Ended Input to Converter 6, typically

Phase C Voltage Input

ADC10

42

43

42

43

V

RTC Battery Power

RTC

V

Primary Battery Voltage Input

Bypass Point for Internal 3.3V Rail

1.2V Core Voltage Bypass

Digital Power

BAT

44

V

3P3D

45, 89

46

45, 89

46

V

1P2

V

DD

47

RGND

Remote Ground

ADCꢀInputꢀ3,ꢀNegativeꢀInputꢀtoꢀConverterꢀ1,ꢀtypicallyꢀPhaseꢀ

BꢀNegativeꢀCurrentꢀInput;ꢀRemoteꢀInterfaceꢀ0ꢀNegativeꢀ

Input

48

49

—

48

49

50

ADC3

RMT0N

RMT0P

RMT1N

ADC Input 2, Positive Input to Converter 1, typically Phase

B Positive Current Input; Remote Interface 0 Positive Input

ADC2

ADC5

ADCꢀInputꢀ5,ꢀNegativeꢀInputꢀtoꢀConverterꢀ2,ꢀtypicallyꢀPhaseꢀ

CꢀNegativeꢀCurrentꢀInput;ꢀRemoteꢀInterfaceꢀ1ꢀNegativeꢀ

Input

ADC Input 4, Positive Input to Converter 2, typically Phase

C Positive Current Input; Remote Interface 1 Positive Input

—

51

52

53

ADC4

ADC7

ADC6

RMT1P

RMT2N

RMT2P

ADCꢀInputꢀ7,ꢀNegativeꢀInputꢀtoꢀConverterꢀ3,ꢀtypicallyꢀNeutralꢀ

NegativeꢀCurrentꢀInput;ꢀRemoteꢀInterfaceꢀ2ꢀNegativeꢀInput

ADCꢀInputꢀ6,ꢀPositiveꢀInputꢀtoꢀConverterꢀ3,ꢀtypicallyꢀNeutralꢀ

Positive Current Input; Remote Interface 2 Positive Input

54

56

57

58

59

60

61

62

54

56

57

58

59

60

61

62

RVDD

Remote Power

MGPIO7

MGPIO6

MGPIO5

MGPIO4

MGPIO3

MGPIO2

MGPIO1

PULSEV/MP3

PULSEW/MP2

PULSEX/MP1

PULSEY/MP0

MSCL1

MAXQ GPIO Bit 7/CE Pulse V/MAXQ Meter Pulse 3

MAXQ GPIO Bit 6/CE Pulse W/MAXQ Meter Pulse 2

MAXQ GPIO Bit 5/CE Pulse X/MAXQ Meter Pulse 1

MAXQꢀGPIOꢀBitꢀ4/CEꢀPulseꢀY/MAXQꢀMeterꢀPulseꢀ0

2

MAXQ GPIO Bit 3/MAXQ I CꢀSCL1

2

MSDA1

MAXQ GPIO Bit 2/MAXQ I C SDA1

2

MSCL0

MAXQ GPIO Bit 1/MAXQ I CꢀSCL0

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MAX71617/MAX71637

Energy Measurement SoCs

Pin Description (continued)

PRIMARY

FUNCTION

SECONDARY

FUNCTION

DESCRIPTION

(MAX71617) (MAX71637)

2

63

64

65

66

67

63

64

65

66

67

MGPIO0

P1.12

MSDA0

SEG44

MAXQ GPIO Bit 0/MAXQ I C SDA0

GPIOꢀ1.12/LCDꢀSegmentꢀ44

LCDꢀCommonꢀPinꢀ1

COM1

COM3

COM5

LCDꢀCommonꢀPinꢀ3

LCDꢀCommonꢀPinꢀ5

SEG49/TXD0/

SDA ARM

GPIOꢀP1.17/LCDꢀSegmentꢀ49/UARTꢀ0ꢀTransmitꢀData/

Cortex I C SDA

68

70

68

70

P1.17

P1.18

2

RXD0/

SCLꢀARM

2

GPIO P1.18/UART 0 Receive Data/Cortex I CꢀSCL

71

72

73

74

75

76

77

78

79

82

83

84

85

86

87

88

90

91

92

94

71

72

73

74

75

76

77

78

79

82

83

84

85

86

87

88

90

91

92

94

P0.0

P0.1

P0.2

P0.3

P0.4

P0.5

P0.6

P0.7

P0.8

P0.9

P0.10

P0.11

P0.12

P0.13

P0.14

SEG0

SEG1

SEG2

SEG3

SEG4

SEG5

SEG6

SEG7

SEG8

SEG9

SEG10

SEG11

SEG12

SEG13

SEG14

GPIOꢀP0.0/LCDꢀSegmentꢀ0

GPIOꢀP0.1/LCDꢀSegmentꢀ1

GPIOꢀP0.2/LCDꢀSegmentꢀ2

GPIOꢀP0.3/LCDꢀSegmentꢀ3

GPIOꢀP0.4/LCDꢀSegmentꢀ4

GPIOꢀP0.5/LCDꢀSegmentꢀ5

GPIOꢀP0.6/LCDꢀSegmentꢀ6

GPIOꢀP0.7/LCDꢀSegmentꢀ7

GPIOꢀP0.8/LCDꢀSegmentꢀ8

GPIOꢀP0.9/LCDꢀSegmentꢀ9

GPIOꢀP0.10/LCDꢀSegmentꢀ10

GPIOꢀP0.11/LCDꢀSegmentꢀ11

GPIOꢀP0.12/LCDꢀSegmentꢀ12

GPIOꢀP0.13/LCDꢀSegmentꢀ13

GPIOꢀP0.14/LCDꢀSegmentꢀ14

V

1.8V Core Voltage Bypass

1P8

AMISOS

AMOSIS

ASCKS

P0.15/SEG15

P0.16/SEG16

P0.17/SEG17

P0.18/SEG18

ARMꢀSPIꢀSlaveꢀMISO/GPIOꢀP0.15/LCDꢀSegmentꢀ15ꢀ

ARMꢀSPIꢀSlaveꢀMOSI/GPIOꢀP0.16/LCDꢀSegmentꢀ16ꢀ

ARMꢀSPIꢀSlaveꢀSCK/GPIOꢀP0.17/LCDꢀSegmentꢀ17ꢀ

ARMꢀSPIꢀSlave/SSELꢀGPIOꢀP0.18/LCDꢀSegmentꢀ18ꢀ

ASSELSꢀ

SEG19/

MISO MAXQ

95

96

97

98

99

95

96

97

98

99

P0.19

P0.20

P0.21

P0.22

P0.23

GPIOꢀP0.19/LCDꢀSegmentꢀ19/MAXQꢀSPIꢀMISO

GPIOꢀP0.20/LCDꢀSegmentꢀ20/MAXQꢀSPIꢀMOSI

GPIOꢀP0.21/LCDꢀSegmentꢀ21/MAXQꢀSPIꢀClock

GPIOꢀP0.22/LCDꢀSegmentꢀ22/MAXQꢀSPIꢀSelect

SEG20/

MOSI MAXQ

SEG21/

SSCK MAXQ

SEG22/

SSELꢀMAXQ

SEG23/TXD5/

TMUX0

GPIOꢀP0.23/LCDꢀSegmentꢀ23/UARTꢀ5ꢀTransmitꢀData/Testꢀ

Multiplexer Output 0

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MAX71617/MAX71637

Energy Measurement SoCs

Pin Description (continued)

PRIMARY

FUNCTION

SECONDARY

FUNCTION

DESCRIPTION

(MAX71617) (MAX71637)

SEG24/RXD5/

TMUX1

GPIOꢀP0.24/LCDꢀSegmentꢀ24/UARTꢀ5ꢀReceiveꢀData/Testꢀ

Multiplexer Output 1

100

103

100

103

P0.24

P0.25

SEG25/TXD4/

TMUXA

GPIOꢀP0.25/LCDꢀSegmentꢀ25/UARTꢀ4ꢀTransmitꢀData/

Analog Test Multiplexer

104

105

106

107

108

109

104

105

106

107

108

109

P0.26

ATDI

SEG26/RXD4

P0.27/SEG27

P0.28/SEG28

P0.29/SEG29

P0.30/SEG30

P0.31/SEG31

GPIOꢀP0.26/LCDꢀSegmentꢀ26/UARTꢀ4ꢀReceiveꢀData

GPIOꢀP0.27/LCDꢀSegmentꢀ27/ARMꢀCortex-M3ꢀTDI

GPIOꢀP0.28/LCDꢀSegmentꢀ28/ARMꢀCortex-M3ꢀTDO

GPIOꢀP0.29/LCDꢀSegmentꢀ29/ARMꢀCortex-M3ꢀTMS

GPIOꢀP0.30/LCDꢀSegmentꢀ30/ARMꢀCortex-M3ꢀTCK

GPIOꢀP0.31/LCDꢀSegmentꢀ31/ARMꢀCortex-M3ꢀTRST

ATDO

ATMS

ATCK

ATRST

MAXQ GPIO Bit 10/MAXQ Reset

(enabled when MAXQ JTAG active)

110

MRST

MGPIO10

111

112

113

114

116

117

118

119

120

111

112

113

114

116

117

118

119

120

MTDI

MTDO

MTMS

MTCK

P1.0

MGPIO11

MGPIO12

MGPIO13

MGPIO14

SEG32

SEG33

SEG34

TBA

MAXQ JTAG TDI/MAXQ GPIO Bit 11

MAXQ JTAG TDO/MAXQ GPIO Bit 12

MAXQ JTAG TMS/MAXQ GPIO Bit 13

MAXQ JTAG TCK/MAXQ GPIO Bit 14

GPIOꢀ1.0/LCDꢀSegmentꢀ32ꢀ

P1.1

GPIOꢀ1.1/LCDꢀSegmentꢀ33ꢀ

P1.2

GPIOꢀ1.2/LCDꢀSegmentꢀ34ꢀ

MGPIO8

MGPIO9

MAXQ GPIO Bit 8/Timer A Output

MAXQ GPIO Bit 9/Timer B Output

TBB

Pin Description (According to Function)

FUNCTION

POWER

DESCRIPTION

PrimaryꢀDigitalꢀPowerꢀforꢀtheꢀSoC.ꢀThisꢀpinꢀprovidesꢀpowerꢀforꢀtheꢀLCDꢀDACꢀcontrolꢀlogicꢀandꢀtheꢀ

mainꢀclockꢀPLL,ꢀandꢀindirectlyꢀthroughꢀvoltageꢀregulatorsꢀforꢀallꢀlogic,ꢀmemoryꢀandꢀﬂash,ꢀotherꢀthanꢀ

nonvolatile segments.

V

46

37

DD

Primary Analog Power for the SoC. This pin provides power for the ADC channels, the bandgap

voltage reference and voltage comparators.

AVDD

RVDD

54

Power for the Remote Interface Drivers

Power for Output Drivers for All Digital Pins

V

12, 80, 101

IO

Bypass Point for the Internally Selected 3.3V Source. A switch in the SoC selects either V

or

BAT

V

to provide power to internal logic and regulators. Attach an appropriate capacitor to ground to

DD

V

44

3P3D

this point. This pin also typically connects to the V pins to provide nonvolatile power for the digital

IO

I/O section.

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MAX71617/MAX71637

Energy Measurement SoCs

Pin Description (According to Function) (continued)

FUNCTION

DESCRIPTION

Primary Backup Battery Power. An internal switch selects this input to provide power to the digital

logic section and main voltage regulators when V is unavailable.

V

43

BAT

DD

BackupꢀPowerꢀforꢀNonvolatileꢀSection.ꢀThisꢀbatteryꢀisꢀselectedꢀtoꢀprovideꢀpowerꢀtoꢀtheꢀRTC,ꢀLCDꢀ

RAM and the tamper detection subsystem should both V and V fail.

V

42

45, 89

88

RTC

DD

BAT

Bypass Point for the Internal 1.2V Core Regulator. Connect a good quality 0.1µF capacitor to each

of these pins. Do not connect any load to this point.

V

1P2

1P8

Bypass Point for the Internal 1.8V Regulator for the Flash Memory Array. Connect a good quality

0.1µF capacitor to this pin. Do not connect any load to this point.

BypassꢀPointꢀforꢀInternalꢀLCDꢀVoltageꢀ(ifꢀtheꢀInternalꢀLCDꢀDACꢀisꢀSelected).ꢀIfꢀexternalꢀpowerꢀisꢀ

selected,ꢀthisꢀpinꢀisꢀtheꢀinputꢀpointꢀforꢀpowerꢀtoꢀtheꢀLCDꢀwaveformꢀgenerators.ꢀTheꢀvoltageꢀappliedꢀ

V

LCD

26

to this pin should be no greater than V

, and in any event, no greater than 3.6V.

3P3D

13, 22, 55,

69, 81, 93,

102, 115

GND

Digital Ground. Return point for all digital I/O.

AGND

RGND

32, 36, 41

47

Analog Ground. Reference point for all analog inputs.

Remote Ground. Return point for remote drivers.

CLOCK

32KHZ OUT

32KHZꢀIN

ANALOG

31

30

OscillatorꢀOutput.ꢀConnectꢀaꢀ32.768kHzꢀtuningꢀforkꢀcrystalꢀbetweenꢀthisꢀpinꢀandꢀtheꢀ32KHZꢀINꢀpin.

Oscillator Input. Connect a 32.768kHz tuning fork crystal between this pin and the 32KHZ OUT pin.

ADC Input 0, Positive Input to Converter 0, typically Phase A Positive Current Input. When using

remoteꢀsensors,ꢀtypicallyꢀNeutralꢀPositiveꢀCurrentꢀInput.

ADC0

ADC1

33

34

ADCꢀInputꢀ1,ꢀNegativeꢀInputꢀtoꢀConverterꢀ0,ꢀtypicallyꢀPhaseꢀAꢀNegativeꢀCurrentꢀInput.ꢀWhenꢀusingꢀ

remoteꢀsensors,ꢀtypicallyꢀNeutralꢀPositiveꢀCurrentꢀInput.

ADC2

ADC3

ADC4

ADC5

ADC6

ADC7

ADC8

ADC9

ADC10

49

48

51

50

53

52

38

39

40

ADC Input 2, Positive Input to Converter 1, typically Phase B Positive Current Input

ADCꢀInputꢀ3,ꢀNegativeꢀInputꢀtoꢀConverterꢀ1,ꢀtypicallyꢀPhaseꢀBꢀNegativeꢀCurrentꢀInput

ADC Input 4, Positive Input to Converter 2, typically Phase C Positive Current Input

ADCꢀInputꢀ5,ꢀNegativeꢀInputꢀtoꢀConverterꢀ2,ꢀtypicallyꢀPhaseꢀCꢀNegativeꢀCurrentꢀInput

ADCꢀInputꢀ6,ꢀPositiveꢀInputꢀtoꢀConverterꢀ3,ꢀtypicallyꢀNeutralꢀPositiveꢀCurrentꢀInput

ADCꢀInputꢀ7,ꢀNegativeꢀInputꢀtoꢀConverterꢀ3,ꢀtypicallyꢀNeutralꢀNegativeꢀCurrentꢀInput

ADC Input 8, Single-Ended Input to Converter 4, typically Phase A Voltage Input

ADC Input 9, Single-Ended Input to Converter 5, typically Phase B Voltage Input

ADC Input 10, Single-Ended Input to Converter 6, typically Phase C Voltage Input

RemoteꢀInterfaceꢀ0ꢀPositiveꢀInput.ꢀTheꢀRMT0PꢀandꢀRMT0Nꢀpinsꢀconnectꢀtoꢀtheꢀprimaryꢀsideꢀofꢀaꢀ

pulse transformer to couple power and data to a 71M6xxx-type remote interface device. These pins

typically connect to a current sensor on phase A of a polyphase system.

RMT0P

RMT0N

RMT1P

49

48

51

RemoteꢀInterfaceꢀ0ꢀNegativeꢀInput.ꢀTheꢀRMT0PꢀandꢀRMT0Nꢀpinsꢀconnectꢀtoꢀtheꢀprimaryꢀsideꢀofꢀaꢀ

pulse transformer to couple power and data to a 71M6xxx-type remote interface device. These pins

typically connect to a current sensor on phase A of a polyphase system.

RemoteꢀInterfaceꢀ1ꢀPositiveꢀInput.ꢀTheꢀRMT1PꢀandꢀRMT1Nꢀpinsꢀconnectꢀtoꢀtheꢀprimaryꢀsideꢀofꢀaꢀ

pulse transformer to couple power and data to a 71M6xxx-type remote interface device. These pins

typically connect to a current sensor on phase B of a polyphase system.

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MAX71617/MAX71637

Energy Measurement SoCs

Pin Description (According to Function) (continued)

FUNCTION

DESCRIPTION

RemoteꢀInterfaceꢀ1ꢀNegativeꢀInput.ꢀTheꢀRMT1PꢀandꢀRMT1Nꢀpinsꢀconnectꢀtoꢀtheꢀprimaryꢀsideꢀofꢀaꢀ

pulse transformer to couple power and data to a 71M6xxx-type remote interface device. These pins

typically connect to a current sensor on phase B of a polyphase system.

RMT1N

50

RemoteꢀInterfaceꢀ2ꢀPositiveꢀInput.ꢀTheꢀRMT2PꢀandꢀRMT2Nꢀpinsꢀconnectꢀtoꢀtheꢀprimaryꢀsideꢀofꢀaꢀ

pulse transformer to couple power and data to a 71M6xxx-type remote interface device. These pins

typically connect to a current sensor on phase C of a polyphase system.

RMT2P

53

52

35

RemoteꢀInterfaceꢀ2ꢀNegativeꢀInput.ꢀTheꢀRMT2PꢀandꢀRMT2Nꢀpinsꢀconnectꢀtoꢀtheꢀprimaryꢀsideꢀofꢀaꢀ

pulse transformer to couple power and data to a 71M6xxx-type remote interface device. These pins

typically connect to a current sensor on phase C of a polyphase system.

RMT2N

Bypass Point for Internal Voltage Regulator. This pin should be connected only to a good quality

0.1µF capacitor and to no other node. In particular, it is recommended that this pin not be used to

supply reference voltage to other devices.

V

REF

SYSTEM

Active-LowꢀSystemꢀReset.ꢀAssertingꢀaꢀlowꢀlevelꢀonꢀthisꢀpinꢀresetsꢀtheꢀentireꢀSoC.ꢀConnectꢀthisꢀpinꢀ

RSTN

27

to a reset controller if one is used in the system; otherwise, connect the pin to V

external reset is required; the device has an internal reset controller.

.ꢀNoteꢀthatꢀnoꢀ

3P3D

ATRST

ATCK

ATMS

ATDO

ATDI

109

108

107

106

105

114

113

112

111

JTAG TAP Controller Reset for the ARM Cortex-M3 core.

JTAG Test Clock for the ARM Cortex-M3 core.

JTAG Test Mode Select for the ARM Cortex-M3 core.

JTAG Test Data Out for the ARM Cortex-M3 core.

JTAG Test Data In for the ARM Cortex-M3 core.

JTAG Test Clock for the MAXQ30 core.

MTCK

MTMS

MTDO

MTDI

JTAG Test Mode Select for the MAXQ30 core.

JTAG Test Data Out for the MAXQ30 core.

JTAG Test Data In for the MAXQ30 core.

MAXQ30 Core Reset. This input is active only if the JTAG interface is enabled (TAP bit in the SC

register). When asserted, program execution is forced to restart at 0x80 0000 in the utility RAM

space.

MRST

110

GPIO

P0.0

P0.1

P0.2

P0.3

P0.4

P0.5

P0.6

P0.7

P0.8

P0.9

P0.10

71

72

73

74

75

76

77

78

79

82

83

ARM Cortex-M3 GPIO Port 0 Bit 0

ARM Cortex-M3 GPIO Port 0 Bit 1

ARM Cortex-M3 GPIO Port 0 Bit 2

ARM Cortex-M3 GPIO Port 0 Bit 3

ARM Cortex-M3 GPIO Port 0 Bit 4

ARM Cortex-M3 GPIO Port 0 Bit 5

ARM Cortex-M3 GPIO Port 0 Bit 6

ARM Cortex-M3 GPIO Port 0 Bit 7

ARM Cortex-M3 GPIO Port 0 Bit 8

ARM Cortex-M3 GPIO Port 0 Bit 9

ARM Cortex-M3 GPIO Port 0 Bit 10

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MAX71617/MAX71637

Energy Measurement SoCs

Pin Description (According to Function) (continued)

FUNCTION

P0.11

P0.12

P0.13

P0.14

P0.15

P0.16

P0.17

P0.18

P0.19

P0.20

P0.21

P0.22

P0.23

P0.24

P0.25

P0.26

P0.27

P0.28

P0.29

P0.30

P0.31

P1.0

84

85

86

87

90

91

92

94

95

96

97

98

99

100

103

104

105

106

107

108

109

116

117

118

3

DESCRIPTION

ARM Cortex-M3 GPIO Port 0 Bit 11

ARM Cortex-M3 GPIO Port 0 Bit 12

ARM Cortex-M3 GPIO Port 0 Bit 13

ARM Cortex-M3 GPIO Port 0 Bit 14

ARM Cortex-M3 GPIO Port 0 Bit 15

ARM Cortex-M3 GPIO Port 0 Bit 16

ARM Cortex-M3 GPIO Port 0 Bit 17

ARM Cortex-M3 GPIO Port 0 Bit 18

ARM Cortex-M3 GPIO Port 0 Bit 19

ARM Cortex-M3 GPIO Port 0 Bit 20

ARM Cortex-M3 GPIO Port 0 Bit 21

ARM Cortex-M3 GPIO Port 0 Bit 22

ARM Cortex-M3 GPIO Port 0 Bit 23

ARM Cortex-M3 GPIO Port 0 Bit 24

ARM Cortex-M3 GPIO Port 0 Bit 25

ARM Cortex-M3 GPIO Port 0 Bit 26

ARM Cortex-M3 GPIO Port 0 Bit 27

ARM Cortex-M3 GPIO Port 0 Bit 28

ARM Cortex-M3 GPIO Port 0 Bit 29

ARM Cortex-M3 GPIO Port 0 Bit 30

ARM Cortex-M3 GPIO Port 0 Bit 31

ARM Cortex-M3 GPIO Port 1 Bit 0

ARM Cortex-M3 GPIO Port 1 Bit 1

ARM Cortex-M3 GPIO Port 1 Bit 2

ARM Cortex-M3 GPIO Port 1 Bit 3

ARM Cortex-M3 GPIO Port 1 Bit 4

ARM Cortex-M3 GPIO Port 1 Bit 5

ARM Cortex-M3 GPIO Port 1 Bit 6

ARM Cortex-M3 GPIO Port 1 Bit 7

ARM Cortex-M3 GPIO Port 1 Bit 8

ARM Cortex-M3 GPIO Port 1 Bit 9

ARM Cortex-M3 GPIO Port 1 Bit 10

ARM Cortex-M3 GPIO Port 1 Bit 11

ARM Cortex-M3 GPIO Port 1 Bit 12

ARM Cortex-M3 GPIO Port 1 Bit 13

ARM Cortex-M3 GPIO Port 1 Bit 14

ARM Cortex-M3 GPIO Port 1 Bit 15

ARM Cortex-M3 GPIO Port 1 Bit 16

ARM Cortex-M3 GPIO Port 1 Bit 17

P1.1

P1.2

P1.3

P1.4

4

P1.5

5

P1.6

6

P1.7

7

P1.8

8

P1.9

9

P1.10

P1.11

P1.12

P1.13

P1.14

P1.15

P1.16

P1.17

10

11

64

14

15

16

17

68

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MAX71617/MAX71637

Energy Measurement SoCs

Pin Description (According to Function) (continued)

FUNCTION

P1.18

70

DESCRIPTION

ARM Cortex-M3 GPIO Port 1 Bit 18

ARM Cortex-M3 GPIO Port 1 Bit 19

ARM Cortex-M3 GPIO Port 1 Bit 20

ARM Cortex-M3 GPIO Port 1 Bit 21

ARM Cortex-M3 GPIO Port 1 Bit 22

MAXQ30 GPIO Bit 0

P1.19

19

P1.20

18

P1.21

21

P1.22

20

MGPIO0

MGPIO1

MGPIO2

MGPIO3

MGPIO4

MGPIO5

MGPIO6

MGPIO7

MGPIO8

MGPIO9

MGPIO10

MGPIO11

MGPIO12

MGPIO13

MGPIO14

63

62

MAXQ30 GPIO Bit 1

61

MAXQ30 GPIO Bit 2

60

MAXQ30 GPIO Bit 3

59

MAXQ30 GPIO Bit 4

58

MAXQ30 GPIO Bit 5

57

MAXQ30 GPIO Bit 6

56

MAXQ30 GPIO Bit 7

119

120

110

111

112

113

114

MAXQ30 GPIO Bit 8

MAXQ30 GPIO Bit 9

MAXQ30 GPIO Bit 10

MAXQ30 GPIO Bit 11

MAXQ30 GPIO Bit 12

MAXQ30 GPIO Bit 13

MAXQ30 GPIO Bit 14

ARM CORTEX-M3 PERIPHERALS

UART

TxD0

RxD0

TxD1

RxD1

TxD2

RxD2

TxD3

RxD3

TxD4

RxD4

TxD5

RxD5

68

70

UART Channel 0 Transmit Data

UART Channel 0 Receive Data

UART Channel 1 Transmit Data

UART Channel 1 Receive Data

UART Channel 2 Transmit Data

UART Channel 2 Receive Data

UART Channel 3 Transmit Data

UART Channel 3 Receive Data

UART Channel 4 Transmit Data

UART Channel 4 Receive Data

UART Channel 5 Transmit Data

UART Channel 5 Receive Data

21

20

19

18

10

11

103

104

99

100

SMART CARD INTERFACE

SCIO

5

4

3

Smart Card I/O

SCCLK

SCRST

Smart Card Data Clock

Smart Card Reset

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MAX71617/MAX71637

Energy Measurement SoCs

Pin Description (According to Function) (continued)

FUNCTION

DESCRIPTION

2

I C PORT

ASDA

ASCL

68

70

ARM Cortex-M3 I²C Serial Data Circuit

ARM Cortex-M3 I²C Serial Clock Circuit

SPI PORTS

AMOSI0

AMISO0

ASSEL0

ASCLK0

AMOSI1

AMISO1

ASSEL1

ASCLK1

AMOSIS

AMISOS

ASSELS

ASCLKS

TIMERS

ATCLK0

ATCLK1

ATCLK2

ATCLK3

18

19

20

21

7

ARM Cortex-M3 SPI port 0—Master Out Slave In

ARM Cortex-M3 SPI port 0—Master In Slave Out

ARM Cortex-M3 SPI port 0—Slave Select

ARM Cortex-M3 SPI port 0—Serial Clock

ARM Cortex-M3 SPI port 1—Master Out Slave In

ARM Cortex-M3 SPI port 1—Master In Slave Out

ARM Cortex-M3 SPI port 1—Slave Select

ARM Cortex-M3 SPI port 1—Serial Clock

ARM Cortex-M3 SPI port 2—Master Out Slave In

ARM Cortex-M3 SPI port 2—Master In Slave Out

ARM Cortex-M3 SPI port 2—Slave Select

ARM Cortex-M3 SPI port 2—Serial Clock

6

9

8

91

90

94

92

19

18

21

20

ARM Cortex-M3 Timer 0 I/O Pin

ARM Cortex-M3 Timer 1 I/O Pin

ARM Cortex-M3 Timer 2 I/O Pin

ARM Cortex-M3 Timer 3 I/O Pin

MAXQ30 PERIPHERALS

LCD

LCDꢀCommonꢀOutputꢀ0.ꢀIfꢀtheꢀLCDꢀisꢀenabledꢀinꢀanyꢀmode,ꢀthisꢀpinꢀformsꢀoneꢀofꢀtheꢀcommonꢀ

element drivers.

COM0

COM1

COM2

COM3

COM4

COM5

24

65

23

66

25

67

LCDꢀCommonꢀOutputꢀ1.ꢀIfꢀtheꢀLCDꢀisꢀenabledꢀinꢀ/2ꢀmodeꢀorꢀgreater,ꢀthisꢀpinꢀformsꢀoneꢀofꢀtheꢀ

common element drivers.

LCDꢀCommonꢀOutputꢀ2.ꢀIfꢀtheꢀLCDꢀisꢀenabledꢀinꢀ/3ꢀmodeꢀorꢀgreater,ꢀthisꢀpinꢀformsꢀoneꢀofꢀtheꢀ

common element drivers.

LCDꢀCommonꢀOutputꢀ3.ꢀIfꢀtheꢀLCDꢀisꢀenabledꢀinꢀ/4ꢀmodeꢀorꢀgreater,ꢀthisꢀpinꢀformsꢀoneꢀofꢀtheꢀ

common element drivers.

LCDꢀCommonꢀOutputꢀ4.ꢀIfꢀtheꢀLCDꢀisꢀenabledꢀinꢀ/6ꢀmode,ꢀthisꢀpinꢀformsꢀoneꢀofꢀtheꢀcommonꢀ

element drivers.

LCDꢀCommonꢀOutputꢀ5.ꢀIfꢀtheꢀLCDꢀisꢀenabledꢀinꢀ/6ꢀmode,ꢀthisꢀpinꢀformsꢀoneꢀofꢀtheꢀcommonꢀ

element drivers.

SEG0

SEG1

SEG2

SEG3

71

72

73

74

LCDꢀSegmentꢀDriverꢀ0

LCDꢀSegmentꢀDriverꢀ1

LCDꢀSegmentꢀDriverꢀ2

LCDꢀSegmentꢀDriverꢀ3

Maxim Integrated

│ 16

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MAX71617/MAX71637

Energy Measurement SoCs

Pin Description (According to Function) (continued)

FUNCTION

SEG4

75

76

77

78

79

82

83

84

85

86

87

90

91

92

94

95

96

97

98

99

100

103

104

105

106

107

108

109

116

117

118

3

DESCRIPTION

LCDꢀSegmentꢀDriverꢀ4

LCDꢀSegmentꢀDriverꢀ5

LCDꢀSegmentꢀDriverꢀ6

LCDꢀSegmentꢀDriverꢀ7

LCDꢀSegmentꢀDriverꢀ8

LCDꢀSegmentꢀDriverꢀ9

LCDꢀSegmentꢀDriverꢀ10

LCDꢀSegmentꢀDriverꢀ11

LCDꢀSegmentꢀDriverꢀ12

LCDꢀSegmentꢀDriverꢀ13

LCDꢀSegmentꢀDriverꢀ14

LCDꢀSegmentꢀDriverꢀ15

LCDꢀSegmentꢀDriverꢀ16

LCDꢀSegmentꢀDriverꢀ17

LCDꢀSegmentꢀDriverꢀ18

LCDꢀSegmentꢀDriverꢀ19

LCDꢀSegmentꢀDriverꢀ20

LCDꢀSegmentꢀDriverꢀ21

LCDꢀSegmentꢀDriverꢀ22

LCDꢀSegmentꢀDriverꢀ23

LCDꢀSegmentꢀDriverꢀ24

LCDꢀSegmentꢀDriverꢀ25

LCDꢀSegmentꢀDriverꢀ26

LCDꢀSegmentꢀDriverꢀ27

LCDꢀSegmentꢀDriverꢀ28

LCDꢀSegmentꢀDriverꢀ29

LCDꢀSegmentꢀDriverꢀ30

LCDꢀSegmentꢀDriverꢀ31

LCDꢀSegmentꢀDriverꢀ32

LCDꢀSegmentꢀDriverꢀ33

LCDꢀSegmentꢀDriverꢀ34

LCDꢀSegmentꢀDriverꢀ35

LCDꢀSegmentꢀDriverꢀ36

LCDꢀSegmentꢀDriverꢀ37

LCDꢀSegmentꢀDriverꢀ38

LCDꢀSegmentꢀDriverꢀ39

LCDꢀSegmentꢀDriverꢀ40

LCDꢀSegmentꢀDriverꢀ41

SEG5

SEG6

SEG7

SEG8

SEG9

SEG10

SEG11

SEG12

SEG13

SEG14

SEG15

SEG16

SEG17

SEG18

SEG19

SEG20

SEG21

SEG22

SEG23

SEG24

SEG25

SEG26

SEG27

SEG28

SEG29

SEG30

SEG31

SEG32

SEG33

SEG34

SEG35

SEG36

SEG37

SEG38

SEG39

SEG40

SEG41

4

5

6

7

8

9

Maxim Integrated

│ 17

www.maximintegrated.com

MAX71617/MAX71637

Energy Measurement SoCs

Pin Description (According to Function) (continued)

FUNCTION

SEG42

SEG43

SEG44

SEG45

SEG46

SEG47

SEG48

SEG49

10

11

DESCRIPTION

LCDꢀSegmentꢀDriverꢀ42

LCDꢀSegmentꢀDriverꢀ43

LCDꢀSegmentꢀDriverꢀ44

LCDꢀSegmentꢀDriverꢀ45

LCDꢀSegmentꢀDriverꢀ46

LCDꢀSegmentꢀDriverꢀ47

LCDꢀSegmentꢀDriverꢀ48

LCDꢀSegmentꢀDriverꢀ49

64

14

15

16

17

68

2

I C PORTS

MSDA0

MSCL0

MSDA1

MSCL1

SPI PORT

MMOSI

MMISO

MSSEL

MSCLK

63

62

61

60

MAXQ30 I²C Channel 0 Serial Data Circuit

MAXQ30 I²C Channel 0 Serial Clock Circuit

MAXQ30 I²C Channel 1 Serial Data Circuit

MAXQ30 I²C Channel 1 Serial Clock Circuit

96

95

98

97

MAXQ30 SPI Master Out Slave In

MAXQ30 SPI Master In Slave Out

MAXQ30 SPI Slave Select

MAXQ30 SPI Serial Clock

METER PULSE OUTPUTS

Meter Pulse W Output. Typically used for real energy output (Watts). Can be directly generated from

compute engine or by the MAXQ30 core.

WPULSE

VPULSE

XPULSE

YPULSE

57

56

58

59

Meter Pulse V Output. Typically used for reactive energy output (VARs). Can be directly generated

from compute engine or by the MAXQ30 core.

Meter Pulse X Output. Typically used to indicate a zero-crossing event on a voltage input. Can be

directly generated from compute engine or by the MAXQ30 core.

MeterꢀPulseꢀYꢀOutput.ꢀTypicallyꢀusedꢀtoꢀindicateꢀvoltageꢀsagꢀonꢀoneꢀofꢀtheꢀvoltageꢀinputs.ꢀCanꢀbeꢀ

directly generated from compute engine or by the MAXQ30 core.

TAMPER DETECTION

TMPDOUT0

TMPDIN0

TMPDOUT1

TMPDIN1

TIMER

2

28

1

Tamper Detect Channel 0 Output

Tamper Detect Channel 0 Input

Tamper Detect Channel 1 Output

Tamper Detect Channel 1 Input

29

MAXQ30ꢀTimerꢀI/OꢀPinꢀA.ꢀWhenꢀconﬁguredꢀasꢀanꢀinput,ꢀthisꢀpinꢀprovidesꢀaꢀclockꢀthatꢀcanꢀbeꢀusedꢀtoꢀ

incrementꢀtheꢀcounterꢀonꢀeachꢀselectedꢀclockꢀedge.ꢀWhenꢀconﬁguredꢀasꢀanꢀoutput,ꢀthisꢀpinꢀcanꢀbeꢀ

used to generate a square wave that toggles on each timer match.

TBA

TBB

119

120

MAXQ30 Timer I/O Pin B. This pin is an input to the timer module used for multiple purposes,

dependingꢀonꢀtheꢀtimerꢀconﬁguration.ꢀItꢀcanꢀbeꢀusedꢀtoꢀreloadꢀtheꢀcounter,ꢀtoꢀreverseꢀtheꢀdirectionꢀofꢀ

count or to trigger an interrupt. In PWM modes, this pin outputs the PWM signal.

Maxim Integrated

│ 18

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MAX71617/MAX71637

Energy Measurement SoCs

Functional Diagram

REAL-TIME CLOCK

TAMPER DETECT

MAX71617

MAX71637

VREF

7x

ADCs

+

7x

DECIMATORS

INPUT

ASSIGNMENT

2

I C (STORAGE)

DATA RAM

2K x 32

COMPUTE

ENGINE

2

I C (STORAGE)

CE RAM

16K x 8

TEMPERATURE

PROGRAMMABLE

PULSE GENERATOR

PROGRAMMABLE

FLASH

MAXQ30 36MHz

32 x 32 MULTIPLY

50 x 6 LCD

CONTROLLER

CRYPTO

DES

AES

DUAL-PORT

RAM

PROGRAM RAM

32K x 16

MAILBOX

MAA

TRNG

SHA

6x UART

DATA RAM

32K x 32

ARM CORTEX-M3 108MHz

2

PROGRAM FLASH

256K x 32

I C

AHB-APB

BRIDGE

AHB

APB

SPI (SLAVE)

ISO UART

TIMER x 7

SPI (MASTER)

Maxim Integrated

│ 19

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MAX71617/MAX71637

Energy Measurement SoCs

The ARM Cortex-M3 core communicates with the

MAXQ30 metering core by means of a mailbox scheme

by which it can leave messages for and retrieve data from

the metering core. Additionally, the cores can exchange

bulk data by means of a 4KB shared RAM block.

Detailed Description

Description

The MAX71617/MAX71637 are systems-on-chip (SoCs)

for next-generation electricity meters placed on the smart

grid. The MAX71617/MAX71637 provide three high-

performance computing cores: an industry-standard ARM

Cortex-M3 core for handling communication and other

supervisory functions, a 32-bit MAXQ30 core for general

metering functions, and a programmable compute engine

(CE) to handle signal processing tasks.

Noteꢀ thatꢀ thereꢀ isꢀ noꢀ directꢀ hardwareꢀ controlꢀ ofꢀ theꢀ

MAXQ30 metering core by the ARM Cortex-M3 applica-

tion core. The application core can only request services

from the metering core, and service requests are rejected

unless they are properly formatted. This reduces the likeli-

hood of rogue code running in the ARM Cortex-M3, cor-

rupting the operation of critical metering functions being

performed in the MAXQ30 core.

The use of multiple cores in this way makes it easy

to separate metering and billing functions that can be

regulated by local or national authorities from the admin-

istrative and communications functions that typically are

unregulated. The MAXQ30 core receives data from the

compute engine and manages the energy accumulation

process,ꢀtheꢀLCDꢀandꢀtheꢀmeterꢀpulseꢀoutputs,ꢀwhileꢀtheꢀ

ARM core handles bulk storage and communications over

the various UART channels.

MAXQ30 Core

The 32-bit MAXQ30 core is a Harvard architecture micro-

controller core well-suited for low-power signal process-

ing. Because the instruction bus is separate from the data

bus, most instructions execute in one cycle.

The MAXQ30 core is coupled to a single-cycle 32-bit mul-

tiply/accumulate unit. Because of the transfer-triggered

nature of the MAXQ30 core, the DSP core is completely

static and only the active modules of the core consume

power when operating. When the core is idle, it can be

unclocked and draws only leakage current.

ARM Core Overview

The ARM Cortex-M3 core is a low-power 32-bit RISC

core, widely used for embedded applications. In the

MAX71617/MAX71637, the application core is coupled

to 1MB of flash memory, 128KB of static RAM (two 64KB

blocks), and a number of peripherals for communication

and external device control.

The MAXQ30 core contains no ROM or flash memory.

Instead, the program store is implemented as fast static

RAM. This means that the MAXQ30 core cannot begin

running code before the ARM core has loaded its pro-

gram store. See the Security section for details on this

mechanism.

The ARM Cortex-M3 core provides services such as

communication management and usage reporting. The

MAX71617/MAX71637 are designed to allow this core

(the application core) to manage relatively risky opera-

tions such as communication over an insecure link, while

permitting the more sensitive operations, such as energy

measurement and accumulation, to proceed on a more

secure microcontroller (the metering core).

The purpose of the MAXQ30 core is to isolate criti-

cal metering functions into a separate core that does

not directly communicate over potentially unsecured

communication channels. Since programs running on

the MAXQ30 core can choose how to respond (or not

respond) to messages arriving from the ARM Cortex-M3

application core, the likelihood of hacking by outside

threats is reduced.

The ARM Cortex-M3 core controls the following

peripherals:

●ꢀ Upꢀtoꢀ55ꢀGPIOꢀpins

●ꢀ Upꢀtoꢀsixꢀfull-duplexꢀUARTs

The MAXQ30 core manages the following peripherals:

●ꢀ Sevenꢀconfigurableꢀgeneral-purposeꢀtimers,ꢀfourꢀwithꢀ

●ꢀ Upꢀtoꢀ14ꢀGPIOꢀpins

optional output pins

●ꢀ Theꢀ LCDꢀ controllerꢀ capableꢀ ofꢀ controllingꢀ upꢀ toꢀ 300ꢀ

2

●ꢀ OneꢀI C port, configurable as a master or slave

segments (6 x 50).

●ꢀ Threeꢀ SPIꢀ ports:ꢀ twoꢀ configurableꢀ asꢀ aꢀ masterꢀ orꢀ

●ꢀ Aꢀtime-of-dayꢀclockꢀwithꢀalarmꢀfunctions

slave, and one permanently configured as a slave

2

●ꢀ TwoꢀI C ports. These ports can be used for any pur-

2

●ꢀ Oneꢀsmartꢀcardꢀinterface

pose, but typically are configured so that one I C port

manages external nonvolatile storage for measured

energy while the other I C port might be configured for

●ꢀ Aꢀblockꢀofꢀcryptographicꢀperipherals

2

managementꢀofꢀanꢀexternalꢀLCDꢀcontroller,ꢀifꢀneeded.

Maxim Integrated

│ 20

www.maximintegrated.com

MAX71617/MAX71637

Energy Measurement SoCs

●ꢀ OneꢀSPIꢀmaster/slave

ADC

TheꢀMAX71637ꢀprovidesꢀsevenꢀ24-bitꢀΔΣꢀADCꢀchannels,ꢀ

and the MAX71617 provides four ADC channels.

●ꢀ Fourꢀprogrammableꢀmeterꢀpulseꢀgenerators

●ꢀ Oneꢀprogrammableꢀtimer

In the MAX71637, the channels can be dynamically con-

figured into multiple arrangements so that external pins

can be flexibly routed to particular ADC channels. By

default, the ADCs are arranged so that the three current

inputs drive dedicated ADC channels, and the neutral

current input drives its own dedicated ADC channel.

The three voltage inputs are sensed by the remaining

three ADC channels. Further arrangements are possible,

including routing all signals to a single multiplexed ADC

channel and turning off all other ADC channels.

In addition, the MAXQ30 core configures and manages

the AFE. It also controls the compute engine, although this

control is typically limited to setting up the AFE and the

compute engine such that the compute engine runs when-

ever a new set of samples are available in the CE RAM.

Intercore Communications

The application core and the MAXQ30 metering core

must communicate with one another to transfer configura-

tion data as well as metrology results. This communica-

tion is handled by a small block of memory that appears

as registers to the MAXQ30 processor and as standard

RAM to the application core. A larger block of memory

is reserved to transfer complete vectors of acquired

samples from any input channel.

In the MAX71617, two input are dedicated to current

channels (for line and neutral current to support tamper

detection) and two channels are dedicated to two phase

voltages. This arrangement permits the single-phase

version of the SoC to operate in standard single-phase

(equation 0), split-phase (equation 1) and applications

with two independent voltages (equation 2).

The application core typically starts a transfer by writing a

code to the MREQ (Master REQuest) register. This action

sets a flag toward the MAXQ30 core that can serve as an

interrupt source. The MAXQ30 core performs the request-

ed action and loads the results into the SRSP (Slave

ReSPonse) register, setting a bit toward the application

core. The application core can then retrieve the results.

In the MAX71637, the connections between the eleven

input pins and the actual inputs to the ADC channels

are made through input multiplexers attached to each

ADC channel. Additionally, the multiplex connections can

be optionally configured on a time-slot basis if it is not

desired to use dedicated ADCs. Input assignments are

configurable and depend on code running on the compute

engine to determine how inputs are assigned to ADC

channels.

For results that occupy more than the 32-bits available in

the slave response register, the MAX71617/MAX71637

provide a 4KB buffer that can be assigned to either the

application core or the metering core at any particular

time. The MAXQ30 metering core controls the owner-

ship of the RAM block. In typical use, the application

core makes a request for bulk data, the metering core

populates the buffer and transfer control to the application

core before loading a status value in the slave response

register. Once the application core has recovered the

data, the buffer ownership can be transferred back to the

metering core.

Remote Interfaces

The MAX71637 provides three analog input pin pairs

(ADC0-1, ADC2-3, and ADC4-5), and the MAX71617

provides two analog input pin pairs (ADC0-1 and ADC2-3)

that are configurable to support remote interfaces.

The MAX71617/MAX71637 metering SoC devices sup-

port 71M6000 series single-channel remote interfaces.

The 71M6000 remote interface permits the connection of

nonisolated current sensors (such as resistive shunts) to

the SoC. In a typical usage scenario, the MAX71637 is ref-

erenced to the neutral point in a three-phase wye system,

with voltage monitored by means of conventional resistive

divider networks on each phase and current monitored

by means of shunts connected through three 71M6000-

series interfaces and their associated pulse transformers.

In addition to metrology results, intercore communica-

tions are also used to transfer cryptographic blocks from

the MAXQ30 metering core and the ARM Cortex-M3

application core. The actual crypto hardware is physically

in the domain of the application core. When the meter-

ing core requires cryptographic services, it can place a

request in the mailbox to request encryption services of

the application core.

Maxim Integrated

│ 21

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MAX71617/MAX71637

Energy Measurement SoCs

The 71M6000 interfaces receive power from the SoC by

means of power pulses that are inserted into the data

stream. These current pulses are coupled to the remote

interfaces by means of a pulse transformer that also

provides isolation to the circuit. Data from the 71M6000

is coupled back to the SoC by means of the same trans-

former. The MAX71617/MAX71637 SoCs contain a set of

FIR decimation filters that convert the bit stream from the

remote interfaces into usable current samples.

LCD

The MAX71617/MAX71637 provide a 50-segment,

6-commonꢀLCDꢀcontrollerꢀperipheral.

A display is essential to an electricity meter. Also under

many regulatory structures, the display must be logically

separate from the communications process to prevent

malicious attacks that might cause the meter to display

incorrect information.

TheꢀLCDꢀcontrollerꢀisꢀmanagedꢀbyꢀtheꢀMAXQ30ꢀmeteringꢀ

processor. Since the MAXQ30 processor has no direct

connectionꢀtoꢀtheꢀcommunicationsꢀmechanisms,ꢀtheꢀLCDꢀ

is guaranteed to be logically separated at all times from

the network.

Refer to the 71M6103/71M6113/71M6201/71M6203/71M

71M6601/71M6603 data sheet for more information about

the remote interfaces and how to use them.

Compute Engine

The MAX71617/MAX71637 provide a dedicated, 32-bit

fixed-point compute engine to perform the initial process-

ing of received samples and to convert them into incre-

ments of real and reactive energy. The compute engine

runs every time the ADC deposits a set of samples into

CE RAM. From time to time (typically once per second)

the CE notifies the MAXQ30 core that it should retrieve

data for long-term accumulation. The compute engine

also calculates ancillary values such as per-phase RMS

voltage and current, line frequencies, and phasor angles

between phases.

For applications that do not require strict separation

between communications and display, a small piece of

software can be loaded into the MAXQ30 core that allows

the ARM core to directly write display contents to memory.

The data thus written is then picked up by the MAXQ30

core and directly transferred to the display controller.

Real-Time Clock

LikeꢀtheꢀLCD,ꢀtheꢀreal-timeꢀclockꢀisꢀconsideredꢀaꢀcriticalꢀ

component that must be segregated from the communi-

cations media. The real-time clock is a peripheral of the

MAXQ30 core and is managed by sending commands

from the application core to software running on the

MAXQ30 core. The software can validate the commands

before making changes to the time-of-day clock.

The code for compute engine is stored in volatile RAM

during operation. On power-up, the RAM must be loaded

by the ARM Cortex-M3 application core prior to releasing

the compute engine to run.

To ensure the integrity of the code running on the com-

pute engine, the MAXQ30 metering core can periodically

perform a verification of the compute engine code base.

This involves no performance penalty since the compute

engine, the MAXQ30 core and the AFE share access to

the common memory block on a time-interleaved basis.

Code running on the MAXQ30 can be checked by rou-

tines in the utility RAM.

The clock itself uses a standard tuning-fork crystal as its

timebase. The crystal is always allowed to operate at its

natural frequency. Corrections to the timebase are applied

digitally by inserting or deleting half-cycles of the crystal’s

natural frequency to achieve a long-term average of a

32,768Hz nominal frequency.

UART

The MAX71617/MAX71637 provide six UART peripherals.

Each UART is connected into the application core in order

to maintain the segregation of functional elements between

the application core and the metering core. Each UART

has its own baud rate generator based around the principle

of the phase accumulator. This type of baud rate generator

assures the most accurate timing at high baud rates.

Maxim provides CE code for most common configura-

tions of load connections, pulse generation schemes,

harmonic analysis and current and voltage sensors.

Alternately, the compute engine can be completely dis-

abled and the MAXQ30 core can provide per sample

processing services.

Temperature Sensor

The primary UART channel includes hardware to assist

with amplitude modulated infrared (IR) based readers.

The UART contains an independent timer that generates

a carrier signal in the range of 10kHz to 500kHz. The car-

rier signal can be transmitted during either mark or space

times, with the alternate signal level being represented by

either a 1 or a 0 level.

The MAX71617/MAX71637 provide a built-in temperature

sensor that determines the temperature of the semicon-

ductor die. This temperature sensor is periodically con-

nected to one of the ADC channels to record the die tem-

perature. The value determined by the ADC is then used

to compensate the on-chip bandgap voltage reference for

variations due to temperature.

Maxim Integrated

│ 22

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MAX71617/MAX71637

Energy Measurement SoCs

2

serpentine mesh, the signal returns to an input that

compares the received signal to the transmitted signal.

If the signals differ, a tamper event is declared and the

MAXQ30 metrology processor is interrupted.

I C

The application core of the MAX71617/MAX71637 pro-

vide one I C peripheral, and the MAXQ30 metering core

provides two I C peripherals.

2

This scheme differs from simply assigning a GPIO port

for tamper detection because it resists simply pulling the

pin high or low to force the processor to ignore a tamper

event. Two separate circuits provide the possibility to

issue a warning when the first seal is breached, and a

higher alert level when a further breach has occurred.

2

I C is frequently used to control external memory devices

2

and display drivers. All I C peripherals in the MAX71617/

MAX71637 support master and slave mode, and obey

standard protocol practices such as clock stretching.

2

The two I C ports on the MAXQ30 core can be used for

any purpose, but are recommended as connections to

external flash memory for storage of metrology values and

for an external display controller. Two ports are provided

so that a single failure cannot disable both peripherals.

On either tamper detection event, the MAXQ30 metering

core can be interrupted. The metering core can then send

a signal to the application core so that the tamper event

can be logged and reported. The tamper detect circuitry

operates on the nonvolatile power domain, so that tamper

events can be configured to wake the metering core even

when the device is in sleep mode.

SPI

The MAX71617/MAX71637 provide four SPI peripherals:

three on the ARM Cortex-M3 application core, and one on

the MAXQ30 metering core.

Timers

Two of the three application-core SPI channels serve as a

master or slave. SPI masters generate the SPI clock and

driveꢀtheꢀslaveꢀselectꢀ(SSEL)ꢀcircuit.ꢀWhenꢀconfiguredꢀasꢀ

a slave, the SPI channels expect an external master to

provideꢀtheꢀclockꢀandꢀtoꢀdriveꢀtheꢀSSELꢀcircuit.ꢀTheꢀthirdꢀ

SPI channel is configured as slave only.

The ARM Cortex-M3 application core provides seven

programmable timers. These timers are uncommitted and

can be used for any purpose, including the support of

multitasking operating systems. Four of the timers have

outputs that can be routed to external pins.

In addition to the timers attached to the application core,

one programmable timer is attached to the MAXQ30 core

for general use, including PWM applications.

The SPI controller on the MAXQ30 metering core can be

configured as master or slave, and can be configured for

eight-bit or sixteen-bit operation.

Meter Pulse Generation

Smart Card

Meter pulse generation is a critical function during calibra-

tion and, in some cases, to support the metering function

itself. The MAX71617/MAX71637 provide four program-

mable precision pulse generators to provide pulse gen-

eration services independent of either the application core

or the metering core.

The MAX71617/MAX71637 provide an ISO7816-

compatible UART that supports an interface to a smart

card. If a 3.3V-compatible card is used, the pins may be

able to be used directly (with appropriate protection for

ESD). The port can also be used with smart card interface

ICs that provide level shifting and circuit protection.

While there are four pulse outputs, there are actually eight

pulse generators. Four of these programmable pulse gen-

erators are built into the compute engine and are active

when the CE is used to perform the basic metrology

tasks. When operating in this mode, the metering core

only manages pulse configuration and meter constants.

Contact your Maxim Integrated representative for appro-

priate smart card interface devices that can be used with

the MAX71617/MAX71637.

Tamper Detection

The MAX71617/MAX71637 provide two active tamper

detection channels.

When the CE is disabled and the MAXQ30 core is han-

dling DSP tasks, the set of programmable pulse genera-

tors assigned to the MAXQ30 are used. In any event, the

pulse outputs are always mapped to the same set of

external pins.

Active tamper detection means that the device gener-

ates a pseudo-random bit sequence and drives that

bit sequence through external circuitry. After passing

through external switches or perhaps through a metal foil

Maxim Integrated

│ 23

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MAX71617/MAX71637

Energy Measurement SoCs

•

DES: DES is a block cipher, published in 1977,

that although still in wide use is now largely dep-

recated. It has a 56-bit key and a 64 bit cipher

block size. DES is provided in the MAX71617/

MAX71637 to support legacy applications; its

56-bit key is considered too short for modern

cryptographic security and the US government

has withdrawn the single-key version of DES

as a standard as of 2005. Triple-DES (3DES),

which encrypts data with three rounds of the

DES algorithm using two or three 56-bit keys

is still considered secure, but not as secure as

AES. Both two-key and three-key 3DES are fully

supported in the MAX71617/MAX71637.

Security

Security in the MAX71617/MAX71637 SoC means sev-

eral things:

●ꢀ Communications security: messages transmitted by

the SoC cannot be intercepted by others. Messages to

the SoC cannot be forged by an impostor.

2

●ꢀ Data security: Data stored in external media (e.g., I C

or SPI connected EEPROM) is stored in such a way

that even if the device is removed from the meter, the

data stored on the device cannot be used. Conversely,

billing data stored in an external EEPROM is encrypt-

ed and authenticated to prevent attackers from install-

ing devices preloaded with fraudulent data.

●ꢀ Software security: Software loaded onto the ARM

Cortex-M3 core is executed only if it is appropriately

signed by a party with a secret key corresponding to

a public key stored in the SoC. The secret key can

be loaded by the customer using Maxim-provided

software, or can be loaded by Maxim at final test. And

since the ARM core loads the MAXQ30 core on each

reset event, the software for the MAXQ30 core and the

compute engine is implicitly protected.

●ꢀ Secure hash: The MAX71617/MAX71637 provide a

secure hash generator that is compatible with SHA-1

to SHA-512 standards. The secure hash engine pro-

vides a 160- to 512-bit message digest of a data set in

such a way that it is infeasible to create a second data

set that produces an identical hash.

●ꢀ Modular arithmetic accelerator: The MAX71617/

MAX71637 provide a modular arithmetic accelerator

(MAA). The MAA provides hardware acceleration for

popular cryptosystems such as elliptic-curve cryptog-

raphy (ECC) and asymmetric-key cryptosystems such

as RSA. Many modern encryption algorithms work

by operating over a finite integer field. Performing

computations in a large finite field is difficult and time-

consuming for general purpose microcontrollers.. The

MAA computes the result of common arithmetic func-

tions (sum, additive inverse, product, multiplicative

inverse, exponentiation) in an integer field of size up

to 2,048 bits.

●ꢀ Metrology security: Accumulated energy usage and

other metrology results can be embedded in a security

envelope. This envelope can be passed through the

communication protocol layers so that the end recipi-

ent can be sure the results are authentic.

●ꢀ Physical security: A dynamic tamper detection sys-

tem ensures that if the meter is tampered with, the

SoC records the event and takes appropriate counter-

measures. These can include everything from alerting

an operator to destroying cryptographic keys to render

the meter inert.

●ꢀ True random number generator: The MAX71617/

MAX71637 provide a true random number generator

which is used to generate one-time keys that secure

communications sessions. The entropy source of the

true random number generator is derived from the

outputs of three unsynchronized counters that are

non-linearly mixed to produce an output that is verifi-

ably random.

To support these security features, the MAX71617/

MAX71637 provide the following cryptographic and secu-

rity-related resources:

●ꢀ Encryption engines: MAX71617/MAX71637 provide

DES, 3DES, and AES encryption engines. These facil-

ities provide fast encryption and decryption services

for either communication security or protection of data

stored in external memory devices.

●ꢀ Tamper detection: The MAX71617/MAX71637 pro-

vide four tamper detect pins (two input/output pairs)

protect the physical security of the meter. The output

pin of each pin pair presents a pseudo-random bit

sequence that is hard for an observer to predict. The

input pin of each pin pair presents the detected sig-

nal to internal logic. This internal logic compares the

received signal to the signal presented on the output

pin, and provides an alert if the signals significantly

•

AES: AES is a modern block cipher that uses a

128-bit or 256-bit key and operates on a 128-bit

cipher block. AES combines four logical opera-

tions that involve mixing and substitution over

14-18 rounds to convert a plain-text block to a

cipher block under control of the key. At the time

of this writing, AES is considered secure.

Maxim Integrated

│ 24

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MAX71617/MAX71637

Energy Measurement SoCs

differ from each other. Each tamper detection pair can

be configured to provide a response to a confirmed

tamper event that may range from latching an output

to illuminate a tamper indicator, to sending a message

to the network, to making a log entry all the way to

destroying the keys and becoming inert.

by user code to perform in-system updates to the flash

program,ꢀifꢀdesired.ꢀLikeꢀallꢀperipherals,ꢀtheꢀflashꢀcontrol-

ler can be protected by the RPU so that only authorized

software can perform flash upgrades.

The 128KB of RAM is provided as two blocks: one 64K

block of code RAM and a second 64K block of system

RAM. The system RAM block has a bit-band alias to sup-

port RAM bit operations.

●ꢀ Resource Protection Unit (RPU): Resources on the

peripheral bus of the ARM Cortex-M3 are protected by

hardware. The RPU implements a protection matrix

that defines which peripheral or resource can be used

by a particular process.

In addition to the code RAM and system RAM, the

application core has conditional access to four addi-

tional memory blocks: the MAXQ30 program RAM, the

MAXQ30 page RAM, the CE RAM, and a shared RAM

block. The MAXQ30 program RAM and page RAM are

used to contain software for the MAXQ30 metering core.

The 64KB program RAM block is loaded once by the

application core, then assigned for exclusive access to

the MAXQ30 core; the 16KB page RAM can be loaded

and reloaded by the application core as requirements

change. The CE RAM is also loaded by the application

core and is assigned to shared access by the MAXQ30

metering core and the compute engine. Finally, the

shared RAM block is used to communicate data blocks

between the metering core and the application core as an

adjunct to the mailbox system.

ARM Cortex-M3 Details

The ARM Cortex-M3 application core is a 32-bit RISC

microcontroller that supports the widely-used ARM

instruction set. In the MAX71617/MAX71637, the ARM

Cortex-M3 operates at a nominal frequency of 108MHz.

The processor clock to the ARM Cortex-M3 can be divid-

ed by 1, 2, 4, and 8 to provide effective clock frequencies

of 108MHz, 54MHz, 27MHz, and 13.5MHz.

The application core has access to 1MB of flash memory

and 128KB of RAM for its own use, with other memory

blocks shared with the other processor cores.

The 1MB flash memory block appears to the processor

as 256K x 32. Internally, the flash memory is organized

as 64K x 128, but it supports programming one longword

(32 bits) at a time. The flash controller can be accessed

See Table 1 for all addresses and lengths, which are

expressed in bytes.

Table 1. ARM Cortex-M3 Memory Map

LOCATION

MEMORY SEGMENT

0x0000 0000

LENGTH

NAME

DESCRIPTION

1M

64K

32M

Code Flash

Primary code memory for the ARM Cortex-M3

0x0040 0000

Code SRAM

System SRAM

0x2000 0000

0x2200 0000

Bit Band Alias for System SRAM

PERIPHERAL SEGMENT

0x4000 0000

4K

GPIO 0

GPIO 1

Timer 0

Timer 1

Timer 2

Timer 3

Timer 4

Timer 5

Timer 6

0x4000 1000

0x4001 0000

General-purpose 32-bit timer

0x4001 1000

0x4001 2000

0x4001 3000

0x4001 4000

0x4001 5000

0x4001 6000

Maxim Integrated

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MAX71617/MAX71637

Energy Measurement SoCs

Table 1. ARM Cortex-M3 Memory Map (continued)

LOCATION

0x4002 0000

0x4002 1000

0x4002 2000

0x4002 3000

0x4002 4000

0x4002 5000

0x4002 8000

0x4002 9000

0x4003 0000

0x4003 8000

0x4004 0000

0x4006 0000

0x4006 1000

0x4006 2000

0x4006 4000

0x4007 0000

0x4007 1000

0x4007 2000

0x400A 0000

0x400A 1000

0x400A 2000

0x400A 3000

LENGTH

4K

NAME

DESCRIPTION

UART 0

UART 1

UART 2

UART 3

UART 4

UART 5

SPI 0

UART with IR modulator

4K

General purpose UART

General purpose UART with debug capability

SPI Master

4K

SPI 1

SPI Master

2

4K

I C 0

I C Master

4K

Smart Card

4K

Watchdog Timer

4K

DMA Controller

4K

Flash Controller

4K

Cache Controller

4K

Mailbox

ARM-MAXQ30 communications

4K

Crypto Engine

4K

TrueꢀRandomꢀNumberꢀGenerator

Modular Arithmetic Accelerator

Global control

4K

Resource Protection Unit

System Initialization

CRC/Checksum

4K

Shared RAM segment for MAXQ30-ARM Cortex

M3 coordination.

0x4010 0000

0x4011 0000

0x4012 0000

4K

MAXQ30 Shared RAM

MAXQ30 Page RAM

MAXQ30 Program RAM

Swappable code segment to allow MAXQ30 core to

page in new code.

16K

64K

Primary MAXQ30 code space. Read/write by ARM

Cortex M3 when MAXQ30 core is held at reset.

Primary compute engine memory segment.

Writable by ARM Cortex M3 only when MAXQ30

core is held at reset.

0x4013 0000

0x4200 0000

16K

32M

CE RAM

Bit Band Alias for Peripheral

Segment

Maxim Integrated

│ 26

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MAX71617/MAX71637

Energy Measurement SoCs

MAXQ30 Core Details

MAXQ30 Core Peripherals

The MAXQ30 core in the MAX71617/MAX71637 man-

ages sensitive peripherals, executes signal-processing

related tasks, and performs general metering-related

housekeeping functions.

Unlike the ARM architecture, peripheral devices in the

MAXQ30 do not reside in the general memory map.

Instead, peripheral devices are first-class data objects

and reside in register modules along with CPU registers,

accumulators, and other core components of the micro-

controller.

The MAXQ30 core is a 32-bit RISC core running at

36MHz. In addition to its rich peripheral complement, the

MAXQ30 core also manages a number of RAM blocks.

Table 2 provides information about the peripheral comple-

ment available to the MAXQ30 core. For details about

these peripherals, how to set them up, and how to use

them, refer to the MAX71617/MAX71637 User’s Guide.

Table 2. RAM Block Management

RAM BLOCK

SIZE

DESCRIPTION

This is the general-purpose working RAM block for the MAXQ30 core. It appears at 0x00

0000 in the data space map and is automatically mapped into code space at 0xA0 0000.

Data Memory

8KB

The page memory is an auxiliary program segment for the MAXQ30 core. The ARM

Cortex-M3 can load specialized, transient subroutines in this memory segment and then

remove them as required. If assigned to the MAXQ30 core, it appears in the program space

at location 0x00 8000.

Page Memory

16KB

The shared memory is a region that can be arbitrarily handed between the ARM Cortex-M3

application core and the MAXQ30 metering core. The MAXQ30 core controls the ownership

ofꢀtheꢀmemory.ꢀNoteꢀthatꢀthisꢀisꢀnotꢀtrueꢀdual-portꢀmemory,ꢀsinceꢀonlyꢀoneꢀcoreꢀatꢀaꢀtimeꢀhasꢀ

read-write privilege to the memory segment. If mapped to the MAXQ30 core, it appears in

data space at byte address 0x00 2000.

Shared Memory

Program Memory

CE Memory

4KB

64KB

16KB

This is the primary code memory for the MAXQ30 core. It is loaded by the ARM Cortex-M3

core at startup, and then is locked to the MAXQ30 core so that code can run from the

memory segment. It appears in code space at address 0x00 0000.

The CE memory block is initially loaded by the ARM Cortex-M3 core at startup. It contains

the CE program (generally provided by Maxim) and is accessible on a time-interleaved

basis to the compute engine, the MAXQ30 core and the ADC block. The CE acts as a

coprocessor and converts raw ADC samples to energy units for the MAXQ30 core to further

accumulate and process.

Theꢀutilityꢀmemoryꢀblockꢀcontainsꢀutilityꢀfunctionsꢀthatꢀsupportꢀtheꢀpseudo-VonꢀNeumannꢀ

architecture of the MAXQ30 core, debug functions and other ancillary functions. Once

loaded, the utility memory behaves as ROM, blocking all write attempts to the memory

segment. It appears in code space at address 0x80 0000.

Utility Memory

8KB

Maxim Integrated

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MAX71617/MAX71637

Energy Measurement SoCs

Table 3. Peripherals Available to the MAXQ30 Core

MODULE 0

MODULE 1

2

I C 0 (STORAGE)

I C 1 (DISPLAY)

REG

0

REG NAME

DESCRIPTION

REG

REG NAME

I2C1CN

DESCRIPTION

2

I2C0CN

I2C0INT

I C Control

0

1

I C Control

2

1

I CꢀInterruptꢀConﬁgurationꢀ

I2C1INT

I2C1ST

I CꢀInterruptꢀConﬁgurationꢀ

2

I2C0ST

I C Status

2

I C Status

2

3

I2C0DATA

I2C0MCN

I2C0RX

I C Data

3

I2C1DATA

I2C1MCN

I2C1RX

I C Data

2

4

I CꢀMasterꢀConﬁgurationꢀ

4

I CꢀMasterꢀConﬁgurationꢀ

2

8

I C Receive

8

I C Receive Data

2

9

I2C0RXCFG

I2C0TX

I CꢀReceiveꢀConﬁgurationꢀ

9

I2C1RXCFG

I2C1TX

I CꢀReceiveꢀConﬁgurationꢀ

2

10

11

12

13

14

I C Transmit

10

11

12

13

14

I C Transmit Data

2

I2C0TXCFG

I2C0SLA

I2C0CKH

I2C0CKL

I CꢀTransmitꢀConﬁgurationꢀ

I2C1TXCFG

I2C1SLA

I2C1CKH

I2C1CKL

I CꢀTransmitꢀConﬁgurationꢀ

2

I C Slave Address

2

I C Clock Divide High

2

I CꢀClockꢀDivideꢀLow

2

I C High-Speed Clock

15

I2C0HSCK

15

I2C1HSCK

Conﬁgurationꢀ

2

16

17

I2C0TO

I C Timeout Counter

16

I2C1TO

I C Timeout Counter

2

I2C0FIFO

I C FIFO Control

17

I2C1FIFO

I C FIFO Control

SPI

REG

5

TIMER B

REG NAME

SPICN

SPIST

DESCRIPTION

SPI Control

REG

REG NAME

TB0CN

TB0V

DESCRIPTION

TimerꢀBꢀConﬁgurationꢀ

Timer B Value

5

6

7

6

SPI Status

7

SPIB

SPI Data Buffer

SPIꢀConﬁgurationꢀ

SPI Clock

TB0R

Timer B Reload

18

SPICF

MODULE 2

MULTIPLY-ACCUMULATE UNIT

19

SPICK

TEST

REG

31

REG

REG NAME

MCNT

MA

DESCRIPTION

Multiplier Control

REG NAME

DESCRIPTION

0

TM

Reserved (system register)

1

Multiplier Operand A

JTAG

REG

24

2

MB

Multiplier Operand B

REG NAME

ICDT0

ICDT1

ICDC

DESCRIPTION

In-Circuit Debug Temporary 0

In-Circuit Debug Temporary 1

In-Circuit Debug Control

In-Circuit Debug Flag

8

MC0

Accumulator bits 31–0

Accumulator bits 63–32

Result bits 31–0 (read only)

Result bits 63–32 (read only)

9

11

MC1

25

MC0R

MC1R

26

12

27

ICDF

PULSE

REG

3

28

ICDB

In-Circuit Debug Buffer

In-Circuit Debug Address

In-Circuit Debug Data

REG NAME

CFCN

DESCRIPTION

MeterꢀPulseꢀConﬁgurationꢀ

Meter Pulse Increment 0

29

ICDA

30

ICDD

4

CFINC0

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│ 28

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MAX71617/MAX71637

Energy Measurement SoCs

Table 3. Peripherals Available to the MAXQ30 Core (continued)

PULSE

REAL-TIME MONITOR

REG

5

REG NAME

CFINC1

CFINC2

CFINC3

CFACT0

CFACT1

CFACT2

CFACT3

DESCRIPTION

Meter Pulse Increment 1

Meter Pulse Increment 2

Meter Pulse Increment 3

Meter Pulse Active Period 0

Meter Pulse Active Period 1

Meter Pulse Active Period 2

Meter Pulse Active Period 3

REG

24

REG NAME

RTM0

DESCRIPTION

Real-Time Monitor Channel 0

Real-Time Monitor Channel 1

Real-Time Monitor Channel 2

Real-Time Monitor Channel 3

6

25

RTM1

7

26

RTM2

14

15

16

17

27

RTM3

MODULE 4

LCD

REG

REG NAME

DESCRIPTION

LCDꢀConﬁgurationꢀ

LCDꢀSegmentꢀBlinkꢀMask

LCDꢀAddressꢀ

MODULE 3

0

LCDCFG

LCDBLINK

LCDADDR

LCDSEG

LCDCN

COMPUTE ENGINE

1

REG

REG NAME

CEI

DESCRIPTION

Compute Engine Interrupt

Compute Engine Pulse Control

Compute Engine Control

2

5

7

3

LCDꢀSegmentꢀDataꢀ

LCDꢀControlꢀRegister

LCDꢀSegmentꢀMapꢀ0

LCDꢀSegmentꢀMapꢀ1

LCDꢀSegmentꢀMapꢀ2

CEPCN

CECN

8

9

LCDMAP0

LCDMAP1

LCDMAP2

REMOTE

REG

1

10

REG NAME

RMTCN

DESCRIPTION

11

IsolatedꢀRemoteꢀConﬁguration

Command sent to Isolated Remote

Isolated Remote Error Status

Isolated Remote Data

MAILBOX

2

RMTCMD

RMTERR

RMTDATA

REG

4

REG NAME

SRSP0

DESCRIPTION

Mailbox Slave Response 0

Mailbox Slave Response 1

Mailbox Master Request 0

Mailbox Master Request 1

Mailbox Master Request 2

6

9

5

SRSP1

ADC

REG

3

18

19

20

GPIO

REG

6

MREQ0

MREQ1

MREQ2

REG NAME

ADCN

DESCRIPTION

ADC Control

4

ADCFG

ADCLK

ADCꢀConﬁgurationꢀ

10

11

ADC Clock

REG NAME

PO2

DESCRIPTION

GPIO Port 2 Output

ADMUX0

ADMUX1

ADMUX2

ADMUX3

ADMUX4

ADMUX5

ADMUX6

FIRLEN

SLEN

ADC Multiplexer Select 0

ADC Multiplexer Select 1

ADC Multiplexer Select 2

ADC Multiplexer Select 3

ADC Multiplexer Select 4

ADC Multiplexer Select 5

ADC Multiplexer Select 6

ADCꢀFIRꢀFilterꢀLength

ADCꢀLengthꢀofꢀSꢀState

ADC Delay from S State

ADC Delay from V State

ADCꢀNumberꢀofꢀZeroꢀVoltꢀSamples

ADCꢀMultiplexerꢀConﬁguration

12

13

14

15

16

17

18

19

20

21

22

23

7

EIF2

GPIO Port 2 Interrupt Flag

GPIO Port 2 Input

14

15

16

17

PI2

PD2

GPIO Port 2 Direction

EIE2

GPIO Port 2 Interrupt Enable

GPIO Port 2 Interrupt Edge Select

EIES2

MODULE 5

REAL-TIME CLOCK

REG

2

REG NAME

RTCI

DESCRIPTION

RTC Interrupt

SDLY

VDLY

10

11

RTCSTAT

RTCCN

RTC Status

VZERO

MUXCN

RTC Control

12

RTCSBSC

RTC Subsecond Counter

Maxim Integrated

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MAX71617/MAX71637

Energy Measurement SoCs

Table 3. Peripherals Available to the MAXQ30 Core (continued)

REAL-TIME CLOCK

SECURITY MONITOR

REG

13

REG NAME

RTCTIME

RTCDATE

RTCALRM

RTCCAL

DESCRIPTION

REG

0

REG NAME

EXTSST

DESCRIPTION

External Sensor Status

RTC Time

RTC Date

14

6

EXTSINT

External Sensor Interrupt

External Sensor Control

15

RTC Alarm

8

EXTSCN

16

RTC Calibration

9

EXTSCFG

EXTSINTCN

ExternalꢀSensorꢀConﬁgurationꢀ

External Sensor Interrupt Control

17

RTCTCA

RTCꢀTemperatureꢀCoefﬁcientꢀA

RTCꢀTemperatureꢀCoefﬁcientꢀB

23

18

RTCTCB

MEMORY CONTROL

19

RTCMISC

RTCBTM

REG

REG NAME

DESCRIPTION

20

7

MEMCTL

Memory Control

V

: This is the primary backup power connection. In

Using the MAX71617/MAX71637

Power

The MAX71617/MAX71637 require a single 3.3V supply

to operate. However, in an electricity metering environ-

ment continuity of measured values and nominal opera-

tion in the absence of line power is a critical requirement.

BAT

most cases, a relatively high-capacity primary battery is

connected to this pin (often, a 1.1Ah lithium thionyl cell).

When V

falls below the power fail threshold, a switch

DD

automatically selects V

instead of V

as the primary

BAT

DD

power supply. When this occurs, it is the responsibility of

software to switch to a low-power mode to minimize the

drain on the backup battery.

There are ten power connections that, together with asso-

ciated grounds, assure the integrity and continuity of the

power supply to the MAX71617/MAX71637.

V

: This pin is an output, driven by the selected pri-

3P3D

mary power input: either V

or V . Frequently, it is

BAT

DD

directly connected to the I/O power input (V ) to provide

power for I/O pins in the event of a brownout event.

AVDD: This input provides power to the ADC converter

array, the bandgap voltage reference and voltage com-

parators. It is generally connected to a 3.3V supply driven

from line power. While this input can be battery-backed by

means of an external connection, it is most often unnec-

essary to do this: in the absence of line power, the ADC

converters have nothing to measure. Currents into AVDD

returnꢀthroughꢀAGND.

IO

V

: This pin is a bypass point for the core power supply.

1P2

An internal regulator reduces the 3.3V supply to the 1.2V

required by internal logic. Connect an appropriate bypass

capacitor to this pin.

V

: This pin is a bypass point for the flash memory

1P8

power supply. An internal regulator reduces the 3.3V

supply to the 1.8V required by the flash memory array.

An appropriate bypass capacitor should be connected to

this pin.

RVDD: This power input supplies the remote interface

driver. It is provided as a separate input (and ground

return) to isolate the fast rise time, high-current pulses

that provide power to the remote ADC interfaces. As

with AVDD, it is typically not battery backed, since in the

absence of line power there is nothing to measure.

V

: This is the power input for the I/O pad ring. When

IO

configured as outputs, I/O pins use this supply to source

high logic-level output voltage and current. It can be con-

nected to any available source of 3.3V power, but is most

V

LCD

: This connection can serve as an input or output. If

V

is internally generated, the pin is a bypass point for

LCD

frequently connected to the V

output pin.

3P3D

LCDꢀvoltage.ꢀIfꢀexternalꢀV

is selected, this pin serves

LCD

V

RTC

: This is the power connection for the real-time

asꢀtheꢀsupplyꢀpinꢀforꢀtheꢀLCD.ꢀNoteꢀthatꢀthisꢀpinꢀsuppliesꢀ

the waveform generator and the contrast DAC, but does

notꢀsupplyꢀtheꢀLCDꢀdataꢀregisters.ꢀTheꢀdataꢀregistersꢀareꢀ

maintained on a nonvolatile supply.

clock and other nonvolatile circuits. In most cases, a low-

capacity primary battery (often a coin cell) is attached

to this pin. Unlike V

, the supply attached to this pin

BAT

cannot drive the primary logic voltage regulator. Instead,

if V and V both fail, V maintains the integrity of

V

DD

: This is the main digital power input to the device. In

DD

BAT

RTC

normal operation, the application circuit supplies 3.3V to

this pin. If power is removed, internal logic automatically

theꢀclockꢀandꢀotherꢀcriticalꢀfunctions,ꢀsuchꢀasꢀLCDꢀregis-

ters, tamper detect circuitry and I/O cells attached to the

MAXQ30 metering core.

switches power to the V

input. This pin supplies the

BAT

primary core regulator that drives all logic in the device. It

also nominally supplies power to the control logic for the

LCDꢀcontrastꢀDAC.

Maxim Integrated

│ 30

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MAX71617/MAX71637

Energy Measurement SoCs

Power Diagram

3.3V

ADC CONVERTERS,

VOLTAGE REFERENCE,

AND COMPARATORS

AVDD

REMOTE INTERFACE

LINEAR SECTION

A

V_3P3R

LCD VOLTAGE WAVEFORM

GENERATORS CONTRAST DAC

R

V_LCD

V_DD

S1

S2

LCD DAC CONTROL

V_BAT

PLL

V_3P3D

MAXQ30, ARM CORTEX-M3 CORES COMPUTE ENGINE

AND DECIMATORS ALL RAM BLOCKS AND PERIPHERALS

LOGIC FOR FLASH ARRAY

1.2V REGULATOR

V_1P2

1.8V REGULATOR

FLASH ARRAY

V_1P8

DIGITAL I/O PINS

V_IO

REAL-TIME CLOCK LCD REGISTERS

MAXQ I/O LOGIC TAMPER DETECT

V_RTC

S3

NONVOLATILE REGULATOR

CRYSTAL OSCILLATOR

There are three internal switches that select power for

the devices:

external event to wake the processor and switch S1

back to either V or V

.

BAT

DD

●ꢀ S1ꢀselectsꢀwhetherꢀV

or V

provides power to the

●ꢀ S2ꢀselectsꢀwhetherꢀV

or V

provides power for

BAT

DD

BAT

DD

logic and flash memory voltage regulators. Additionally,

softwareꢀcanꢀforceꢀS1ꢀintoꢀSLEEPꢀmodeꢀtoꢀdisconnectꢀ

the regulators completely from any source of power.

This mode is the lowest power mode, but requires an

theꢀ LCDꢀ DACꢀ controlꢀ logic.ꢀ Thisꢀ isꢀ aꢀ blockꢀ ofꢀ low-

power, 3.3V logic that manages the operation of the

LCDꢀDAC.

Maxim Integrated

│ 31

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MAX71617/MAX71637

Energy Measurement SoCs

●ꢀ S3ꢀselectsꢀtheꢀsourceꢀforꢀnonvolatileꢀpower.ꢀItꢀoperatesꢀ

Other Power Considerations

automatically and does not require software interven-

To conserve power and still maintain full operational capa-

bility, both cores support a stop mode. When either the

application core or the metering core is in stop mode, the

core is halted and there is no dynamic power consump-

tion in the core itself. There is still static power consump-

tion, and peripherals can still operate. In most systems,

it is wise to maintain the cores in stop mode for as much

of the time as possible to minimize power consumption.

tion. If V

is available, nonvolatile power is derived

DD

from that source; otherwise, nonvolatile power is

derived from V . If neither V nor V are avail-

BAT

DD

able, V

is the power source.

RTC

These automatic mechanisms, combined with software

controlled switches, provide several operating modes:

Mission mode: When V

and AVDD are available, the

DD

The ARM Cortex-M3 application core contains a clock

divider that can provide 108MHz, 54MHz, 27MHz, or

13.5MHz as the main CPU clock. The MAXQ30 metering

core always runs at 36MHz.

device is considered to be in mission mode. In this mode,

the 1.2V core regulator and the 1.8V flash regulator are

turned on, the core is capable of running at full speed, and

the AFE is processing samples and accumulating data.

This is also the highest power mode.

Software Development

The MAX71617/MAX71637 typically require at least three

software modules. The first is the CE module, provided

by Maxim. This module provides the low-level DSP func-

tions, and periodically reports the usage over a brief

period of time (by default one second) to software run-

ning on the MAXQ30 metering core. Contact Maxim for

information about obtaining loadable files for use with the

MAX71617/MAX71637.

Brownout mode: When AVDD and V

available, the device switches automatically to derive

are no longer

DD

core power from V . This mode is considered brownout

BAT

mode. In this mode, the core can still run at full speed, but

because AVDD is not available the AFE is not active. In

brownout mode, the full power for the core is provided by

the V

battery, so it is important for system software to

BAT

quickly reduce power consumption.

Software on the MAXQ30 core is tasked with managing

long-term accumulation of results from the CE module

and managing the external storage and the display

subsystems, among other tasks. Maxim provides sev-

eral versions of the MAXQ30 code to serve as samples;

alternately, MAXQ30 code can be developed directly by

the meter designer. Contact Maxim to determine what

MAXQ30 modules are available.

Sleep mode: The lowest-power mode. In sleep mode,

S1 is in the off position, and the voltage regulators are

effectively turned off. That means that power is removed

fromꢀallꢀCPUꢀcoresꢀandꢀmemoryꢀblocksꢀandꢀthatꢀtheꢀPLLꢀ

clock multiplier is turned off. Only the nonvolatile bus is

powered.

Sleep mode can actually be enabled at any time, whether

V

is available or not. If V

is not available, V

sup-

DD

BAT

If the designer elects to develop the MAXQ30 operating

code, a development environment is needed. If develop-

ment is occurring in assembly language, use the free

MAX-IDE software development kit. MAX-IDE is a com-

plete toolkit that includes assembler, editor and debug-

ger. For C development, Maxim recommends the Rowley

CrossWorks compiler and IDE. Contact Maxim for details

about how to obtain a license for this tool.

plies the nonvolatile power bus; if neither V

are available, V

nor V

DD

BAT

supplies the nonvolatile power bus.

RTC

Waking from sleep mode involves a cold restart of the

application core, and reloading the program RAM for the

MAXQ30 metering core as well as the compute engine

RAM block.

LCD Only mode: This is a special version of sleep mode

inꢀwhichꢀtheꢀregulatorsꢀareꢀdisabled,ꢀbutꢀtheꢀLCDꢀisꢀstillꢀ

activeꢀandꢀdrivingꢀaꢀdisplayꢀglass.ꢀInꢀLCDꢀOnlyꢀmode,ꢀS2ꢀ

selects either V

DACꢀcontrolꢀregisters.ꢀTheꢀactualꢀinputꢀforꢀtheꢀLCDꢀDACꢀ

(and thus the primary power to the waveform generators)

is provided on the V

maintained in the nonvolatile power domain and so do not

lose their contents even in sleep mode.

Finally, a software module for the ARM Cortex-M3 must

be provided. This module typically takes results from the

MAXQ30 core, format them as required and transmit

them through communication facilities attached to the

ARM Cortex-M3. Additionally, software running on the

application core frequently formats messages for the

metering core to control the peripherals under its control,

suchꢀasꢀtheꢀLCDꢀandꢀtheꢀmetrologyꢀsubsystem.

or V

ꢀtoꢀprovideꢀpowerꢀtoꢀtheꢀLCDꢀ

DD

BAT

ꢀpin.ꢀTheꢀLCDꢀdataꢀregistersꢀareꢀ

LCD

There are many development toolkits available for the

ARM architecture, in both freely available and paid

versions. A reference meter is available from Maxim

Integrated that includes source code for the ARM core

and that demonstrates the interaction between the vari-

ous cores. Contact your Maxim Integrated representative

for availability information.

LCDꢀOnlyꢀmodeꢀprovidesꢀmostꢀofꢀtheꢀpowerꢀbenefitsꢀofꢀ

sleepꢀmodeꢀwhileꢀcontinuingꢀtoꢀdriveꢀtheꢀLCD.

Maxim Integrated

│ 32

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MAX71617/MAX71637

Energy Measurement SoCs

Ordering Information/Selector Guide

PROGRAM

MEMORY

ARM CORTEX-M3

FLASH (MB)

DATA

MEMORY ARM

CORTEX-M3

(KB)

OPERATING

VOLTAGE (V)

METROLOGY PIN-

PART

TEMP RANGE

CHANNELS

PACKAGE

*

MAX71617ECD+

-40°C to +85°C

+2.7 to +3.6

1

128

4

7

120ꢀLQFP

*

MAX71617ECD+T

MAX71637ECD+

MAX71637ECD+T

+Denotes a lead(Pb)-free/RoHS-compliant package.

*Future product—contact factory for availability.

T = Tape and reel.

Chip Information

PROCESS: BiCMOS

Package Information

For the latest package outline information and land patterns

(footprints), go to www.maximintegrated.com/packages.ꢀNoteꢀ

that a “+”, “#”, or “-” in the package code indicates RoHS status

only. Package drawings may show a different suffix character, but

the drawing pertains to the package regardless of RoHS status.

PACKAGE

TYPE

PACKAGE

CODE

OUTLINE

NO.

LAND

PATTERN NO.

120ꢀLQFP

C120L+1

21-0684

90-0421

Maxim Integrated

│ 33

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MAX71617/MAX71637

Energy Measurement SoCs

Revision History

REVISION REVISION

PAGES

CHANGED

DESCRIPTION

NUMBER

DATE

0

3/14

Initial release

—

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses

are implied. Maxim Integrated reserves the right to change the circuitry and speciﬁcations without notice at any time. The parametric values (min and max limits)

shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.

©

Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.

2014 Maxim Integrated Products, Inc.

│ 34


型号：	MAX71637ECD+
厂家：	MAXIM INTEGRATED PRODUCTS
描述：	Analog Circuit, 1 Func, BICMOS, PQFP120, ROHS COMPLIANT, LQFP-120 信息通信管理
文件：	总34页 (文件大小：419K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MAX71637ECD+ [MAXIM]

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