MAX7403ESA+ [MAXIM]
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| 型号： | MAX7403ESA+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
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19-4764; Rev 2; 6/99
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
3/MAX407
Ge n e ra l De s c rip t io n
Fe a t u re s
The MAX7400/MAX7403/MAX7404/MAX7407 8th-order,
lowpass, elliptic, switched-capacitor filters (SCFs) oper-
ate from a single +5V (MAX7400/MAX7403) or +3V
(MAX7404/MAX7407) supply. These devices draw 2mA
of supply current and allow corner frequencies from
1Hz to 10kHz, making them ideal for low-power anti-
aliasing and post-DAC filtering applications. They fea-
ture a shutdown mode that reduces the supply current
to 0.2µA.
♦ 8th-Order Lowpass Elliptic Filter
♦ Low Noise and Distortion
-82dB THD + Noise (MAX7400)
♦ Clock-Tunable Corner Frequency (1Hz to 10kHz)
♦ 100:1 Clock-to-Corner Ratio
♦ Single-Supply Operation
+5V (MAX7400/MAX7403)
+3V (MAX7404/MAX7407)
Two c loc king op tions a re a va ila b le : s e lf-c loc king
(through the use of an external capacitor) or external
clocking for tighter cutoff-frequency control. In addition,
an offset adjustment pin (OS) allows for the adjustment
of the DC output level.
♦ Low Power
2mA (Operating Mode)
0.2µA (Shutdown Mode)
♦ Available in 8-Pin SO and DIP Packages
♦ Low Output Offset: ±5mV
The MAX7400/MAX7404 provide 82dB of stopband
rejection and a sharp rolloff with a transition ratio of 1.5.
The MAX7403/MAX7407 provide a sharper rolloff with a
transition ratio of 1.2, while still delivering 60dB of stop-
band rejection. The fixed response of these devices
simplifies the design task to corner-frequency selection
Ord e rin g In fo rm a t io n
PART
TEMP. RANGE
0°C to +70°C
PIN-PACKAGE
8 SO
MAX7400CSA
MAX7400CPA
MAX7400ESA
MAX7400EPA
b y s e tting
a c loc k fre q ue nc y. The MAX7400/
0°C to +70°C
8 Plastic DIP
8 SO
MAX7403/MAX7404/MAX7407 are available in 8-pin SO
and DIP packages.
-40°C to +85°C
-40°C to +85°C
8 Plastic DIP
Ap p lic a t io n s
Ordering Information continued at end of data sheet.
ADC Anti-Aliasing
Post-DAC Filtering
CT2 Base Stations
Speech Processing
S e le c t o r Gu id e
Air-Bag Electronics
OPERATING
VOLTAGE (V)
PART
FILTER RESPONSE
MAX7400
MAX7403
MAX7404
MAX7407
Elliptic (r = 1.5)
Elliptic (r = 1.2)
Elliptic (r = 1.5)
Elliptic (r = 1.2)
+5
+5
+3
+3
Typ ic a l Op e ra t in g Circ u it
V
SUPPLY
P in Co n fig u ra t io n
0.1µF
V
DD
SHDN
OUT
TOP VIEW
INPUT
IN
OUTPUT
COM
IN
1
2
3
4
8
7
6
5
CLK
SHDN
OS
MAX7400
MAX7403
MAX7404
MAX7407
MAX7400
MAX7403
MAX7404
MAX7407
CLOCK
CLK
COM
OS
GND
0.1µF
V
DD
OUT
GND
SO/DIP
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND
Continuous Power Dissipation (T = +70°C)
A
MAX7400/MAX7403 ..............................................-0.3V to +6V
MAX7404/MAX7407 ..............................................-0.3V to +4V
SO (derate 5.88mW/°C above +70°C)..........................471mW
DIP (derate 9.1mW/°C above +70°C) ...........................727mW
Operating Temperature Ranges
IN, OUT, COM, OS, CLK ............................-0.3V to (V + 0.3V)
DD
SHDN........................................................................-0.3V to +6V
OUT Short-Circuit Duration...................................................1sec
MAX740_C_A .....................................................0°C to +70°C
MAX740_E_A ..................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—MAX7400/MAX7403
(V = +5V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, SHDN = V , OS = COM, 0.1µF from COM to GND,
DD
DD
f
= 100kHz, T = T
to T , unless otherwise noted. Typical values are at +25°C.)
MAX
CLK
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
FILTER CHARACTERISTICS
Corner Frequency
f
(Note 1)
0.001 to 10
100:1
kHz
C
Clock-to-Corner Ratio
Clock-to-Corner Tempco
Output Voltage Range
Output Offset Voltage
f
/f
CLK C
10
ppm/°C
V
0.25
-0.1
V
DD
- 0.25
±25
V
V
IN
= V
= V / 2
±5
mV
OFFSET
COM
DD
DC Insertion Gain with
Output Offset Removed
V
COM
= V / 2 (Note 2)
0.15
0.3
dB
dB
DD
MAX7400
MAX7403
-82
-80
1
Total Harmonic Distortion
plus Noise
f
IN
= 200Hz, V = 4Vp-p,
IN
THD+N
measurement bandwidth = 22kHz
OS Voltage Gain to OUT
Input Voltage Range at OS
A
OS
V/V
V
V
OS
V
COM
±0.1
V
- 0.5
/ 2
V
+ 0.5
/ 2
DD
DD
Input, COM externally driven
Output, COM internally biased
V
/ 2
DD
COM Voltage Range
V
COM
V
V
/ 2
V
/ 2
DD
DD
V
DD
/ 2
- 0.2
+ 0.2
Input Resistance at COM
Clock Feedthrough
R
75
125
10
1
kΩ
mVp-p
kΩ
COM
3/MAX407
Resistive Output Load Drive
R
C
10
50
L
L
Maximum Capacitive Load
at OUT
500
pF
Input Leakage Current at COM
Input Leakage Current at OS
CLOCK
±0.1
±0.1
±10
±10
µA
µA
SHDN = GND, V
= 0 to V
DD
COM
V
= 0 to (V - 1V) (Note 3)
DD
OS
Internal Oscillator Frequency
Clock Input Current
Clock Input High
f
C
= 1000pF (Note 4)
= 0 or 5V
CLK
29
38
48
kHz
µA
V
OSC
OSC
I
V
±15
±30
CLK
V
V
- 0.5
IH
DD
Clock Input Low
V
IL
0.5
V
2
_______________________________________________________________________________________
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
3/MAX407
ELECTRICAL CHARACTERISTICS—MAX7400/MAX7403 (continued)
(V = +5V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, SHDN = V , OS = COM, 0.1µF from COM to GND,
DD
DD
f
= 100kHz, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX
A
CLK
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER REQUIREMENTS
Supply Voltage
V
4.5
5.5
3.5
1
V
DD
Supply Current
I
DD
Operating mode, no load, IN = OS = COM
2
mA
µA
dB
Shutdown Current
I
0.2
60
SHDN = GND, CLK driven from 0 to V
SHDN
DD
Power-Supply Rejection Ratio
SHUTDOWN
PSRR
Measured at DC
V
V
DD
- 0.5
V
V
SHDN Input High
SDH
V
SDL
0.5
SHDN Input Low
V
SHDN
= 0 to V
±0.1
±10
µA
SHDN Input Leakage Current
DD
ELECTRICAL CHARACTERISTICS—MAX7404/MAX7407
(V = +3V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, SHDN = V , OS = COM, 0.1µF from COM to GND,
DD
DD
f
= 100kHz, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
CLK
A
MIN
MAX
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
FILTER CHARACTERISTICS
Corner Frequency
f
(Note 1)
0.001 to 10
100:1
kHz
C
Clock-to-Corner Ratio
Clock-to-Corner Tempco
Output Voltage Range
Output Offset Voltage
f
/f
CLK C
10
ppm/°C
V
0.25
-0.1
V
DD
- 0.25
±25
V
V
IN
= V
= V / 2
±5
mV
OFFSET
COM
DD
DC Insertion Gain with Output
Offset Removed
V
COM
= V / 2 (Note 2)
0.1
0.3
dB
dB
DD
MAX7404
MAX7407
-79
-77
1
Total Harmonic Distortion
plus Noise
f
IN
= 200Hz, V = 2.5Vp-p,
IN
THD+N
measurement bandwidth = 22kHz
OS Voltage Gain to OUT
Input Voltage Range at OS
A
OS
V/V
V
V
OS
V
COM
±0.1
V
- 0.1
/ 2
V
+ 0.1
/ 2
DD
DD
COM Voltage Range
V
COM
COM internally biased or externally driven
V
V
DD
/ 2
Input Resistance at COM
Clock Feedthrough
R
75
125
10
1
kΩ
mVp-p
kΩ
COM
Resistive Output Load Drive
R
C
10
50
L
L
Maximum Capacitive Load
at OUT
500
pF
Input Leakage Current at COM
Input Leakage Current at OS
±0.1
±0.1
±10
±10
µA
µA
SHDN = GND, V
= 0 to V
DD
COM
V
= 0 to (V - 1V) (Note 3)
DD
OS
_______________________________________________________________________________________
3
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
ELECTRICAL CHARACTERISTICS—MAX7404/MAX7407 (continued)
(V = +3V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, SHDN = V , OS = COM, 0.1µF from COM to GND,
DD
DD
f
= 100kHz, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX
A
CLK
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CLOCK
Internal Oscillator Frequency
Clock Input Current
Clock Input High
f
C
= 1000pF (Note 4)
OSC
26
34
43
kHz
µA
V
OSC
I
V
CLK
= 0 or 3V
±15
±30
CLK
V
V
- 0.5
IH
DD
Clock Input Low
V
IL
0.5
V
POWER REQUIREMENTS
Supply Voltage
V
2.7
3.6
3.5
1
V
DD
Supply Current
I
DD
Operating mode, no load, IN = OS = COM
2
mA
µA
dB
Shutdown Current
I
0.2
60
SHDN = GND, CLK driven from 0 to V
SHDN
DD
Power-Supply Rejection Ratio
SHUTDOWN
PSRR
Measured at DC
V
V
DD
- 0.5
V
V
SHDN Input High
SDH
V
SDL
0.5
SHDN Input Low
V
= 0 to V
±0.1
±10
µA
SHDN Input Leakage Current
SHDN
DD
ELLIPTIC (r = 1.5) FILTER CHARACTERISTICS—MAX7400/MAX7404
(V = +5V for MAX7400, V = +3V for MAX7404; filter output measured at OUT; 10kΩ || 50pF load to GND at OUT; SHDN = V ;
DD
DD
DD
V
COM
= V = V / 2; f
= 100kHz; T = T
to T
; unless otherwise noted. Typical values are at T = +25°C.)
MAX
A
OS
DD
CLK
A
MIN
PARAMETER
CONDITIONS
MIN
-0.20
-0.20
-0.20
-0.20
-0.20
-0.20
-0.20
TYP
MAX
0.20
0.20
0.20
0.20
0.20
0.25
0.25
-75
UNITS
f
= 0.371f
-0.10
0.02
-0.08
0.06
-0.03
0.09
0.02
-82
IN
C
f
IN
= 0.587f
C
f
IN
= 0.737f
C
f
IN
= 0.868f
C
f
IN
= 0.940f
C
Insertion Gain Relative to DC Gain
(Note 5)
dB
f
IN
= 0.988f
C
3/MAX407
f
IN
= 1.000f
C
f
IN
= 1.500f
C
f
IN
= 1.601f
-84
-78
C
f
IN
= 2.020f
-83
-78
C
f
IN
= 4.020f
-85
-78
C
4
_______________________________________________________________________________________
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
3/MAX407
ELLIPTIC (r = 1.2) FILTER CHARACTERISTICS—MAX7403/MAX7407
(V = +5V for MAX7403, V = +3V for MAX7407; filter output measured at OUT; 10kΩ || 50pF load to GND at OUT; SHDN = V ;
DD
DD
DD
V
COM
= V = V / 2; f
= 100kHz; T = T
to T
; unless otherwise noted. Typical values are at T = +25°C.)
MAX
A
OS
DD
CLK
A
MIN
PARAMETER
CONDITIONS
MIN
-0.20
-0.20
-0.20
-0.20
-0.20
-0.20
-0.20
TYP
MAX
0.20
0.20
0.20
0.20
0.20
0.30
0.30
-50
UNITS
f
= 0.408f
-0.11
0.02
-0.06
0.10
0.02
0.14
0.09
-58
IN
C
f
IN
= 0.640f
C
f
IN
= 0.784f
C
f
IN
= 0.902f
C
f
IN
= 0.956f
C
Insertion Gain Relative to DC Gain
(Note 5)
dB
f
IN
= 0.992f
C
f
IN
= 1.000f
C
f
IN
= 1.200f
C
f
IN
= 1.261f
-59
-54
C
f
IN
= 1.533f
-60
-54
C
f
IN
= 2.875f
-60
-54
C
Note 1: The maximum f is defined as the clock frequency, f
= 100 · f , at which the peak SINAD drops to 68dB with a
C
C
CLK
sinusoidal input at 0.2f .
C
Note 2: DC insertion gain is defined as ∆V
/ ∆V .
IN
OUT
Note 3: OS voltages above V - 1V saturate the input and result in a 75µA typical input leakage current.
DD
3
3
Note 4: For MAX7400/MAX7403, f
(kHz) 38 · 10 / C
(pF). For MAX7404/MAX7407, f
(kHz) 34 · 10 / C
(pF).
OSC
OSC
OSC
OSC
Note 5: The input frequencies, f , are selected at the peaks and troughs of the frequency responses.
IN
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(V
DD
= +5V for MAX7400/MAX7403, V
= +3V for MAX7404/MAX7407; V
= V = V
/ 2; SHDN = V ; f
= 100kHz;
DD
COM
OS
DD
DD CLK
T
A
= +25°C; unless otherwise noted.)
MAX7400/MAX7404 (r = 1.5)
FREQUENCY RESPONSE
MAX7400/MAX7404 (r = 1.5)
PASSBAND FREQUENCY RESPONSE
MAX7400/MAX7404 (r = 1.5)
PHASE RESPONSE
20
0.24
0.20
0.16
0.12
0.08
0.04
0
0
f = 1kHz
C
f = 1kHz
C
f = 1kHz
C
-80
0
-20
-160
-240
-320
-400
-40
-60
-80
-480
-560
-640
-100
-120
-0.04
-0.08
0
1
2
3
4
5
0
202
404
606
808
1010
0
300
600
900
1200
1500
INPUT FREQUENCY (kHz)
INPUT FREQUENCY (Hz)
INPUT FREQUENCY (Hz)
_______________________________________________________________________________________
5
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V
DD
= +5V for MAX7400/MAX7403, V
= +3V for MAX7404/MAX7407; V
= V = V
/ 2; SHDN = V ; f
= 100kHz;
DD
COM
OS
DD
DD CLK
T
A
= +25°C; unless otherwise noted.)
MAX7403/MAX7407 (r = 1.2)
FREQUENCY RESPONSE
MAX7403/MAX7407 (r = 1.2)
PASSBAND FREQUENCY RESPONSE
MAX7403/MAX7407 (r = 1.2)
PHASE RESPONSE
40
0.32
0.24
0.16
0.08
0
0
-80
f = 1kHz
C
f = 1kHz
C
f = 1kHz
C
20
0
-160
-240
-320
-400
-480
-560
-640
-20
-40
-60
-80
-100
-120
-0.08
-0.16
-0.24
-0.32
0
1
2
3
4
5
0
202
404
606
808
1010
0
240
480
720
960
1200
INPUT FREQUENCY (kHz)
INPUT FREQUENCY (Hz)
INPUT FREQUENCY (Hz)
OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SUPPLY CURRENT
vs. TEMPERATURE
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
20
15
10
5
2.03
2.02
2.01
2.00
1.99
1.98
1.97
NO LOAD
V
= V
= V /2
IN COM DD
NO LOAD
MAX7400
MAX7403
MAX7400
MAX7403
MAX7404
MAX7407
MAX7400
MAX7403
MAX7404
MAX7407
0
-5
-10
-15
-20
MAX7404
MAX7407
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-40 -20
0
20
40
60
80 100
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
3/MAX407
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE AND RESISTIVE LOAD (MAX7400)
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE (MAX7400)
OFFSET VOLTAGE vs. TEMPERATURE
0
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
2.0
1.5
1.0
0.5
0
f
= 200Hz
IN
V
= V
= V /2
IN COM DD
NO LOAD
(SEE TABLE A)
-10
-20
-30
-40
-50
-60
-70
-80
-90
f = 1kHz
C
MEASUREMENT BW = 22kHz
R = 500Ω
L
R = 1kΩ
L
B
C
D
R = 10kΩ
L
-0.5
0
1
2
3
4
5
0
1
2
3
4
5
-40 -20
0
20
40
60
80 100
AMPLITUDE (Vp-p)
AMPLITUDE (Vp-p)
TEMPERATURE (°C)
6
_______________________________________________________________________________________
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
3/MAX407
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V
DD
= +5V for MAX7400/MAX7403, V
= +3V for MAX7404/MAX7407; V
= V = V
/ 2; SHDN = V ; f
= 100kHz;
DD
COM
OS
DD
DD CLK
T
A
= +25°C; unless otherwise noted.)
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE AND RESISTIVE LOAD (MAX7403)
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE (MAX7403)
TABLE A. THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE TEST CONDITIONS
0
0
NO LOAD
(SEE TABLE A)
f
= 200Hz
IN
-10
-20
-30
-40
-50
-60
-70
-80
-90
-10
f = 1kHz
C
f
f
f
MEASUREMENT
IN
C
CLK
MEASUREMENT BW = 22kHz
TRACE
-20
-30
-40
-50
(Hz) (kHz) (kHz) BANDWIDTH (kHz)
R = 500Ω
A
B
C
D
2800 14 1400
2000 10 1000
80
80
80
22
L
R
L =
1kΩ
B
-60
C
R = 10kΩ
L
1000
200
5
1
500
100
D
-70
-80
-90
0
1
2
3
4
5
0
1
2
3
4
5
AMPLITUDE (Vp-p)
AMPLITUDE (Vp-p)
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE AND RESISTIVE LOAD (MAX7404)
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE (MAX7404)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
0
f
= 200Hz
IN
NO LOAD
(SEE TABLE A)
-10
-20
-30
-40
-50
-60
-70
-80
-90
f = 1kHz
C
MEASUREMENT BW = 22kHz
R = 500Ω
L
A
B
R = 10kΩ
L
C
D
R = 1kΩ
L
0
0.5
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
2.0
2.5
3.0
AMPLITUDE (Vp-p)
AMPLITUDE (Vp-p)
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE AND RESISTIVE LOAD (MAX7407)
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE (MAX7407)
0
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
f
= 200Hz
IN
NO LOAD
(SEE TABLE A)
-10
-20
-30
-40
-50
-60
-70
-80
-90
f = 1kHz
C
MEASUREMENT BW = 22kHz
R = 500Ω
L
A
B
C
R = 1kΩ
L
R = 10kΩ
L
D
0
0.5
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
2.0
2.5
3.0
AMPLITUDE (Vp-p)
AMPLITUDE (Vp-p)
_______________________________________________________________________________________
7
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V
DD
= +5V for MAX7400/MAX7403, V
= +3V for MAX7404/MAX7407; V
= V = V
/ 2; SHDN = V ; f
= 100kHz;
DD
COM
OS
DD
DD CLK
T
A
= +25°C; unless otherwise noted.)
NORMALIZED OSCILLATOR FREQUENCY
vs. TEMPERATURE
INTERNAL OSCILLATOR FREQUENCY
NORMALIZED OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
vs. C
CAPACITANCE
OSC
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
10,000
C
= 390pF
OSC
C
= 390pF
OSC
1000
100
10
MAX7400
MAX7403
MAX7404
MAX7407
MAX7404
MAX7407
MAX7400
MAX7403
1
0.1
0.01
-40 -20
0
20
40
60
80 100
10
1000
2.5
3.0
3.5
4.0
4.5
5.0
5.5
1
100
0.1
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
C
OSC
CAPACITANCE (nF)
P in De s c rip t io n
PIN
NAME
FUNCTION
Common Input. Biased internally at midsupply. Bypass externally to GND with a 0.1µF capacitor. To over-
ride internal biasing, drive with an external supply.
1
COM
2
3
4
5
IN
Filter Input
GND
Ground
V
DD
Positive Supply Input: +5V for MAX7400/MAX7403, +3V for MAX7404/MAX7407
Filter Output
OUT
OS
3/MAX407
Offset Adjust Input. To adjust output offset, bias OS externally. Connect OS to COM if no offset adjustment is
needed. Refer to Offset and Common-Mode Input Adjustment section.
6
7
8
Shutdown Input. Drive low to enable shutdown mode; drive high or connect to V for normal operation.
DD
SHDN
CLK
Clock Input. To override the internal oscillator, connect to an external clock; otherwise, connect an external
capacitor (C
) from CLK to GND to set the internal oscillator frequency.
OSC
8
_______________________________________________________________________________________
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
3/MAX407
De t a ile d De s c rip t io n
The MAX7400/MAX7403/MAX7404/MAX7407 family of
8th-order, lowpass filters provides sharp rolloff with
g ood s top b a nd re je c tion. All p a rts op e ra te with a
100:1 clock-to-corner frequency ratio and a 10kHz
maximum corner frequency. These devices accept a
single +5V (MAX7400/MAX7403) or +3V (MAX7404/
MAX7407) supply. Figure 1 shows the functional dia-
gram.
INT
CLOCK
7
4
8
2
SHDN
CLK
IN
LOGIC
V
DD
V
DD
Most switched-capacitor filters (SFCs) are designed
with biquadratic sections. Each section implements two
filtering poles, and the sections can be cascaded to
produce higher-order filters. The advantage of this
a p p roa c h is e a s e of d e s ig n. Howe ve r, this typ e of
design is highly sensitive to component variations if any
section’s Q is high. The MAX7400 family uses an alter-
native approach, which is to emulate a passive network
using switched-capacitor integrators with summing and
scaling. The passive network can be synthesized using
CAD programs or can be found in many filter books.
Figure 2 shows a basic 8th-order ladder elliptic filter
structure.
MAX7400
MAX7403
MAX7404
MAX7407
SCF
1
5
6
3
COM
OUT
OFFSET
ADJ
OS
GND
BIAS
A switched-capacitor filter that emulates a passive lad-
der filter retains many of the same advantages. The
component sensitivity of a passive ladder filter is low
when compared to a cascaded biquadratic design,
because each component affects the entire filter shape
rather than a single pole-zero pair. In other words, a
mismatched component in a biquadratic design has a
concentrated error on its respective poles, while the
same mismatch in a ladder filter design spreads its
error over all poles.
Figure 1. Functional Diagram
C11
L7
C9
C10
R1
L5
L1
L3
Ellip t ic Ch a ra c t e ris t ic s
Lowpass, elliptic filters such as the MAX7400/MAX7403/
MAX7404/MAX7407 provide the steepest possible rolloff
with frequency of the four most common filter types
(Butterworth, Bessel, Chebyshev, and Elliptic). Figure 3
shows the 8th-order elliptic filter response. The high Q
value of the poles near the passband edge combined
with the stopband zeros allows for the sharp attenua-
tion c ha ra c te ris tic of e llip tic filte rs , ma king the s e
devices ideal for anti-aliasing and post-DAC filtering in
single-supply systems (see the Anti-Aliasing and Post-
DAC Filtering section).
+
-
V
0
V
IN
C6
R2
C2
C4
C8
Figure 2. 8th-Order Ladder Filter Network
The corner frequency, f , is defined as the point where
C
the filter output attenuation falls just below the passband
ripple. The transition ratio is defined as the ratio of the
stopband frequency to the corner frequency:
r = f / f
S
C
In the frequency domain, the first transmission zero
causes the filter’s amplitude to drop to a minimum level.
Beyond this zero, the response rises as the frequency
increases until the next transmission zero. The stopband
The MAX7400/MAX7404 have a transition ratio of 1.5
a nd a typ ic a l s top b a nd re je c tion of 82d B. The
MAX7403/MAX7407 have a transition ratio of 1.2 (pro-
vid ing the s te e p e s t rolloff) a nd a typ ic a l s top b a nd
rejection of 60dB.
begins at the stopband frequency, f . At frequencies
S
above f , the filter’s gain does not exceed the gain at f .
S
S
_______________________________________________________________________________________
9
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
V
SUPPLY
RIPPLE
0.1µF
f
C
V
DD
SHDN
OUT
f
f
C
S
OUTPUT
TRANSITION RATIO =
INPUT
IN
COM
0.1µF
0.1µF
50k
50k
50k
f
S
MAX7400
MAX7403
MAX7404
MAX7407
CLOCK
CLK
OS
GND
PASSBAND
STOPBAND
FREQUENCY
f
C
f
S
Figure 3. Elliptic Filter Response
Figure 4. Offset Adjustment Circuit
input impedance determined by the following equation
represents the average input impedance, since the
input current is not continuous. As a rule, use a driver
with an output source impedance less than 10% of the
filter’s input impedance. Estimate the input impedance
of the filter using the following formula:
Clo c k S ig n a l
External Clock
The MAX7400/MAX7403/MAX7404/MAX7407 SCFs
were designed for use with external clocks that have a
40% to 60% duty cycle. When using an external clock,
drive CLK with a CMOS gate powered from 0 to V
.
DD
1
Varying the rate of the external clock adjusts the filter
corner frequency:
Z
(Ω) =
IN
(f
C
)
IN
CLK
f
C
= f
/ 100
CLK
where f
= clock frequency and C = 0.85pF.
IN
CLK
Internal Clock
When using the internal oscillator, the capacitance
(C ) on the CLK pin determines the oscillator fre-
Lo w -P o w e r S h u t d o w n Mo d e
These devices feature a shutdown mode that is activat-
ed by driving SHDN low. Placing the filter in shutdown
mode reduces the supply current to 0.2µA (typ) and
places the output of the filter into a high-impedance
state. For normal operation, drive SHDN high or con-
OSC
quency:
3
K
10
f
(kHz) =
; C
in pF
OSC
OSC
C
OSC
nect to V
.
DD
3/MAX407
where K = 38 for the MAX7400/MAX7403, and K = 34
for the MAX7404/MAX7407. Since the capacitor value
is in picofarads, minimize the stray capacitance at CLK
so that it does not affect the internal oscillator frequen-
cy. Varying the rate of the internal oscillator adjusts the
filter’s corner frequency by a 100:1 clock-to-corner fre-
quency ratio. For example, an internal oscillator fre-
q ue nc y of 100kHz p rod uc e s a nomina l c orne r
frequency of 1kHz.
Ap p lic a t io n s In fo rm a t io n
Offs e t a n d Co m m o n -Mo d e
In p u t Ad ju s t m e n t
The voltage at COM sets the common-mode input volt-
age and is internally biased at midsupply by a resistor-
d ivid e r. Byp a s s COM with a 0.1µF c a p a c itor a nd
connect OS to COM. For applications requiring offset
adjustment or DC level shifting, apply an external bias
voltage through a resistor-divider network to OS, as
shown in Figure 4. (Note: Do not leave OS unconnect-
ed.) The output voltage is represented by the following
equation:
In p u t Im p e d a n c e
vs . Clo c k Fre q u e n c ie s
The MAX7400/MAX7403/MAX7404/MAX7407’s input
impedance is effectively that of a switched-capacitor
resistor and is inversely proportional to frequency. The
V
OUT
= (V - V
) + V
COM OS
IN
10 ______________________________________________________________________________________
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
3/MAX407
with V
= V / 2 (typical), and where (V - V
)
An t i-Alia s in g a n d P o s t -DAC Filt e rin g
Whe n us ing the MAX7400/MAX7403/MAX7404/
MAX7407 for anti-aliasing or post-DAC filtering, syn-
chronize the DAC and the filter clocks. If the clocks are
not synchronized, beat frequencies may alias into the
passband.
COM
DD
IN
COM
is lowpass filtered by the SCF, and V is added at the
OS
output stage. See the Electrical Characteristics for
COM and OS input voltage ranges. Changing the volt-
a g e on COM or OS s ig nific a ntly from mid s up p ly
reduces the filter’s dynamic range.
The high clock-to-corner frequency ratio (100:1) also
eases the requirements of pre- and post-SCF filtering.
At the input, a lowpass filter prevents the aliasing of fre-
quencies around the clock frequency into the pass-
band. At the output, a lowpass filter attenuates the
clock feedthrough.
P o w e r S u p p lie s
The MAX7400/MAX7403 operate from a single +5V
supply. The MAX7404/MAX7407 operate from a single
+3V supply. Bypass V
to GND with a 0.1µF capaci-
DD
tor. If dual supplies are required, connect COM to the
system ground and GND to the negative supply. Figure
5 shows an example of dual-supply operation. Single-
supply and dual-supply performance are equivalent.
For single-supply or dual-supply operation, drive CLK
and SHDN from GND (V- in dual-supply operation) to
A high clock-to-corner frequency ratio allows a simple
RC lowpass filter, with the cutoff frequency set above
the SCF corner frequency, to provide input anti-aliasing
and reasonable output clock attenuation.
V . For a ±2.5V supply, use the MAX7400 or MAX7403;
DD
Ha rm o n ic Dis t o rt io n
Harmonic distortion arises from nonlinearities within the
filter. Such nonlinearities generate harmonics when a
pure sine wave is applied to the filter input. Table 1 lists
typical harmonic distortion values with a 10kΩ load and
an input signal of 4Vp-p (MAX7400/MAX7403) or 2Vp-p
for a ±1.5V supply, use MAX7404 or MAX7407. For ±5V
dual-supply applications, use the MAX291–MAX297.
In p u t S ig n a l Am p lit u d e Ra n g e
The ideal input signal range is determined by observ-
ing the volta g e le ve l a t whic h the tota l ha rmonic
distortion plus noise (THD+N) is minimized for a given
corner frequency. The Typical Operating Character-
is tic s s how THD+N re s p ons e a s the inp ut s ig na l’s
peak-to-peak amplitude is varied. These measurements
are made with OS and COM biased at midsupply.
(MAX7404/MAX7407), at T = +25°C.
A
Table 1. Typical Harmonic Distortion
V+
TYPICAL
HARMONIC
DISTORTION (dB)
f
f
f
V
IN
CLK
C
IN
FILTER
(kHz) (kHz) (Hz) (Vp-p)
*
V
DD
2nd 3rd 4th 5th
SHDN
OUT
OUTPUT
100
500
100
500
100
500
100
500
1
5
1
5
1
5
1
5
200
1000
200
-89 -82 -89 -86
-89 -77 -93 -88
-88 -81 -91 -87
-84 -80 -90 -91
-85 -82 -85 -86
-85 -81 -86 -84
-85 -82 -85 -86
-86 -84 -85 -86
INPUT
IN
COM
MAX7400
MAX7403
MAX7404
MAX7407
4
4
2
2
MAX7400
MAX7403
MAX7404
MAX7407
V+
V-
CLOCK
CLK
OS
1000
200
0.1µF
0.1µF
GND
1000
200
V-
1000
*DRIVE SHDN TO V- FOR LOW-POWER SHUTDOWN MODE.
Figure 5. Dual-Supply Operation
______________________________________________________________________________________ 11
8 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
Ord e rin g In fo rm a t io n (c o n t in u e d )
Ch ip In fo rm a t io n
PART
TEMP. RANGE
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
8 SO
TRANSISTOR COUNT: 1116
MAX7403CSA
MAX7403CPA
MAX7403ESA
MAX7403EPA
MAX7404CSA
MAX7404CPA
MAX7404ESA
MAX7404EPA
MAX7407CSA
MAX7407CPA
MAX7407ESA
MAX7407EPA
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
8 SO
8 Plastic DIP
P a c k a g e In fo rm a t io n
3/MAX407
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 4 0 8 -7 3 7 -7 6 0 0
© 1999 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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