MAX77960BEFV12+ [MAXIM]
25VIN, 3AOUT to 6AOUT, USB-C Buck-Boost Charger with Integrated FETs for 2S/3S Li-Ion Batteries;
| 型号： | MAX77960BEFV12+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 25VIN, 3AOUT to 6AOUT, USB-C Buck-Boost Charger with Integrated FETs for 2S/3S Li-Ion Batteries |
| 文件： | 总82页 (文件大小：939K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
Click here to ask about the production status of specific part numbers.
MAX77960B/MAX77961B
25V , 3A
to 6A , USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
General Description
Benefits and Features
The MAX77960B/MAX77961B are high-performance
wide-input 3A (MAX77960B)/6A (MAX77961B) buck-
boost chargers with Smart Power Selector™ and operate
as a reverse buck converter without an additional inductor,
allowing the ICs to power USB on-the-go (OTG) acces-
sories. The devices integrate low-loss power switches and
provide high efficiency, low heat, and fast battery charging
in a small solution size. The reverse buck has true load
disconnect and is protected by an adjustable output cur-
rent limit. The devices are highly flexible and programma-
● 3.5V to 25.4V Input Operating Range, 30V
DC
Withstand
● 97% Peak Efficiency for 2S Battery at
9V /7.4V
/1.5A
IN
OUT
OUT
● 97% Peak Efficiency for 3S Battery at
15V /12.6V
/2A
IN
OUT
OUT
● MAX77960B
• 100mA to 3.15A Programmable Input Current Limit
• 100mA to 3A Programmable Constant Current
Charge
2
ble through I C configuration or autonomously through re-
sistor configuration.
● MAX77961B
• 100mA to 6.3A Programmable Input Current Limit
• 100mA to 6A Programmable Constant Current
Charge
The battery charger includes the Smart Power Selector to
accommodate a wide range of battery sizes and system
loads. The Smart Power Selector allows the system to
start up smoothly when an input source is available even
when the battery is deeply discharged (dead battery) or
missing. For battery safety/authentication reasons, the ICs
can be configured to keep charging disabled, and allow
the DC-DC to switch and regulate the SYS voltage. The
● Remote Differential Voltage Sensing
● 600kHz or 1.2MHz Switching Frequency Options
● System Instant On with Smart Power Selector Power
Path
● Charge Safety Timer
● Die Temperature Regulation with Thermal Foldback
Loop
● Input Power Management with Adaptive Input Current
Limit (AICL) and Input Voltage Regulation
● 10mΩ BATT to SYS Switch, Up to 10A Overcurrent
Threshold
2
system processor can later enable charging using I C
commands as appropriate. Alternatively, the ICs can be
configured to automatically start charging.
Applications
● USB Type-C Powered Wide-Input Charging
● Reverse Buck Mode 5.1V/3A to Support USB OTG
Applications
● JEITA Compliant with NTC Thermistor Monitor
● I C or Resistor Programmable
● 4mm x 4mm, 30-Lead FC2QFN
● 2- and 3-Cell Battery-Powered Devices
● Smartphones, Tablets, and 2-in-1 Laptops
● Medical Devices, Health and Fitness Monitors
● Digital Still, Video, and Action Cameras
● Handheld Computers and Terminals
● Handheld Radios
2
Ordering Information appears at end of data sheet.
● Power Tools
● Drones
● Battery Backup
● Wireless Speakers
Smart Power Selector is a trademark of Maxim Integrated Products, Inc.
19-101123; Rev 0; 6/21
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Simplified Block Diagram
SYS
CHGIN
V
V
SYS
BUS
SYSA
PGND
Q
1
Q
3
CSINN
CSINP
Q
Q
4
2
Q
BAT
V
PVL
PVL
AVL
BATT
V
BATT
BIAS AND
REFERENCE
V
AVL
GATE DRIVER
V
AVL
OPTIONAL I2C
COMMUNICATION
JEITA
THM
THM
PK+
SCL
SDA
INTB
SCL
SDA
INTB
BATSP
2
I
C INTERFACE AND
INTERRUPT
CHARGER AND OTG CONTROL
PK-
BATSN
OTGEN
DISQBAT
STBY
OTGEN
DISQBAT
STBY
2/3-CELL LI-ION BATTERY
ISET
ITO
INLIM
VSET
OPTIONAL RESISTOR
PROGRAMMABILITY
STAT
STAT
CNFG
V
PVL
UVLO
OVLO
OCP
INOKB
GND
THERMAL MONITOR
INOKB
THERMAL SHDN
MAX77960B
MAX77961B
www.maximintegrated.com
Maxim Integrated | 2
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
TABLE OF CONTENTS
General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Benefits and Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
30-Lead FC2QFN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Typical Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
MAX77960B/MAX77961B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Charger Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Device Configuration Input (CNFG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CHGIN Standby Input (STBY) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Battery to SYS Q
Disable Input (DISQBAT). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
BAT
Q
BAT
and DC-DC Control—Configuration Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Thermistor Input (THM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Autonomous Charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Charger Input Current Limit Setting Input (INLIM). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Fast-Charge Current Setting Input (ISET). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Top-Off Current Setting Input (ITO). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Charge Termination Voltage Setting Input (VSET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Switch Mode Charger. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Smart Power Selector (SPS). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
CHGIN Regulation Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SYS Regulation Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Power States. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Powering Up with the Charger Disabled by Default . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Input Validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Adaptive Input Current Limit (AICL) and Input Voltage Regulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Input Self-Discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
System Self-Discharge with No Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Charger States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
No Input Power or Charger Disabled Idle State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Precharge State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Trickle Charge State. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Fast-Charge Constant Current State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
www.maximintegrated.com
Maxim Integrated | 3
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
TABLE OF CONTENTS (CONTINUED)
Fast-Charge Constant Voltage State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Top-Off State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Done State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Timer Fault State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Watchdog Timer Suspend State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Thermal Shutdown State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Thermal Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Thermal Foldback. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
JEITA Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Thermal Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Factory Ship Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Minimum System Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Battery Differential Voltage Sense (BATSP, BATSN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Battery Overcurrent Alert. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Charger Interrupt Debounce Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Input Power-OK/OTG Power-OK Output (INOKB). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Charge Status Output (STAT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Reverse Buck Mode (OTG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
OTG Enable (OTGEN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Analog Low-Noise Power Input (AVL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Low-Side Gate Driver Power Supply (PVL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
System Faults. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Interrupt Output (INTB). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2
I C Serial Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
System Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Bit Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
START and STOP Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Acknowledge. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Slave Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Clock Stretching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
General Call Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Communication Speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Communication Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Writing to a Single Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Writing to Sequential Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Writing Multiple Bytes using Register-Data Pairs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Reading from a Single Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Reading from Sequential Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
www.maximintegrated.com
Maxim Integrated | 4
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
TABLE OF CONTENTS (CONTINUED)
FUNC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Register Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Inductor Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
CHGIN Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
SYS Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Battery Insertion Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
PCB Layout Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Typical Application Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
2
Wide-Input I C Programmable Charger. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
2
Wide-Input I C Programmable Charger with Charger Disabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Wide-Input Autonomous Charger. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
www.maximintegrated.com
Maxim Integrated | 5
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
LIST OF FIGURES
Figure 1. Li Battery Charge Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 2. Charger State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 3. Charge Currents vs. Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 4. JEITA Compliance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 5. B2SOVRC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 6. Functional Logic Diagram for Communications Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2
Figure 7. I C Bit Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
2
Figure 8. I C Start Stop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 9. Writing to a Single Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 10. Writing to Sequential Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 11. Writing to Multiple Registers with “Multiple Byte Register-Data Pairs” Protocol . . . . . . . . . . . . . . . . . . . . . . 47
Figure 12. Reading from a Single Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 13. Reading from Sequential Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 14. Battery Insertion Protection with 2S Battery. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Figure 15. Battery Insertion Protection with 3S Battery. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Figure 16. PCB Layout Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
www.maximintegrated.com
Maxim Integrated | 6
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
LIST OF TABLES
Table 1. CNFG Program Options Lookup Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 2. Q and DC-DC Control Configuration Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
BAT
Table 3. Trip Temperatures for Different Thermistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 4. INLIM, ITO, ISET, and VSET Pin Connections for Autonomous Charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 5. INLIM Program Options Lookup Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 6. ISET Program Options Lookup Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 7. ITO Program Options Lookup Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 8. VSET Program Options Lookup Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 9. List of Charger Interrupt Debounce Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 10. Charge Status Indicator by STAT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 11. Recommended Inductance for Combinations of Switching Frequency and Maximum Nominal CHGIN
Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table 12. Suggested Inductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table 13. Suggested CHGIN Capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Table 14. Suggested SYS Capacitors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
www.maximintegrated.com
Maxim Integrated | 7
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Absolute Maximum Ratings
CHGIN to GND.................................................... -0.3V to +30.0V
CSINP, CSINN to CHGIN...................................... -0.3V to +0.3V
LX1 to PGND....................................................... -0.3V to +30.0V
LX2 to PGND....................................................... -0.3V to +16.0V
BST1 to PVL........................................................ -0.3V to +30.0V
BST2 to PVL........................................................ -0.3V to +16.0V
BST_ to LX ............................................................ -0.3V to +2.2V
SYS, SYSA to GND............................................. -0.3V to +16.0V
BATT to GND ...................................................... -0.3V to +16.0V
SYS to BATT ....................................................... -0.3V to +16.0V
PVL, AVL, ISET, VSET, INLIM, ITO, CNFG, THM to GND . -0.3V
to +2.2V
AVL to PVL ............................................................-0.3V to +0.3V
DISQBAT, OTGEN, STBY, STAT, INOKB, INTB, SDA, SCL to
GND.......................................................................-0.3V to +6.0V
CHGIN Continuous Current ........................................... 6.5A
LX_, PGND Continuous Current.................................... 6.5A
SYS, BATT Continuous Current .................................. 10.0A
RMS
RMS
RMS
Continuous Power Dissipation (Multilayer Board) (T = +70°C,
A
derate 40.37mW/°C above +70°C.) ...........................3229.71mW
Operating Temperature Range.............................-40°C to +85°C
Storage Temperature Range ..............................-65°C to +150°C
BATSP to GND..........................................-0.3V to V
BATSN, PGND to GND ......................................... -0.3V to +0.3V
+ 0.3V
BATT
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Package Information
30-Lead FC2QFN
Package Code
F304A4F+1
21-100278
90-100100
Outline Number
Land Pattern Number
Thermal Resistance, Four-Layer Board:
Junction-to-Ambient (θ
)
24.77°C/W
1.67°C/W
JA
Junction-to-Case Thermal Resistance (θ
)
JC
www.maximintegrated.com
Maxim Integrated | 8
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different
suffix character, but the drawing pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a
four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/
thermal-tutorial.
www.maximintegrated.com
Maxim Integrated | 9
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Electrical Characteristics
(V
= 7.6V, V
= 7.6V, V
= 9V, T = -40°C to +85°C. T = +25°C (typ). Limits are production tested at T = +25°C. Limits
SYS
BATT
CHGIN A A A
over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GENERAL ELECTRICAL CHARACTERISTICS
CHGIN Voltage Range
V
Operating voltage
3.5
25.4
26.7
V
V
CHGIN
CHGIN Overvoltage
Threshold
V
V
rising, 365mV hysteresis
25.4
26.05
CHGIN_OVLO
CHGIN
V
V
rising, 100mV overdrive
falling, 100mV overdrive
10
7
μs
CHGIN Overvoltage
Delay
t
CHGIN
D_CHGIN_OVL
O
ms
CHGIN
CHGIN Undervoltage
Threshold
V
V
V
rising, 20% hysteresis
3.43
3.5
3.57
V
CHGIN_UVLO
CHGIN
= 2.4V, the input is undervoltage
CHGIN
0.075
0.17
and R
is the only loading
INSD
V
= 9.0V, charger disabled
0.5
4
CHGIN
I
CHGIN
CHGIN Quiescent
V
V
= 9.0V, charger enabled, V
= 8.7V (2S configuration), no
=
CHGIN
SYS
mA
Current (I
= 0A)
SYS
2.7
BATT
switching
MODE[3:0] = 0x0 (DC-DC off), STBY = H
or STBY_EN = 1, V = 5V
I
1
CHGIN_STBY
CHGIN
FSHIP_MODE = 1 or DISQBAT = high,
I
2.3
100
0.01
10
5.0
200
10
SHDN
V
= 0V, I
= 0A, V
= 13.5V
CHGIN
SYS
2
BATT
DISQBAT = low, I C enabled, V
=
CHGIN
0V, I
= 0A, V
= 13.5V
SYS
BATT
V
SYS
= 7.6V, V
= 0V, charger
BATT
I
BATT
disabled, T = +25°C
A
V
SYS
= 7.6V, V
BATT
= 0V, charger
BATT Quiescent Current
(I = 0A)
disabled, T = +85°C
A
µA
SYS
V
= 9V, V
= 8.4V, Q is off,
BAT
CHGIN
BATT
battery overcurrent protection disabled,
charger is enabled but in its done mode,
57
57
65
T
A
= +25°C
I
BATTDN
V
= 9V, V
= 8.4V, Q
is off,
BAT
CHGIN
BATT
battery overcurrent protection disabled,
charger is enabled but in its done mode,
T
A
= +85°C
Guaranteed by V
and
SYSUVL
O rising
SYSOVL
O rising
SYSUVLO
SYS Operating Voltage
V
V
V
SYS
V
V
V
SYSOVLO
SYS Undervoltage
Lockout Threshold
V
V
falling, 530mV hysteresis
3.95
4.1
4.25
SYSUVLO
SYS
rising, 430mV hysteresis, 2S
SYS
10.65
10.9
11.15
battery
SYS Overvoltage
Lockout Threshold
V
SYSOVLO
V
SYS
rising, 267mV hysteresis, 3S
13.75
1.7
14.1
1.8
14.45
1.9
battery
PVL Output Voltage
V
V
PVL
Thermal Shutdown
Threshold
T
T rising
J
165
°C
SHDN
Thermal Shutdown
Hysteresis
15
°C
www.maximintegrated.com
Maxim Integrated | 10
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Electrical Characteristics (continued)
(V
= 7.6V, V
= 7.6V, V
= 9V, T = -40°C to +85°C. T = +25°C (typ). Limits are production tested at T = +25°C. Limits
CHGIN A A A
SYS
BATT
over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CHGIN Self-Discharge
Resistance
R
V
V
V
= 3V
44
kΩ
INSD
CHGIN
CHGIN
CHGIN
BATT Self-Discharge
Resistance
R
R
= 9V, V
= 9V, V
= V
= V
= 5V
= 5V
600
600
300
Ω
Ω
BATSD
SYSSD
SYS
BATT
SYS Self-Discharge
Resistance
SYS
BATT
Self-Discharge Latch
Time
ms
SWITCH MODE CHARGER / CHARGER
Programmable from 8.0V to 9.26V (2S
battery) and 12.0V to 13.05V (3S
battery), production tested at 8V, 8.38V,
8.8V and 9.26V only (2S battery) and
12V, 12.57V, 13.2V, and 13.89V only (3S
battery)
BATT Regulation
Voltage Range
V
8.00
13.05
V
BATTREG
8.8V or 13.2V settings, T = +25°C
-0.9
-1
-0.3
-0.3
+0.3
+0.5
A
BATT Regulation
Voltage Accuracy
%
8.8V or 13.2V settings, T = 0°C to
A
+85°C (Note 1)
BATT Overvoltage
Lockout Threshold
V
rising above V
, 2%
BATTREG
BATT
V
V
75
240
2.5
375
3.0
mV/cell
V
BATTOVLO
hysteresis
BATT Undervoltage
Lockout Threshold
V
BATT
rising, 100mV hysteresis
2.0
BATTUVLO
MAX77960B; 100mA to 3A; production
tested at 100mA, 200mA, 500mA,
1000mA, 1500mA, 2000mA, and 3000mA
settings
0.10
0.10
3
6
Fast-Charge Current
Program Range
I
A
FC
MAX77961B; 100mA to 6A; production
tested at 100mA, 200mA, 500mA,
1000mA, 1500mA, 2000mA, 3000mA,
3500mA, and 3800mA settings
T
= +25°C, V
> V
,
,
,
,
,
,
A
BATT
SYSMIN
SYSMIN
SYSMIN
SYSMIN
80
100
200
120
220
programmed for 100mA
T
A
= +25°C, V > V
BATT
180
programmed for 200mA
T
A
= +25°C, V > V
BATT
481
500
519
programmed for 500mA
T
A
= +25°C, V > V
BATT
962
1000
2000
3000
3500
3800
1038
2075
3113
3631
3943
programmed for 1000mA
= +25°C, V > V
SYSMIN
Fast-Charge Current
Accuracy
mA
T
A
BATT
1925
2887
3369
3657
programmed for 2000mA
= +25°C, V > V
SYSMIN
T
A
BATT
programmed for 3000mA
MAX77961B. T = +25°C, V
V
>
A
BATT
, programmed for 3500mA
SYSMIN
MAX77961B. T = +25°C, V
V
>
BATT
A
, programmed for 3800mA
SYSMIN
www.maximintegrated.com
Maxim Integrated | 11
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Electrical Characteristics (continued)
(V
= 7.6V, V
= 7.6V, V
= 9V, T = -40°C to +85°C. T = +25°C (typ). Limits are production tested at T = +25°C. Limits
CHGIN A A A
SYS
BATT
over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
-40°C < T < +85°C, V
MIN
TYP
MAX
UNITS
> V ,
SYSMIN
A
BATT
-20
+20
mA
programmed for 200mA or less (Note 1)
Fast-Charge Current
Accuracy (Over
Temperature)
-40°C < T < +85°C, V > V
,
SYSMIN
A
BATT
programmed for greater than 200mA
(Note 1)
-5
+5
%
V
CHGIN Adaptive
Voltage Regulation
Range
2
V
I C programmable
4.025
4.42
19.05
4.68
CHGIN_REG
CHGIN Adaptive
Voltage Regulation
Accuracy
4.55V setting
4.55
V
MAX77960B; programmable; production
tested at 100mA, 150mA, 200mA,
500mA, 1000mA, 1500mA, and 3000mA
settings only
0.1
0.1
3.15
6.3
CHGIN Current Limit
Range
CHGIN_ILIM
A
MAX77961B; programmable; production
tested at 100mA, 150mA, 200mA,
500mA, 1000mA, 1500mA, 3000mA,
4000mA, and 6300mA settings only
Charger enabled, 100mA input current
88
98
108
215
setting, T = +25°C
A
Charger enabled, 200mA input current
175
195
setting, T = +25°C
A
Charger enabled, 500mA input current
475
488
500
setting, T = +25°C
A
CHGIN Current Limit
Accuracy
Charger enabled, 1000mA input current
950
975
1000
3000
4000
6300
mA
setting, T = +25°C
A
Charger enabled, 3000mA input current
2850
3800
5985
2925
3900
6143
setting, T = +25°C
A
MAX77961B; charger enabled, 4000mA
input current setting, T = +25°C
A
MAX77961B; charger enabled, 6300mA
input current setting, T = +25°C
A
Charger enabled, 200mA or less input
current setting, -40°C < T < +85°C (Note
1)
-22.5
-7.5
+17.5
+2.5
A
CHGIN Current Limit
Accuracy (Over
Temperature)
%
Charger enabled, greater than 200mA
input current setting, -40°C < T < +85°C
A
(Note 1)
Precharge Voltage
Threshold
V
V
BATT
rising, voltage threshold per cell
2.4
35
2.5
50
2.6
65
V/Cell
mA
PRECHG
I
PRECHG
Precharge Current
Prequalification
Threshold Hysteresis
V
PQ-H
Applies to V
150
mV/Cell
PRECHG
www.maximintegrated.com
Maxim Integrated | 12
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Electrical Characteristics (continued)
(V
= 7.6V, V
= 7.6V, V
= 9V, T = -40°C to +85°C. T = +25°C (typ). Limits are production tested at T = +25°C. Limits
CHGIN A A A
SYS
BATT
over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Programmable from 5.535V to 6.970V
(2S battery) and 8.303V to 10.455V (3S
Minimum SYS Voltage
Accuracy
V
-3
+3
%
SYSMIN
battery), V
= 5.6V (2S battery) or
BATT
8.4V (3S battery), tested at 3V/cell setting
Default setting = enabled; ITRICKLE[1:0]
= 00
75
100
200
300
400
125
250
375
500
600
Default setting = enabled; ITRICKLE[1:0]
= 01 (Note 1)
150
225
300
100
Trickle Charge Current
I
mA
TRICKLE
Default setting = enabled; ITRICKLE[1:0]
= 10 (Note 1)
Default setting = enabled; ITRICKLE[1:0]
= 11
Top-Off Current
Program Range
I
Programmable from 100mA to 600mA
2mV overdrive, 100ns rise/fall time
mA
ms
TO
Charge Termination
Deglitch Time
t
160
TERM
Program options for disabled, 100mV/
cell, 150mV/cell, and 200mV/cell with
CHG_RSTRT[1:0]
Charger Restart
Threshold Range
V
100
200
mV/cell
RSTRT
Charger Restart
Deglitch Time
10mV overdrive, 100ns rise time
130
30
ms
ms
Charger State Change
Interrupt Deglitch Time
Excludes transition to timer fault state,
watchdog timer state
t
SCIDG
SWITCH MODE CHARGER / CHARGE TIMER
Applies to both low-battery
Prequalification Time
t
prequalification and dead-battery
prequalification modes
30
min
PQ
Fast-Charge Constant
Current + Fast-Charge
Constant Voltage Time
Adjustable from 3hrs, 4hrs, 5hrs, 6hrs,
7hrs, 8hrs, 10hrs including a disable
setting; 3hrs default
t
3
hrs
FC
Adjustable from 30s to 70min in 10min
steps
Top-Off Time
t
30
min
TO
SWITCH MODE CHARGER / WATCHDOG TIMER
Watchdog Timer Period (Note 2)
t
80
s
WD
SWITCH MODE CHARGER / BUCK-BOOST
CHGIN OK to Start
Switching Delay
Delay from INOKB H → L to LX_ start
switching
t
150
5
ms
START
MAX77960B, V
= 9V, V
=
CHGIN
SYS
4.3
8.6
5.7
V
BATT
= 7.6V
Buck-Boost Current
Limit
HSILIM
A
MAX77961B, V
= 7.6V
= 9V, V
=
CHGIN
SYS
10
11.4
V
BATT
SWITCH MODE CHARGER / BUCK-BOOST / SWITCH IMPEDANCE AND LEAKAGE CURRENT
LX1 High-Side
Resistance
R
V
= 9V, V
= V = 7.6V
BATT
16.5
26
mΩ
LX1_HS
CHGIN
SYS
www.maximintegrated.com
Maxim Integrated | 13
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Electrical Characteristics (continued)
(V
= 7.6V, V
= 7.6V, V
= 9V, T = -40°C to +85°C. T = +25°C (typ). Limits are production tested at T = +25°C. Limits
CHGIN A A A
SYS
BATT
over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.)
PARAMETER
LX1 Low-Side
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
R
V
V
V
= 9V, V
= 9V, V
= 9V, V
= V
= V
= V
= 7.6V
= 7.6V
= 7.6V
17
30
mΩ
LX1_LS
CHGIN
CHGIN
CHGIN
SYS
SYS
SYS
BATT
BATT
BATT
Resistance
LX2 High-Side
Resistance
R
9
21
0.01
1
18
33
10
mΩ
mΩ
LX2_HS
LX2 Low-Side
Resistance
R
LX2_LS
LX1 = PGND or CHGIN, LX2 = PGND or
SYS, T = +25°C
A
LX_ Leakage Current
BST_ Leakage Current
µA
µA
LX1 = PGND or CHGIN, LX2 = PGND or
SYS, T = +85°C
A
BST_ = 1.8V, T = +25°C
0.01
1
10
10
A
BST_ = 1.8V, T = +85°C
A
V
SYS
= V
= 8.4V, V
BATT
= 0V,
= 0V,
SYSA
0.01
1
charger disabled, T = +25°C
SYS, SYSA Leakage
Current
A
µA
µA
V
SYS
= V
= 8.4V, V
SYSA BATT
charger disabled, T = +85°C
A
CSINP, CSINN Leakage
Current
V
= 26.05V, V
= V
=
CSINN
CHGIN
CSINP
I
, I
-1
+1
17
CSINP CSINN
26.05V, T = +25°C
A
SWITCH MODE CHARGER / SMART POWER SELECTOR
BAT to SYS Dropout
Resistance
R
10
90
mΩ
mV
BAT2SYS
BATT to SYS Reverse
Regulation Voltage
V
BSREG
SWITCH MODE CHARGER / BATT TO SYS OVERCURRENT ALERT
Battery Overcurrent
Threshold Range
Programmable from 3A to 10A. Option to
disable.
I
t
3
10
A
BOVCR
BOVRC
Battery Overcurrent
Debounce Time
Response time for generating the
overcurrent interrupt (Note 2)
3.3
ms
SWITCH MODE CHARGER / THERMAL FOLDBACK
Junction Temperature
Thermal Regulation
Loop Setpoint Program
Range
Junction temperature when charge
current is reduced; programmable from
85°C to 130°C in 5°C steps; default value
is 115°C
T
REG
85
130
°C
www.maximintegrated.com
Maxim Integrated | 14
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Electrical Characteristics (continued)
(V
= 7.6V, V
= 7.6V, V
= 9V, T = -40°C to +85°C. T = +25°C (typ). Limits are production tested at T = +25°C. Limits
CHGIN A A A
SYS
BATT
over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
The charge current is decreased 5% of
the fast-charge current setting for every
degree that the junction temperature
exceeds the thermal regulation
temperature. This slope ensures that the
full-scale current of 3A (MAX77960B)/6A
(MAX77961B) is reduced to 0A by the
time the junction temperature is 20°C
above the programmed loop set point.
For lower programmed charge currents
such as 480mA, this slope is valid for
charge current reductions down to 80mA;
below 100mA the slope becomes
shallower but the charge current still
reduced to 0A if the junction temperature
is 20°C above the programmed loop set
point.
Thermal Regulation
Gain
A
-5
%/°C
TJREG
SWITCH MODE CHARGER / THERMISTOR MONITOR
V
/V
rising, 1% hysteresis
THM AVL
THM Threshold, COLD
THM Threshold, COOL
THM Threshold, WARM
THM Threshold, HOT
THM_COLD
THM_COOL
THM_WARM
THM_HOT
73.36
58.8
33.68
21.59
4.9
74.56
60
75.76
61.2
%
%
%
%
%
%
(thermistor temperature falling)
V
/V rising, 1% hysteresis
THM AVL
(thermistor temperature falling)
V
/V falling, 1% hysteresis
THM AVL
34.68
22.5
5.9
35.68
23.41
6.9
(thermistor temperature rising)
V
/V falling, 1% hysteresis
THM AVL
(thermistor temperature rising)
THM Threshold,
Disabled
VTHM/AVL falling, 1% hysteresis, THM
function is disabled below this voltage
THM Threshold, Battery
Removal Detection
V
/V
rising, 1% hysteresis, battery
THM AVL
85.6
87
88.4
1
removal
V
= GND or V
= GND or V
; T = +25°C
0.1
0.1
THM Input Leakage
Current
THM
THM
AVL
AVL
A
µA
V
; T = +85°C
A
REVERSE BUCK
Buck Current Limit
HSILIM_REV
f
= 600kHz
4.3
5
5.7
A
SW
Reverse Buck
Quiescent Current
Not switching: output forced 200mV
above its target regulation voltage
1150
µA
Minimum BATT Voltage
in OTG Mode
V
V
= V
, SYS UVLO falling
SYS
BATT.MIN.OT
G
BATT
5.96
4.94
6.14
5.1
6.32
5.26
V
V
threshold in OTG mode
CHGIN Voltage in OTG
Mode
V
V
V
V
= V
, OTGEN = high
BATT.MIN.OTG
CHGIN.OTG
BATT
CHGIN Undervoltage
Threshold in OTG Mode
V
CHGIN.OTG.U
V
falling, OTGEN = high
rising, OTGEN = high
85
%
%
CHGIN
CHGIN
CHGIN Overvoltage
Threshold in OTG Mode
V
CHGIN.OTG.
OV
110
www.maximintegrated.com
Maxim Integrated | 15
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Electrical Characteristics (continued)
(V
= 7.6V, V
= 7.6V, V
= 9V, T = -40°C to +85°C. T = +25°C (typ). Limits are production tested at T = +25°C. Limits
CHGIN A A A
SYS
BATT
over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
, T = +25°C,
MIN
TYP
MAX
UNITS
V
BATT
= V
BATT.MIN.OTG
A
500
550
OTG_ILIM[2:0] = 0b000, OTGEN = high
V
= V , T = +25°C,
BATT
BATT.MIN.OTG
A
900
1500
3000
±150
±150
990
1650
3300
OTG_ILIM[2:0] = 0b001, OTGEN = high
CHGIN Output Current
Limit in OTG Mode
I
CHGIN.OTG.LI
M
mA
V
BATT
= V , T = +25°C,
BATT.MIN.OTG
A
OTG_ILIM[2:0] = 0b011, OTGEN = high
V
BATT
= V , T = +25°C,
BATT.MIN.OTG
A
OTG_ILIM[2:0] = 0b111, OTGEN = high
Discontinuous inductor current (i.e., skip
mode), OTGEN = high
CHGIN Output Voltage
Ripple in OTG Mode
mV
kΩ
Continuous inductor current, OTGEN =
high
IO CHARACTERISTICS
R
, R
, R
,
INLIM ISET VSET
R , R
TO CNFG
Resistor
R
5.49
-1
226
PROG_
Range
Output Low Voltage
INOKB, STAT
I
= 1mA, T = +25°C
0.4
+1
V
SINK
A
5.5V, T = +25°C
0
Output High Leakage
INOKB, STAT
A
µA
5.5V, T = +85°C
A
0.1
DISQBAT, OTGEN,
STBY Logic Input Low
Threshold
V
0.4
V
V
IL
DISQBAT, OTGEN,
STBY Logic Input High
Threshold
V
IH
1.4
DISQBAT, OTGEN,
STBY Logic Input
Leakage Current
5.5V (including current through pulldown
resistor)
5.5
10
µA
kΩ
DISQBAT, OTGEN,
STBY Pulldown Resistor
R
1000
1200
DISQBAT
2
INTERFACE / I C INTERFACE AND INTERRUPT
SCL, SDA Input Low
Level
0.3 x
V
V
V
AVL
SCL, SDA Input High
Level
0.7 x
V
AVL
SCL, SDA Input
Hysteresis
0.05 x
V
V
AVL
SCL, SDA Logic Input
Current
SDA = SCL = 5.5V
-10
+10
0.4
µA
pF
V
SCL, SDA Input
Capacitance
10
SDA Output Low
Voltage
Sinking 20mA
www.maximintegrated.com
Maxim Integrated | 16
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Electrical Characteristics (continued)
(V
= 7.6V, V
= 7.6V, V
= 9V, T = -40°C to +85°C. T = +25°C (typ). Limits are production tested at T = +25°C. Limits
CHGIN A A A
SYS
BATT
over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
0.4
UNITS
Output Low Voltage
INTB
I
= 1mA
V
SINK
V
V
= 5.5V, T = +25°C
-1
0
+1
Output High Leakage
INTB
INTB
A
μA
= 5.5V, T = +85°C
0.1
INTB
A
2
INTERFACE / I C COMPATIBLE INTERFACE TIMING FOR STANDARD, FAST, AND FAST-MODE PLUS
Clock Frequency
f
1000
kHz
µs
SCL
Hold Time (Repeated)
START Condition
t
0.26
HD;STA
CLK Low Period
CLK High Period
t
0.5
µs
µs
LOW
t
0.26
HIGH
Set-Up Time Repeated
START Condition
t
0.26
0
µs
SU;STA
HD:DAT
DATA Hold Time
DATA Valid Time
t
µs
µs
t
0.45
0.45
VD:DAT
DATA Valid
Acknowledge Time
t
µs
ns
µs
VD:ACK
DATA Set-Up time
t
50
SU;DAT
Set-Up Time for STOP
Condition
t
0.26
SU;STO
Bus-Free Time Between
STOP and START
t
0.5
µs
ns
BUF
Pulse Width of Spikes
that Must be
Suppressed by the Input
Filter
50
2
INTERFACE / I C COMPATIBLE INTERFACE TIMING FOR HS-MODE (C = 100pF)
B
Clock Frequency
f
3.4
MHz
ns
SCL
Set-Up Time Repeated
START Condition
t
160
160
SU;STA
Hold Time (Repeated)
START Condition
t
ns
HD;STA
CLK Low Period
CLK High Period
DATA Set-Up Time
DATA Hold Time
t
160
60
10
0
ns
ns
ns
ns
LOW
t
HIGH
t
SU;DAT
HD:DAT
t
t
Set-Up Time for STOP
Condition
160
ns
SU;STO
Pulse Width of Spikes
that Must be
Suppressed by the Input
Filter
10
ns
2
INTERFACE / I C COMPATIBLE INTERFACE TIMING FOR HS-MODE (C = 400pF)
B
Clock Frequency
f
1.7
MHz
SCL
www.maximintegrated.com
Maxim Integrated | 17
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Electrical Characteristics (continued)
(V
= 7.6V, V
= 7.6V, V
= 9V, T = -40°C to +85°C. T = +25°C (typ). Limits are production tested at T = +25°C. Limits
CHGIN A A A
SYS
BATT
over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Set-Up Time Repeated
START Condition
t
160
ns
SU;STA
Hold Time (Repeated)
START Condition
t
160
ns
HD;STA
CLK Low Period
CLK High Period
DATA Set-Up time
DATA Hold Time
t
320
120
10
ns
ns
ns
ns
LOW
t
HIGH
t
SU;DAT
HD:DAT
t
t
0
Set-Up Time for STOP
Condition
160
ns
SU;STO
Pulse Width of Spikes
that Must be
Suppressed by the Input
Filter
10
ns
Note 1: Guaranteed by design. Not production tested.
Note 2: Guaranteed by design. Production tested through scan.
www.maximintegrated.com
Maxim Integrated | 18
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Typical Operating Characteristics
(C
= 10μF, C
= 2 x 47μF, L = 3.3μH (PA5007.332NLT) or 1.5μH (PA5003.152NLT), T = +25°C unless otherwise noted.)
SYS A
CHGIN
www.maximintegrated.com
Maxim Integrated | 19
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Pin Configuration
MAX77960B/MAX77961B
TOP VIEW
30
29
28
27
26
25
24
23
MAX77960B
MAX77961B
BST1
1
CNFG
22
21
20
19
18
INLIM
GND
CHGIN
LX1
2
3
SYSA
PGND
LX2
4
5
6
INTB
17
16
15
INOKB
STAT
SDA
SYS
7
8
9
10
11
12
13
14
30-LEAD FC2QFN
(4mm x 4mm)
Pin Description
PIN
NAME
FUNCTION
High-Side Input MOSFET Driver Supply. Bypass BST1 to LX1 with a 0.22μF/6.3V capacitor.
1
BST1
www.maximintegrated.com
Maxim Integrated | 20
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Pin Description (continued)
PIN
NAME
FUNCTION
Buck-Boost Charger Input. CHGIN is also the buck output when the charger is operating in the
reverse mode. Bypass with two 10μF/35V ceramic capacitors from CHGIN to PGND.
2
CHGIN
3
4
5
LX1
PGND
LX2
Inductor Connection One. Connect an inductor between LX1 and LX2.
Power Ground for Buck-Boost Low-Side MOSFETs
Inductor Connection Two. Connect an inductor between LX1 and LX2.
System Supply Output. Bypass SYS to PGND with a minimum of two 47µF/25V ceramic
capacitors.
6
SYS
Active-High Input. Connect the OTGEN pin to high enables the OTG function. When OTGEN pin is
2
7
OTGEN
pulled low, the OTG enable function is controlled by I C. To pull the OTGEN pin low with a
pulldown resistor, the resistance must be lower than 44kΩ.
Active-High Input. Connect high to disable the integrated Q
FET between SYS and BATT.
BAT
Charging is disabled when DISQBAT connects to high. When DISQBAT is pulled low, Q
FET
BAT
8
DISQBAT
control is defined in the Q
and DC-DC Control—Configuration Table. To pull the DISQBAT pin
BAT
low with a pulldown resistor, the resistance must be lower than 44kΩ.
9
BST2
High-Side Output MOSFET Driver Supply. Bypass BST2 to LX2 with a 0.22μF/6.3V capacitor.
Battery Voltage Differential Sense Negative Input. Connect to the negative terminal of the battery
pack.
10
BATSN
Battery Voltage Differential Sense Positive Input. Connect to the positive terminal of the battery
pack.
11
12
BATSP
BATT
Battery Power Connection. Connect to the positive terminal of the battery pack. Bypass BATT to
PGND with a 10μF/25V capacitor. All BATT pins must be connected together externally.
Thermistor Input. Connect a negative temperature coefficient (NTC) thermistor from THM to GND.
Connect a resistor equal to the thermistor +25°C resistance from THM to AVL. JEITA-controlled
charging available with JEITA_EN = 1. Charging is suspended when the thermistor voltage is
outside of the hot and cold limits. Connect THM to GND to disable the thermistor temperature
sensor. Connect THM to AVL to emulate battery removal and prevent charging.
13
THM
2
14
15
SCL
SDA
Serial Interface I C Clock Input
2
Serial Interface I C Data. Open-drain output.
Charger Status Output. Active-low, open-drain output, connect to the pullup through a 10kΩ
resistor. Pulls low when the charging is in progress. Otherwise, STAT is high impedance.
16
STAT
STAT toggles between low and high (when connected to a pullup rail) during charge. STAT
becomes low when top-off threshold is detected and charger enters the done state. STAT
becomes high (when connected to a pullup rail) when charge faults are detected.
Input Power-OK/OTG Power-OK Output. Active-low, open-drain output pulls low when the CHGIN
voltage is valid.
17
INOKB
18
19
20
INTB
SYSA
GND
Active-Low Open-Drain Interrupt Output. Connect a pullup resistor to the pullup power source.
SYS Voltage Sensing Input for SYS UVLO and OVLO Detection
Analog Ground
Charger Input Current Limit Setting Input. Connect a resistor (R
programs the charger input current limit. Refer to Table 5.
) from INLIM to GND
INLIM
21
22
23
INLIM
CNFG
ISET
Device Configuration Input. Connect a resistor (R
following parameter, see Table 1.
) from CNFG to GND to program the
CNFG
● Switching frequency (600kHz or 1.2MHz)
● Number of battery cells in series connection (2S or 3S)
Fast-Charge Current Setting Input. Connect a resistor (R
fast charge current. See Table 6.
) from ISET to GND programs the
ISET
www.maximintegrated.com
Maxim Integrated | 21
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Pin Description (continued)
PIN
NAME
FUNCTION
Charge Termination Voltage Setting Input. Connect a resistor (R
programs the charge termination voltage. See Table 8.
) from VSET to GND
VSET
24
VSET
Top-Off Current Setting Input. Connect a resistor (R ) from ITO to GND programs the top-off
ITO
current. See Table 7.
25
26
ITO
Analog Voltage Supply for On-Chip, Low-Noise Circuits. Bypass with a 4.7μF/6.3V ceramic
capacitor to GND and connect AVL to PVL with a 4.7Ω resistor.
AVL
Internal Bias Regulator High Current Output Bypass. Supports internal noisy and high current gate
drive loads. Bypass to GND with a minimum 4.7μF/6.3V ceramic capacitor, and connect AVL to
PVL with a 4.7Ω resistor. Powering external loads from PVL is not recommended, other than pullup
resistors.
27
28
PVL
Active-High Input. Connect high to disable the DC-DC between CHGIN input and SYS output.
Battery supplies the system power if the Q
is on. See Table 2. Connect low to control the DC-
BAT
STBY
DC with the power-path state machine. To pull the STBY pin low with a pulldown resistor, the
resistance must be lower than 44kΩ.
29
30
CSINP
CSINN
Input Current-Sense Positive Input
Input Current-Sense Negative Input
www.maximintegrated.com
Maxim Integrated | 22
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Detailed Description
Charger Configuration
The MAX77960B/MAX77961B are highly flexible, highly integrated switch mode charger. Autonomous charging inputs
2
configure the charger without host I C interface, see the Autonomous Charging section for more details. The
2
MAX77960B/MAX77961B have an I C interface that allows the host controller to program and monitor the charger.
Charger configuration registers, interrupt, interrupt mask, and status registers are described in the Register Map.
Device Configuration Input (CNFG)
CNFG is the MAX77960B/MAX77961B's configuration input for the following parameters:
● Switching frequency (600kHz or 1.2MHz)
● Number of battery cells in series connection (2S or 3S)
Connect a resistor (R
) from CNFG to GND to program. See Table 1. Note that for 1.2MHz switching frequency,
CNFG
only 2S battery is supported.
Table 1. CNFG Program Options Lookup Table
NUMBER OF
SERIES BATTERY
CELLS
PART NUMBER
SWITCHING FREQUENCY (MHz)
R
CNFG
(Ω)
Tied to PVL or
86600
2
3
2
MAX77960BEFV06+
MAX77961BEFV06+
0.6
1.2
8660
MAX77960BEFV12+
MAX77961BEFV12+
Tied to PVL or
69800
CHGIN Standby Input (STBY)
The host can reduce the MAX77960B/MAX77961B's CHGIN supply current by driving STBY pin to high or setting
STBY_EN bit to 1. When STBY is pulled high or STBY_EN bit is set to 1, the DC-DC turns off. When STBY is pulled low
and STBY_EN bit is set to 0, the DC-DC is controlled by the power-path state machine. To pull the STBY pin low with a
pulldown resistor, the resistance must be lower than 44kΩ.
Battery to SYS Q
BAT
The host can disable the Q
Disable Input (DISQBAT)
switch by setting DISIBS bit to 1 or driving DISQBAT pin to high. Charging stops when
BAT
Q
BAT
switch is disabled.
When DISQBAT is pulled low and DISIBS bit is set to 0, Q
FET control is defined in Table 2. To pull the DISQBAT
BAT
pin low with a pulldown resistor, the resistance must be lower than 44kΩ.
Q
and DC-DC Control—Configuration Table
BAT
The Q
control and the DC-DC control depend on both hardware pins (OTGEN, DISQBAT, and STBY) and their
BAT
2
associated I C registers.
Table 2. Q
and DC-DC Control Configuration Table
BAT
OTGEN (PIN) OR
DISQBAT (PIN) STBY (PIN) OR
OR DISIBS (I C) STBY_EN (I C)
MODE [3:0] = 0xA
Q
BAT
DC-DC
2
2
2
(I C)
Power-path state
machine/internal logic
control
Power-path state machine/internal logic
control
0
0
0
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Maxim Integrated | 23
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Table 2. Q
and DC-DC Control Configuration Table (continued)
BAT
OTGEN (PIN) OR
DISQBAT (PIN) STBY (PIN) OR
OR DISIBS (I C) STBY_EN (I C)
MODE [3:0] = 0xA
Q
BAT
DC-DC
2
2
2
(I C)
Enable
(SYS is powered from battery through
switch while DC-DC is disabled)
0
0
0
1
1
0
Disable
Q
BAT
Power-path state
machine/internal logic
control
Disable
Disable
(SYS is powered from battery through
0
1
x
1
x
Disable
Q
BAT
body diode while DC-DC is
disabled)
Power-path state
machine/internal logic
control
1
Enable
Thermistor Input (THM)
The thermistor input can be utilized to achieve functions that include charge suspension, JEITA-compliant charging, and
battery removal detection. Thermistor monitoring feature can be disabled by connecting the THM pin to ground.
Charge Suspension
The THM input connects to an external negative temperature coefficient (NTC) thermistor to monitor battery or system
temperature. Charging stops when the thermistor temperature is out of range (T < T
or T > T
). The charge
COLD
HOT
timers are reset and the CHG_DTLS[3:0], CHG_OK register bits report the charging suspension status and CHG_I
interrupt bit is set. When the thermistor comes back into range (T
timer restarts.
< T < T
), charging resumes and the charge
COLD
HOT
JEITA-Compliant Charging
JEITA-compliant charging is available with JEITA_EN = 1. See the JEITA Compliance section for more details.
Battery Removal Detection
Connecting THM to AVL emulates battery removal and prevents charging.
Disable Thermistor Monitoring
Connecting THM to GND disables the thermistor monitoring function, and JEITA-controlled charging is unavailable in this
configuration. The MAX77960B/MAX77961B detect an always-connected battery when THM is grounded, and charging
starts automatically when a valid adapter is plugged in. In applications with removable batteries, do not connect THM to
GND because the MAX77960B/MAX77961B cannot detect battery removal when THM is grounded. Instead, connecting
THM to the thermistor pin in the battery pack is recommended.
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Maxim Integrated | 24
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Since the thermistor monitoring circuit employs an external bias resistor from THM to AVL, the thermistor is not limited
only to 10kΩ (at +25ºC). Any resistance thermistor can be used as long as the value is equivalent to the thermistors
+25ºC resistance. For example, with a 10kΩ at R
resistor, the charger enters a temperature suspend state when
TB
the thermistor resistance falls below 3.97kΩ (too hot) or rises above 28.7kΩ (too cold). This corresponds to 0ºC to
+50ºC range when using a 10kΩ NTC thermistor with a beta of 3500. The general relation of thermistor resistance to
temperature is defined by the following equation:
1
1
{βx(
−
)}
T+273°C 298°C
R = R xe
T
25
where:
R = The resistance in Ω of the thermistor at temperature T in Celsius
T
R
= The resistance in Ω of the thermistor at +25ºC
25
β = The material constant of the thermistor, which typically ranges from 3000k to 5000k
T = The temperature of the thermistor in °C
Some designs might prefer other thermistor temperature limits. Threshold adjustment can be accommodated by changing
R
, connecting a resistor in series and/or in parallel with the thermistor, or using a thermistor with different β. For
TB
example, a +45ºC hot threshold and 0°C cold threshold can be realized by using a thermistor with a β to 4250 and
connecting 120kΩ in parallel. Since the thermistor resistance near 0ºC is much higher than it is near +50ºC, a large
parallel resistance lowers the cold threshold, while only slightly lowering the hot threshold. Conversely, a small series
resistance raises the cold threshold, while only slightly raising the hot threshold. Raising R raises both the hot and cold
TB
threshold, while lowering R lowers both thresholds.
TB
Since AVL is active whenever a valid power is provided at CHGIN or BATT, thermistor bias current flows at all times,
even when charging is disabled. When using a 10kΩ thermistor and a 10kΩ pullup to AVL, this results in an additional
90μA load. This load can be reduced to 9μA by instead using a 100kΩ thermistor and 100kΩ pullup resistor.
Table 3. Trip Temperatures for Different Thermistors
THERMISTOR
TRIP TEMPERATURES
(˚C) (˚C)
R
(Ω)
β
R
TB
(Ω)
R
15
(Ω)
R
(Ω)
T
(˚C)
T
T
T
HOT
(˚C)
25
45
COLD
COOL
WARM
10000
10000
47000
100000
3380
3940
4050
4250
10000
10000
47000
100000
14826
15826
75342
164083
4900
4354
-0.8
+14.7
+42.6
+40.0
+39.6
+38.8
+61.4
+55.7
+54.8
+53.2
+2.6
+3.2
+4.1
+16.1
+16.4
+16.8
19993
40781
Autonomous Charging
2
2
The MAX77960B/MAX77961B support autonomous charging without I C. In applications without I C serial
communication, use the following pins to configure the MAX77960B/MAX77961B charger:
CNFG, INLIM, ITO, ISET, VSET, OTGEN, DISQBAT, STBY.
The INLIM, ITO, ISET, and VSET pins are used to program the charger's input current limit, top-off current, constant
charging current, and termination voltage.
Connect a valid resistor from each of these pins to ground to program the charger. See the Pin Description for details.
Connect all four pins (INLIM, ITO, ISET, VSET) to PVL to use the default values for the associated charger registers.
For autonomous charging, it is considered an abnormal condition if some of these pins (INLIM, ITO, ISET, VSET) connect
to a valid resistor, but others do not (for example open or connects to PVL or connects to a resistor that is out of range).
When this happens, the MAX77960B/MAX77961B allow the DC-DC to switch and regulate the SYS voltage, but disable
charging for safety reasons. The STAT pin reports no charge.
www.maximintegrated.com
Maxim Integrated | 25
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Table 4. INLIM, ITO, ISET, and VSET Pin Connections for Autonomous Charging
INLIM PIN
Valid resistor
Tied to PVL
ITO PIN
Valid resistor
Tied to PVL
ISET PIN
Valid resistor
Tied to PVL
VSET PIN
Valid resistor
Tied to PVL
AUTONOMOUS CHARGING
Normal, charger configuration is programmed by resistors
Normal, charger configuration uses default values
Abnormal, no charging
All other connections
Charger Input Current Limit Setting Input (INLIM)
When a valid charge source is applied to CHGIN, the MAX77960B/MAX77961B limit the current drawn from the charge
source to the value programmed with INLIM pin.
The default charger input current limit is programmed with the resistance from INLIM to GND. See Table 5.
2
If I C is used in the application, the CHGIN input current limit can also be reprogrammed with CHGIN_ILIM[6:0] register
2
bits after the devices power up. Connect INLIM pin to PVL to use I C default settings.
Table 5. INLIM Program Options Lookup Table
MAX77960B
MAX77961B
R
(Ω)
CHGIN INPUT CURRENT LIMIT (mA)
DEFAULT VALUE OF CHGIN_ILIM[6:0]
CHGIN INPUT CURRENT LIMIT (mA)
DEFAULT VALUE OF CHGIN_ILIM[6:0]
INLIM
Tied to PVL
226000
178000
140000
110000
86600
69800
54900
39200
22600
17800
14000
11000
8660
500
100
500
100
200
200
300
300
400
400
500
500
1000
1500
2000
2500
3000
N/A
1000
1500
2000
2500
3000
3500
4000
4500
5000
6000
N/A
N/A
6980
N/A
5490
N/A
Fast-Charge Current Setting Input (ISET)
When a valid input source is present, the battery charger attempts to charge the battery with a fast-charge current
programmed with ISET pin.
The default fast-charge current is programmed with the resistance from ISET to GND. See Table 6.
2
If I C is used in the application, the fast-charge current can also be reprogrammed with CHGCC[5:0] register bits after
2
the devices power up. Connect ISET pin to PVL to use I C default settings.
Table 6. ISET Program Options Lookup Table
MAX77960B
MAX77961B
R
ISET
(Ω)
FAST-CHARGE CURRENT SELECTION (mA)
DEFAULT VALUE OF CHGCC[5:0]
FAST-CHARGE CURRENT SELECTION (mA)
DEFAULT VALUE OF CHGCC[5:0]
Tied to PVL
226000
450
100
450
100
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Maxim Integrated | 26
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Table 6. ISET Program Options Lookup Table (continued)
MAX77960B
MAX77961B
R
ISET
(Ω)
FAST-CHARGE CURRENT SELECTION (mA)
DEFAULT VALUE OF CHGCC[5:0]
FAST-CHARGE CURRENT SELECTION (mA)
DEFAULT VALUE OF CHGCC[5:0]
178000
140000
110000
86600
69800
54900
39200
22600
17800
14000
11000
8660
200
300
200
300
400
400
500
500
1000
1500
2000
2500
3000
N/A
1000
1500
2000
2500
3000
3500
4000
4500
5000
6000
N/A
N/A
6980
N/A
5490
N/A
Top-Off Current Setting Input (ITO)
When the battery charger is in the top-off state, the top-off charge current is programmed by ITO pin.
The default top-off charge current is programmed with the resistance from ITO to GND. See Table 7.
2
If I C is used in the application, the top-off current can also be reprogrammed with TO_ITH[2:0] register bits after the
2
device powers up. Connect ITO pin to PVL to use I C default settings.
Table 7. ITO Program Options Lookup Table
TOP-OFF CURRENT THRESHOLD (mA)
R
(Ω)
ITO
DEFAULT VALUE OF TO_ITH[2:0]
Tied to PVL
226000
178000
140000
110000
86600
100
100
200
300
400
500
600
69800
Charge Termination Voltage Setting Input (VSET)
The default charge termination voltage is programmed with the resistance from VSET to GND. See Table 8.
2
If I C is used in the application, the charge termination voltage can also be reprogrammed with CHG_CV_PRM[5:0]
2
register bits after the device powers up. Connect the VSET pin to PVL to use I C default settings.
www.maximintegrated.com
Maxim Integrated | 27
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Table 8. VSET Program Options Lookup Table
CHARGE TERMINATION VOLTAGE SETTING - 2S (V) CHARGE TERMINATION VOLTAGE SETTING - 3S (V)
R
VSET
(Ω)
DEFAULT VALUE OF CHG_CV_PRM[5:0]
DEFAULT VALUE OF CHG_CV_PRM[5:0]
Tied to PVL
226000
178000
140000
110000
86600
69800
54900
39200
22600
17800
14000
11000
8660
8.0
8.0
12.0
12.0
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
9.0
9.1
9.2
9.26
9.26
12.15
12.3
12.45
12.6
12.75
12.9
13.05
N/A
N/A
N/A
N/A
N/A
6980
N/A
5490
N/A
Switch Mode Charger
The MAX77960B/MAX77961B feature a switch mode buck-boost charger for a two-cell or three-cell lithium ion (Li+) or
lithium polymer (Li-polymer) battery. The charger operates from a wide input range from 3.5V to 25.4V, ideal for USB-C
charging applications. The charger input current limit is programmable from 100mA to 3.15A (MAX77960B)/100mA to
6.3A (MAX77961B), which is flexible to operate from either an AC-to-DC wall charger or a USB-C adapter.
The MAX77960B/MAX77961B offer a high level of integration and do not require any external MOSFETs to operate,
which significantly reduces the solution size. They operate with a programmable switching frequency of 600kHz or
1.2MHz, which is ideal for portable devices that benefit from small solution size and high efficiency. The battery charging
current is programmable from 100mA to 3A (MAX77960B)/100mA to 6A (MAX77961B) to accommodate small or large
capacity batteries.
When the input source is not available, the MAX77960B/MAX77961B can be enabled in a reverse buck mode, delivering
energy from the battery to the input, CHGIN, commonly known as USB on-the-go (OTG). In OTG mode, the regulated
CHGIN voltage is 5.1V with programmable current limit up to 3A.
Maxim’s Smart Power Selector architecture makes the best use of the limited adapter power and the battery power to
power the system. Adapter power that is not used for the system charges the battery. When system load exceeds the
input limit, battery provides additional current to the system up to the BATT to SYS overcurrent threshold, programmable
2
with B2SOVRC[3:0] I C register bits. All power switches for charging and switching the system load between battery and
adapter power are integrated on chip—no external MOSFETs required.
Maxim’s proprietary process technology allows for low-R
devices in a small solution size. The resistance between
DSON
BATT and SYS is 10mΩ (typ), allowing low power dissipation and long battery life.
A multitude of safety features ensure reliable charging. Features include charge timers, watchdog, junction thermal
regulation, and over-/undervoltage protection.
www.maximintegrated.com
Maxim Integrated | 28
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Smart Power Selector (SPS)
The smart power selector (SPS) architecture includes a network of internal switches and control loops that efficiently
distributes energy between an external power source (CHGIN), the battery (BAT) and the system (SYS). This architecture
allows power path operation with system instant on with a dead battery.
The Simplified Block Diagram shows the smart power selector switches and gives them the following names: Q Q , Q ,
1,
2
3
Q and Q
4
.
BAT
Power Switches and Current Sense Resistor Descriptions
● CHGIN Current-Sense Resistor: As shown in the Simplified Block Diagram, the CHGIN current is monitored with the
input current sensing resistor, R , connected between CSINP and CSINN pins.
S1
● DC-DC Switches: Q Q , Q , and Q are the DC-DC switches that can operate as a buck (step down) or a boost
1,
2
3
4
(step up), depending on the external power source and battery voltage conditions.
● Battery-to-System Switch: Q
is used to control battery charging and discharging operations.
BAT
2
I C Configuration Register Bits
● MODE[3:0] configures the Smart Power Selector mode to be Charging, OTG or DC-DC mode respectively. See
MODE[3:0] register bits in the Register Map for details.
● VCHGIN_REG[4:0] sets the CHGIN regulation voltage, when the MAX77960B/MAX77961B operate in forward mode
(CHGIN has a valid power source). See the CHGIN Regulation Voltage section for details.
● MINVSYS[2:0] sets the minimum system regulation voltage. See the SYS Regulation Voltage section for details.
● B2SOVRC[3:0] sets the battery to system discharge overcurrent protection threshold.
Energy Distribution Priority
● With a valid external power source at CHGIN:
• The external power source is the primary source of energy.
• The battery is the secondary source of energy.
• Energy delivery to SYS has the highest priority.
• Any remaining energy from the power source that is not required by the system is available to the battery charger.
● With no valid external power source at CHGIN:
• The battery is the primary source of energy.
• When OTG mode is enabled, energy delivery to SYS has the highest priority.
• Any remaining energy from the battery that is not required by the system is available to power the CHGIN.
CHGIN Regulation Voltage
● In forward mode (when CHGIN is powered from a valid external source), CHGIN voltage is regulated to
VCHGIN_REG[4:0] when a high impedance or current limited source is applied. VCHGIN might experience significant
voltage droop from the high-impedance source when the MAX77960B/MAX77961B extract high power from the
source. Regulating VCHGIN allows the MAX77960B/MAX77961B to extract the most power from the power source.
See the Adaptive Input Current Limit (AICL) and Input Voltage Regulation section for more detail.
● In reverse mode (OTG), CHGIN voltage is regulated to 5.1V with programmable current limit up to 3A
(OTG_ILIM[2:0]).
SYS Regulation Voltage
With a valid external power source at CHGIN:
● When the DC-DC is disabled (MODE[3:0] = 0x00 or STBY_EN = 0b1 or STBY pin = high), the Q
switch is fully on
BAT
and V
= V
- I
x R
SYS
BATT BATT BAT2SYS.
● When the DC-DC is enabled and the charger is disabled (MODE[3:0] = 0x04), V
is regulated to V
BATTREG
SYS
(CHG_CV_PRM) and Q
is off.
BAT
● When the DC-DC is enabled and the charger is enabled (MODE[3:0] = 0x05), but in a noncharging state such as
Done, Thermistor Suspend, Watchdog Suspend, or Timer Fault, V is regulated to V (CHG_CV_PRM)
SYS
BATTREG
and Q
is off.
BAT
● When the DC-DC is enabled and the charger is enabled (MODE[3:0] = 0x05) and in a valid charging state such as
www.maximintegrated.com
Maxim Integrated | 29
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Precharge or Trickle Charge (V
< V
- 500mV), V
is regulated to V
(CHG_CV_PRM). The
BATTREG
BATT
SYSMIN
SYS
charger operates as a linear regulator, and the power dissipation can be calculated with P = (V
- V
) x
BATTREG
BATT
I
.
BATT
● When the DC-DC is enabled and the charger is enabled (MODE[3:0] = 0x05) and in a valid charging state such as
Fast Charge (CC or CV) or Top-Off (V > V - 500mV), the Q switch is fully on, and V = V
+
BATT
BATT
SYSMIN
BAT
SYS
I
x R
.
BAT2SYS
BATT
● In all the modes described above when the power demand on SYS exceeds the input source power limit, the battery
automatically provides supplemental power to the system. If the Q
switch is initially off when V drops to V
SYS BATT
BAT
- V
, the Q
switch turns on, and V
is regulated to V
- V
.
BSREG
BAT
SYS
BATT
BSREG
Without a valid external power source at CHGIN, including with OTG mode (MODE[3:0] = 0x0A):
● The Q switch is fully on, and V = V - I x R
BAT
SYS
BATT BATT
BAT2SYS.
Power States
The MAX77960B/MAX77961B transition between power states as input/battery and load conditions dictate.
The MAX77960B/MAX77961B provide four (4) power states and one (1) no power state. Under power limited conditions,
the power path feature maintains SYS and USB-OTG loads at the expense of battery charge current. In addition, the
battery supplements the input power when needed. See the Smart Power Selector (SPS) section for more details. As
shown, transitions between power states are initiated by detection/removal of valid power sources, OTG events, and
undervoltage conditions.
1. NO INPUT POWER, MODE[3:0] = undefined: No input adapter or battery is detected. The charger and system are off.
Battery is disconnected.
2. BATTERY-ONLY, MODE[3:0] = any mode: CHGIN is invalid or outside the input voltage operating range. Battery is
connected to power the SYS load (Q
= on).
BAT
3. NO CHARGE - DC-DC in FORWARD mode, MODE[3:0] = 0x04: CHGIN input is valid, DC-DC supplies power to SYS.
DC-DC operates from a valid input. Battery is disconnected (Q
DC can supply.
= off) when SYS load is less than the power that DC-
BAT
4. CHARGE - DC-DC in FORWARD mode, MODE[3:0] = 0x05: CHGIN input is valid, DC-DC supplies power to SYS and
charges the battery with IBATT. DC-DC operates from a valid input.
5. OTG - DC-DC in REVERSE mode (OTG), MODE[3:0] = 0x0A: OTG is active. Battery is connected to support SYS and
OTG loads (Q
= on), and charger operates in REVERSE buck mode.
BAT
Powering Up with the Charger Disabled by Default
The MAX77960B/MAX77961B's default power state is CHARGE - DC-DC in FORWARD mode, MODE[3:0] = 0x05. For
battery authentication/safety purposes, the MAX77960B/MAX77961B can be configured to keep charging disabled while
allowing the DC-DC to switch and regulate the SYS voltage when power is applied to CHGIN. To implement this and
enable the charger when appropriate:
● Connect at least one of the INLIM, ITO, ISET or VSET pins to a valid resistor while tying the others (at least one) to
PVL. CHG_DTLS = 0x05 and CHG_OK = 0.
2
● The system processor can configure the charger through the I C interface.
● The system processor enables charging by setting COMM_MODE to 1 (default is 0).
2
See Wide-Input I C Programmable Charger with Charger Disabled for a pin connection example. Pin INLIM is connected
to a valid resistor while ITO, ISET and VSET tie to PVL. The default input current limit is programmed by R
, while
INLIM
default top-off current, constant charging current, and termination voltage use their default value. The system processor
2
can re-program all four settings through the I C interface if needed.
www.maximintegrated.com
Maxim Integrated | 30
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Input Validation
The charger input is compared with several voltage thresholds to determine if it is valid. A charger input must meet the
following characteristics to be valid:
● CHGIN must be above V
to be valid. Once CHGIN is above UVLO threshold, the information is latched
CHGIN_UVLO
and can only be reset when charger is in adaptive input current loop (AICL) and input current is lower than IULO
threshold of 30mA.
● CHGIN must be below its overvoltage lockout threshold (V
).
CHGIN_OVLO
The devices generate a CHGIN_I interrupt (maskable with CHGIN_M bit) when the CHGIN status changes. Read the
CHGIN input status with CHGIN_OK and CHGIN_DTLS[1:0] register bits.
Adaptive Input Current Limit (AICL) and Input Voltage Regulation
The MAX77960B/MAX77961B feature input power management to extract maximum input power while avoiding input
source overload. The adaptive input current limit (AICL) and the input voltage regulation (CHGIN_REG) features allow the
charger to extract more energy from relatively high resistance charge sources with long cables, noncompliant USB hubs
or current limited adapters. In addition, the input power management allows the MAX77960B/MAX77961B to perform
well with adapters that have poor transient load responses.
With a high-resistance source, the charger input voltage drops substantially when it draws large current from the source.
The charger's input voltage regulation loop automatically reduces the current drawn from the input to regulate the input
voltage at V
. If the input current is reduced to I
(50mA typ) and the input voltage is still below
CHGIN_REG
CHGIN_REG_OFF
V
, the charger input turns off. V
is programmable with VCHGIN_REG[4:0] register bits.
CHGIN_REG
CHGIN_REG
With a current limited source, if the MAX77960B/MAX77961B’s input current limit is programmed above the current limit
of the adapter, the charger input voltage starts to drop when the input current drawn exceeds the source current limit.
The charger's input voltage regulation loop allows the MAX77960B/MAX77961B to reduce its input current and operate
at the current limit of the adapter.
When operating with the input voltage regulation loop active, an AICL_I interrupt is generated, AICL_OK sets to 0. The
device prioritize system energy delivery over battery charging. See the Smart Power Selector (SPS) section for more
details.
To extract most input power from a current limited charge source, monitor the AICL_OK status while decreasing the
CHGIN_ILIM[6:0] register setting. Setting the CHGIN_ILIM[6:0] to a reduced to a value below the current limit of the
adapter causes the input voltage to rise. Although the CHGIN_ILIM[6:0] is lowered, more power can be extracted from
the adapter when the input voltage rises.
Input Self-Discharge
To ensure that a rapid removal and reinsertion of a charge source always results in a charger input interrupt, the charger
input presents loading to the input capacitor to ensure that when the charge source is removed, the input voltage decays
below the UVLO threshold in a reasonable time (t
). The input self-discharge is implemented by with a 44kΩ resistor
INSD
(R
) from CHGIN input to ground.
INSD
System Self-Discharge with No Power
To ensure a timely, complete, repeatable, and reliable reset behavior when the system has no power, the MAX77960B/
MAX77961B actively discharge the BATT and SYS nodes when the adapter is missing, the battery is removed and V
SYS
is less than V
. The BATT and SYS discharge resistors are both 600Ω.
SYSUVLO
Charger States
The MAX77960B/MAX77961B utilize several charging states to safely and quickly charge batteries as shown in Figure
1 and Figure 2. Figure 1 shows an exaggerated view of a Li+/Li-Poly battery progressing through the following charge
states when there is no system load and the die and battery are close to room temperature: Prequalification → Fast-
charge → Top-off → Done.
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Maxim Integrated | 31
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
V
BATTREG
V
RSTRT
V
- 500mV
SYSMIN
V
PRECHG
0V
TIME
I
≤ I
CHG SET
I
TRICKLE
I
TO
I
PRECHG
0A
TIME
CHARGER
ENABLED
NOT TO SCALE, V
= 5.0V, I
= 0A, T = +25°C
SYS J
CHGIN
Figure 1. Li Battery Charge Profile
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Maxim Integrated | 32
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
IDLE (POR)
CHG_DTLS = 0x8
CHG_OK = 1
I
CHG = 0
CHG TIMER = 0
WD TIMER = 0
MODE[3:0] PROGRAMS THE CHARGER ON AND
CHG_EN = 1 AND CONV_RDY = 1
V
≤ V
BATT
PRECHG
CHG TIMER ≥ t
CHG TIMER SUSPEND
WD TIMER SUSPEND
PQ
AND PQEN = 0
(SOFT-START)
T
< T
SHDN
J
PRECHARGE
CHG_DTLS = 0x0
CHG_OK = 1
(RESET O-TYPE
REGISTERS)
I
CHG ≤ IPRECHG
THERMAL SHUTDOWN
CHG_DTLS = 0xA
CHG_OK = 0
V
< V
PRECHG
BATT
V
≤ V
BATT
PRECHG
I
= 0
CHG
(SOFT-START)
AND PQEN = 1
(SOFT-START)
CHG TIMER ≥ t
CHG TIMER SUSPEND
WD TIMER SUSPEND
PQ
TRICKLE CHARGE
CHG_DTLS = 0x0
CHG_OK = 1
WDTCLR = 1
OR WDTEN = 0
I
≤ I
CHG TRICKLE
CHG TIMER = 0 IF CHG_DTLS
TRANSITIONS FROM 0x01
T
≥ T
SHDN
J
T
≥ T
SHDN
J
CHG TIMER SUSPEND
WD TIMER SUSPEND
V
< V
- 500mV
BATT
SYSMIN
V
- 500mV ≤ V
BATT
SYSMIN
TIMER FAULT
CHG_DTLS = 0x6
CHG_OK = 0
(SOFT-START)
OR PQEN = 0
AND V
≤ V
BATT
PRECHG
WATCHDOG SUSPEND
CHG_DTLS = 0xB
CHG_OK = 0
AND PQEN = 1
I
= 0
CHG
I
= 0
CHG
V
< V
PRECHG
BATT
(SOFT-START)
CHG TIMER ≥ t
CHG TIMER SUSPEND
WD TIMER SUSPEND
FC
FAST CHARGE (CC)
CHG_DTLS = 0x1
CHG_OK = 1
MODE[3:0] PROGRAMS THE
CHARGER OFF OR CHG_EN = 0 OR
CONV_RDY = 0
CHG TIMER SUSPEND
WD TIMER SUSPEND
WDTEN = 1
AND WD TIMER > t
CHG TIMER SUSPEND
WD TIMER SUSPEND
I
≤ I
CHG FC
WD
CHG TIMER = 0 IF CHG_DTLS
TRANSITIONS FROM
0x00 OR 0x03 OR 0x04
I
< I
FC CHG
V
≤ V
BATTREG BATT
ANY STATE
CHG TIMER ≥ t
FC
CHG TIMER SUSPEND
WD TIMER SUSPEND
FAST CHARGE (CV)
CHG_DTLS = 0x2
CHG_OK = 1
I
< I
≤ I
TO CHG FC
OUTPUT VOLTAGE LOOP IN CONTROL AND I
CHG
INTERNAL SIGNAL TO ENABLE CHARGER; REFER TO TRUTH TABLE
CHG_EN
CONV_RDY
≤ I FOR tTERM
TO
CONV_RDY = 1 WHEN ADC CONVERSION COMPLETES AND CHARGER TARGET
THRESHOLDS ARE SET, EITHER BASED ON PIN OR I2C
TOP OFF
CHG_DTLS = 0x3
CHG_OK = 1
I
≤ I
CHG TO
CHG TIMER = 0 IF CHG_DTLS
TRANSITIONS FROM
0x02
CHARGER STATE WHERE CHARGE IS DISABLED (BATTERY CHARGE
STOPPED)
V
< (V
- V
)
RSTRT
BATT
BATTREG
OR I
> I
CHG TO
(NO SOFT-START)
CHARGER STATE WHERE CHARGE IS ENABLED (BATTERY CHARGE
ON-GOING)
CHG TIMER ≥ t
CHG TIMER SUSPEND
WD TIMER SUSPEND
TO
CONDITION NEEDED TO TRANSITION BETWEEN 2 CHARGER STATES
V
< V
PQLB
BATT
DONE
CHG TIMER AND WD TIMER STATE STATUS
TRANSITION BETWEEN 2 CHARGER STATES
CHG_DTLS = 0x4
CHG_OK = 0
CHG TIMER = 0
I
CHG = 0
CHG TIMER = 0
WD TIMER = 0
V
< (V
- V
)
RSTRT
BATT
BATTREG
(NO SOFT-START)
CHG TIMER RESUME
WD TIMER RESUME
Figure 2. Charger State Diagram
No Input Power or Charger Disabled Idle State
From any state shown in Figure 2 except thermal shutdown, the no input power or charger disabled state is entered
whenever the charger is programmed to be off or the charger input CHGIN is invalid. After being in this state for t
CHG_DTLS is set to 0x08 and CHG_OK is set to 1. A CHG_I interrupt is generated if CHG_OK was 0 previously.
,
SCIDG
While in the no input power or charger disabled state, the charger current is 0mA, the watchdog and charge timers are
forced to 0, and the power to the system is provided by either the battery or the adapter. When both battery and adapter
power are available, the adapter provides primary power to the system and the battery contributes supplemental energy
to the system if necessary.
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Maxim Integrated | 33
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
To exit the no input power or charger disabled state, the charger input must be valid and the charger must be enabled.
Precharge State
As shown in Figure 2, the charger enters the precharge state when the battery voltage is less than V
. After being
PRECHG
in this state for t
, a CHG_I interrupt is generated if CHG_OK was 0 previously, CHG_OK is set to 1 and CHG_DTLS
SCIDG
is set to 0x00. In the precharge state, charge current into the battery is I
.
PRECHG
The following events cause the state machine to exit this state:
● Battery voltage rises above V
and the charger enters the next state in the charging cycle: Trickle Charge.
PRECHG
● If the battery charger remains in this state for longer than t , the charger state machine transitions to the Timer Fault
PQ
state.
● If the watchdog timer is not serviced, the charger state machine transitions to the “Watchdog Suspend” state.
Note that the precharge state works with battery voltages down to 0V. The 0V operation typically allows this battery
charger to recover batteries that have an open internal pack protector. Typically, a battery pack's internal protection circuit
opens if the battery has seen an overcurrent, undervoltage, or overvoltage. When a battery with an open internal pack
protector is used with this charger, the precharge mode current flows into the 0V battery; this current raises the pack’s
terminal voltage to the level where the internal pack protection switch closes.
Note that a normal battery typically stays in the precharge state for several minutes or less. Therefore a battery that stays
in the precharge for longer than t
might be experiencing a problem.
PQ
Trickle Charge State
As shown in Figure 2, the charger state machine is in trickle charge state when V
< V
< V
- 500mV.
PRECHG
BATT
SYSMIN
After being in this state for t
CHG_DTLS = 0x00.
, a CHG_I interrupt is generated if CHG_OK was 0 previously, CHG_OK is set to 1 and
SCIDG
With PQEN = 1 (default) and the MAX77960B/MAX77961B are in the trickle charge state, the current in the battery is
less than or equal to ITRICKLE. When PQEN = 0, the charger skips trickle charge state and transitions directly to fast
charge state and the battery charging current is less than or equal to I
.
FC
Charge current may be less than I
/I for any of the following reasons:
TRICKLE FC
● The charger input is in input current limit.
● The charger input voltage is low.
● The charger is in thermal foldback.
● The system load is consuming adapter current. Note that the system load always gets priority over the battery charge
current.
Typical systems operate with PQEN = 1. When operating with PQEN = 0, the system’s software usually sets I to a low
FC
value such as 200mA and then monitors the battery voltage. When the battery exceeds a relatively low voltage such as
6V, then the system’s software usually increases I
.
FC
The following events cause the state machine to exit this state:
● When the battery voltage rises above V - 500mV or the PQEN bit is cleared, the charger enters the next state
SYSMIN
in the charging cycle: Fast Charge (CC).
● If the battery charger remains in this state for longer than t , the charger state machine transitions to the Timer Fault
PQ
state.
● If the watchdog timer is not serviced, the charger state machine transitions to the Watchdog Suspend state.
Note that a normal battery typically stays in the trickle charge state for several minutes or less. Therefore, a battery that
stays in trickle charge for longer than t
might be experiencing a problem.
PQ
Fast-Charge Constant Current State
As shown in Figure 2, the charger enters the fast-charge constant current (CC) state when V
- 500mV (typ) <
SYSMIN
V
BATT
< V
. After being in the fast-charge CC state for t
, a CHG_I interrupt is generated if CHG_OK was
BATTREG
SCIDG
0 previously, CHG_OK is set to 1 and CHG_DTLS = 0x01.
In the fast-charge CC state, the battery charging current is less than or equal to I . Charge current can be less than I
FC
FC
for any of the following reasons:
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Maxim Integrated | 34
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
● The charger input is in input current limit.
● The charger input voltage is low.
● The charger is in thermal foldback.
● The system load is consuming adapter current. Note that the system load always gets priority over the battery
charging current.
The following events cause the state machine to exit this state:
● When the battery voltage rises above V
(CV).
, the charger enters the next state in the charging cycle: Fast Charge
BATTREG
● If the battery charger remains in this state for longer than t , the charger state machine transitions to the Timer Fault
FC
state.
● If the watchdog timer is not serviced, the charger state machine transitions to the Watchdog Suspend state.
The battery charger dissipates the most power in the fast-charge constant current state, which causes the die
temperature to rise. If the die temperature exceeds T
, the thermal foldback loop is engaged and I is reduced. See
REG
FC
the Thermal Foldback section for more information.
Fast-Charge Constant Voltage State
As shown in Figure 2, the charger enters the fast-charge constant voltage (CV) state when the battery voltage rises
to V from the fast-charge CC state. After being in the fast-charge CV state for t , a CHG_I interrupt is
BATTREG
SCIDG
generated if CHG_OK was 0 previously, CHG_OK is set to 1 and CHG_DTLS = 0x02.
In the fast-charge CV state, the battery charger maintains V across the battery and the charge current is less
BATTREG
than or equal to I . As shown in Figure 1, charger current decreases exponentially in this state as the battery becomes
FC
fully charged.
The smart power selector control circuitry can reduce the charge current for any of the following reasons:
● The charger input is in input current limit.
● The charger input voltage is low.
● The charger is in thermal foldback.
● The system load is consuming adapter current. Note that the system load always gets priority over the battery charge
current.
The following events cause the state machine to exit this state:
● When the charger current is below I
for t
, the charger enters the Top-Off State.
TERM
TO
● If the battery charger remains in this state for longer than t , the charger state machine transitions to the Timer Fault
FC
State.
● If the watchdog timer is not serviced, the charger state machine transitions to the Watchdog Timer Suspend State.
Top-Off State
As shown in Figure 2, the top-off state can only be entered from the fast-charge CV state when the charger current
decreases below I for t
. After being in the top-off state for t
, a CHG_I interrupt is generated if CHG_OK was
TO
TERM
SCIDG
0 previously, CHG_OK is set to 1, and CHG_DTLS = 0x03. In the top-off state the battery charger maintains V
BATTREG
across the battery and typically the charge current is less than or equal to I
.
TO
The smart power selector control circuitry can reduce the charge current for any of the following reasons:
● The charger input is in input current limit.
● The charger input voltage is low.
● The charger is in thermal foldback.
● The system load is consuming adapter current. Note that the system load always gets priority over the battery charge
current.
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Maxim Integrated | 35
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
The following events cause the state machine to exit this state:
● After being in this state for the top-off time (t ), the charger enters the Done State.
TO
● If V
< V
- V
the charger goes back to the Fast-Charge Constant Current State.
BATT
BATTREG
RSTRT,
● If the watchdog timer is not serviced, the charger state machine transitions to the Watchdog Timer Suspend State.
Done State
As shown in Figure 2, the battery charger enters its done state after the charger has been in the top-off state for t
.
TO
After being in this state for t
0 and CHG_DTLS = 0x04.
, a CHG_I interrupt is generated only if CHG_OK was 0 previously, CHG_OK is set to
SCIDG
The following events cause the state machine to exit this state:
● If V < V - V the charger goes back to the Fast-Charge Constant Current State.
BATT
BATTREG
RSTRT,
● If the watchdog timer is not serviced, the charger state machine transitions to the Watchdog Timer Suspend State.
In the done state, the battery charging current (I ) is 0A and the charger presents a very low load (I ) to the
CHG
MBDN
battery. If the system load presented to the battery is low (<< 100µA), then a typical system can remain in the done
state for many days. If left in the done state long enough, the battery voltage decays below the charging restart threshold
(V
) and the charger state machine transitions back into the fast-charge CC state. There is no soft-start (di/dt
RSTRT
limiting) during the done to fast-charge state transition.
Timer Fault State
The battery charger provides both a charge timer and a watchdog timer to ensure safe charging. As shown in Figure
2, the charge timer prevents the battery from charging indefinitely. The time that the charger is allowed to remain in
its prequalification states is t . The time that the charger is allowed to remain in the fast-charge CC and CV states
PQ
is t , which is programmable with FCHGTIME. Finally the time that the charger is in the top-off state is t
which
FC
TO
is programmable with TO_TIME. Upon entering the timer fault state a CHG_I interrupt is generated without a delay,
CHG_OK is cleared and CHG_DTLS = 0x06.
The charger is off in the timer fault state. The charger can exit the timer fault state when the charger is programmed to
be off then on again through the MODE bits or when DISQBAT pin is toggled from L-H-L. Alternatively, the charger input
can be removed and reinserted to exit the timer fault state (see the ANY STATE bubble in Figure 2).
Watchdog Timer Suspend State
The battery charger provides both a charge timer and a watchdog timer to ensure safe charging. As shown in Figure 2,
the watchdog timer protects the battery from charging indefinitely in the event that the host hangs or otherwise cannot
communicate correctly. The watchdog timer is disabled by default with WDTEN = 0. Enable the feature by setting WDTEN
= 1. With watchdog timer enabled, the host controller must reset the watchdog timer within the timer period (t ) in order
WD
for the charger to operate properly. Reset the watchdog timer by programming WDTCLR = 0x01.
If the watchdog timer expires, charging stops, a CHG_I interrupt is generated if CHG_OK was 1 previously, CHG_OK is
cleared, and CHG_DTLS indicates that the charger is off because the watchdog timer expired. Once the watchdog timer
expires, the charger can be restarted by programming WDTCLR = 0x01. The SYS node can be supported by the battery
and/or the adapter through the DC-DC buck while the watchdog timer is expired.
Thermal Shutdown State
As shown in Figure 2, the state machine enters the thermal shutdown state when the junction temperature (T ) exceeds
J
the device’s thermal shutdown threshold (T
). When T is close to T
the charger would have already folded
SHDN
J
SHDN,
back the input current to 0A, (see the Thermal Foldback section for more details), so the charger and the DC-DC are
effectively off. Upon entering this state, CHG_I interrupt is generated if CHG_OK was 1 previously, CHG_OK is cleared,
and CHG_DTLS = 0x0A.
In the thermal shutdown state, the charger is off. MODE register (CHG_CNFG_00[3:0]) is reset to its default value as
well as all O type registers.
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Maxim Integrated | 36
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Thermal Management
The MAX77960B/MAX77961B charger use several thermal management techniques to prevent excessive battery and
die temperatures.
Thermal Foldback
Thermal foldback maximizes the battery charge current while regulating the MAX77960B/MAX77961B junction
temperature. As shown in Figure 3, when the die temperature exceeds the value programmed by REGTEMP (T
),
REG
a thermal limiting circuit reduces the battery charger’s target current by 5%/°C (A
) with an analog control loop.
TJREG
When the charger transitions in and out of the thermal foldback loop, a CHG_I interrupt is generated and the host
microprocessor can read the status of the thermal regulation loop with the TREG status bit. Note that an active thermal
foldback loop is not an abnormal operation and the thermal foldback loop status does not affect the CHG_OK bit (only
information contained within CHG_DTLS affects CHG_OK).
DRAWN TO SCALE, V
= 5.0V, V
= 0A, CHGIN_ILIM IS SET FOR MAXIMUM
SYS
CHGIN
I
= 3.15A
FC
BATTERY CHARGER OPERATION IN
3.0A
2.0A
1.0A
0.0A
THERMAL REGULATION GENERATES A
CHG_I INTERRUPT BIT AND SETS THE
TREG STATUS BIT
A
= -5%/°C
TJREG
T
T
+ 20°C
JREG
JREG
JUNCTION TEMPERATURE (°C)
Figure 3. Charge Currents vs. Junction Temperature
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Maxim Integrated | 37
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
JEITA Compliance
The MAX77960B/MAX77961B safely charge Li+ batteries in accordance with JEITA specifications. The MAX77960B/
MAX77961B monitor the battery temperature with a NTC thermistor connected at THM pin and automatically adjust the
fast-charge current and/or charge termination voltage as the battery temperature varies. JEITA-controlled charging can
be disabled by setting JEITA_EN to 0. CHG_DTLS and THM_DTLS registers report JEITA-controlled charging status.
The JEITA controlled fast-charging current (I
) and charge termination voltage (V
) for T
CHGCV_JEITA COLD
CHGCC_JEITA
2
< T < T
are programmable with I C bits I
and V
.
COOL
CHGCC_COOL
CHGCV_COOL
The charge termination voltage for T
4.
< T < T
is reduced to (CHG_CV_PRM - 180mV/cell), as shown in Figure
HOT
WARM
Charging is suspended when the battery temperature is too cold or too hot (T < T
or T
< T).
HOT
COLD
Temperature thresholds (T
, T
, T
, and T
) depend on the thermistor selection. See the Thermistor
HOT
COLD COOL WARM
Input (THM) section for more details.
When battery charge current is reduced by 50%, the charger timer is doubled.
I
CHGCC_NORMAL
I
CHGCC_COOL
TEMPERATURE
T
T
T
COLD
T
HOT
COOL
WARM
V
CHGCV_NORMAL
V
- 180mV/cell
CHGCV_NORMAL
V
CHGCV_COOL
TEMPERATURE
T
T
T
COLD
T
HOT
COOL
WARM
Figure 4. JEITA Compliance
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Maxim Integrated | 38
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Thermal Shutdown
The MAX77960B/MAX77961B have a die temperature sensing circuit. When the die temperature exceeds the thermal
2
shutdown threshold, T
, the MAX77960B/MAX77961B shut down and reset O type I C registers. There is a 15°C
SHDN
thermal hysteresis. After thermal shutdown, if the die temperature reduces by 15°C, the thermal shutdown bus deasserts
and the devices reenable. The battery charger has an independent thermal regulation loop. See the Thermal Shutdown
State section for more details.
Factory Ship Mode
The MAX77960B/MAX77961B support factory ship mode with low battery quiescent current, I
.
SHDN
When the input source is not valid, and the device is powered by battery, the devices enter factory ship mode if DISQBAT
2
is pulled high or FSHIP_MODE bit is set to 1. I C communication is unavailable in factory ship mode. When a valid input
2
source is applied to the device's CHGIN pin, the devices exit factory ship mode. I C communication is enabled, charging
is enabled if all conditions to charge are met (e.g., DISQBAT pin is pulled low and MODE[3:0] = 0x05).
Minimum System Voltage
The system voltage is regulated to the minimum SYS voltage (V
500mV).
) when the battery is low (V
< V
-
SYSMIN
SYSMIN
BATT
● The charging current is I
● The charging current is I
when V
when V
< V
PRECHG
.
PRECHG
TRICKLE
BATT
< V
< V
- 500mV.
SYSMIN
PRECHG
BATT
● The charging current is I when V
- 500mV < V
.
FC
SYSMIN
BATT
Battery Differential Voltage Sense (BATSP, BATSN)
BATSP and BATSN are differential remote voltage sense lines for the battery. The MAX77960B/MAX77961B's remote
sensing feature improves accuracy and decreases charging time. The thermistor voltage is interpreted with respect to
BATSN. For best results, connect BATSP and BATSN as close as possible to the battery connector.
Battery Overcurrent Alert
Excessive battery discharge current can occur for several reasons such as exposure to moisture, a software problem, an
IC failure, a component failure, or a mechanical failure that causes a short circuit. The battery overcurrent alert feature is
enabled with B2SOVRC[3:0]; disabling this feature reduces the battery current consumption by I
.
BOVRC
When the battery (BATT) to system (SYS) discharge current (I
) exceeds the programmed overcurrent threshold for
BATT
at least t
, the Q
switch closes to reduce the power loss in the MAX77960B/MAX77961B. A B2SOVRC_I and a
BOVRC
BAT
BAT_I interrupt are generated, BAT_OK is cleared, and BAT_DTLS reports an overcurrent condition. Typically, when the
host processor detects this overcurrent interrupt, it executes a housekeeping routine that tries to mitigate the overcurrent
situation. If the processor cannot correct the overcurrent within t
DC.
, then the MAX77960B/MAX77961B turn off the DC-
OCP
t
time duration can be set through the B2SOVRC_DTC register bit (Battery to SYS Overcurrent Debounce Time
OCP
Control): 0x0 (dflt): t
= 6ms, 0x1: t
= 100ms.
OCP
OCP
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Maxim Integrated | 39
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
HOST READS B2SOVRC_I AND
BAT_I INTERRUPT BITS
BAT2SYS
OVERLOAD
B2SOVRC THRESHOLD
OFF
ON
Q
BAT
INTB
DC-DC
CONVERTER
OFF
ON
t
t
OCP
BOVRC
DRAWING NOT TO SCALE
Figure 5. B2SOVRC
Charger Interrupt Debounce Time
Table 9. List of Charger Interrupt Debounce Time
DEBOUNCE TIME
RISING FALLING
INTERRUPT
MIN
30ms
7ms
MAX
—
MIN
MAX
—
AICL_I
30ms
None
None
None
None
None
CHGIN _I
—
—
B2SOVRC_I
—
3.3ms
—
—
BAT_I (OV)
30ms
37.5ms
450μs
—
OTG_PLIM_I (OTG Fault)
OTG_PLIM_I (Buck-Boost Positive Current Limit)
—
—
—
—
Input Power-OK/OTG Power-OK Output (INOKB)
INOKB is an open-drain and active-low output that indicates CHGIN power-OK status.
When OTG mode is disabled, (OTGEN = low and MODE[3:0] ≠ 0x0A), INOKB pulls low when a valid input source is
inserted at CHGIN, V < V < V
.
CHGIN_OVLO
CHGIN_UVLO
CHGIN
When OTG mode is enabled, (OTGEN = high or MODE[3:0] = 0x0A), INOKB pulls low to indicate the OTG output power
OK when V < V < V
.
CHGIN.OTG.OV
CHGIN.OTG.UV
CHGIN
INOKB can be used as a logic output by adding a 200kΩ pullup resistor to a system IO voltage.
INOKB can be also used as a LED indicator driver by adding a current limiting resistor and a LED to a pullup voltage
source.
Charge Status Output (STAT)
STAT is an open-drain and active-low output that indicates charge status. STAT can be used as a logic input to the host
processor by adding a 200kΩ pullup resistor to a system IO rail and a rectifier (a diode and a capacitor).
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Table 10. Charge Status Indicator by STAT
CHARGE STATUS
STAT
LOGIC STATE
No input
High impedance
High
High
No DC-DC/no charge:
valid adapter with STBY_EN = 1 or MODE High impedance
= 0x0/1/2/3/4
Repeat low and high impedance with 1Hz,
50% duty cycle
High, rectified with an external diode
and a capacitor
Trickle, precharge, fast charge
Top-off and done
Faults
Low
Low
High impedance
High
Reverse Buck Mode (OTG)
The DC-DC converter topology of the MAX77960B/MAX77961B allows it to operate as a forward buck-boost converter
or as a reverse buck converter. The modes of the DC-DC converter are controlled with MODE[3:0] register bits. When
MODE[3:0] = 0x0A or OTGEN = high, the DC-DC converter operates in reverse buck mode, allowing it to source current
to CHGIN, commonly referred to as USB OTG mode.
In OTG mode, the DC-DC converter operates in reverse buck mode and regulates V
to V
(5.1V
CHGIN.OTG
CHGIN
typ). The current through the CHGIN current-sensing resistor (CSINN, CSINP) is limited to the value programmed by
OTG_ILIM[2:0]. There are eight OTG_ILIM options to program CHGIN current limit from 500mA to 3A. When the OTG
mode is enabled, the unipolar CHGIN transfer function measures current going out of CHGIN. When OTG mode is
disabled, the unipolar CHGIN transfer function measures current going into CHGIN.
OTG_I, OTG_M, OTG_OK are the interrupt bit, interrupt mask bit and interrupt status bit associated with OTG function.
OTG_DTLS[1:0] reports the status of the OTG operation. OTG_DTLS[1:0] is latched until the host reads the register.
If the external OTG load at CHGIN exceeds I
current limit for a minimum of 37.5ms, an OTG_I interrupt
CHGIN.OTG.ILIM
is generated, OTG_OK = 0 and OTG_DTLS[1:0] = 01. The reverse buck operates as a current limited voltage source
when overloaded. The DC-DC converter stops switching when the OTG_ILIM condition lasts for 60ms and automatically
resumes switching after 300ms off time. If the OTG_ILIM fault condition at CHGIN persists, the DC-DC toggles on and
off with ~60ms on and ~300ms off.
VBUS is normally an external-facing pin in the application, and it might have a risk of being shorted to GND. In
this case, the MAX77960B/MAX77961B can experience a short-circuit condition at its output. If such risk is real, it is
recommended to add a current-limited load switch at VBUS for overcurrent protection. The load switch guarantees the
OTG output current does not exceed its current limit under any circumstances. The current limit should be set no lower
than I
of the MAX77960B/MAX77961B.
CHGIN.OTG.ILIM
When CHGIN voltage drops below V
OTG_OK = 0 and OTG_DTLS[1:0] = 00.
, the DC-DC stops switching and an OTG_I interrupt is generated.
, the DC-DC stops switching and an OTG_I interrupt is generated.
CHGIN.OTG.UVLO
When CHGIN voltage exceeds V
CHGIN.OTG.OV
OTG_OK = 0 and OTG_DTLS[1:0] = 10.
If the DC-DC stops switching due to a OTG_UV or OTG_OV fault condition, it automatically retries after 300ms off time.
INOKB is the hardware indication of the OTG power good. See the Input Power-OK/OTG Power-OK Output (INOKB)
section for details.
OTG Enable (OTGEN)
The OTGEN is an active high input. When OTGEN pin is pulled high, the OTG function is enabled. When the OTGEN
2
pin is pulled low, the OTG function can be enabled through I C by setting MODE[3:0] = 0x0A. To pull the OTGEN pin low
with a pulldown resistor, the resistance must be lower than 44kΩ.
The devices enable reverse buck operation only when the voltage on the CHGIN bypass cap, V
, falls below
CHGIN
V
.
CHGIN_UVLO
In case V
is above V
threshold at the OTG enable, the devices ensure V
node discharge
CHGIN
CHGIN
CHGIN_UVLO
through a 8kΩ pulldown resistor before enabling the OTG function and reverse buck switching.
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Pulldown is released once V
is reached.
CHGIN_UVLO
Analog Low-Noise Power Input (AVL)
AVL is the power input for the MAX77960B/MAX77961B’s analog circuitry. Do not power external devices from this pin.
Bypass with a 4.7Ω resistor between AVL and PVL and a 4.7μF capacitor from AVL to GND.
Low-Side Gate Driver Power Supply (PVL)
PVL is an internal 1.8V LDO output that powers the MAX77960B/MAX77961B’s low-side gate driver circuitry. Do not
power external devices other than pullup resistors from this pin. Bypass with a 4.7μF capacitor to GND.
System Faults
V
SYS
Fault
The MAX77960B/MAX77961B monitor the V
node for undervoltage and overvoltage events. The following sections
SYS
describe the devices' behavior if any of these events is to occur.
V
SYS
Undervoltage Lockout (V
)
SYSUVLO
When the voltage from SYS to GND (V
) is less than the undervoltage lockout threshold (V
), the
SYSUVLO
SYS
MAX77960B/MAX77961B generate a SYSUVLO_I interrupt immediately. If V
the device shuts down and resets O Type I C registers.
is undervoltage for greater than 8ms,
SYS
2
V
SYS
Overvoltage Lockout (V
)
SYSOVLO
When the V
exceeds V
, the MAX77960B/MAX77961B generate a SYSOVLO_I interrupt immediately and
SYSOVLO
SYS
2
the device shuts down and resets O Type I C registers.
Thermal Fault
The MAX77960B/MAX77961B have a die temperature sensing circuit. When the die temperature exceeds the thermal
2
shutdown threshold, 165°C (T
), the MAX77960B/MAX77961B shut down and reset O Type I C registers. There is
SHDN
a 15°C thermal hysteresis. After thermal shutdown, if the die temperature reduces by 15°C, the thermal shutdown bus
deasserts and IC reenables. The battery charger has an independent thermal regulation loop. See the Thermal Foldback
section for more details.
Interrupt Output (INTB)
The INTB is an active-low, open-drain output. Connect a pullup resistor to the pullup power source.
The MAX77960B/MAX77961B's INTB can be connected to the host's interrupt input and signals to the host when
unmasked interrupt events occur within the MAX77960B/MAX77961B.
2
I C Serial Interface
2
2
The I C serial bus consists of a bidirectional serial-data line (SDA) and a serial clock (SCL). I C is an open-drain
bus. SDA and SCL require pullup resistors (500Ω or greater). Optional 24Ω resistors in series with SDA and SCL help
to protect the device inputs from high-voltage spikes on the bus lines. Series resistors also minimize crosstalk and
undershoot on bus lines.
System Configuration
2
The I C bus is a multimaster bus. The maximum number of devices that can attach to the bus is only limited by bus
capacitance.
2
2
Figure 6 shows an example of a typical I C system. A device on I C bus that sends data to the bus is called a transmitter.
A device that receives data from the bus is called a receiver. The device that initiates a data transfer and generates SCL
clock signals to control the data transfer is a master. Any device that is being addressed by the master is considered a
2
2
slave. When the MAX77960B/MAX77961B I C-compatible interface is operating, it is a slave on I C bus and it can be
both a transmitter and a receiver.
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SDA
SCL
MASTER
TRANSMITTER/
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER /
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER
Figure 6. Functional Logic Diagram for Communications Controller
Bit Transfer
One data bit is transferred for each SCL clock cycle. The data on SDA must remain stable during the high portion of SCL
clock pulse. Changes in SDA while SCL is high are control signals (START and STOP conditions).
SCL
SDA
DATA LINE STABLE
DATA VALID
CHANGE OF DATA
ALLOWED
2
Figure 7. I C Bit Transfer
START and STOP Conditions
2
When I C serial interface is inactive, SDA and SCL idle high. A master device initiates communication by issuing a
START condition. A START condition is a high-to-low transition on SDA with SCL high. A STOP condition is a low-to-high
transition on SDA, while SCL is high.
A START condition from the master signals the beginning of a transmission to the IC. The master terminates transmission
by issuing a NOT ACKNOWLEDGE followed by a STOP condition.
A STOP condition frees the bus. To issue a series of commands to the slave, the master can issue REPEATED START
(Sr) commands instead of a STOP command in order to maintain control of the bus. In general, a REPEATED START
command is functionally equivalent to a regular START command.
2
When a STOP condition or incorrect address is detected, the ICs internally disconnect SCL from the I C serial interface
until the next START condition, minimizing digital noise and feed-through.
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S
Sr
P
t
SU_START
SCL
SDA
t
SU_STOP
t
t
HD_START
HD_START
2
Figure 8. I C Start Stop
Acknowledge
2
Both the I C bus master and the IC (slave) generate acknowledge bits when receiving data. The acknowledge bit is the
last bit of each nine bit data packet. To generate an ACKNOWLEDGE (A), the receiving device must pull SDA low before
the rising edge of the acknowledge-related clock pulse (ninth pulse) and keep it low during the high period of the clock
pulse. To generate a NOT-ACKNOWLEDGE (nA), the receiving device allows SDA to be pulled high before the rising
edge of the acknowledge-related clock pulse and leaves it high during the high period of the clock pulse.
Monitoring the acknowledge bits allows for detection of unsuccessful data transfers. An unsuccessful data transfer occurs
if a receiving device is busy or if a system fault has occurred. In the event of an unsuccessful data transfer, the bus
master should reattempt communication at a later time.
Slave Address
The devices act as a slave transmitter/receiver. The slave address of the IC is 0xD2h/0xD3h. The least significant bit is
the read/write indicator (1 for read, 0 for write).
Clock Stretching
2
2
In general, the clock signal generation for I C bus is the responsibility of the master device. I C specification allows slow
slave devices to alter the clock signal by holding down the clock line. The process in which a slave device holds down
the clock line is typically called clock stretching. The IC does not use any form of clock stretching to hold down the clock
line.
General Call Address
2
The devices do not implement an I C specification general call address. If the devices see a general call address
(00000000b), they do not issue an ACKNOWLEDGE (A).
Communication Speed
2
The devices provide I C 3.0-compatible (1MHz) serial interface.
2
● I C Revision 3 Compatible Serial Communications Channel
• 0Hz to 100kHz (standard mode)
• 0Hz to 400kHz (fast mode)
• 0Hz to 1MHz (fast-mode plus)
2
● Does not utilize I C clock stretching
Operating in standard mode, fast mode, and fast-mode plus does not require any special protocols. The main
consideration when changing the bus speed through this range is the combination of the bus capacitance and pullup
resistors. Higher time constants created by the bus capacitance and pullup resistance (C x R) slow the bus operation.
Therefore, when increasing bus speeds the pullup resistance must be decreased to maintain a reasonable time constant.
2
Refer to the Pullup Resistor Sizing section of the I C revision 3.0 specification for detailed guidance on the pullup resistor
selection. In general, for bus capacitance of 200pF, a 100kHz bus needs 5.6kΩ pullup resistors, a 400kHz bus needs
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about a 1.5kΩ pullup resistors, and a 1MHz bus needs 680Ω pullup resistors. Note that the pullup resistor dissipates
2
power when the open-drain bus is low. The lower the value of the pullup resistor, the higher the power dissipation (V /R).
2
Operating in high-speed mode requires some special considerations. For the full list of considerations, refer to the I C
3.0 specification. The major considerations with respect to the IC are:
2
2
● I C bus master uses current source pullups to shorten the signal rise times.
● I C slave must use a different set of input filters on its SDA and SCL lines to accommodate for the higher bus speed.
● The communication protocols need to utilize the high-speed master code.
At power-up and after each STOP condition, the IC input filters are set for standard mode, fast mode, or fast-mode plus
(i.e., 0Hz to 1MHz). To switch the input filters for high-speed mode, use the high-speed master code protocols that are
described in the Communication Protocols section.
Communication Protocols
The devices support both writing and reading from their registers.
Writing to a Single Register
Figure 9 shows the protocol for the I C master device to write one byte of data to the ICs. This protocol is the same as
2
SMBus specification’s Write Byte protocol.
The Write Byte protocol is as follows:
1. The master sends a START command (S).
2. The master sends the 7-bit slave address followed by a write bit (R/W = 0).
3. The addressed slave asserts an ACKNOWLEDGE (A) by pulling SDA low.
4. The master sends an 8-bit register pointer.
5. The slave acknowledges the register pointer.
6. The master sends a data byte.
7. The slave acknowledges the data byte. At the rising edge of SCL, the data byte is loaded into its target register and
the data becomes active.
8. The master sends a STOP condition (P) or a REPEATED START condition (Sr). Issuing a P ensures that the bus
input filters are set for 1MHz or slower operation. Issuing a REPEATED START (Sr) leaves the bus input filters in
their current state.
LEGEND
MASTER TO
SLAVE
SLAVE TO
MASTER
* P FORCES THE BUS FILTERS TO SWITCH TO THEIR ≤ 1MHz MODE.
Sr LEAVES THE BUS FILTERS IN THEIR CURRENT STATE.
NUMBER
OF BITS
1
7
1
0
1
8
1
8
1
1
S
SLAVE ADDRESS
A
REGISTER POINTER
A
DATA
A
P or Sr *
R/nW
THE DATA IS LOADED INTO
THE TARGET REGISTER
AND BECOMES ACTIVE
DURING THIS RISING EDGE.
SDA
SCL
B1
7
B0
8
A
9
ACKNOWLEDGE
Figure 9. Writing to a Single Register
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Writing to Sequential Registers
Figure 10 shows the protocol for writing to sequential registers. This protocol is similar to the Write Byte protocol, except
the master continues to write after it receives the first byte of data. When the master is done writing, it issues a STOP or
REPEATED START.
The Writing to Sequential Registers protocol is as follows:
1. The master sends a START command (S).
2. The master sends the 7-bit slave address followed by a write bit (R/W = 0).
3. The addressed slave asserts an ACKNOWLEDGE (A) by pulling SDA low.
4. The master sends an 8-bit register pointer.
5. The slave acknowledges the register pointer.
6. The master sends a data byte.
7. The slave acknowledges the data byte. At the rising edge of SCL, the data byte is loaded into its target register and
the data becomes active.
8. Steps 6 to 7 are repeated as many times as the master requires.
9. During the last acknowledge related clock pulse, the slave issues an ACKNOWLEDGE (A).
10. The master sends a STOP condition (P) or a REPEATED START condition (Sr). Issuing a P ensures that the bus
input filters are set for 1MHz or slower operation. Issuing a REPEATED START (Sr) leaves the bus input filters in
their current state.
LEGEND
MASTER TO
SLAVE
SLAVE TO
MASTER
*P FORCES THE BUS FILTERS TO SWITCH TO THEIR ≤1MHz
MODE. Sr LEAVES THE BUS FILTERS IN THEIR CURRENT STATE.
NUMBER
OF BITS
1
7
1
0
1
8
1
8
1
S
SLAVE ADDRESS
A
REGISTER POINTER X
A
DATA 1
A
R/nW
α
α
NUMBER
OF BITS
8
1
8
1
DATA 2
A
DATA 3
A
REGISTER POINTER = X + 2
REGISTER POINTER = X + 1
α
1
NUMBER
OF BITS
8
8
1
1
DATA N-1
A
DATA N
A
P or Sr*
β
α
REGISTER POINTER
= X + (N-2)
REGISTER POINTER
= X + (N-1)
THE DATA IS LOADED INTO
THE TARGET REGISTER AND
BECOMES ACTIVE DURING
THIS RISING EDGE.
SDA
SCL
B1
7
B0
8
A
9
B9
ACKNOWLEDGE
1
DETAIL: α
THE DATA IS LOADED INTO
THE TARGET REGISTER AND
BECOMES ACTIVE DURING
THIS RISING EDGE.
SDA
SCL
B1
7
B0
8
A
9
ACKNOWLEDGE
DETAIL: β
Figure 10. Writing to Sequential Registers
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Writing Multiple Bytes using Register-Data Pairs
2
Figure 11 shows the protocol for the I C master device to write multiple bytes to the devices using register data pairs.
2
This protocol allows the I C master device to address the slave only once and then send data to multiple registers in a
random order. Registers can be written continuously until the master issues a STOP condition.
The Multiple Byte Register Data Pair protocol is as follows:
1. The master sends a START command.
2. The master sends the 7-bit slave address followed by a write bit.
3. The addressed slave asserts an ACKNOWLEDGE (A) by pulling SDA low.
4. The master sends an 8-bit register pointer.
5. The slave acknowledges the register pointer.
6. The master sends a data byte.
7. The slave acknowledges the data byte. At the rising edge of SCL, the data byte is loaded into its target register and
the data becomes active.
8. Steps 4 to 7 are repeated as many times as the master requires.
9. The master sends a STOP condition. During the rising edge of the stop related SDA edge, the data byte that was
previously written is loaded into the target register and becomes active.
LEGEND
MASTER TO
SLAVE
SLAVE TO
MASTER
NUMBER
OF BITS
1
7
1
0
1
8
1
8
1
S
SLAVE ADDRESS
A
REGISTER POINTER X
A
DATA X
A
α
α
R/nW
NUMBER
OF BITS
8
1
8
1
REGISTER POINTER N
A
DATA N
A
NUMBER
OF BITS
8
1
8
1
1
REGISTER POINTER Z
A
DATA Z
A
P
β
THE DATA IS LOADED INTO THE
TARGET REGISTER AND BECOMES
ACTIVE DURING THIS RISING
EDGE.
SDA
SCL
B1
7
B0
8
A
9
B9
ACKNOWLEDGE
1
DETAIL: α
THE DATA IS LOADED INTO THE
TARGET REGISTER AND BECOMES
ACTIVE DURING THIS RISING
EDGE.
SDA
SCL
B1
7
B0
8
A
9
ACKNOWLEDGE
DETAIL: β
Figure 11. Writing to Multiple Registers with “Multiple Byte Register-Data Pairs” Protocol
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Reading from a Single Register
2
The I C master device reads one byte of data to the devices. This protocol is the same as SMBus specification’s Read
Byte protocol.
The Read Byte protocol is as follows:
1. The master sends a START command (S).
2. The master sends the 7-bit slave address followed by a write bit (R/W = 0).
3. The addressed slave asserts an ACKNOWLEDGE (A) by pulling SDA low.
4. The master sends an 8-bit register pointer.
5. The slave acknowledges the register pointer.
6. The master sends a REPEATED START command (Sr).
7. The master sends the 7-bit slave address followed by a read bit (R/W = 1).
8. The addressed slave asserts an ACKNOWLEDGE (A) by pulling SDA low.
9. The addressed slave places 8 bits of data on the bus from the location specified by the register pointer.
10. The master issues a NOT-ACKNOWLEDGE (nA).
11. The master sends a STOP condition (P) or a REPEATED START condition (Sr). Issuing a P ensures that the bus
input filters are set for 1MHz or slower operation. Issuing a REPEATED START (Sr) leaves the bus input filters in
their current state.
LEGEND
MASTER TO
SLAVE
SLAVE TO
MASTER
*P FORCES THE BUS FILTERS TO SWITCH TO THEIR ≤1MHz MODE.
Sr LEAVES THE BUS FILTERS IN THEIR CURRENT STATE.
NUMBER
OF BITS
1
7
1
0
1
8
1
1
7
1
1
1
8
1
1
S
SLAVE ADDRESS
A
REGISTER POINTER A Sr SLAVE ADDRESS
R/nW
A
DATA
nA P or Sr*
R/nW
Figure 12. Reading from a Single Register
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Reading from Sequential Registers
Figure 13 shows the protocol for reading from sequential registers. This protocol is similar to the Read Byte protocol
except the master issues an ACKNOWLEDGE (A) to signal the slave that it wants more data—when the master has all
the data it requires, it issues a not-acknowledge (nA) and a STOP (P) to end the transmission.
The Continuous Read from Sequential Registers protocol is as follows:
1. The master sends a START command (S).
2. The master sends the 7-bit slave address followed by a write bit (R/W = 0).
3. The addressed slave asserts an ACKNOWLEDGE (A) by pulling SDA low.
4. The master sends an 8-bit register pointer.
5. The slave acknowledges the register pointer.
6. The master sends a REPEATED START command (Sr).
7. The master sends the 7-bit slave address followed by a read bit (R/W = 1).
8. The addressed slave asserts an ACKNOWLEDGE (A) by pulling SDA low.
9. The addressed slave places 8 bits of data on the bus from the location specified by the register pointer.
10. The master issues an ACKNOWLEDGE (A) signaling the slave that it wishes to receive more data.
11. Steps 9 to 10 are repeated as many times as the master requires. Following the last byte of data, the master must
issue a NOT-ACKNOWLEDGE (nA) to signal that it wishes to stop receiving data.
12. The master sends a STOP condition (P) or a REPEATED START condition (Sr). Issuing a STOP (P) ensures that
the bus input filters are set for 1MHz or slower operation. Issuing a REPEATED START (Sr) leaves the bus input
filters in their current state.
LEGEND
MASTER TO
SLAVE
SLAVE TO
MASTER
*P FORCES THE BUS FILTERS TO SWITCH TO THEIR ≤1MHz MODE.
Sr LEAVES THE BUS FILTERS IN THEIR CURRENT STATE.
NUMBER
OF BITS
1
7
1
0
1
8
1
1
7
1
1
1
8
1
S
SLAVE ADDRESS
A
REGISTER POINTER X A Sr SLAVE ADDRESS
A
DATA 1
A
R/nW
R/nW
NUMBER
OF BITS
8
1
8
1
8
1
DATA 2
A
DATA 3
A
DATA 4
A
REGISTER POINTER = X + 1 REGISTER POINTER = X + 2 REGISTER POINTER = X + 3
NUMBER
OF BITS
8
1
8
1
8
1
1
DATA N-2
A
DATA N-1
A
DATA N
nA P or Sr*
REGISTER POINTER
= X + (N-3)
REGISTER POINTER
= X + (N-2)
REGISTER POINTER
= X + (N-1)
Figure 13. Reading from Sequential Registers
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Register Map
FUNC
ADDRESS
NAME
MSB
LSB
TOP
0x00
CID[7:0]
REVISION[2:0]
VERSION[4:0]
0x01
SWRST[7:0]
SW_RST[7:0]
TSHDN_ SYSOVL SYSUVL
0x02
0x03
0x04
TOP_INT[7:0]
SPR[4:0]
SPR[4:0]
SPR[4:0]
I
O_I
TSHDN_ SYSOVL SYSUVL
O_M O_M
TSHDN_ SYSOVL SYSUVL
OK O_OK O_OK
O_I
TOP_INT_MASK[7:0]
TOP_INT_OK[7:0]
M
CHARGER_FUNC
B2SOVR
C_I
CHGINIL DISQBA OTG_PL
IM_I T_I IM_I
0x10
0x11
0x12
CHG_INT[7:0]
AICL_I
CHGIN_I
CHG_I
CHG_M
BAT_I
BAT_M
BAT_OK
CHGIN_ B2SOVR
C_M
CHGINIL DISQBA OTG_PL
IM_M T_M IM_M
CHG_INT_MASK[7:0]
CHG_INT_OK[7:0]
AICL_M
M
AICL_O
K
CHGIN_ B2SOVR CHG_O
OK C_OK
CHGINIL DISQBA OTG_PL
K
IM_OK
T_OK
IM_OK
QB_DTL
S
0x13
0x14
CHG_DETAILS_00[7:0]
CHG_DETAILS_01[7:0]
SPR7
TREG
CHGIN_DTLS[1:0]
BAT_DTLS[2:0]
OTG_DTLS[1:0]
SPR2_1[1:0]
CHG_DTLS[3:0]
FSW_DTLS[1:0]
APP_MO
DE_DTL
S
NUM_C
ELL_DT
LS
0x15
0x16
CHG_DETAILS_02[7:0]
CHG_CNFG_00[7:0]
SPR
THM_DTLS[2:0]
COMM_
MODE
STBY_E
DISIBS
LPM
WDTEN
MODE[3:0]
N
STAT_E
N
0x17
0x18
CHG_CNFG_01[7:0]
CHG_CNFG_02[7:0]
PQEN
CHG_RSTRT[1:0]
FCHGTIME[2:0]
SPR[1:0]
CHGCC[5:0]
SYS_TR
ACK_DI
S
B2SOVR
C_DTC
0x19
CHG_CNFG_03[7:0]
TO_TIME[2:0]
TO_ITH[2:0]
0x1A
0x1B
0x1C
CHG_CNFG_04[7:0]
CHG_CNFG_05[7:0]
CHG_CNFG_06[7:0]
SPR[1:0]
RESERVED[1:0]
CHG_CV_PRM[5:0]
B2SOVRC[3:0]
CHGPROT[1:0] WDTCLR[1:0]
VCHGC ICHGCC FSHIP_
ITRICKLE[1:0]
RESERVED[1:0] SPR4
SPR7
JEITA_E
N
0x1D
0x1E
CHG_CNFG_07[7:0]
CHG_CNFG_08[7:0]
REGTEMP[3:0]
V_COOL _COOL
MODE
RESERV
ED
CHGIN_ILIM[6:0]
0x1F
0x20
CHG_CNFG_09[7:0]
CHG_CNFG_10[7:0]
INLIM_CLK[1:0]
SPR[1:0]
OTG_ILIM[2:0]
VCHGIN_REG[4:0]
MINVSYS[2:0]
DISKIP
www.maximintegrated.com
Maxim Integrated | 50
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Register Details
CID (0x0)
BIT
Field
7
6
REVISION[2:0]
0x6
5
4
3
2
VERSION[4:0]
0x0
1
0
Reset
Access
Type
Read Only
Read Only
BITFIELD
REVISION
VERSION
BITS
7:5
DESCRIPTION
DECODE
Silicon Revision
4:0
OTP Recipe Version
SWRST (0x1)
BIT
Field
7
6
5
4
3
2
1
0
SW_RST[7:0]
Reset
0x00
Access
Type
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
0xA5: Type O registers are reset. SW_RST
SW_RST
7:0
Software Reset
register is autoclear as under O-type reset control
All others: No reset
TOP_INT (0x2)
BIT
Field
7
6
5
4
3
2
1
0
SYSOVLO_ SYSUVLO_
SPR[4:0]
0x0
TSHDN_I
I
I
Reset
0x0
0x0
0x0
Access
Type
Read
Clears All
Read
Clears All
Read
Clears All
Read Clears All
BITFIELD
BITS
DESCRIPTION
DECODE
SPR
7:3
Spare Bit
0b0: No interrupt detected
0b1: Interrupt detected
TSHDN_I
2
1
0
Thermal Shutdown Interrupt
SYSOVLO Interrupt
0b0: No interrupt detected
0b1: Interrupt detected
SYSOVLO_I
SYSUVLO_I
0b0: No interrupt detected
0b1: Interrupt detected
SYSUVLO Interrupt
www.maximintegrated.com
Maxim Integrated | 51
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
TOP_INT_MASK (0x3)
BIT
Field
7
6
5
4
3
2
1
0
SYSOVLO_ SYSUVLO_
SPR[4:0]
0x1F
TSHDN_M
0x1
M
M
Reset
0x1
0x1
Access
Type
Write, Read
Write, Read Write, Read Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
SPR
7:3
Spare Bit
0b0: Unmasked
0b1: Masked
TSHDN_M
2
1
0
Thermal Shutdown Interrupt Mask
SYSOVLO Interrupt Mask
SYSOVLO_
M
0b0: Unmasked
0b1: Masked
SYSUVLO_
M
0b0: Unmasked
0b1: Masked
SYSUVLO Interrupt Mask
TOP_INT_OK (0x4)
BIT
Field
7
6
5
4
3
2
1
0
SYSOVLO_ SYSUVLO_
SPR[4:0]
0x0
TSHDN_OK
0x1
OK
OK
Reset
0x1
0x1
Access
Type
Read Only
Read Only
Read Only
Read Only
BITFIELD
BITS
DESCRIPTION
DECODE
SPR
7:3
Spare Bit
0b0: Device is in thermal shutdown
0b1: Device is not in thermal shutdown
TSHDN_OK
2
1
0
Thermal shutdown Status Indicator
SYSOVLO Status Indicator
SYSUVLO Status Indicator
SYSOVLO_
OK
0b0: SYS voltage is above SYSOVLO threhold
0b1: SYS voltage is below SYSOVLO threhold
SYSUVLO_O
K
0b0: SYS voltage is below SYSUVLO threhold
0b1: SYS voltage is above SYSUVLO threhold
CHG_INT (0x10)
Interrupt status register for the charger block.
BIT
7
6
5
4
3
2
1
0
B2SOVRC_
I
CHGINILIM
_I
OTG_PLIM
_I
Field
AICL_I
CHGIN_I
CHG_I
BAT_I
DISQBAT_I
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Access
Type
Read
Clears All
Read
Clears All
Read
Clears All
Read
Clears All
Read
Clears All
Read
Clears All
Read
Clears All
Read
Clears All
BITFIELD
BITS
DESCRIPTION
DECODE
0b0: The AICL_OK bit has not changed since the
last time this bit was read.
0b1: The AICL_OK bit has changed since the last
time this bit was read.
AICL_I
7
AICL Interrupt
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Maxim Integrated | 52
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0b0: The CHGIN_OK bit has not changed since
the last time this bit was read.
0b1: The CHGIN_OK bit has changed since the
last time this bit was read.
CHGIN_I
6
CHGIN Interrupt
0b0: The B2SOVRC_OK bit has not changed since
the last time this bit was read.
0b1: The B2SOVRC_OK bit has changed since the
last time this bit was read.
B2SOVRC_I
CHG_I
5
4
3
2
1
B2SOVRC Interrupt
Charger Interrupt
Battery Interrupt
0b0: The CHG_OK bit has not changed since the
last time this bit was read.
0b1: The CHG_OK bit has changed since the last
time this bit was read.
0b0: The BAT_OK bit has not changed since the
last time this bit was read.
0b1: The BAT_OK bit has changed since the last
time this bit was read.
BAT_I
0b0: The CHGINILIM_OK bit has not changed
since the last time this bit was read.
0b1: The CHGINILIM_OK bit has changed since
the last time this bit was read.
CHGINILIM_I
DISQBAT_I
CHGINILIM Interrupt
DISQBAT Interrupt
0b0: The DISQBAT_OK bit has not changed since
the last time this bit was read.
0b1: The DISQBAT_OK bit has changed since the
last time this bit was read.
0b0: Mode = 0xA: The OTG_OK bit has not
changed since the last time this bit was read.
Mode ≠ 0xA: PLIM_OK bit has not changed since
the last time this bit was read.
0b1: Mode = 0xA: The OTG_OK bit has changed
since the last time this bit was read.
OTG_PLIM_I
0
OTG Interrupt/PLIM Interrupt
Mode ≠ 0xA: The PLIM_OK bit has changed since
the last time this bit was read.
CHG_INT_MASK (0x11)
Mask register to mask the corresponding charger interrupts.
BIT
7
6
5
4
3
2
1
0
B2SOVRC_
M
CHGINILIM DISQBAT_
OTG_PLIM
_M
Field
AICL_M
0x1
CHGIN_M
0x1
CHG_M
0x1
BAT_M
0x1
_M
M
Reset
0x1
0x1
0x1
0x1
Access
Type
Write, Read Write, Read Write, Read Write, Read Write, Read Write, Read Write, Read Write, Read
BITFIELD
BITS
DESCRIPTION
AICL Interrupt Mask
DECODE
0b0: Unmasked
0b1: Masked
AICL_M
7
0b0: Unmasked
0b1: Masked
CHGIN_M
6
5
4
CHGIN Interrupt Mask
B2SOVRC Interrupt Mask
Charger Interrupt Mask
B2SOVRC_
M
0b0: Unmasked
0b1: Masked
0b0: Unmasked
0b1: Masked
CHG_M
www.maximintegrated.com
Maxim Integrated | 53
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0b0: Unmasked
0b1: Masked
BAT_M
3
Battery Interrupt Mask
CHGINILIM_
M
0b0: Unmasked
0b1: Masked
2
1
0
CHGINILIM Interrupt Mask
DISQBAT Interrupt Mask
OTG/PLIM Interrupt Mask
0b0: Unmasked
0b1: Masked
DISQBAT_M
OTG_PLIM_
M
0b0: Unmasked
0b1: Masked
CHG_INT_OK (0x12)
BIT
Field
7
6
5
4
3
2
1
0
B2SOVRC_
OK
CHGINILIM DISQBAT_
OTG_PLIM
_OK
AICL_OK
0x1
CHGIN_OK
0x0
CHG_OK
0x1
BAT_OK
0x1
_OK
OK
Reset
0x1
0x1
0x1
0x1
Access
Type
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
BITFIELD
BITS
DESCRIPTION
DECODE
0b0: AICL mode
0b1: Not in AICL mode
AICL_OK
7
AICL_OK Status
0b0: The CHGIN input is invalid. CHGIN_DTLS ≠
CHGIN Input Status Indicator. See
CHGIN_DTLS for more information.
0x03.
CHGIN_OK
6
5
4
0b1: The CHGIN input is valid. CHGIN_DTLS =
0x03.
B2SOVRC_
OK
0b0: BATT to SYS exceeds current limit.
0b1: BATT to SYS does not exceed current limit.
B2SOVRC Status
0b0: The charger has reduced charge current or
Charger Status Indicator. See CHG_DTLS for charge termination voltage based on JEITA
more information.
CHG_OK
BAT_OK
control, suspended charging, or TREG = 1.
0b1: The charger is OK or the charger is off.
0b0: The battery has an issue or the charger has
been suspended. BAT_DTLS ≠ 0x03 and ≠ 0x07.
0b1: The battery is OK. BAT_DTLS = 0x03 or
BAT_DTLS = 0x07.
Battery Status Indicator. See BAT_DTLS for
more information.
3
2
1
0b0: The CHGIN input has reached the current
limit.
0b1: The CHGIN input has not reached the current
limit.
CHGINILIM_
OK
CHGINILIM Status
DISQBAT Status
0b0: DISQBAT pin is high or DISIBS bit is set to 1
and Q
DISQBAT_O
K
disabled.
BAT
0b1: DISQBAT is low and DISIBS bit is 0 and
not disabled.
Q
BAT
0b0: Mode = 0xA: There is a fault in OTG mode.
OTG_DTLS ≠ 0x11.
Mode = 0xA: OTG Status Indicator. See
OTG_DTLS for more information.
Mode ≠ 0xA: PLIM status indicator (buck-
boost limit reached).
Mode ≠ 0xA: Buck-boost reaches positive current
limit.
0b1: Mode = 0xA: The OTG operation is OK.
OTG_DTLS = 0x11.
OTG_PLIM_
OK
0
Mode ≠ 0xA: Buck-boost does not reach positive
current limit.
www.maximintegrated.com
Maxim Integrated | 54
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
CHG_DETAILS_00 (0x13)
BIT
Field
7
6
5
4
3
2
1
0
SPR7
0x0
CHGIN_DTLS[1:0]
0x0
OTG_DTLS[1:0]
0x0
SPR2_1[1:0]
0x0
QB_DTLS
0x0
Reset
Access
Type
Read Only
Read Only
Read Only
Read Only
Read Only
BITFIELD
BITS
DESCRIPTION
DECODE
SPR7
7
Spare Bit
0b00: V
0b01: RSVD
0b10: V
0b11: V
is invalid. V
is invalid. V
is valid. V
CHGIN
CHGIN_OVLO
< V
> V
BUS
CHGIN
CHGIN
CHGIN_UVLO
CHGIN_OVLO
CHGIN_DTL
S
6:5
4:3
CHGIN Details
BUS
> V
and
BUS
< V
CHGIN_UVLO
V
CHGIN
0b00: OTG output (V
) is in undervoltage
CHGIN
condition. V
< V
CHGIN
OTG_UVLO
0b01: OTG output (V
) is in current limit
CHGIN
(OTG_ILIM) within the last 37.5ms.
0b10: OTG output (V ) is in overvoltage
CHGIN
OTG_DTLS
OTG Details
Spare Bit
condition. V
> V
CHGIN
OTG_OVLO
0b11: OTG is disabled (OTGEN = low and MODE
≠ 0xA) or OTG output (V ) is valid. V
>
CHGIN
CHGIN
V
and V
< V
and it's
OTG_UVLO
CHGIN
OTG_OVLO
not in current limit
.
SPR2_1
2:1
0
Q
status
BAT
0b0: Q
0b1: Q
is off.
is on.
BAT
BAT
QB_DTLS
Read back value of QB_DTLS reflects the
actual Q
state.
BAT
CHG_DETAILS_01 (0x14)
BIT
Field
7
6
5
4
3
2
1
0
TREG
0x0
BAT_DTLS[2:0]
0x7
CHG_DTLS[3:0]
0x8
Reset
Access
Type
Read Only
Read Only
Read Only
BITFIELD
BITS
DESCRIPTION
DECODE
0b0: The junction temperature is less than the
threshold set by REGTEMP and the full charge
current limit is available.
TREG
7
Temperature Regulation Status
0b1: The junction temperature is greater than the
threshold set by REGTEMP and the charge current
limit can be folding back to reduce power
dissipation.
www.maximintegrated.com
Maxim Integrated | 55
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0b000: Battery removal is detected on THM pin.
0b001: V
< V
. This condition is also
BATT
PRECHG
reported in the CHG_DTLS as 0x00.
0b010: The battery is taking longer than expected
to charge. This could be due to high system
currents, an old battery, a damaged battery or
something else. Charging has suspended and the
charger is in its timer fault mode. This condition is
also reported in the CHG_DTLS as 0x06.
Battery Details
0b011: The battery is OK and its voltage is greater
Note: Only B2SOVRC is reported in Battery
Only mode. As a consequence, BAT_OK = 1
is also reported in BAT_DTLS = 0x07.
than the minimum system voltage (V
-
SYSMIN
500mV < V
), Q
is on and V
is
BATT
BAT
SYS
approximately equal to V
.
BATT
BAT_DTLS
6:4
0b100: The battery is okay but its voltage is low:
< V < V - 500mV. This
condition is also reported in the CHG_DTLS as
In the event that multiple faults occur within
the battery details category, overcurrent has
priority followed by no battery, then
overvoltage, then timer fault, then below
prequal.
V
PRECHG
BATT
SYSMIN
0x00.
0b101: The battery voltage has been greater than
the battery overvoltage threshold (CHG_CV_PRM
+ 240mV/cell) for the last 30ms. This flag is only
generated when there is a valid input.
0b110: The battery has been overcurrent for at
least 3ms since the last time this register has been
read.
0b111: Battery level not available. In battery only
mode, all battery comparators are off except for
B2SOVRC.
www.maximintegrated.com
Maxim Integrated | 56
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0x00: Charger is in precharge or trickle charge
mode
CHG_OK = 1 and V
< V
- 500mV and
BATT
SYSMIN
T < T
J
SHDN
0x01: Charger is in fast-charge constant current
mode
CHG_OK = 1 and V
< V
and T <
BATTREG J
BATT
T
SHDN
0x02: Charger is in fast-charge constant voltage
mode
CHG_OK = 1 and V
= V
and T <
BATTREG J
BATT
T
SHDN
0x03: Charger is in top-off mode
CHG_OK = 1 and V = V
and T <
BATT
BATTREG
J
T
SHDN
0x04: Charger is in done mode
CHG_OK = 0 and V > V
- V
RSTRT
BATT
BATTREG
and T < T
J
SHDN
0x05: Charger is off because at least one pin of
INLIM, ITO, ISET, or VSET has valid resistance
while others don't (invalid resistance, open or tied
2
to PVL). Configure charger with I C, then set
COMM_MODE to 1 enables charging.
CHG_OK = 0
0x06: Charger is in timer fault mode
CHG_OK = 0 and if BAT_DTLS = 0b001 then
CHG_DTLS
3:0
Charger Details
V
< V
- 500mV or V
< V
BATT
SYSMIN
SHDN
BATT PRECHG
and T < T
J
0x07: Charger is suspended because Q
is
BAT
disabled (DISQBAT = high or DISIBS = 1)
CHG_OK = 0
0x08: Charger is off, charger input invalid and/or
charger is disabled
CHG_OK = 1
0x09: Reserved
0x0A: Charger is off and the junction temperature
is > T
SHDN
CHG_OK = 0
0x0B: Charger is off because the watchdog timer
expired
CHG_OK = 0
0x0C: Charger is suspended or charge current or
voltage is reduced based on JEITA control. This
condition is also reported in THM_DTLS.
CHG_OK = 0
0x0D: Charger is suspended because battery
removal is detected on THM pin. This condition is
also reported in THM_DTLS.
CHG_OK = 0
0x0E: Reserved
0x0F: Reserved
www.maximintegrated.com
Maxim Integrated | 57
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
CHG_DETAILS_02 (0x15)
BIT
Field
7
SPR
6
5
4
3
2
1
0
APP_MOD
E_DTLS
NUM_CELL
_DTLS
THM_DTLS[2:0]
0x2
FSW_DTLS[1:0]
0x0
Reset
0x0
0x0
0x0
Access
Type
Read Only
Read Only
Read Only
Read Only
Read Only
BITFIELD
BITS
DESCRIPTION
DECODE
SPR
7
Spare bit
0b000: Low temperature and charging suspended
(COLD)
0b001: Low temperature charging (cool)
0b010: Normal temperature charging (normal)
0b011: High temperature charging (warm)
0b100: High temperature and charging suspended
(hot)
Thermistor Status.
This is also reported in the CHG_DTLS as
0x0C.
THM_DTLS
6:4
0b101: Battery removal detected on THM pin
0b110: Thermistor monitoring is disabled
0b111: Reserved
0b0: Device is configured to operate as a
standalone DC-DC converter.
0b1: Device is configured to operate as a charger.
APP_MODE
_DTLS
3
Application Mode Status
0x0: 600kHz
0x1: 1.2MHz
0x2: Reserved
0x3: Reserved
FSW_DTLS
2:1
Programmed Switching Frequency Details
0b0: Device is configured to support a 2-cell
NUM_CELL_
DTLS
Number of Serially Connected Battery Cells
Details
battery.
0
0b1: Device is configured to support a 3-cell
battery.
CHG_CNFG_00 (0x16)
Charger configuration 0
BIT
7
6
5
4
3
2
1
0
COMM_MO
DE
Field
DISIBS
0x0
STBY_EN
0x0
WDTEN
0x0
MODE[3:0]
0x5
Reset
0x0
Access
Type
Write, Read Write, Read Write, Read Write, Read
Write, Read
www.maximintegrated.com
Maxim Integrated | 58
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0b0: Autonomous Mode
CHGIN_ILIM, CHGCC, CHG_CV_PRM, and
TO_ITH registers are programmed by external
resistors on INLIM, ISET, VSET and ITO pins.
Writing 0 to COMM_MODE is ignored.
2
0b1: I C Mode Enabled
COMM_MOD
E
CHGIN_ILIM, CHGCC, CHG_CV_PRM and
TO_ITH registers are programmed by I C.
2
7
I C Mode Enable
2
Writing 1 to COMM_MODE is allowed.
Writting COMM_MODE=1 clears any charger
suspension due to invalid resistance detected on
INLIM, ISET, VSET, and ITO pins. Charger starts
2
with I C programmed settings in CHGIN_ILIM,
CHGCC, CHG_CV_PRM, and TO_ITH registers.
BATT to SYS FET Disable Control
Read back value of DISIBS register bit
reflects the actual DISIBS command or
DISQBAT PIN state.
0b0: BATT to SYS FET is controlled by the power
path state machine.
0b1: BATT to SYS FET is forced off.
DISIBS
6
5
CHGIN Standby Enable
Read back value of the STBY_EN register bit machine.
reflects the actual CHGIN standby setting.
0b0: DC-DC is controlled by the power path state
STBY_EN
0b1: Force DC-DC off. Device goes to CHGIN low
quiescent current standby.
Watchdog Timer Enable.
While enabled, the system controller must
reset the watchdog timer within the timer
0b0: Watchdog timer disabled
0b1: Watchdog timer enabled
WDTEN
4
period (t ) for the charger to operate
WD
normally. Reset the watchdog timer by
programming WDTCLR = 0x01.
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Maxim Integrated | 59
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0x0: Charger = off, OTG = off, DC-DC = off. When
the Q
switch is on (DISQBAT = low and
BAT
DISIBS = 0), the battery powers the system.
0x1: Same as 0b0000
0x2: Same as 0b0000
0x3: Same as 0b0000
0x4: Charger = off, OTG = off, DC-DC = on. When
there is a valid input, the DC-DC converter
regulates the system voltage to be the maximum of
(V
and V
+ 4%).
SYSMIN
BATT
0x5: Charger = on,OTG = off, DC-DC = on. When
there is a valid input, the battery is charging. V
SYS
is the larger of V
and ~V
+ I
x
SYSMIN
BATT
BATT
Smart Power Selector Configuration.
Read back value of the MODE register
reflects the actual smart power selector
configuration.
R
.
BAT2SYS
0x6: Same as 0b0101
0x7: Same as 0b0101
0x8: RSVD
MODE
3:0
0x9: RSVD
0xA: Charger = off, OTG = on, DC-DC = off. The
switch is on to allow the battery to support
Q
BAT
the system, the charger's DC-DC operates in
reverse mode as a buck converter. The OTG
output, CHGIN, can source current up to
I
. The CHGIN target voltage is
CHGIN.OTG.LIM
V
.
CHGIN.OTG
0xB: RSVD
0xC: RSVD
0xD: RSVD
0xE: RSVD
0xF: RSVD
CHG_CNFG_01 (0x17)
Charger configuration 1
BIT
7
6
5
4
3
2
1
FCHGTIME[2:0]
0x1
0
Field
PQEN
0x1
LPM
0x0
CHG_RSTRT[1:0]
0x1
STAT_EN
Reset
0x1
Access
Type
Write, Read Write, Read
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
0b0: Low-Battery Prequalification mode is
disabled.
0b1: Low-Battery Prequalification mode is enabled.
PQEN
7
6
Low-Battery Prequalification Mode Enable
Low Power Mode control
0b0: Q
0b1: Q
charge pump runs in Normal mode.
charge pump is in Low Power Mode.
BAT
BAT
LPM
0b00: 100mV/cell below the value programmed by
CHG_CV_PRM
0b01: 150mV/cell below the value programmed by
CHG_CV_PRM
10: 200mV/cell below the value programmed by
CHG_CV_PRM
CHG_RSTR
T
5:4
3
Charger Restart Threshold
11: Disabled
0b0: Disable STAT output
0b1: Enable STAT output
STAT_EN
Charge Indicator Output Enable
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Maxim Integrated | 60
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0b000: Disable
0b001: 3
0b010: 4
0b011: 5
0b100: 6
FCHGTIME
2:0
Fast-Charge Timer setting (t , hrs)
FC
0b101: 7
0b110: 8
0b111: 10
CHG_CNFG_02 (0x18)
Charger configuration 2
BIT
7
6
5
4
3
2
1
0
Field
SPR[1:0]
0x0
CHGCC[5:0]
0x7
Reset
Access
Type
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
SPR
7:6
Spare Bit
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Maxim Integrated | 61
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0x00: 100
0x01: 150
0x02: 200
0x03: 250
0x04: 300
0x05: 350
0x06: 400
0x07: 450
0x08: 500
0x09: 600
0x0A: 700
0x0B: 800
0x0C: 900
0x0D: 1000
0x0E: 1100
0x0F: 1200
0x10: 1300
0x11: 1400
0x12: 1500
0x13: 1600
0x14: 1700
0x15: 1800
0x16: 1900
0x17: 2000
0x18: 2100
0x19: 2200
0x1A: 2300
0x1B: 2400
0x1C: 2500
0x1D: 2600
0x1E: 2700
0x1F: 2800
0x20: 2900
0x21: 3000
0x22: 3100
0x23: 3200
0x24: 3300
0x25: 3400
0x26: 3500
0x27: 3600
0x28: 3700
0x29: 3800
0x2A: 3900
0x2B: 4000
0x2C: 4100
0x2D: 4200
0x2E: 4300
0x2F: 4400
0x30: 4500
0x31: 4600
0x32: 4700
0x33: 4800
0x34: 4900
0x35: 5000
0x36: 5100
0x37: 5200
0x38: 5300
0x39: 5400
0x3A: 5500
Fast-Charge Current Selection (mA). When
the charger is enabled, the charge current
limit is set by these bits.
Read back value of the CHGCC register
reflects the actual fast charge current
programmed in the charger.
CHGCC
5:0
The thermal foldback loop can reduce the
battery charger’s target current by A
TJREG.
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Maxim Integrated | 62
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0x3B: 5600
0x3C: 5700
0x3D: 5800
0x3E: 5900
0x3F: 6000
CHG_CNFG_03 (0x19)
Charger configuration 3
BIT
7
6
5
4
3
2
1
0
SYS_TRAC B2SOVRC_
Field
TO_TIME[2:0]
0x3
TO_ITH[2:0]
0x0
K_DIS
DTC
Reset
0x1
0x0
Access
Type
Write, Read Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
0x0: SYS tracking is enabled. SYS is regulated to
MAX of (V + 4%, V ). This is also valid
in Charge Done state.
0x1: SYS tracking is disabled. SYS is regulated to
BATT
SYSMIN
SYS_TRACK
_DIS
7
6
SYS Tracking Disable Control
V
.
CHG_CV_PRM
Battery to SYS Overcurrent Debounce Time
Control.
While under OVRC condition, after t
B2SOVRC_D
TC
0x0: t
0x1: t
= 6ms
= 100ms
OCP
OCP
OCP
switcher (and therfore charge) is disabled.
0b000: 30s
0b001: 10
0b010: 20
0b011: 30
0b100: 40
0b101: 50
0b110: 60
0b111: 70
TO_TIME
5:3
Top-Off Timer Setting (min)
Top-Off Current Threshold (mA). The charger
transitions from its fast-charge constant
voltage mode to its top-off mode when the
charger current decays to the value
programmed by this register. This transition
generates a CHG_I interrupt and causes the
CHG_DTLS register to report top-off mode.
This transition also starts the top-off time as
programmed by TO_TIME.
0b000: 100
0b001: 200
0b010: 300
0b011: 400
0b100: 500
0b101: 600
0b110: 600
0b111: 600
TO_ITH
2:0
Read back value of the TO_ITH register
reflects the actual top-off current programmed
in the charger.
CHG_CNFG_04 (0x1A)
Charger configuration 4
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Maxim Integrated | 63
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BIT
Field
7
6
5
4
3
2
1
0
SPR[1:0]
0x0
CHG_CV_PRM[5:0]
0x00
Reset
Access
Type
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
SPR
7:6
Spare Bit
www.maximintegrated.com
Maxim Integrated | 64
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
2 Cell Battery
0x00: 8.000
0x01: 8.020
0x02: 8.040
0x03: 8.060
0x04: 8.080
0x05: 8.100
0x06: 8.120
0x07: 8.140
0x08: 8.160
0x09: 8.180
0x0A: 8.200
0x0B: 8.220
0x0C: 8.240
0x0D: 8.260
0x0E: 8.280
0x0F: 8.300
0x10: 8.320
0x11: 8.340
0x12: 8.360
0x13: 8.380
0x14: 8.400
0x15: 8.420
0x16: 8.440
0x17: 8.460
0x18: 8.480
0x19: 8.500
0x1A: 8.520
0x1B: 8.540
0x1C: 8.560
0x1D: 8.580
0x1E: 8.600
0x1F: 8.620
0x20: 8.640
0x21: 8.660
0x22: 8.680
0x23: 8.700
0x24: 8.720
0x25: 8.740
0x26: 8.760
0x27: 8.780
0x28: 8.800
0x29: 8.820
0x2A: 8.840
0x2B: 8.860
0x2C: 8.880
0x2D: 8.900
0x2E: 8.920
0x2F: 8.940
0x30: 8.960
0x31: 8.980
0x32: 9.000
0x33: 9.020
0x34: 9.040
0x35: 9.060
0x36: 9.080
0x37: 9.100
0x38: 9.120
0x39: 9.140
Charge Termination Voltage Setting (V).
Read back value of the CHG_CV_PRM
register reflects the actual charge termination
voltage programmed in the charger when
JEITA_EN = 0.
CHG_CV_P
RM
5:0
When JEITA_EN = 1, charge termination
voltage is controlled by V
and
CHGCV_COOL
V
register settings.
CHGCV_WARM
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Maxim Integrated | 65
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0x3A: 9.160
0x3B: 9.180
0x3C: 9.200
0x3D: 9.220
0x3E: 9.240
0x3F: 9.260
3 Cell Battery
0x00: 12.000
0x01: 12.030
0x02: 12.060
0x03: 12.090
0x04: 12.120
0x05: 12.150
0x06: 12.180
0x07: 12.210
0x08: 12.240
0x09: 12.270
0x0A: 12.300
0x0B: 12.330
0x0C: 12.360
0x0D: 12.390
0x0E: 12.420
0x0F: 12.450
0x10: 12.480
0x11: 12.510
0x12: 12.540
0x13: 12.570
0x14: 12.600
0x15: 12.630
0x16: 12.660
0x17: 12.690
0x18: 12.720
0x19: 12.750
0x1A: 12.780
0x1B: 12.810
0x1C: 12.840
0x1D: 12.870
0x1E: 12.900
0x1F: 12.930
0x20: 12.960
0x21: 12.990
0x22: 13.020
0x23: 13.050
CHG_CNFG_05 (0x1B)
Charger configuration 5
BIT
7
6
5
4
3
2
1
0
Field
RESERVED[1:0]
0x1
ITRICKLE[1:0]
B2SOVRC[3:0]
0x4
Reset
0x0
Access
Type
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
RESERVED
7:6
Reserved
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Maxim Integrated | 66
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0b00: 100
0b01: 200
0b10: 300
0b11: 400
ITRICKLE
5:4
Trickle Charge Current Selection (mA)
0x00: Disable
0x01: 3.000
0x02: 3.500
0x03: 4.000
0x04: 4.500
0x05: 5.000
0x06: 5.500
0x07: 6.000
0x08: 6.500
0x09: 7.000
0x0A: 7.500
0x0B: 8.000
0x0C: 8.500
0x0D: 9.000
0x0E: 9.500
0x0F: 10.000
B2SOVRC
3:0
BATT to SYS Overcurrent Threshold (A)
CHG_CNFG_06 (0x1C)
Charger configuration 6
BIT
7
6
5
4
3
2
1
0
Field
SPR7
0x0
RESERVED[1:0]
0x0
SPR4
0x0
CHGPROT[1:0]
0x0
WDTCLR[1:0]
Reset
0x0
Access
Type
Write, Read
Write, Read
Write, Read
Write, Read
Write, Read
BITFIELD
SPR7
BITS
7
DESCRIPTION
DECODE
Spare bit
RESERVED
SPR4
6:5
4
Reserved
Spare bit
Charger Settings Protection Bit.
0b00: Write capability locked
0b01: Write capability locked
0b10: Write capability locked
0b11: Write capability unlocked
Writing 11 to these bits unlocks the write
capability for the registers that are Protected
with CHGPROT. Writing any value besides
11 locks the protected registers.
CHGPROT
WDTCLR
3:2
1:0
0b00: the watchdog timer is not cleared
0b01: the watchdog timer is cleared
0b10: the watchdog timer is not cleared
0b11: the watchdog timer is not cleared
Watchdog Timer Clear Bit.
Writing 01 to these bits clears the watchdog
timer when the watchdog timer is enabled.
CHG_CNFG_07 (0x1D)
Charger configuration 7
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Maxim Integrated | 67
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BIT
Field
7
6
5
4
3
2
1
0
VCHGCV_ ICHGCC_C FSHIP_MO
COOL
JEITA_EN
0x0
REGTEMP[3:0]
0x6
OOL
DE
Reset
0x0
0x1
0x0
Access
Type
Write, Read
Write, Read
Write, Read Write, Read Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
0b0: JEITA disabled.
Fast-charge current and charge termination
voltage do not change based on thermistor
temperature.
JEITA_EN
7
JEITA Enable
0b1: JEITA enabled.
Fast-charge current and charge termination
voltage change based on thermistor temperature.
0x0: 85
0x1: 90
Junction Temperature Thermal Regulation
(ºC).
The charger's target current limit starts to
foldback and the TREG bit is set if the
junction temperature is greater than the
REGTEMP setpoint.
0x2: 95
0x3: 100
0x4: 105
0x5: 110
0x6: 115
0x7: 120
0x8: 125
0x9: 130
REGTEMP
6:3
0b0: Battery termination voltage is set by
CHG_CV_PRM.
0b1: Battery termination voltage is set by
(CHG_CV_PRM - 180mV/cell).
JEITA-Controlled Battery Termination Voltage
When Thermistor Temperature is Between
VCHGCV_C
OOL
2
T
and T
COLD
COOL
JEITA-Controlled Battery Fast-Charge
Current When Thermistor Temperature is
0b0: Battery fast-charge current is set by CHGCC
0b1: Battery fast-charge current is reduced to 50%
of CHGCC
ICHGCC_CO
OL
1
0
Between T
and T
COLD
COOL
FSHIP_MOD
E
0b0: Disable factory ship mode
0b1: Enable factory ship mode
Factory Ship Mode Enable
CHG_CNFG_08 (0x1E)
Charger configuration 8
BIT
7
6
5
4
3
2
1
0
Field
RESERVED
0x1
CHGIN_ILIM[6:0]
0x0B
Reset
Access
Type
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
RESERVED
7
Reserved
www.maximintegrated.com
Maxim Integrated | 68
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0x00: 100
0x01: 100
0x02: 100
0x03: 100
0x04: 150
0x05: 200
0x06: 250
0x07: 300
0x08: 350
0x09: 400
0x0A: 450
0x0B: 500
0x0C: 550
0x0D: 600
0x0E: 650
0x0F: 700
0x10: 750
0x11: 800
0x12: 850
0x13: 900
0x14: 950
0x15: 1000
0x16: 1050
0x17: 1100
0x18: 1150
0x19: 1200
0x1A: 1250
0x1B: 1300
0x1C: 1350
0x1D: 1400
0x1E: 1450
0x1F: 1500
0x20: 1550
0x21: 1600
0x22: 1650
0x23: 1700
0x24: 1750
0x25: 1800
0x26: 1850
0x27: 1900
0x28: 1950
0x29: 2000
0x2A: 2050
0x2B: 2100
0x2C: 2150
0x2D: 2200
0x2E: 2250
0x2F: 2300
0x30: 2350
0x31: 2400
0x32: 2450
0x33: 2500
0x34: 2550
0x35: 2600
0x36: 2650
0x37: 2700
0x38: 2750
0x39: 2800
0x3A: 2850
CHGIN Input Current Limit (mA).
Read back value of the CHGIN_ILIM register
reflect the actual input current limit
programmed in the charger.
CHGIN_ILIM
6:0
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Maxim Integrated | 69
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0x3B: 2900
0x3C: 2950
0x3D: 3000
0x3E: 3050
0x3F: 3100
0x40: 3150
0x41: 3200
0x42: 3250
0x43: 3300
0x44: 3350
0x45: 3400
0x46: 3450
0x47: 3500
0x48: 3550
0x49: 3600
0x4A: 3650
0x4B: 3700
0x4C: 3750
0x4D: 3800
0x4E: 3850
0x4F: 3900
0x50: 3950
0x51: 4000
0x52: 4050
0x53: 4100
0x54: 4150
0x55: 4200
0x56: 4250
0x57: 4300
0x58: 4350
0x59: 4400
0x5A: 4450
0x5B: 4500
0x5C: 4550
0x5D: 4600
0x5E: 4650
0x5F: 4700
0x60: 4750
0x61: 4800
0x62: 4850
0x63: 4900
0x64: 4950
0x65: 5000
0x66: 5050
0x67: 5100
0x68: 5150
0x69: 5200
0x6A: 5250
0x6B: 5300
0x6C: 5350
0x6D: 5400
0x6E: 5450
0x6F: 5500
0x70: 5550
0x71: 5600
0x72: 5650
0x73: 5700
0x74: 5750
0x75: 5800
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Maxim Integrated | 70
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BITFIELD
BITS
DESCRIPTION
DECODE
0x76: 5850
0x77: 5900
0x78: 5950
0x79: 6000
0x7A: 6050
0x7B: 6100
0x7C: 6150
0x7D: 6200
0x7E: 6250
0x7F: 6300
CHG_CNFG_09 (0x1F)
Charger configuration 9
BIT
7
6
5
4
OTG_ILIM[2:0]
0x3
3
2
1
0
Field
INLIM_CLK[1:0]
0x2
MINVSYS[2:0]
0x3
Reset
Access
Type
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
0b00: 8
Input Current Limit Soft-Start Period (μs)
Between Consecutive Increments of 25mA
0b01: 256
0b10: 1024
0b11: 4096
INLIM_CLK
7:6
5:3
0b000: 500
0b001: 900
0b010: 1200
0b011: 1500
0b100: 2000
0b101: 2250
0b110: 2500
0b111: 3000
OTG_ILIM
OTG Mode Current Limit Setting (mA)
2 Cell Battery
0b000: 5.535
0b001: 5.740
0b010: 5.945
0b011: 6.150
0b100: 6.355
0b101: 6.560
0b110: 6.765
0b111: 6.970
3 Cell Battery
0b000: 8.303
0b001: 8.610
0b010: 8.918
0b011: 9.225
0b100: 9.533
0b101: 9.840
0b110: 10.148
0b111: 10.455
MINVSYS
2:0
Minimum System Regulation Voltage (V)
CHG_CNFG_10 (0x20)
Charger configuration 10
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Maxim Integrated | 71
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
BIT
Field
7
6
5
4
3
2
1
0
SPR[1:0]
0x0
VCHGIN_REG[4:0]
0x04
DISKIP
0x0
Reset
Access
Type
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
SPR
7:6
Spare Bit
0x00: 4.025
0x01: 4.200
0x02: 4.375
0x03: 4.550
0x04: 4.725
0x05: 4.900
0x06: 5.425
0x07: 5.950
0x08: 6.475
0x09: 7.000
0x0A: 7.525
0x0B: 8.050
0x0C: 8.575
0x0D: 9.100
0x0E: 9.625
0x0F: 10.150
0x10: 10.675
0x11: 10.950
0x12: 11.550
0x13: 12.150
0x14: 12.750
0x15: 13.350
0x16: 13.950
0x17: 14.550
0x18: 15.150
0x19: 15.750
0x1A: 16.350
0x1B: 16.950
0x1C: 17.550
0x1D: 18.150
0x1E: 18.750
0x1F: 19.050
VCHGIN_RE
G
5:1
CHGIN Voltage Regulation Threshold (V)
0b0: Autoskip mode
0b1: Disable skip mode
DISKIP
0
Charger Skip Mode Disable
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Maxim Integrated | 72
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Applications Information
Inductor Selection
Buck-boost allows a range of inductance for different combinations of switching frequency and maximum nominal CHGIN
voltage. See Table 11 for recommendations. The lower the inductor DCR is, the higher the buck-boost efficiency is. The
user needs to weigh the trade-offs between inductor size and DCR value and choose a suitable inductor for the buck-
boost. See Table 12 for inductor recommendations.
Table 11. Recommended Inductance for Combinations of Switching Frequency and
Maximum Nominal CHGIN Voltage
SWITCHING FREQUENCY
(kHz)
MAXIMUM NOMINAL CHGIN VOLTAGE
(V)
RECOMMENDED NOMINAL INDUCTANCE
(µH)
15 or lower
2.2, 3.3
600
Higher than 15
15 or lower
3.3
1.0, 1.5, 2.2, 3.3
1.5, 2.2, 3.3
1200
Higher than 15
Table 12. Suggested Inductors
CURRENT
RATING (A)
ΔT = +40°C
RISE
ROOT
PART
NUMBER
NOMINAL
INDUCTANCE
(µH)
TYPICAL DC
RESISTANCE
(mΩ)
CURRENT
RATING (A)
-30% (ΔL/L)
DIMENSIONS
L x W x H
(mm)
MFGR.
SERIES
TDK
VLS3012HBX-1R0M 1.0
39.0
6.11
7.1
5.13
7.5
3.0 x 3.0 x 1.2
4.0 x 4.0 x 2.1
4.0 x 4.0 x 2.1
4.0 x 4.0 x 3.1
5.5 x 5.3 x 1.8
5.5 x 5.3 x 2.9
Coilcraft XAL4020-152ME
Coilcraft XAL4020-222ME
Coilcraft XAL4030-332ME
1.5
2.2
3.3
1.0
1.5
21.5
35.2
26.0
12.0
10.1
MAX77960B
MAX77961B
5.6
5.5
5.5
6.6
Pulse
Pulse
PA5002.102NLT
PA5003.152NLT
12.8
12.5
10.5
10.5
6.95 x 6.6 x
2.8
Cyntec
Pulse
CMLE063T-2R2MS 2.2
PA5007.332NLT 3.3
11.0
16.3
14.0
15.0
10.0
10.0
7.8 x 7.6 x 2.9
CHGIN Capacitor Selection
The CHGIN capacitor, C
, reduces the current peaks drawn from the input power source and reduces switching
CHGIN
noise in the device. In OTG mode, it also reduces the output voltage ripple and ensures regulation loop stability.
The impedance of C at the switching frequency should be kept very low. Ceramic capacitors with X5R or X7R
CHGIN
dielectrics are highly recommended due to their small size, low ESR, and small temperature coefficients. For most
applications, a 10μF capacitor is sufficient. See Table 13 for CHGIN capacitor recommendations.
Table 13. Suggested CHGIN Capacitors
NOMINAL
CAPACITANCE
(µF)
DIMENSIONS
L x W x H
(mm)
RATED
VOLTAGE (V)
TEMPERATURE
CHARACTERISTICS
CASE
SIZE (in)
MFGR.
SERIES
Murata GRM32ER7YA106KA12
Murata GRT31CR6YA106KE01
10
10
35
35
X7R
X5R
1210
1206
3.2 x 2.5 x 2.5
3.2 x 1.6 x 1.6
2.0 x 1.25 x
1.25
Murata GRM21BR6YA106ME43
10
35
X5R
0805
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Maxim Integrated | 73
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
SYS Capacitor Selection
The SYS capacitor, C
, is required to keep the output voltage ripple small and to ensure regulation loop stability. The
SYS
C
must have low impedance at the switching frequency. Ceramic capacitors with X5R or X7R dielectric are highly
SYS
recommended due to their small size, low ESR, and small temperature coefficients. For stable operation, buck-boost
requires 40μF of minimum effective output capacitance. Considering the DC bias characteristic of ceramic capacitors,
2 x 47μF (1210) or 3 x 47μF (1206) or 7 x 22μF (0805) capacitors are recommended for 2-cell applications, and 3 x
47μF (1210) or 4 x 47μF (1206) capacitors are recommended for 3-cell applications. See Table 14 for SYS capacitor
recommendations.
Table 14. Suggested SYS Capacitors
NOMINAL
CAPACITANCE
(µF)
DIMENSIONS
L x W x H
(mm)
RATED
VOLTAGE (V)
TEMPERATURE
CHARACTERISTICS
CASE
SIZE (in)
MFGR.
SERIES
Taiyo
Yuden
EMK325ABJ476MM8P
47
47
22
16
16
16
X5R
X5R
X5R
1210
1206
0805
3.2 x 2.5 x 2.5
3.2 x 1.6 x 1.6
Murata GRM31CR61C476ME44
Murata GRM21BR61C226ME44
2.0 x 1.25 x
1.25
Battery Insertion Protection
When the battery hot inserts into the MAX77960B/MAX77961B, it creates high inrush current flowing through the body
diode of Q FET. The inrush current peaks at tens of amperes and lasts for less than a few hundreds of microseconds.
BAT
Such current can possibly damage the Q
on the board:
FET. For IC protection, the following battery insertion protection is required
BAT
● For system designs with a 2S battery, include an external 3A Schottky diode from BATT to SYS. The Schottky diode
has low forward voltage drop when conducting high current in the forward direction. It diverts the inrush current from
BATT to SYS at battery insertion. The inrush current flowing through the Q
the IC is protected. See Figure 14.
FET is greatly reduced and therefore
BAT
● For system designs with a 3S battery, the inrush current is higher than a 2S battery due to higher battery voltage. In
addition to the 3A Schottky diode from BATT to SYS, it is required to include an inrush protection circuit. The inrush
protection circuit consists of an FET and RC network. See Figure 15 for a complete solution. At battery hot insertion,
V
of the FET is slowly charged by the RC network. The FET gradually turns on and limits the inrush current. For
GS
FET selection, check the current and voltage rating of the FET to guarantee that it satisfies the system specification.
www.maximintegrated.com
Maxim Integrated | 74
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
MAX77960B
MAX77961B
PGND
SYS
QBAT
BATT
PACK+
HOT INSERTION
3A SCHOTTKY
DIODE
2S BATTERY
PACK-
Figure 14. Battery Insertion Protection with 2S Battery
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Maxim Integrated | 75
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
MAX77960B
MAX77961B
PGND
SYS
QBAT
BATT
PACK+
INRUSH
HOT INSERTION
PROTECTION
3A SCHOTTKY
DIODE
470K
1K
CIRCUIT
3S BATTERY
0.047µF
910K
PACK-
Figure 15. Battery Insertion Protection with 3S Battery
PCB Layout Guidelines
Careful circuit board layout is critical to achieve low switching power losses and clean, stable operation. Figure 16 shows
a PCB layout example.
When designing the PCB, follow these guidelines:
1. Place the CHGIN capacitor (C
) and SYS capacitors (C
) immediately next to the CHGIN pin and SYS pin
SYS
CHGIN
of the IC, respectively. Since the IC operates at a high switching frequency, this placement is critical for minimizing
parasitic inductance within the input and output current loops which can cause high voltage spikes and can damage
the internal switching MOSFETs.
2. Place the inductor next to the LX pins and make the traces between the LX pins and the inductor short and wide to
minimize PCB trace impedance. Excessive PCB impedance reduces converter efficiency. When routing LX traces
on a separate layer, make sure to include enough vias to minimize trace impedance. Routing LX traces on multiple
layers is recommended to further reduce trace impedance. Furthermore, do not make LX traces take up an excessive
amount of area. The voltage on this node switches very quickly and additional area creates more radiated emissions.
3. Route LX nodes to their corresponding bootstrap capacitors (C
to reduce trace length to the IC.
) as short as possible. Prioritize C
placement
BST
BST
4. Route CSINP and CSINN traces as symmetrical as possible. Having the same trace parasitics improves accuracy of
the differential CHGIN current sensing.
5. Place the PVL capacitor (C
internal circuitry.
) immediately next to the PVL pin. Proximity to the IC provides a stable supply for the
PVL
6. Place the BATT capacitor (C
the IC, respectively.
) and SYSA capacitor (C
) immediately next to the BATT pin and SYSA pin of
SYSA
BATT
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Maxim Integrated | 76
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
7. Keep the power traces and load connections short and wide. This is essential for high converter efficiency.
8. Do not neglect ceramic capacitor DC voltage derating. Choose capacitor values and case sizes carefully. See the
SYS Capacitor Selection section and refer to Tutorial 5527 for more information.
CSINP
CSINN
CDIFF
0402
VBUS
RSENSE
1206
BST1
CBST1
0402
RAVL
0402
CHGIN
AVL
PVL
LX1
GND
SYSA
PGND
LX2
CBST2
0402
CBATT
0805
BST2
SYS
BATT
Figure 16. PCB Layout Example
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Maxim Integrated | 77
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Typical Application Circuits
2
Wide-Input I C Programmable Charger
MAX77960B
MAX77961B
10mΩ
1206
0.22µF
3.5V TO 25.4V
CHGIN
6.3V
0402
BST1
LX1
V
BUS
10µF
35V
1210
2.2µH
8A I
SAT
CSINN
CSINP
LX2
0.22µF
6.3V
0402
V
V
PVL
AVL
BST2
PVL
AVL
4.7Ω
0402
4.7µF
6.3V
0402
SYS
V
SYS
47µF
16V
1210
47µF
16V
1210
SYSA
4.7µF
6.3V
0402
3A IF
PGND
BATT
SCL
SDA
INTB
SCL
SDA
INTB
V
BATT
10µF
16V
0805
INOKB
INOKB
STAT
V
V
AVL
PVL
200kΩ
0402
THM
THM
PK+
10kΩ
BATSP
200kΩ
GND
0402
STAT
INRUSH
PK-
PROTECTION
CIRCUIT
(FOR 3S BATTERY)
BATSN
ISET
ITO
OTGEN
DISQBAT
STBY
OTGEN
DISQBAT
STBY
V
PVL
2/3-CELL LI-ION
BATTERY
INLIM
VSET
CNFG
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Maxim Integrated | 78
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Typical Application Circuits (continued)
2
Wide-Input I C Programmable Charger with Charger Disabled
MAX77960B
MAX77961B
10mΩ
1206
0.22µF
6.3V
3.5V TO 25.4V
CHGIN
BST1
V
BUS
10µF
35V
0402
LX1
1210
2.2µH
8A I
SAT
CSINN
CSINP
LX2
0.22µF
6.3V
0402
V
V
PVL
AVL
BST2
PVL
AVL
4.7Ω
0402
4.7µF
6.3V
0402
SYS
V
SYS
47µF
16V
1210
47µF
16V
1210
SYSA
4.7µF
6.3V
0402
3A IF
PGND
BATT
SCL
SDA
INTB
SCL
SDA
INTB
V
BATT
10µF
16V
0805
INOKB
INOKB
STAT
V
V
AVL
PVL
200kΩ
0402
THM
THM
PK+
10kΩ
BATSP
200kΩ
GND
0402
STAT
INRUSH
PROTECTION
CIRCUIT
PK-
BATSN
V
PVL
OTGEN
DISQBAT
STBY
OTGEN
DISQBAT
STBY
(FOR 3S BATTERY)
2/3-CELL LI-ION
BATTERY
ISET
ITO
INLIM
VSET
CNFG
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Maxim Integrated | 79
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Typical Application Circuits (continued)
Wide-Input Autonomous Charger
MAX77960B
MAX77961B
10mΩ
1206
3.5V TO 25.4V
0.22µF
6.3V
0402
CHGIN
BST1
LX1
V
BUS
10µF
35V
1210
2.2µH
8A I
SAT
CSINN
CSINP
LX2
0.22µF
6.3V
0402
V
PVL
AVL
BST2
PVL
AVL
4.7Ω
0402
4.7µF
6.3V
0402
V
SYS
V
SYS
47µF
16V
1210
47µF
16V
1210
SYSA
4.7µF
6.3V
0402
3A IF
PGND
BATT
SCL
SDA
INTB
V
BATT
10µF
16V
0805
INOKB
INOKB
STAT
V
V
AVL
PVL
200kΩ
0402
THM
THM
PK+
10kΩ
BATSP
200kΩ
0402
GND
STAT
INRUSH
PROTECTION
CIRCUIT
(FOR 3S BATTERY)
PK-
BATSN
ISET
ITO
OTGEN
DISQBAT
STBY
OTGEN
DISQBAT
STBY
2/3-CELL LI-ION
BATTERY
INLIM
VSET
CNFG
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Maxim Integrated | 80
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Ordering Information
MAXIMUM
CHARGING
CURRENT
TEMP
RANGE
SWITCHING
FREQUENCY
NUMBER OF SERIES
BATTERY CELLS
PART NUMBER
PIN-PACKAGE
-40°C to
+85°C
4mm x 4mm,
30-Lead FC2QFN
MAX77960BEFV06+
MAX77960BEFV06+T
MAX77960BEFV12+
MAX77960BEFV12+T
MAX77961BEFV06+
MAX77961BEFV06+T
MAX77961BEFV12+
MAX77961BEFV12+T
600kHz
600kHz
1.2MHz
1.2MHz
600kHz
600kHz
1.2MHz
1.2MHz
2, 3
2, 3
2
3A
3A
3A
3A
6A
6A
5A
5A
-40°C to
+85°C
4mm x 4mm,
30-Lead FC2QFN
-40°C to
+85°C
4mm x 4mm,
30-Lead FC2QFN
-40°C to
+85°C
4mm x 4mm,
30-Lead FC2QFN
2
-40°C to
+85°C
4mm x 4mm,
30-Lead FC2QFN
2, 3
2, 3
2
-40°C to
+85°C
4mm x 4mm,
30-Lead FC2QFN
-40°C to
+85°C
4mm x 4mm,
30-Lead FC2QFN
-40°C to
+85°C
4mm x 4mm,
30-Lead FC2QFN
2
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
www.maximintegrated.com
Maxim Integrated | 81
MAX77960B/MAX77961B
25V , 3A
to 6A
, USB-C Buck-Boost
OUT
IN
OUT
Charger with Integrated FETs for 2S/3S Li-Ion
Batteries
Revision History
REVISION REVISION
PAGES
DESCRIPTION
CHANGED
NUMBER
DATE
0
6/21
Initial release
—
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max
limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2021 Maxim Integrated Products, Inc.
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