MAX804TMJA [MAXIM]
3.0V/3.3V Microprocessor Supervisory Circuits; 3.0V / 3.3V微处理器监控电路
| 型号： | MAX804TMJA |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 3.0V/3.3V Microprocessor Supervisory Circuits |
| 文件： | 总12页 (文件大小：102K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-0243; Rev 1; 9/94
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
MAX972,4–806TS/R
_______________Ge n e ra l De s c rip t io n
____________________________Fe a t u re s
♦ RESET and RESET Outputs
♦ Manual Reset Input
–————–
These microprocessor (µP) supervisory circuits reduce
the complexity and number of components required for
power-supply monitoring and battery-control functions
in µP systems. They significantly improve system relia-
b ility a nd a c c ura c y c omp a re d to s e p a ra te ICs or
discrete components.
♦ Precision Supply-Voltage Monitor
♦ 200ms Reset Time Delay
♦ Watchdog Timer (1.6sec timeout)
♦ Battery-Backup Power Switching—
These devices are designed for use in systems powered
by 3.0V or 3.3V supplies. See the selector guide in the
back of this data sheet for similar devices designed for
5V systems. The suffixes denote different reset threshold
voltages: 3.075V (T), 2.925V (S), and 2.625V (R) (see
Reset Threshold section in the Detailed Description). All
these parts are available in 8-pin DIP and SO packages.
Functions offered in this series are as follows:
Battery Can Exceed V in Normal Operation
CC
♦ 40µA V Supply Current
CC
♦ 1µA Battery Supply Current
♦ Voltage Monitor for Power-Fail or
Low-Battery Warning
–————–
♦ Guaranteed RESET Assertion to V = 1V
CC
♦ 8-Pin DIP and SO Packages
______________Ord e rin g In fo rm a t io n
PART**
TEMP. RANGE
0°C to +70°C
PIN-PACKAGE
8 Plastic DIP
8 SO
MAX690_CPA
MAX690_CSA
MAX690_C/D
MAX690_EPA
MAX690_ESA
MAX690_MJA
Part
0°C to +70°C
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
MAX690
MAX704
MAX802
MAX804
MAX805
MAX806
±4%
±4%
±2%
±2%
±4%
±2%
±75mV
±75mV
±2%
0°C to +70°C
Dice*
✓
✓
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
8 Plastic DIP
8 SO
✓
✓
✓
✓
✓
8 CERDIP
±2%
±75mV
±2%
Ordering Information continued on last page.
* Contact factory for dice specifications.
✓
** These parts offer a choice of reset threshold voltage. Select
the letter corresponding to the desired nominal reset threshold
voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into
the blank to complete the part number.
________________________Ap p lic a t io n s
Battery-Powered Computers and Controllers
Embedded Controllers
_________Typ ic a l Op e ra t in g Circ u it s
Intelligent Instruments
Automotive Systems
REGULATED +3.3V OR +3.0V
Critical µP Power Monitoring
Portable Equipment
V
CC
UNREGULATED
DC
µP
0.1µF
V
CC
RESET
(RESET)
RESET
__________________P in Co n fig u ra t io n
R1
NMI
PFO
TOP VIEW
MAX690T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
I/O LINE
GND
PFI
WDI
3.6V
LITHIUM
BATTERY
R2
1
2
3
4
8
7
6
5
BUS
V
VBATT
OUT
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
V
OUT
VBATT
RESET (RESET)
WDI <MR>
PFO
V
CC
GND
V
CC
CMOS RAM
GND
GND
PFI
0.1µF
0.1µF
DIP/SO
( ) ARE FOR MAX804T/S/R, MAX805T/S/R
( ) ARE FOR MAX804T/S/R, MAX805T/S/R
< > ARE FOR MAX704T/S/R, MAX806T/S/R
See last page for MAX704T/S/R, MAX806T/S/R.
________________________________________________________________ Maxim Integrated Products
1
Ca ll t o ll fre e 1 -8 0 0 -9 9 8 -8 8 0 0 fo r fre e s a m p le s o r lit e ra t u re .
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
ABSOLUTE MAXIMUM RATINGS
Terminal Voltage (with respect to GND)
Continuous Power Dissipation (TA = +70°C)
VCC.........................................................................-0.3V to 6.0V
VBATT....................................................................-0.3V to 6.0V
All Other Inputs ...................-0.3V to the higher of VCC or VBATT
Continuous Input Current
Plastic DIP (derate 9.09mW/°C above +70°C) ..............727mW
SO (derate 5.88mW/°C above +70°C)...........................471mW
CERDIP (derate 8.00mW/°C above +70°C)...................640mW
Operating Temperature Ranges
VCC..................................................................................100mA
VBATT ...............................................................................18mA
GND ..................................................................................18mA
MAX690_C_ _/MAX704_C_ _/MAX80_ _C_ _ ........0°C to +70°C
MAX690_E_ _/MAX704_E_ _/MAX80_ _E_ _. .....-40°C to +85°C
MAX690_M_ _/MAX704_M_ _/MAX80_ _M_ _...-55°C to +125°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
Output Current
–————– –——–
RESET, PFO ....................................................................18mA
VOUT ................................................................................100mA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, V = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, V = 2.72V to
CC
CC
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
1.0
TYP
MAX UNITS
MAX690_C, MAX704_C, MAX80_ _C
MAX690_E/M, MAX704_E/M, MAX80_ _E/M
MAX690_C/E, MAX704_C/E,
5.5
V
Operating Voltage Range,
V
, VBATT (Note 1)
CC
1.1
5.5
40
50
40
50
50
MAX80_ _C/E, V < 3.6V
CC
MAX690_C/E, MAX704_C/E,
MAX80_ _C/E, V < 5.5V
CC
–—–
MR = V
(MAX704_/
MAX806_)
65
µA
55
CC
V
Supply Current
CC
I
SUPPLY
(excluding I
)
OUT
MAX690_M, MAX704_M,
MAX80_ _M, V < 3.6V
CC
MAX690_M, MAX704_M,
70
MAX80_ _M, V < 5.5V
CC
–—–
MR = V
CC
V
Supply Current in Battery-
CC
(MAX704_/
MAX806_)
V
CC
= 2.0V, VBATT = 2.3V
25
50
µA
Backup Mode (excluding I
)
OUT
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_M, MAX704_M, MAX80_ _M
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_M, MAX704_M, MAX80_ _M
MAX690_C/E, MAX704_C/E, MAX80_ _C/E,
0.4
0.4
1
10
0.5
5
VBATT Supply Current, Any Mode
(excluding I ) (Note 2)
µA
µA
OUT
0.01
0.01
Battery Leakage Current
(Note 3)
V
CC
-
V
CC
-
I
= 5mA (Note 4)
0.03
0.015
OUT
V
0.3
-
V
0.15
-
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
= 50mA
CC
CC
I
OUT
V
0.035
-
V
0.015
-
MAX690_M, MAX704_M, MAX80_ _M
= 5mA (Note 4)
CC
CC
V
OUT
Output Voltage
V
MAX972,4–806TS/R
I
OUT
V
0.35
-
V
0.15
-
MAX690_M, MAX704_M, MAX80_ _M
= 50mA
CC
CC
I
OUT
V
-
V
-
CC
CC
I
= 250µA, V > 2.5V (Note 4)
CC
OUT
0.0015 0.0006
2
_______________________________________________________________________________________
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
MAX972,4–806TS/R
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, V = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, V = 2.72V to
CC
CC
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25˚C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
VBATT VBATT
I
= 250µA, VBATT = 2.3V
OUT
- 0.1
- 0.034
V
OUT
in Battery-Backup Mode
V
VBATT
- 0.14
I
= 1mA, VBATT = 2.3V
OUT
VBATT - V
V
> V > 1.75V (Note 5)
65
25
mV
CC, SW
CC
Battery Switch Threshold,
Falling
V
CC
V
SW
VBATT > V (Note 6)
CC
2.30
2.40
2.50
V
Battery Switch Threshold,
Rising (Note 7)
This value is identical to the reset threshold,
V
V
V
rising
CC
CC
V
falling
rising
falling
rising
falling
rising
falling
rising
falling
rising
falling
rising
3.00
3.00
3.00
3.00
2.85
2.85
2.88
2.88
2.55
2.55
2.59
2.59
140
3.075
3.085
3.075
3.085
2.925
2.935
2.925
2.935
2.625
2.635
2.625
2.635
200
3.15
3.17
3.12
3.14
3.00
3.02
3.00
3.02
2.70
2.72
2.70
2.72
280
CC
MAX690T/704T/805T
MAX802T/804T/806T
MAX690S/704S/805S
MAX802S/804S/806S
MAX690R/704R/805R
MAX802R/804R/806S
V
CC
V
CC
V
CC
V
CC
V
CC
Reset Threshold (Note 8)
V
RST
V
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
Reset Timeout Period
t
V
< 3.6V
ms
V
WP
CC
V
- 0.3
V
- 0.05
–——– –————–
CC
CC
P FO, RES ET Output Voltage
V
I
= 50µA
OH
SOURCE
–——– –————–
P FO, RES ET Output Short to
GND Current (Note 4)
I
V
= 3.3V, V = 0V
180
500
0.3
µV
V
OS
CC OH
I
= 1.2mA;
–——– –————–
SINK
P FO, RES ET, RESET
V
MAX690_/704_/802_/806_, V = V min;
RST
MAX804_/805_, V = V
0.06
OL
CC
max
Output Voltage
CC
RST
VBATT = 0V, V = 1.0V, I
= 40µA,
CC
SINK
MAX690_C, MAX704_C, MAX80_ _C
0.13
0.17
0.3
–——– –————–
P FO, RES ET Output Voltage
V
OL
V
VBATT = 0V, V = 1.2V, I = 200µA,
CC
SINK
MAX690_E/M, MAX704_E/M, MAX80_ _E/M
0.3
1
MAX804_C,
MAX805_C
-1
VBATT = 0V,
= V min;
RESET Output Leakage Current
(Note 9)
V
µA
CC
RST
MAX804_E/M,
MAX805_E/M
V
RESET
= 0V, V
CC
-10
10
_______________________________________________________________________________________
3
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, V = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, V = 2.72V to
CC
CC
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25˚C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
MAX802_C/E, MAX804_C/E,
MAX806_C/E
1.212
1.237
1.262
V
V
V
PFI
< 3.6V
falling
CC
PFI Input Threshold
V
PFT
MAX690_/MAX704_/MAX805_
1.187
-25
1.237
1.287
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_M, MAX704_M, MAX80_ _M
MAX690_C/E, MAX704_C/E,
2
2
25
nA
PFI Input Current
-500
500
10
20
MAX80_ _C/E
PFI Hysteresis, PFI Rising
PFI Input Current
V
PFH
V
CC
< 3.6V
mV
MAX690_M, MAX704_M, MAX80_ _M
10
2
25
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_M, MAX704_M, MAX80_ _M
-25
25
nA
-500
2
500
V
0.7 x V
CC
IH
–—–
MR Input Threshold
MAX704_/MAX806_ only
MAX704_/MAX806_ only
V
V
0.3 x V
CC
IL
MR
MD
–—–
MR Pulse Width
t
100
20
60
60
ns
ns
–—–
MR to Reset Delay
t
MAX704_/MAX806_ only
–—–
500
350
0.7 x V
–—–
MR Pull-Up Current
MAX704_/MAX806_ only, MR = 0V, V = 3V
CC
20
µA
V
IH
CC
WDI Input Threshold
WDI Input Current
MAX690_/MAX802_/MAX804_/MAX805_ only
V
V
IL
0.3 x V
CC
MAX690_C/E, MAX802_C/E,
MAX804_C/E, MAX805_C/E
-1
0.01
0.01
1
0V< V < 5.5V
µA
CC
MAX690_M, MAX802_M,
MAX804_M, MAX805_M
-10
10
MAX690/MAX802/MAX804/
MAX805 only
Watchdog Timeout Period
WDI Pulse Width
t
V
CC
< 3.6V
1.12
100
1.60
20
2.24
sec
ns
WD
MAX690_/MAX802_/MAX804_/MAX805_ only
–—–
Note 1: VCC supply current, logic input leakage, watchdog functionality (MAX690_/802_/805_/804_), MR functionality
–————–
(MAX704_/806_), PFI functionality, state of RES ET (MAX690_/704_/802_/806_), and RESET (MAX804_/805_) tested at
–————–
–——–
VBATT = 3.6V, and VCC = 5.5V. The state of RES ET or RESET and P FO is tested at VCC = VCC min.
Note 2: Tested at VBATT = 3.6V, VCC = 3.5V and 0V. The battery current will rise to 10µA over a narrow transition window around
VCC = 1.9V.
Note 3: Leakage current into the battery is tested under the worst-case conditions at VCC = 5.5V, VBATT = 1.8V and at VCC = 1.5V,
VBATT= 1.0V.
Note 4: Guaranteed by design.
Note 5: When VSW > VCC > VBATT, VOUT remains connected to VCC until VCC drops below VBATT. The VCC-to-VBATT comparator
has a small 25mV typical hysteresis to prevent oscillation. For VCC < 1.75V (typ), VOUT switches to VBATT regardless of the
voltage on VBATT.
MAX972,4–806TS/R
Note 6: When VBATT > VCC > VSW, VOUT remains connected to VCC until VCC drops below the battery switch threshold (VSW).
Note 7: VOUT switches from VBATT to VCC when VCC rises above the reset threshold, independent of VBATT. Switchover back to
–————–
VCC occurs at the exact voltage that causes RES ET to go high (on the MAX804_/805_, RESET goes low); however
switchover occurs 200ms prior to reset.
Note 8: The reset threshold tolerance is wider for VCC rising than for VCC falling to accommodate the 10mV typical hysteresis, which
prevents internal oscillation.
Note 9: The leakage current into or out of the RESET pin is tested with RESET asserted (RESET output high impedance).
4
_______________________________________________________________________________________
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
MAX972,4–806TS/R
__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(T = +25°C, unless otherwise noted.)
A
V
CC
-to-V ON-RESISTANCE
vs. TEMPERATURE
VBATT-to-V ON-RESISTANCE
OUT
SUPPLY CURRENT
vs. TEMPERATURE
OUT
vs. TEMPERATURE
5
180
140
50
V
CC
= 0V
VBATT = 3.0V
VBATT = 2V
VBATT = 3V
V
CC
= 5V
4
3
2
1
0
45
40
35
30
25
V
= 2.5V
CC
V
CC
= 3.3V
V
= 3.3V
= 2.5V
CC
100
60
VBATT = 3V
PFI = GND
MR/WDI FLOATING
VBATT = 3.3V
V
= 5V
CC
VBATT = 5V
V
CC
20
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
RESET TIMEOUT PERIOD
vs. TEMPERATURE
RESET-COMPARATOR PROPAGATION
DELAY vs. TEMPERATURE
BATTERY SUPPLY CURRENT
vs. TEMPERATURE
216
30
10,000
VBATT = 3.0V
100mV OVERDRIVE
V
= 0V
CC
PFI = GND
VBATT = 5V
212
208
204
200
196
26
22
18
14
10
1000
100
10
V
= 5V
CC
VBATT = 3.0V
VBATT = 3V
1
VBATT = 2V
V
CC
= 3.3V
0.1
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
1.004
TEMPERATURE (°C)
TEMPERATURE (°C)
PFI THRESHOLD
vs. TEMPERATURE
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
1.240
V
CC
= 3.3V
1.238
1.236
1.234
1.232
1.230
1.002
1.000
0.998
0.996
0.994
V
CC
= 5V
V
= 2.5V
CC
VBATT = 3.0V
VBATT = 3.0V
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
5
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
______________________________________________________________P in De s c rip t io n
PIN
NAME
FUNCTION
Supply Output for CMOS RAM. When V is above the reset threshold, V
MAX690 MAX704 MAX804
MAX802 MAX806 MAX805
is
OUT
CC
1
1
1
V
OUT
connected to V through a P-channel MOSFET switch. When V falls below V and
CC CC SW
VBATT, VBATT connects to V . Connect to V if no battery is used.
OUT CC
2
3
2
3
2
3
V
Main Supply Input
Ground
CC
GND
–——–
Power-Fail Input. When PFI is less than V
or when V falls below V , P FO goes
CC SW
PFT
4
5
4
5
4
5
PFI
–——–
low; otherwise, P FO remains high. Connect to ground if unused.
–——–
Power-Fail Output. When PFI is less than V , or V falls below V , P FO goes low;
–——–
P FO
PFT
CC
SW
–——–
otherwise, P FO remains high. Leave open if unused.
Watchdog Input. If WDI remains high or low for 1.6sec, the internal watchdog timer runs out
and reset is triggered. The internal watchdog timer clears while reset is asserted or when
WDI sees a rising or falling edge. The watchdog function cannot be disabled.
6
—
6
6
WDI
–—–
Manual Reset Input. A logic low on MR asserts reset. Reset remains asserted as long as
–—–
–—–
MR is low and for 200ms after MR returns high. This active-low input has an internal
70µA pull-up current. It can be driven from a TTL or CMOS logic line, or shorted to
ground with a switch. Leave open if unused.
–—–
MR
—
—
Active-Low Reset Output. Pulses low for 200ms when triggered, and stays low whenever
–—–
V
CC
is below the reset threshold or when MR is a logic low. It remains low for 200ms after
–————–
RESET
7
7
—
–—–
either V rises above the reset threshold, the watchdog triggers a reset, or MR goes
CC
from low to high.
–————–
—
8
—
8
7
8
RESET Active-High, Open-Drain Reset Output is the inverse of RES ET.
Backup-Battery Input. When V falls below V and VBATT, V
switches from V to
CC
CC
SW
OUT
VBATT VBATT. When V rises above the reset threshold, V
reconnects to V . VBATT may
OUT CC
CC
exceed V . Connect to V if no battery is used.
CC
CC
Re s e t Th re s h o ld
_______________De t a ile d De s c rip t io n
The MAX690T/MAX704T/MAX805T a re inte nd e d for
3.3V systems with a ±5% power-supply tolerance and a
10% system tolerance. Except for watchdog faults,
re s e t will not a s s e rt a s long a s the p owe r s up p ly
remains above 3.15V (3.3V - 5%). Reset is guaranteed
to assert before the power supply falls below 3.0V.
Re s e t Ou t p u t
A microprocessor’s (µP’s) reset input starts the µP in a
known state. These µP supervisory circuits assert reset to
prevent code execution errors during power-up, power-
down, brownout conditions, or a watchdog timeout.
–————–
RES ET is guaranteed to be a logic low for 0V < V
<
The MAX690S/MAX704S/MAX805S are designed for
3.3V ± 10% p owe r s up p lie s . Exc e p t for wa tc hd og
faults, they are guaranteed not to assert reset as long
as the supply remains above 3.0V (3.3V - 10%). Reset
is guaranteed to assert before the power supply falls
CC
V
, provided that VBATT is greater than 1V. Without
RST
–————–
a backup battery, RES ET is guaranteed valid for V
CC
> 1V. Onc e V
internal timer keeps RES ET low for the reset timeout
period; after this interval, RES ET goes high (Figure 2).
e xc e e d s the re s e t thre s hold , a n
CC
–————–
–————–
below 2.85V (V - 14%).
CC
If a brownout condition occurs (V
reset threshold), RES ET goes low. Each time RES ET
is asserted, it stays low for the reset timeout period.
dips below the
The MAX690R/MAX704R/MAX805R are optimized for
monitoring 3.0V ±10% power supplies. Reset will not
CC
–————–
–————–
occur until V
falls below 2.7V (3.0V - 10%), but is
CC
MAX972,4–806TS/R
Any time V
g oe s b e low the re s e t thre s hold , the
g ua ra nte e d to oc c ur b e fore the s up p ly fa lls b e low
2.59V (3.0V - 14%).
CC
internal timer restarts.
The watchdog timer can also initiate a reset. See the
Watchdog Input section.
The MAX802R/S/T, MAX804R/S/T, and MAX806R/S/T
a re re s p e c tive ly s imila r to the MAX690R/S/T,
MAX805R/S/T, and MAX704R/S/T, but with tightened
reset and power-fail threshold tolerances.
The MAX804_/MAX805_ active-high RESET output is
open drain, and the inverse of the MAX690_/MAX704_/
–————–
MAX802_/MAX806_ RES ET output.
6
_______________________________________________________________________________________
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
MAX972,4–806TS/R
VBATT
3.0V OR 3.3V
BATTERY
SWITCHOVER
CIRCUITRY
V
RST
V
OUT
V
CC
V
CC
V
SW
BATTERY
SWITCHOVER
COMPARATOR
0V
3.0V OR 3.3V
V
OUT
VBATT = 3.6V
MAX690T/S/R
1.237V
RESET
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
t
WP
V
SW
COMPARATOR
3.0V OR 3.3V
RESET
1.237V
*
RESET
GENERATOR
WATCHDOG
TIMER
*
WDI
RESET
(RESET)
(RESET)
**
MR
PFI
PFO
POWER-FAIL
COMPARATOR
V
PFT
PFO
VBATT = PFI = 3.6V
= 0mA
I
OUT
* MAX690T/S/R, MAX802T/S/R, MAX804T/S/R, MAX805T/S/R ONLY
** MAX704T/S/R, MAX806T/S/R ONLY
( ) MAX804T/S/R, MAX805T/S/R ONLY, RESET EXTERNALLY PULLED UP TO V
CC
( ) MAX804T/S/R, MAX805T/S/R ONLY
Figure 1. Block Diagram
Figure 2. Timing Diagram
Wa t c h d o g In p u t
(MAX6 9 0 _/8 0 2 _/8 0 4 _/8 0 5 _)
The watchdog circuit monitors the µP’s activity. If the µP
does not toggle the watchdog input (WDI) within 1.6sec,
a reset pulse is triggered. The internal 1.6sec timer is
cleared by either a reset pulse or by a transition (low-to-
P o w e r-Fa il Co m p a ra t o r
The PFI input is compared to an internal reference. If
–——–
PFI is less than V , P FO goes low. The power-fail
PFT
comparator is intended for use as an undervoltage
detector to signal a failing power supply. However, the
c omp a ra tor d oe s not ne e d to b e d e d ic a te d to this
function because it is completely separate from the rest
of the circuitry.
high or high-to-low) at WDI. If WDI is tied high or low, a
–————–
RES ET pulse is triggered every 1.8sec (t plus t ).
WD
RS
–——–
The power-fail comparator turns off and P FO goes low
As long as reset is asserted, the timer remains cleared
and does not count. As soon as reset is deasserted,
the timer starts counting. Unlike the 5V MAX690 family,
the watchdog function cannot be disabled.
when V falls below V on power-down. The power-
CC
SW
fa il c omp a ra tor turns on a s V
c ros s e s V
on
CC
SW
power-up. If the comparator is not used, connect PFI to
–——–
–——–
ground and leave P F O unconnected. P F O may be
–—–
connected to MR on the MAX704_/MAX806_ so that a
low voltage on PFI will generate a reset (Figure 5b).
_______________________________________________________________________________________
7
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
Ba c k u p -Ba t t e ry S w it c h o ve r
In the event of a brownout or power failure, it may be
The s e µP s up e rvis ory c irc uits a re not s hort-c irc uit
necessary to preserve the contents of RAM. With a
__________Ap p lic a t io n s In fo rm a t io n
protected. Shorting V
to ground—excluding power-
OUT
backup battery installed at VBATT, the devices auto-
ma tic a lly s witc h RAM to b a c kup p owe r whe n V
up tra ns ie nts s uc h a s c ha rg ing
a d e c oup ling
CC
capacitor—destroys the device. Decouple both V
CC
falls.
and VBATT pins to ground by placing 0.1µF capacitors
as close to the device as possible.
This family of µP supervisors (designed for 3.3V and 3V
systems) doesn’t always connect VBATT to V
when
OUT
Us in g a S u p e rCa p
a s a Ba c k u p P o w e r S o u rc e
VBATT is greater than V
. VBATT connects to V
CC
OUT
(through a 140Ω switch) when V is below V
and
CC
SW
Sup e rCa p s ™ a re c a p a c itors with e xtre me ly hig h
capacitance values (e.g., order of 0.47F) for their size.
Fig ure 3 s hows two wa ys to us e a Sup e rCa p a s a
b a c kup p owe r s ourc e . The Sup e rCa p ma y b e
connected through a diode to the 3V input (Figure 3a)
or, if a 5V supply is also available, the SuperCap may
be charged up to the 5V supply (Figure 3b) allowing a
VBATT is greater than V , or when V
1.75V (typ) regardless of the VBATT voltage. This is
done to allow the backup battery (e.g., a 3.6V lithium
falls below
CC
CC
cell) to have a higher voltage than V
.
CC
Switchover at V (2.40V) ensures that battery-backup
SW
mode is entered before V
gets too close to the 2.0V
OUT
minimum required to reliably retain data in CMOS RAM.
Switchover at higher V voltages would decrease
longer backup period. Since VBATT can exceed V
CC
CC
while V
is above the reset threshold, there are no
CC
backup-battery life. When V recovers, switchover is
CC
special precautions when using these µP supervisors
with a SuperCap.
d e fe rre d until V
ris e s a b ove the re s e t thre s hold
CC
(V ) to ensure a stable supply. V
is connected to
RST
OUT
V
through a 3Ω PMOS power switch.
CC
Op e ra t io n w it h o u t a Ba c k u p
P o w e r S o u rc e
The s e µP s up e rvis ors we re d e s ig ne d for b a tte ry-
backed applications. If a backup battery is not used,
Ma n u a l Re s e t
–—–
A logic low on MR asserts reset. Reset remains asserted
while MR is low, and for t (200ms) after MR returns
high. This input has an internal 70µA pull-up current, so
it can be left open if it is not used. MR can be driven with
–—– –—–
WP
c onne c t b oth VBATT a nd V
to V , or us e a
OUT
CC
–—–
different µP supervisor such as the MAX706T/S/R or
MAX708T/S/R.
TTL or CMOS logic levels, or with open-drain/collector
outputs. Connect a normally open momentary switch
from MR to GND to create a manual-reset function;
external debounce circuitry is not required.
Re p la c in g t h e Ba c k u p Ba t t e ry
–—–
The backup power source can be removed while V
CC
re ma ins va lid , if VBATT is d e c oup le d with a 0.1µF
c a p a c itor to g round , without d a ng e r of trig g e ring
–————–
RESET/R E S E T. As long a s V
s ta ys a b ove V
,
CC
SW
battery-backup mode cannot be entered.
Table 1. Input and Output Status in
Battery-Backup Mode
Ad d in g Hys t e re s is
t o t h e P o w e r-Fa il Co m p a ra t o r
PIN NAME
STATUS
The p owe r-fa il c omp a ra tor ha s
a typ ic a l inp ut
Connected to VBATT through an internal
140Ω switch
hysteresis of 10mV. This is sufficient for most applica-
tions where a power-supply line is being monitored
through an external voltage divider (see the section
Monitoring an Additional Power Supply).
V
OUT
V
CC
Disconnected from V
OUT
The power-fail comparator is disabled when
< V
PFI
V
CC
If additional noise margin is desired, connect a resistor
–——–
SW
–——–
P FO
between P FO and PFI as shown in Figure 4a. Select
Logic low when V < V
or PFI < V
PFT
CC
SW
the ratio of R1 and R2 such that PFI sees 1.237V (V
)
MAX972,4–806TS/R
PFT
WDI
The watchdog timer is disabled
Disabled
whe n V fa lls to its trip point (V
). R3 a dd s the
IN
TRIP
–—–
MR
hysteresis and will typically be more than 10 times the
value of R1 or R2. The hysteresis window extends both
–————–
RES ET
Low logic
above (V ) and below (V ) the original trip point (V ).
H
L
TRIP
RESET
VBATT
High impedance
Connected to V
OUT
™ SuperCap is a trademark of Baknor Industries.
8
_______________________________________________________________________________________
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
MAX972,4–806TS/R
3.0V OR 3.3V
+5V
3.0V OR
3.3V
V
CC
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
V
OUT
TO STATIC
RAM
V
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R RESET
MAX806T/S/R
V
TO STATIC
RAM
CC
OUT
1N4148
1N4148
0.47F
MAX805T/S/R RESET
MAX806T/S/R
VBATT
TO µP
VBATT
TO µP
(RESET)
(RESET)
0.47F
GND
GND
(
) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
a
b
(
) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
Figure 3. Using a SuperCap as a Backup Power Source
–————–
Connecting an ordinary signal diode in series with R3,
example, the RES ET output is driven high and the µP
wants to pull it low, indeterminate logic levels may
as shown in Figure 4b, causes the lower trip point (V )
L
to coincide with the trip point without hysteresis (V
so the entire hysteresis window occurs above V
),
re s ult. To c orre c t this , c onne c t a 4.7kΩ re s is tor
TRIP
–————–
.
between the RES ET output and the µP reset I/O, as in
–————–
TRIP
This method provides additional noise margin without
compromising the accuracy of the power-fail threshold
when the monitored voltage is falling. It is useful for
a c c ura te ly d e te c ting whe n a volta g e fa lls p a s t a
threshold.
Figure 6. Buffer the R E S E T output to other system
components.
Ne g a t ive -Go in g V
Tra n s ie n t s
CC
While issuing resets to the µP during power-up, power-
down, and brownout conditions, these supervisors are
The current through R1 and R2 should be at least 1µA to
ensure that the 25nA (max over extended temperature
range) PFI input current does not shift the trip point. R3
relatively immune to short-duration negative-going V
CC
transients (glitches). It is usually undesirable to reset
the µP when V experiences only small glitches.
CC
should be larger than 10kΩ so it does not load down the
–——–
Figure 7 shows maximum transient duration vs. reset-
comparator overdrive, for which reset pulses are not
generated. The graph was produced using negative-
P FO pin. Capacitor C1 adds additional noise rejection.
Mo n it o rin g a n Ad d it io n a l P o w e r S u p p ly
These µP supervisors can monitor either positive or
going V pulses, starting at 3.3V and ending below
CC
negative supplies using a resistor voltage divider to
the reset threshold by the magnitude indicated (reset
comparator overdrive). The graph shows the maximum
–——–
PFI. P FO can be used to generate an interrupt to the
–—–
–——–
µP (Figure 5). Connecting P FO to MR on the MAX704
a nd MAX806 c a us e s re s e t to a s s e rt whe n the
monitored supply goes out of tolerance. Reset remains
p uls e wid th a ne g a tive -g oing V
tra ns ie nt ma y
CC
typ ic a lly ha ve without c a us ing a re s e t p uls e to b e
issued. As the amplitude of the transient increases
(i.e ., g oe s fa rthe r b e low the re s e t thre s hold ), the
maximum allowable pulse width decreases. Typically,
–—–
–——–
asserted as long as P FO holds MR low, and for 200ms
–——–
after P FO goes high.
a V
tra ns ie nt tha t g oe s 100mV b e low the re s e t
CC
In t e rfa c in g t o µP s
w it h Bid ire c t io n a l Re s e t P in s
µPs with bidirectional reset pins, such as the Motorola
threshold and lasts for 40µs or less will not cause a
reset pulse to be issued.
A 100nF bypass capacitor mounted close to the V
pin provides additional transient immunity.
CC
68HC11 s e rie s , c a n c onte nd with the MAX690_/
–————–
MAX704_/MAX802_/MAX806_ RES ET output. If, for
_______________________________________________________________________________________
9
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
V
IN
V
IN
R
1
V
CC
V
CC
R
1
PFI
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
PFI MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
R
2
R
3
R
2
R
3
C1*
C1*
MAX806T/S/R
PFO
PFO
GND
GND
*OPTIONAL
*OPTIONAL
V
TO µP
TO µP
PFO
0V
PFO
0V
V
IN
IN
V
TRIP
V
H
V
L
V
H
0V
0V
V
TRIP
R + R
1
2
(
)
R + R
V
= V
1
2
TRIP
PFT
R
2
V
= V
PFT
(
)
TRIP
WHERE V = 1.237V
PFT
R
2
1
1
1
(V V )
CC -
R
D
V
= 10mV
+
+
–
PFH
V = R (V + V )
PFT PFH
1
1
1
(
)
H
1
V = (V + V ) (R )
H
PFT
PFH
1
+
+
–
R
1
R
2
R
3
(
)
3
R
1
R
2
R
3
WHERE V = 1.237V
PFT
1
1
1
V
CC
+
+
V = R
V
(
)
L
1
PFT
V
= 10mV
PFH
R
1
R
R
R
3
2
3
V
V
= DIODE FORWARD VOLTAGE DROP
D
a
b
= V
TRIP
L
Figure 4. a) Adding Additional Hysteresis to the Power-Fail Comparator b) Shifting the Additional Hysteresis above VPFT
V
IN
3.0V OR 3.3V
3.0V OR 3.3V
V
CC
V
CC
R
1
R
1
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
GND
PFI
PFO
PFI
PFO
MR
R
2
R
2
*
GND
V-
V
CC
V
CC
PFO
PFO
V
IN
V-
V
L
V
TRIP
V
TRIP
V
H
0V
1
1
V
CC
R + R
1
2
+
–
V
= R (V + V
)
* MAX704T/S/R,
MAX806T/S/R ONLY
TRIP
2
PFT PFH
V
= V
PFT
(
)
TRIP
MAX972,4–806TS/R
(
)
1
R
1
R
2
R
1
R
2
WHERE V = 1.237V
PFT
1
1
V
CC
V
PFH
= 10mV
R + R
2
+
–
V = R (V
)
L
2
PFT
V = (V + V
H
)
(
)
PFT PFH
(
)
R
R
2
R
1
1
NOTE: V
TRIP
IS NEGATIVE
R
2
a
b
Figure 5. Using the Power-Fail Comparator to Monitor an Additional Power Supply
10 ______________________________________________________________________________________
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
MAX972,4–806TS/R
_Typ ic a l Op e ra t in g Circ u it s (c o n t .)
BUFFERED RESET TO OTHER SYSTEM COMPONENTS
3.0V OR 3.3V
V
OUT
V
CC
RAM
V
CC
V
CC
VBATT
µP
0.1µF 3.6V
0.1µF
0.1µF
MAX704T/S/R
MAX806T/S/R
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX806T/S/R
4.7k
RESET
RESET
MR
RESET
GND PFI
µP
GND
GND
Figure 6. Interfacing to µPs with Bidirectional Reset I/O
100
80
V
CC
= 3.3V
T
A
= +25°C
60
40
20
0
10
100
1000
RESET COMPARATOR OVERDRIVE (V - V ) (mV)
RST
CC
Figure 7. Maximum Transient Duration without Causing a
Reset Pulse vs. Reset Comparator Overdrive
______________________________________________________________________________________ 11
3 .0 V/3 .3 V Mic ro p ro c e s s o r S u p e rvis o ry Circ u it s
_Ord e rin g In fo rm a t io n (c o n t in u e d )
___________________Ch ip To p o g ra p h y
V
OUT
VBATT
PART**
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
PIN-PACKAGE
8 Plastic DIP
8 SO
MAX704_CPA
MAX704_CSA
MAX704_C/D
MAX704_EPA
MAX704_ESA
MAX704_MJA
MAX802_CPA
MAX802_CSA
MAX802_C/D
MAX802_EPA
MAX802_ESA
MAX802_MJA
MAX804_CPA
MAX804_CSA
MAX804_C/D
MAX804_EPA
MAX804_ESA
MAX804_MJA
MAX805_CPA
MAX805_CSA
MAX805_C/D
MAX805_EPA
MAX805_ESA
MAX805_MJA
MAX806_CPA
MAX806_CSA
MAX806_C/D
MAX806_EPA
MAX806_ESA
MAX806_MJA
Dice*
V
CC
8 Plastic DIP
8 SO
0. 110"
8 CERDIP
8 Plastic DIP
8 SO
GND
(2. 794mm)
RESET
(RESET)
Dice*
WDI
[MR]
8 Plastic DIP
8 SO
8 CERDIP
8 Plastic DIP
8 SO
Dice*
PFI PFO
0. 080"
8 Plastic DIP
8 SO
8 CERDIP
8 Plastic DIP
8 SO
(2. 032mm)
( ) ARE FOR MAX804T/S/R, MAX805T/S/R.
[ ] ARE FOR MAX704T/S/R, MAX806T/S/R.
Dice*
8 Plastic DIP
8 SO
TRANSISTOR COUNT: 802;
8 CERDIP
8 Plastic DIP
8 SO
SUBSTRATE IS CONNECTED TO THE HIGHER OF
OR VBATT, AND MUST BE FLOATED IN ANY
V
CC
HYBRID DESIGN.
Dice*
8 Plastic DIP
8 SO
8 CERDIP
* Contact factory for dice specifications.
** These parts offer a choice of reset threshold voltage. Select
the letter corresponding to the desired nominal reset threshold
voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into
the blank to complete the part number.
MAX972,4–806TS/R
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 __________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 (4 0 8 ) 7 3 7 -7 6 0 0
© 1994 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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