MAX806SESA+ [MAXIM]
Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO8, 0.150 INCH, PLASTIC, SO-8;
| 型号： | MAX806SESA+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO8, 0.150 INCH, PLASTIC, SO-8 光电二极管 |
| 文件： | 总13页 (文件大小：1515K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804‒MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
General Description
Features
● RESET and RESET Outputs
● Manual Reset Input
● Precision Supply-Voltage Monitor
● 200ms Reset Time Delay
These microprocessor (µP) supervisory circuits reduce the
complexity and number of components required for pow-
er-supply monitoring and battery-control functions in µP
systems. They significantly improve system reliability and
accuracy compared to separate ICs or discrete components.
● Watchdog Timer (1.6sec timeout)
● Battery-Backup Power Switching—Battery Can
These devices are designed for use in systems powered
by 3.0V or 3.3V supplies. See the selector guide in the
back of this data sheet for similar devices designed for
5V systems. The suffixes denote different reset threshold
voltages: 3.075V (T), 2.925V (S), and 2.625V (R) (see the
Reset Threshold section in the Detailed Description). All
these parts are available in 8-pin DIP and SO packages.
Functions offered in this series are as follows:
Exceed V
in Normal Operation
Supply Current
CC
● 40µA V
CC
● 1µA Battery Supply Current
● Voltage Monitor for Power-Fail or Low-Battery
Warning
● Guaranteed RESET Assertion to V
● 8-Pin DIP and SO Packages
= 1V
CC
Applications
●
Battery-Powered Computers and Controllers
● Embedded Controllers
● Intelligent Instruments
● Critical µP Power Monitoring
● Portable Equipment
MAX690
MAX704
MAX802
MAX804
MAX805
MAX806
±4%
±4%
±2%
±2%
±4%
±2%
±75mV
±75mV
±2%
Ordering Information
±2%
PART**
TEMP RANGE
0°C to +70°C
PIN-PACKAGE
8 Plastic DIP
8 SO
±75mV
±2%
MAX690_CPA
MAX690_CSA
MAX690_C/D
MAX690_EPA
MAX690_ESA
MAX690_MJA
0°C to +70°C
0°C to +70°C
Dice*
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
8 Plastic DIP
8 SO
Typical Operating Circuits
REGULATED +3.3V OR +3.0V
V
UNREGULATED
DC
CC
µP
8 CERDIP
0.1µF
V
CC
RESET
RESET
(RESET)
Ordering Information continued at end of data sheet.
*Contact factory for dice specifications.
R1
R2
NMI
PFO
WDI
MAX690T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
I/O LINE
GND
PFI
**These parts offer a choice of reset threshold voltage. Select
the letter corresponding to the desired nominal reset threshold
voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into
the blank to complete the part number.
Devices in PDIP and SO packages are available in both leaded
and lead(Pb)-free packaging. Specify lead free by adding the +
symbol at the end of the part number when ordering. Lead free
not available for CERDIP package.
3.6V
BUS
LITHIUM
BATTERY
V
VBATT
OUT
GND
V
CC
CMOS RAM
GND
0.1µF
0.1µF
( ) ARE FOR MAX804T/S/R, MAX805T/S/R
Typical Operating Circuits continued at at end of data
sheet.
Pin Configuration appears at end of data sheet.
19-0243; Rev 3; 4/15
MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
Absolute Maximum Ratings
Terminal Voltage (with respect to GND)
Continuous Power Dissipation (T = +70°C)
A
V
...................................................................-0.3V to +6.0V
Plastic DIP (derate 9.09mW/°C above +70°C)............727mW
CC
VBATT ..............................................................-0.3V to +6.0V
SO (derate 5.88mW/°C above +70°C)........................471mW
CERDIP (derate 8.00mW/°C above +70°C)................640mW
Operating Temperature Ranges
All Other Inputs................. -0.3V to the higher of V
Continuous Input Current
or VBATT
CC
V
...............................................................................100mA
MAX690_C_ _/MAX704_C_ _/MAX80_ _C_ _.......0°C to +70°C
MAX690_E_ _/MAX704_E_ _/MAX80_ _E_ _.... -40°C to +85°C
MAX690_M_ _/MAX704_M_ _/MAX80_ _M_ _... -55°C to +125°C
Storage Temperature Range............................ -65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
CC
VBATT ............................................................................18mA
GND................................................................................18mA
Output Current
RESET, PFO ..................................................................18mA
V
.............................................................................100mA
OUT
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
CC
(V
= 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, V
= 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, V
= 2.72V to
CC
CC
; unless otherwise noted. Typical values are at T = +25°C.)
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; T = T
to T
A
MIN
MAX
A
PARAMETER
SYMBOL
CONDITIONS
MIN
1.0
TYP
MAX
5.5
UNITS
MAX690_C, MAX704_C, MAX80_ _C
MAX690_E/M, MAX704_E/M, MAX80_ _E/M
MAX690_C/E, MAX704_C/E,
Operating Voltage Range,
V
V
, VBATT (Note 1)
CC
1.1
5.5
40
50
40
50
50
65
55
70
MAX80_ _C/E, V
< 3.6V
CC
MAX690_C/E, MAX704_C/E,
MAX80_ _C/E, V < 5.5V
MR = V
CC
(MAX704_/
CC
V
Supply Current
CC
I
µA
SUPPLY
(excluding I
)
OUT
MAX690_M, MAX704_M,
MAX80_ _M, V < 3.6V
MAX806_)
CC
MAX690_M, MAX704_M,
MAX80_ _M, V < 5.5V
CC
MR = V
CC
(MAX704_/
V
Supply Current in Battery-
CC
V
= 2.0V, VBATT = 2.3V
25
50
µA
CC
Backup Mode(excluding I
)
OUT
MAX806_)
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_M, MAX704_M, MAX80_ _M
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_M, MAX704_M, MAX80_ _M
MAX690_C/E, MAX704_C/E, MAX80_ _C/E,
0.4
0.4
1
10
0.5
5
VBATT Supply Current, Any
Mode (excluding I ) (Note 2)
µA
µA
OUT
0.01
0.01
Battery Leakage Current
(Note 3)
V
V
CC
CC
I
= 5mA (Note 4)
-0.3
-0.015
OUT
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
= 50mA
V
-0.3
V
CC
-0.15
CC
I
OUT
MAX690_M, MAX704_M, MAX80_ _M
= 5mA (Note 4)
V
V
CC
CC
V
Output Voltage
V
OUT
I
-0.035 -0.015
OUT
MAX690_M, MAX704_M, MAX80_ _M
V
V
CC
CC
I
= 50mA
-0.35
-0.15
OUT
V
V
CC
CC
I
= 250µA, V
> 2.5V (Note 4)
OUT
CC
-0.0015 -0.0006
Maxim Integrated
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MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
Electrical Characteristics (continued)
CC
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; T = T
(V
= 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, V
= 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, V = 2.72V to
CC
CC
to T
; unless otherwise noted. Typical values are at T = +25°C.)
A
MIN
MAX
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VBATT VBATT
I
I
= 250µA, VBATT = 2.3V
OUT
- 0.1
- 0.034
V
Mode
in Battery-Backup
OUT
V
VBATT
-0.14
= 1mA, VBATT = 2.3V
OUT
VBATT - V , V
> V > 1.75V (Note 5)
CC
65
25
mV
V
Battery Switch Threshold,
Falling
CC SW
V
CC
V
VBATT > V
(Note 6)
2.30
2.40
2.50
SW
CC
Battery Switch Threshold,
Rising (Note 7)
This value is identical to the reset threshold,
V rising
CC
V
V
CC
V
V
V
V
V
V
V
V
V
V
V
V
falling
rising
falling
rising
falling
rising
falling
rising
falling
rising
falling
rising
3.00
3.00
3.00
3.00
2.85
2.85
2.88
2.88
2.55
2.55
2.59
2.59
140
3.075
3.085
3.075
3.085
2.925
2.935
2.925
2.935
2.625
2.635
2.625
2.635
200
3.15
3.17
3.12
3.14
3.00
3.02
3.00
3.02
2.70
2.72
2.70
2.72
280
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
MAX690T/704T/805T
MAX802T/804T/806T
MAX690S/704S/805S
MAX802S/804S/806S
MAX690R/704R/805R
MAX802R/804R/806S
V
Reset Threshold (Note 8)
V
RST
Reset Timeout Period
t
V < 3.6V
CC
ms
V
WP
V
-
V
-
CC
CC
V
I
= 50µA
PFO RESET
,
Output Voltage
Output Short to
OH
SOURCE
0.3
0.05
PFO RESET
,
I
V
= 3.3V, V
= 0V
180
500
0.3
µV
V
OS
CC
OH
GND Current (Note 4)
I
= 1.2mA;
SINK
PFO, RESET, RESET
Output Voltage
V
MAX690_/704_/802_/806_, V
= V min;
RST
0.06
OL
OL
CC
MAX804_/805_, V
= V
max
CC
RST
VBATT = 0V, V
= 1.0V, I
= 40µA,
CC
SINK
0.13
0.17
0.3
0.3
+1
MAX690_C, MAX704_C, MAX80_ _C
V
V
PFO, RESET Output Voltage
VBATT = 0V, V = 1.2V, I = 200µA,
MAX690_E/M, MAX704_E/M, MAX80_ _E/M
CC
SINK
MAX804_C,
MAX805_C
-1
VBATT = 0V,
RESET Output Leakage
Current (Note 9)
V
V
= V
min;
µA
CC
RESET
RST
MAX804_E/M,
MAX805_E/M
= 0V, V
CC
-10
+10
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MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
Electrical Characteristics (continued)
CC
(V
= 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, V
= 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, V
= 2.72V to
CC
CC
; unless otherwise noted. Typical values are at T = +25C.)
5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; T = T
to T
A
MIN
MAX
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX802_C/E, MAX804_C/E,
MAX806_C/E
1.212
1.237
1.262
V
V
< 3.6V
falling
CC
PFI
PFI Input Threshold
V
V
PFT
MAX690_/MAX704_/MAX805_
1.187
-25
1.237
1.287
25
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_M, MAX704_M, MAX80_ _M
2
2
PFI Input Current
nA
-500
500
MAX690_C/E, MAX704_C/E,
MAX80_ _C/E
10
10
20
25
PFI Hysteresis, PFI Rising
V
V
< 3.6V
mV
PFH
CC
MAX690_M, MAX704_M,
MAX80_ _M
MAX690_C/E, MAX704_C/E, MAX80_ _C/E
MAX690_M, MAX704_M, MAX80_ _M
-25
2
2
25
PFI Input Current
nA
V
-500
500
V
0.7 x V
CC
IH
MAX704_/MAX806_ only
MR Input Threshold
V
0.3 x V
100
IL
MR
MD
CC
t
t
MAX704_/MAX806_ only
MAX704_/MAX806_ only
20
60
60
ns
ns
µA
MR Pulse Width
500
350
0.7 x V
MR to Reset Delay
MR Pull-Up Current
20
MAX704_/MAX806_ only, MR = 0V, V
= 3V
CC
V
IH
CC
WDI Input Threshold
MAX690_/MAX802_/MAX804_/MAX805_ only
V
V
0.3 x V
-1
IL
CC
MAX690_C/E, MAX802_C/E,
MAX804_C/E, MAX805_C/E
+0.01
+0.01
+1
0V< V
5.5V
<
CC
WDI Input Current
µA
MAX690_M, MAX802_M,
MAX804_M, MAX805_M
-10
+10
2.24
MAX690/MAX802/MAX804/
MAX805 only
Watchdog Timeout Period
WDI Pulse Width
t
V
< 3.6V
1.12
100
1.60
20
s
WD
CC
MAX690_/MAX802_/MAX804_/MAX805_ only
ns
Note 1: V
supply current, logic input leakage, watchdog functionality (MAX690_/802_/805_/804_), MR functionality
CC
(MAX704_/806_), PFI functionality, state of RESET (MAX690_/704_/802_/806_), and RESET (MAX804_/805_) tested at
VBATT = 3.6V, and V = 5.5V. The state of RESET or RESET and PFO is tested at V = V min.
CC
CC
CC
Note 2: Tested at VBATT = 3.6V, V
= 3.5V and 0V. The battery current will rise to 10µA over a narrow transition window around
CC
V
= 1.9V.
CC
Note 3: Leakage current into the battery is tested under the worst-case conditions at V
= 5.5V, VBATT = 1.8V and at V = 1.5V,
CC
CC
VBATT= 1.0V.
Note 4: Guaranteed by design.
Note 5: When V
> V
> VBATT, V
remains connected to V
until V
drops below VBATT. The V -to-VBATT compara-
SW
CC
OUT
CC
CC CC
tor has a small 25mV typical hysteresis to prevent oscillation. For V
< 1.75V (typ), V
switches to VBATT regardless
CC
OUT
of the voltage on VBATT.
Note 6: When VBATT > V
> V , V
remains connected to V
until V
drops below the battery switch threshold (V ).
CC
SW OUT
CC
CC SW
Note 7: V
switches from VBATT to V
when V
rises above the reset threshold, independent of VBATT. Switchover back to
OUT
CC
CC
V
occurs at the exact voltage that causes RESET to go high (on the MAX804_/805_, RESET goes low); however
CC
switchover occurs 200ms prior to reset.
Note 8: The reset threshold tolerance is wider for V
which prevents internal oscillation.
rising than for V
falling to accommodate the 10mV typical hysteresis,
CC
CC
Note 9: The leakage current into or out of the RESET pin is tested with RESET asserted (RESET output high impedance).
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MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
V -TO-V
CC
ON-RESISTANCE
VBATT-TO-V ON-RESISTANCE
OUT
SUPPLY CURRENT
OUT
vs. TEMPERATURE
vs. TEMPERATURE
vs. TEMPERATURE
5
180
140
50
V
= 0V
VBATT = 3.0V
CC
VBATT = 2V
V
= 5V
CC
4
3
2
1
0
45
40
35
30
25
V
= 2.5V
CC
VBATT = 3V
V
CC
= 3.3V
V
= 3.3V
= 2.5V
CC
100
60
VBATT = 3V
PFI = GND
MR/WDI FLOATING
VBATT = 3.3V
V
CC
= 5V
VBATT = 5V
V
CC
20
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
BATTERY SUPPLY CURRENT
vs. TEMPERATURE
RESET TIMEOUT PERIOD
vs. TEMPERATURE
RESET-COMPARATOR PROPAGATION
DELAY vs. TEMPERATURE
10,000
216
30
V
CC
= 0V
VBATT = 3.0V
PFI = GND
100mV OVERDRIVE
VBATT = 5V
1000
100
10
212
208
204
200
196
26
22
18
14
10
V
= 5V
CC
VBATT = 3.0V
VBATT = 3V
1
VBATT = 2V
V
= 3.3V
CC
0.1
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
PFI THRESHOLD
vs. TEMPERATURE
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
1.240
1.004
V
= 3.3V
CC
1.238
1.236
1.234
1.232
1.230
1.002
1.000
0.998
0.996
0.994
V
CC
= 5V
V
= 2.5V
CC
VBATT = 3.0V
VBATT = 3.0V
–60 –40 –20
0
20 40 60 80 100 120 140
–60 –40 –20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
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MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
Pin Description
PIN
NAME
FUNCTION
MAX690 MAX704 MAX804
MAX802 MAX806 MAX805
Supply Output for CMOS RAM. When V
is above the reset threshold, V
is
OUT
CC
1
1
1
V
connected to V
through a p-channel MOSFET switch. When V
falls below V
and
SW
OUT
CC
CC
VBATT, VBATT connects to V
Main Supply Input
Ground
. Connect to V
if no battery is used.
OUT
CC
2
3
2
3
2
3
V
CC
GND
Power-Fail Input. When PFI is less than V
or when V
falls below V , PFO goes
CC SW
PFT
4
5
4
5
4
5
PFI
low; otherwise, PFO remains high. Connect to ground if unused.
Power-Fail Output. When PFI is less than V , or V falls below V , PFO goes low;
otherwise, PFO remains high. Leave open if unused.
PFT
CC
SW
PFO
Watchdog Input. If WDI remains high or low for 1.6s, the internal watchdog timer runs out
and reset is triggered. The internal watchdog timer clears while reset is asserted or when
WDI sees a rising or falling edge. The watchdog function cannot be disabled.
6
—
6
6
WDI
Manual Reset Input. A logic low on MR asserts reset. Reset remains asserted as long as
MR is low and for 200ms after MR returns high. This active-low input has an internal
70µA pullup current. It can be driven from a TTL or CMOS logic line, or shorted to ground
with a switch. Leave open if unused.
—
—
MR
Active-Low Reset Output. Pulses low for 200ms when triggered, and stays low whenever
V
is below the reset threshold or when MR is a logic low. It remains low for 200ms
CC
7
7
—
RESET
after either V
rises above the reset threshold, the watchdog triggers a reset, or MR
CC
goes from low to high.
RESET Active-High, Open-Drain Reset Output is the inverse of RESET.
Backup-Battery Input. When V falls below V and VBATT, V
—
8
—
8
7
8
switches from V
CC
CC
SW
OUT
VBATT to VBATT. When V
rises above the reset threshold, V
reconnects to V . VBATT
CC
OUT CC
may exceed V . Connect to V
if no battery is used.
CC
CC
Reset Threshold
Detailed Description
The MAX690T/MAX704T/MAX805T are intended for 3.3V
systems with a ±5% power-supply tolerance and a 10%
system tolerance. Except for watchdog faults, reset will
not assert as long as the power supply remains above
3.15V (3.3V - 5%). Reset is guaranteed to assert before
the power supply falls below 3.0V.
Reset Output
A microprocessor’s (µP’s) reset input starts the µP in a
known state. These µP supervisory circuits assert reset
to prevent code execution errors during power-up, power-
down, brownout conditions, or a watchdog timeout.
RESET is guaranteed to be a logic low for 0V < V
<
CC
The MAX690S/MAX704S/MAX805S are designed for
3.3V ±10% power supplies. Except for watchdog faults,
they are guaranteed not to assert reset as long as the
supply remains above 3.0V (3.3V - 10%). Reset is
guaranteed to assert before the power supply falls below
V
RST
, provided that VBATT is greater than 1V. Without a
backup battery, RESET is guaranteed valid for V
> 1V.
CC
Once V
exceeds the reset threshold, an internal timer
CC
keeps RESET low for the reset timeout period; after this
interval, RESET goes high (Figure 2).
2.85V (V
- 14%).
CC
If a brownout condition occurs (V
threshold), RESET goes low. Each time RESET is assert-
ed, it stays low for the reset timeout period. Any time V
dips below the reset
CC
The MAX690R/MAX704R/MAX805R are optimized for
monitoring 3.0V ±10% power supplies. Reset will not
CC
occu until V
falls below 2.7V (3.0V - 10%), but is
CC
r
goes below the reset threshold, the internal timer restarts.
guaranteed to occur before the supply falls below 2.59V
(3.0V - 14%).
The watchdog timer can also initiate a reset. See the
Watchdog Input section.
The MAX802R/S/T, MAX804R/S/T, and MAX806R/S/T are
respectively similar to the MAX690R/S/T, MAX805R/S/T,
and MAX704R/S/T, but with tightened reset and power-fail
threshold tolerances.
The MAX804_/MAX805_ active-high RESET output is
open drain, and the inverse of the MAX690_/MAX704_/
MAX802_/MAX806_ RESET output.
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MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
VBATT
3.0V OR 3.3V
BATTERY
SWITCHOVER
CIRCUITRY
V
OUT
V
V
RST
V
CC
V
CC
SW
BATTERY
SWITCHOVER
COMPARATOR
0V
3.0V OR 3.3V
MAX690T/S/R
V
OUT
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
VBATT = 3.6V
1.237V
RESET
t
WP
V
SW
COMPARATOR
3.0V OR 3.3V
RESET
1.237V
RESET
(RESET)
*
*
WDI
RESET
GENERATOR
WATCHDOG
TIMER
**
(RESET)
MR
PFI
PFO
POWER-FAIL
COMPARATOR
V
PFT
PFO
VBATT = PFI = 3.6V
= 0mA
I
OUT
* MAX690T/S/R, MAX802T/S/R, MAX804T/S/R, MAX805T/S/R ONLY
** MAX704T/S/R, MAX806T/S/R ONLY
( ) MAX804T/S/R, MAX805T/S/R ONLY, RESET EXTERNALLY PULLED UP TO V
CC
( ) MAX804T/S/R, MAX805T/S/R ONLY
Figure 1. Block Diagram
Figure 2. Timing Diagram
Watchdog Input (MAX690_/802_/804_/805_)
Power-Fail Comparator
The watchdog circuit monitors the µP’s activity. If the µP
does not toggle the watchdog input (WDI) within 1.6sec,
a reset pulse is triggered. The internal 1.6sec timer is
cleared by either a reset pulse or by a transition (low-to-
high or high-to-low) at WDI. If WDI is tied high or low, a
The PFI input is compared to an internal reference. If
PFI is less than V , PFO goes low. The power-fail
comparator is intended for use as an undervoltage
detector to signal a failing power supply. However,
the comparator does not need to be dedicated to this
function because it is completely separate from the rest
of the circuitry.
PFT
RESET pulse is triggered every 1.8sec (t
plus t ).
WD
RS
As long as reset is asserted, the timer remains cleared
and does not count. As soon as reset is deasserted, the
timer starts counting. Unlike the 5V MAX690 family, the
watchdog function cannot be disabled.
The power-fail comparator turns off and PFO goes low
when V
falls below V
on power-down. The power-
CC
SW
fail comparator turns on as V
crosses V
on power-
SW
CC
up. If the comparator is not used, connect PFI to ground
and leave PFO unconnected. PFO can be connected to
MR on the MAX704_/MAX806_ so that a low voltage on
PFI will generate a reset (Figure 5b).
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MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
Backup-Battery Switchover
Applications Information
In the event of a brownout or power failure, it may be
necessary to preserve the contents of RAM. With a back-
up battery installed at VBATT, the devices automatically
These µP supervisory circuits are not short-circuit
protected. Shorting V to ground—excluding power-up
OUT
transients such as charging a decoupling capacitor—
switch RAM to backup power when V
falls.
destroys the device. Decouple both V and VBATT
CC
CC
pins to ground by placing 0.1µF capacitors as close as
possible to the device.
This family of µP supervisors (designed for 3.3V and 3V
systems) doesn’t always connect VBATT to V when
OUT
VBATT is greater than V . VBATT connects to V
CC
OUT
and
Using a SuperCap as a Backup Power Source
(through a 140Ω switch) when V
is below V
CC
SW
SuperCaps are capacitors with extremely high capaci-
tance values (e.g., order of 0.47F) for their size. Figure 3
shows two ways to use a SuperCap as a backup power
source. The SuperCap may be connected through a
diode to the 3V input (Figure 3a) or, if a 5V supply is also
available, the SuperCap may be charged up to the 5V
supply (Figure 3b) allowing a longer backup period. Since
VBATT is greater than V , or when V
falls below
CC
CC
1.75V (typ) regardless of the VBATT voltage. This is done
to allow the backup battery (e.g., a 3.6V lithium cell) to
have a higher voltage than V
.
CC
Switchover at V
(2.40V) ensures that battery-backup
SW
mode is entered before V
gets too close to the 2.0V
OUT
minimum required to reliably retain data in CMOS RAM.
Switchover at higher V voltages would decrease
VBATT can exceed V
while V
is a bove the reset
CC
CC
CC
threshold, there are no special precautions when using
these µP supervisors with a SuperCap.
backup-battery life. When V
recovers, switchover is
CC
deferred until V
rises above the reset threshold (V
)
CC
RST
Operation without a Backup Power Source
to ensure a stable supply. V
is connected to V
OUT
CC
through a 3Ω PMOS power switch.
These µP supervisors were designed for battery-backed
applications. If a backup battery is not used, connect both
Manual Reset
VBATT and V
to V , or use a different µP supervisor
OUT
CC
A logic low on MR asserts reset. Reset remains asserted
while MR is low, and for t (200ms) after MR returns
such as the MAX706T/S/R or MAX708T/S/R.
WP
Replacing the Backup Battery
high. This input has an internal 70µA pullup current, so it
can be left open if it is not used. MR can be driven with
TTL or CMOS logic levels, or with open-drain/collector
outputs. Connect a normally open momentary switch from
MR to GND to create a manual-reset function; external
debounce circuitry is not required.
The backup power source can be removed while V
CC
remains valid, if VBATT is decoupled with a 0.1µF
capacitor to ground, without danger of triggering RESET/
RESET. As long as V
stays above V , battery-back-
up mode cannot be entered.
CC
SW
Adding Hysteresis to the Power-Fail
Comparator
The power-fail comparator has a typical input hysteresis
of 10mV. This is sufficient for most applications where a
power-supply line is being monitored through an external
voltage divider (see the Monitoring an Additional Power
Supply section).
Table 1. Input and Output Status in
Battery-Backup Mode
PIN NAME
STATUS
Connected to VBATT through an internal
140Ω switch
V
OUT
V
Disconnected from V
OUT
CC
If additional noise margin is desired, connect a resistor
between PFO and PFI as shown in Figure 4a. Select the
The power-fail comparator is disabled when
PFI
ratio of R1 and R2 such that PFI sees 1.237V (V
)
V
< V
PFT
CC
SW
when V falls to its trip point (V
hysteresis and will typically be more than 10 times the
value of R1 or R2. The hysteresis window extends both
). R3 adds the
IN
TRIP
Logic low when V
< V
or PFI < V
PFO
CC
SW PFT
WDI
The watchdog timer is disabled
Disabled
MR
above (V ) and below (V ) the original trip point (V ).
H
L
TRIP
Low logic
RESET
RESET
VBATT
Connecting an ordinary signal diode in series with R3, as
shown in Figure 4b, causes the lower trip point (V ) to
High impedance
L
Connected to V
OUT
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MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
3.0V OR 3.3V
+5V
3.0V OR
3.3V
V
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
V
TO STATIC
RAM
V
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
V
TO STATIC
RAM
CC
OUT
CC
OUT
1N4148
1N4148
0.47F
VBATT
RESET
(RESET)
TO µP
VBATT
RESET
(RESET)
TO µP
0.47F
GND
GND
a
b
(
) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
Figure 3. Using a SuperCap as a Backup Power Source
coincide with the trip point without hysteresis (V
), so
. This
Negative-Going V
While issuing resets to the µP during power-up, power-
down, and brownout conditions, these supervisors are
Transients
TRIP
CC
the entire hysteresis window occurs above V
TRIP
method provides additional noise margin without com-
promising the accuracy of the power-fail threshold when
the monitored voltage is falling. It is useful for accurately
detecting when a voltage falls past a threshold.
relatively immune to short-duration negative-going V
CC
transients (glitches). It is usually undesirable to reset the
µP when V experiences only small glitches.
CC
The current through R1 and R2 should be at least 1µA
to ensure that the 25nA (max over extended temperature
range) PFI input current does not shift the trip point. R3
should be larger than 10kΩ so it does not load down the
PFO pin. Capacitor C1 adds additional noise rejection.
Figure 7 shows maximum transient duration vs. reset-
comparator overdrive, for which reset pulses are not
generated. The graph was produced using negative-going
V
pulses, starting at 3.3V and ending below the reset
CC
threshold by the magnitude indicated (reset comparator
overdrive). The graph shows the maximum pulse width a
Monitoring an Additional Power Supply
negative-going V
transient may typically have without
CC
These µP supervisors can monitor either positive or
negative supplies using a resistor voltage divider to
PFI. PFO can be used to generate an interrupt to the
µP (Figure 5). Connecting PFO to MR on the MAX704
and MAX806 causes reset to assert when the monitored
supply goes out of tolerance. Reset remains asserted
as long as PFO holds MR low, and for 200ms after PFO
goes high.
causing a reset pulse to be issued. As the amplitude of
the transient increases (i.e., goes farther below the reset
threshold), the maximum allowable pulse width decreas-
es. Typically, a V
transient that goes 100mV below the
CC
reset threshold and lasts for 40µs or less will not cause a
reset pulse to be issued.
A 100nF bypass capacitor mounted close to the V
provides additional transient immunity.
pin
CC
Interfacing to µPs with Bidirectional Reset
Pins
µPs with bidirectional reset pins, such as the Motorola
68HC11 series, can contend with the MAX690_/MAX704_/
MAX802_/MAX806_ RESET output. If, for example, the
RESET output is driven high and the µP wants to pull it
low, indeterminate logic levels may result. To correct this,
connect a 4.7kΩ resistor between the RESET output and
the µP reset I/O, as in Figure 6. Buffer the RESET output
to other system components.
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MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
V
IN
V
IN
R
R
1
2
V
V
R
R
CC
CC
1
2
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
PFI
PFI
R
3
R
3
C1*
C1*
PFO
PFO
GND
GND
*OPTIONAL
*OPTIONAL
TO µP
TO µP
PFO
0V
PFO
V
0V
V
IN
IN
V
TRIP
V
H
V
L
V
H
0V
0V
V
TRIP
R + R
1
2
(
)
R + R
1
V
V
= V
PFT
2
TRIP
R
2
V
= V
PFT
(
)
TRIP
WHERE V
V
)
= 1.237V
= 10mV
R
2
PFT
PFH
1
1
1
(V
CC -
R
V )
D
+
+
–
= R (V
1
+ V
)
1
1
1
+
(
)
H
PFT
PFH
V
= (V
+ V ) (R )
H
PFT
PFH
1
R
R
R
+
(
1
2
3
3
R
R
R
1
2
3
WHERE V
V
= 1.237V
= 10mV
PFT
PFH
1
1
1
V
CC
+
+
–
V = R
V
PFT
(
)
L
1
R
R
R
R
3
1
2
3
V
V
= DIODE FORWARD VOLTAGE DROP
D
a
b
= V
L
TRIP
Figure 4. a) Adding Additional Hysteresis to the Power-Fail Comparator b) Shifting the Additional Hysteresis above V
PFT
V
IN
3.0V OR 3.3V
3.0V OR 3.3V
V
V
CC
CC
R
R
R
R
1
1
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
PFI
PFO
PFI
PFO
2
2
*
MR
GND
GND
V-
V
V
CC
CC
PFO
PFO
V
V-
IN
V
V
V
2
V
H
L
TRIP
0V
TRIP
1
1
V
CC
R + R
1
2
+
–
V
= R (V
PFT
+ V
)
* MAX704T/S/R,
MAX806T/S/R ONLY
TRIP
2
PFH
V
= V
PFT
(
)
TRIP
(
)
1
R
R
R
1
1
2
R
2
WHERE V
= 1.237V
= 10mV
PFT
1
1
V
CC
V
R + R
PFH
+
–
V = R (V
)
L
2
PFT
V
= (V
PFT
+ V
)
(
)
H
PFH
(
)
R
1
R
R
1
2
NOTE: V
IS NEGATIVE
R
2
TRIP
a
b
Figure 5. Using the Power-Fail Comparator to Monitor an Additional Power Supply
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MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
Typical Operating Circuits (continued)
BUFFERED RESET TO OTHER SYSTEM COMPONENTS
3.0V OR 3.3V
V
OUT
V
RAM
CC
V
CC
V
CC
VBATT
MAX704T/S/R
MAX806T/S/R
0.1µF
µP
0.1µF
3.6V
0.1µF
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX806T/S/R
4.7kΩ
RESET
RESET
MR
RESET
PFI
µP
GND
GND
GND
Figure 6. Interfacing to μPs with Bidirectional Reset I/O
Chip Topography
V
VBATT
OUT
100
80
V
CC
V
CC
= 3.3V
T
A
= +25°C
60
40
20
0
0.110"
GND
(2.794mm)
RESET
(RESET)
WDI
[MR]
10
100
1000
- V ) (mV)
RESET COMPARATOR OVERDRIVE (V
RST
CC
Figure 7. Maximum Transient Duration without Causing a
Reset Pulse vs. Reset Comparator Overdrive
PFI PFO
0.080"
Chip Information
(2.032mm)
TRANSISTOR COUNT: 802;
SUBSTRATE IS CONNECTED TO THE HIGHER OF
( ) ARE FOR MAX804T/S/R, MAX805T/S/R.
[ ] ARE FOR MAX704T/S/R, MAX806T/S/R.
V
CC
OR VBATT, AND MUST BE FLOATED IN ANY
HYBRID DESIGN.
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MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
Pin Configuration
Ordering Information (continued)
TOP VIEW
PART**
TEMP RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
PIN-PACKAGE
8 Plastic DIP
8 SO
V
1
2
3
4
8
7
6
5
VBATT
OUT
MAX690T/S/R
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
MAX805T/S/R
MAX806T/S/R
MAX704_CPA
MAX704_CSA
MAX704_C/D
MAX704_EPA
MAX704_ESA
MAX704_MJA
MAX802_CPA
MAX802_CSA
MAX802_C/D
MAX802_EPA
MAX802_ESA
MAX802_MJA
MAX804_CPA
MAX804_CSA
MAX804_C/D
MAX804_EPA
MAX804_ESA
MAX804_MJA
MAX805_CPA
MAX805_CSA
MAX805_C/D
MAX805_EPA
MAX805_ESA
MAX805_MJA
MAX806_CPA
MAX806_CSA
MAX806_C/D
MAX806_EPA
MAX806_ESA
MAX806_MJA
V
RESET (RESET)
WDI <MR>
PFO
CC
GND
PFI
Dice*
8 Plastic DIP
8 SO
DIP/SO
( ) ARE FOR MAX804T/S/R, MAX805T/S/R
< > ARE FOR MAX704T/S/R, MAX806T/S/R
8 CERDIP
8 Plastic DIP
8 SO
Package Information
Dice*
For the latest package outline information and land patterns, go
to www.maximintegrated.com/packages. Note that a “+”, “#”,
or “-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
8 Plastic DIP
8 SO
8 CERDIP
8 Plastic DIP
8 SO
PACKAGE
TYPE
PACKAGE e
CODE
OUTLINE
NO.
LAND
PATTERN NO.
Dice*
8 Plastic DIP
8 SO
8 PDIP
8 CDIP
8 SOIC
P8+2
J8+2
S8+4
21-0043
21-0045
21-0041
—
—
8 CERDIP
8 Plastic DIP
8 SO
90-0096
Dice*
8 Plastic DIP
8 SO
8 CERDIP
8 Plastic DIP
8 SO
Dice*
8 Plastic DIP
8 SO
8 CERDIP
*Contact factory for dice specifications.
**These parts offer a choice of reset threshold voltage. Select
the letter corresponding to the desired nominal reset threshold
voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into
the blank to complete the part number.
Devices in PDIP and SO packages are available in both leaded
and lead(Pb)-free packaging. Specify lead free by adding the +
symbol at the end of the part number when ordering. Lead free
not available for CERDIP package.
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MAX690T/S/R, MAX704T/S/R,
MAX802T/S/R, MAX804−MAX806T/S/R
3.0V/3.3V Microprocessor
Supervisory Circuits
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
No /V OPNs in Ordering Information; deleted Automotive Systems in Applications
Information section; added Package Information and Revision History tables
3
4/15
1, 12, 13
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2015 Maxim Integrated Products, Inc.
│ 13
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