MAX8900AEVKIT+ [MAXIM]
Three Status LED Indicators;
| 型号： | MAX8900AEVKIT+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Three Status LED Indicators |
| 文件： | 总15页 (文件大小：3297K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
General Description
Features
S 3.25MHz Switching Li+/Li-Poly Battery Charger
The MAX8900A evaluation kit (EV kit) is a fully assembled
and tested circuit for evaluating the MAX8900A switch-
mode Li+/Li-Poly charger with ±±±V inꢀut rating and
JEITA* battery temꢀerature monitoring. The MAX8900A
charges a 1-cell lithium-ion (Li+) or lithium-ꢀolymer
(Li-Poly) battery. The MAX8900A delivers uꢀ to 1.±A of
current to the battery from a 3.4V to 6.3V suꢀꢀly. External
resistors and ꢀotentiometers adjust the fast-charge
current and the ꢀrequalification and done current thresh-
olds. A JEITA battery temꢀerature monitor adjusts
charge current and termination voltage.
S JEITA Battery Temperature Monitor Adjusts
Charge Current and Termination Voltage
On-Board 3380K NTC Thermistor
On-Board Potentiometer Allows Easy
Evaluation
S Battery Fast-Charge Current-Limit Adjustment
Range of 50mA to 1200mA
Dynamic Charge Current Programming Using
MOSFET and Resistor Array on the EV Kit
Potentiometer Adjustment Available
S Prequalification and Done Threshold Adjustment
The MAX8900A EV kit comes with the MAX8900A
installed, but can also be used to evaluate the MAX8900B
with IC reꢀlacement of U1. Request a free samꢀle of the
MAX8900B when you order the MAX8900A EV kit.
Range of 10mA to 200mA
Dynamic Charge Current Programming Using
MOSFET and Resistor Array on the EV Kit
Potentiometer Adjustment Available
Ordering Information
S Selectable Charge Source Connector
2.1mm Barrel or Micro-USB
PART
TYPE
S Three Status LED Indicators
S Fully Assembled and Tested
MAX8900AEVKIT+
EV KIT
+Denotes lead(Pb)-free and RoHS compliant.
Figure 1. MAX8900 EV Kit Photo
*JEITA (Japan Electronics and Information Technology Industries Association) standard, “A Guide to the Safe Use of Secondary
Lithium Ion Batteries in Notebook-type Personal Computers” April 20, 2007.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-5244; Rev 0; 4/10
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
Component List
DESIGNATION QTY
DESCRIPTION
DESIGNATION QTY
DESCRIPTION
R1, R±, R3
3
4±±I Q1% resistors (040±), lead-free
0.47FF Q±0%, ±5V X5R ceramic
caꢀacitors (0603)
TDK C1608X5R1E474M
C1, C6
C±, C5
C3, C8
±
±
±
560kI Q1% resistors (040±),
lead-free
R4, R5, R6
3
R7, R±6
R8, R16
±
0
3
10kI Q1% resistors (040±), lead-free
Not installed, resistors (040±)
0.1FF Q±0%, 10V X5R ceramic
caꢀacitors (040±)
TDK C1005X5R1A104K
R9, R17, R±±
0I Q1% resistors (040±), lead-free
35.7kI Q1% resistors (040±),
lead-free
±.±FF Q±0%, 6.3V X5R ceramic
caꢀacitors (0603)
TDK C1608X5R0J±±5M
R10, R18
R11
±
1
1
3
1
9.09kI Q1% resistor (040±),
lead-free
0.47FF Q±0%, 10V X5R ceramic
caꢀacitor (040±)
TDK C1005X5R1A474M
C4
C7
C9
1
0
1
4.75kI Q1% resistor (040±),
lead-free
R1±
Not installed, caꢀacitor (0603)
100kI Q1% resistors (040±),
lead-free
R13, R14, R15
R19
1FF Q±0%, 6.3V X5R ceramic caꢀaci-
tor (040±)
TDK C1005X5R0J105M
7.68kI Q1% resistor (040±),
lead-free
3.83kI Q1% resistor (040±),
lead-free
Green LEDs
Avago Technologies HSMG-C190
R±0
R±1
1
0
±
D1, D±, D3
J1
3
1
Not installed, resistor (0603)
Male ±.1mm ꢀower connector
CUI Inc. PJ-00±A-SMT
50kI, ±5-turn ꢀotentiometers
Bourns 3±96Y-1-503LF
R±3, R±4
Not installed, 1.±5mm (0.049in) ꢀitch
header (surface-mount,
right-angle, lead-free, 10 circuits)
J±
0
±00kI, ±5-turn ꢀotentiometer
Bourns 3±96Y-1-±04LF
R±5
R±7
R±8
1
1
1
1.±1kI Q1% resistor (040±),
lead-free
Micro-USB connector
Hirose Electric ZX6±-AB-5PA
J3
1
±
5
1
1
1
±.±6kI Q1% resistor (040±),
lead-free
3-ꢀin headers, 0.1in centers
Sullins PEC36SAAN
JU1, JU±
JU3, JU6, JU7,
JU9, JU10
±-ꢀin headers, 0.1in centers
Sullins PEC36SAAN
10kI NTC thermistor (040±)
Murata NCP15XH103F03
(A = 3380K)
THRM
1
± x 4-ꢀin header, 0.1in centers
Sullins PEC36SAAN
JU4
JU5
High-frequency, switch-mode
charger (30 WLP)
Maxim MAX8900AEWV+
U1
—
—
1
1±
1
3 x 3-ꢀin header, 0.1in centers
Sullins PEC36SAAN
Shunts (see Table 1 for jumꢀer
settings)
± x 3-ꢀin header, 0.1in centers
Sullins PEC36SAAN
JU11
USB A-to-Micro-USB B, ±.0m cable
Molex 68784-0003
Digi-Key WM17147-ND
1FH, 0.055I, 1.6A chiꢀ inductor
(±.5mm x ±mm x 0.9mm)
Murata LQM±HPN1R0MGO
L1
1
3
Adjustment tool
Bourns H-90
Digi-Key H90-ND
±0V, ±38mA n-channel MOSFETs
(SC-75)
ON Semi NTA4001NT1G
—
—
1
1
M1, M±, M3
PCB: MAX8900A EVALUATION KIT+
2
Maxim Integrated
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
Component Suppliers
SUPPLIER
WEBSITE
Avago Technologies
Bourns, Inc.
www.avagotech.com
www.bourns.com
CUI Inc.
www.cui.com
Digi-Key Corꢀ.
www.digikey.com
www.hirose.com
Hirose Electric Co., Ltd.
Murata Manufacturing Co., Ltd.
ON Semiconductor
Sullins Electronics Corꢀ.
TDK Corꢀ.
www.murata.com
www.onsemi.com
www.sullinselectronics.com
www.comꢀonent.tdk.com
Note: Indicate that you are using the MAX8900A when contacting these component suppliers.
3) Connect the EV kit to the ꢀower suꢀꢀly, battery, or
ꢀreloaded ꢀower suꢀꢀly and meters, as shown in
Figure 3. Adjust the ammeters to their largest current
range to minimize their series imꢀedance. Do not
allow the ammeters to oꢀerate in their “autorange”
mode. If current readings are not desired, short
across the ammeters.
Quick Start
Recommended Equipment
•ꢀ Adjustableꢀ DCꢀ powerꢀ supplyꢀ capableꢀ ofꢀ atꢀ leastꢀ
1.±A at 6V
•ꢀ Batteryꢀorꢀsimulatedꢀbattery
1-cell Li+ or Li-Poly battery (Figure ±A)
4) Turn on the ꢀower suꢀꢀly.
Simulated battery, ꢀreloaded ꢀower suꢀꢀly
(Figure ±B)
5) If 3V ≤ V
≤ 4.1V, then verify that the current from
BAT
BAT into the battery is aꢀꢀroximately 95mA. If V
BAT
•ꢀ Digitalꢀmultimeterꢀ(DMM)
•ꢀ Twoꢀ3Aꢀammeters
is not in this sꢀecified range, refer to Figure 6 in the
MAX8900A/MAX8900B IC data sheet for more infor-
mation.
Procedure
The MAX8900A EV kit is fully assembled and tested.
Follow the steꢀs below to verify board oꢀeration. Use
twisted wires of aꢀꢀroꢀriate gauge (±0AWG) that are
as short as ꢀossible to connect the battery and ꢀower
sources.
B. SIMULATED BATTERY
(PRELOADED POWER SUPPLY)
A. Li+/Li-POLY BATTERY
BAT
BAT
0 TO 4.2V
R 2.5A
2I
R 10W
MAX8900A EV KIT
MAX8900A EV KIT
1) Ensure that the EV kit has the jumꢀer settings as
shown in Figure 3 and Table 1.
GND
GND
±) Preset the DC ꢀower suꢀꢀly to 5V. Turn off the
ꢀower suꢀꢀly. Do not turn on the ꢀower suꢀꢀly until
all connections are comꢀleted.
Figure 2. Battery Options for Evaluating the MAX8900A EV Kit
Maxim Integrated
3
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
A*
BAT
3
2
MAX8900A
EV KIT
BATTERY OR
SIMULATED
BATTERY
A*
IN
1
JU1
BAT
VOLTMETER
POWER
SUPPLY
GND
(FIGURE 2)
GND
*ADJUST THE AMMETERS TO THEIR
LARGEST CURRENT RANGE TO
MINIMIZE THEIR SERIES IMPEDANCE.
DO NOT ALLOW THE AMMETERS TO
OPERATE IN THEIR “AUTORANGE” MODE.
IF CURRENT READINGS ARE NOT
THERMISTOR
JU11
ADJ
ROOM
NTC
1 2 3
DESIRED, SHORT ACROSS THE AMMETERS.
CEN
JU2
FAST-CHARGE RATE
JU5 0 1
FC0
FC1
FC2
ADJ
JU10
JU4
100mA
50mA
10mA
ADJ
DONE/PREQUAL
THRESHOLD
Figure 3. Connection Diagram and Default Jumper Connections
Table 1. Jumper Functions
JUMPER
NODE OR FUNCTION
POSITION
Oꢀen
1-±
FUNCTION
Only the “IN” ꢀad is connected to the MAX8900A’s ꢀower inꢀut (IN).
Both the “IN” ꢀad and J3 are connected to IN.
Both the “IN” ꢀad and J1 are connected to IN.
Charger is disabled (logic-high).
JU1
IN inꢀut selector
±-3*
1-±
JU±
JU3
CEN
±-3*
Charger is enabled (logic-low).
1-±*
D1 LED indicator is connected to STAT1.
D1 LED indicator is not connected to STAT1.
STAT1 outꢀut
Oꢀen
Adjustable setting. R±3 (50kI ꢀotentiometer) and R±7 are
connected to DNI.
1-±
DONE/PREQUAL
THRESHOLD adjustment
JU4
3-4
5-6*
7-8
10mA setting. R18 (35.7kI) is connected to DNI.
50mA setting. R19 (7.68kI) is connected to DNI.
100mA setting. R±0 (3.83kI) is connected to DNI.
Gate of M1 driven high. R10 (35.7kI) is connected to SETI, which
increases the fast-charge current setting by 95mA.
1-±*
±-3
Gate of M1 driven low. R10 is disconnected from SETI.
Gate of M± driven high. R11 (9.09kI) is connected to SETI, which
increases the fast-charge current setting by 375mA.
4-5
FAST-CHARGE RATE
adjustment
JU5
5-6*
7-8
Gate of M± driven low. R11 is disconnected from SETI.
Gate of M3 driven high. R1± (4.75kI) is connected to SETI, which
increases the fast-charge current setting by 717mA.
8-9*
Gate of M3 driven low. R1± is disconnected from SETI.
*Default position.
4
Maxim Integrated
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
Table 1. Jumper Functions (continued)
JUMPER
NODE OR FUNCTION
POSITION
1-±*
FUNCTION
D± LED indicator is connected to STAT±.
D± LED indicator is not connected to STAT±.
D3 LED indicator is connected to STAT3.
D3 LED indicator is not connected to STAT3.
JU6
STAT± outꢀut
Oꢀen
1-±*
JU7
JU9
STAT3 outꢀut
LOGIC
Oꢀen
Connects VBAT to LOGIC. LOGIC serves as the ꢀulluꢀ node for the
STAT_ indicator LED. Pin 1 of JU± connects to LOGIC.
1-±*
LOGIC must be suꢀꢀlied by an indeꢀendent ꢀower suꢀꢀly that is
less than 5V.
Oꢀen
1-±
Adjustable setting R±4 (50kI ꢀotentiometer) and R±8 are
connected to SETI.
FAST-CHARGE RATE R±4
(ꢀotentiometer) connection
JU10
Oꢀen*
1-±
R±4 and R±8 are not connected to SETI.
NTC is connected to THM.
JU11
Thermistor adjustment
3-4*
5-6
R±6 is connected to THM.
R±5 (±00kI ꢀotentiometer) is connected to THM.
*Default position.
Setting the Prequalification Current
and Done Threshold (DNI)
As shown in Figure 3, several different resistor values can
be connected from DNI to ground by using jumꢀer JU4.
The resistance from DNI to ground sets the ꢀrequalifica-
Detailed Hardware Description
Input Power Connection
Two inꢀut ꢀower connectors are ꢀrovided on the EV kit.
J1 is a ±.1mm ꢀower connector and J3 is a Micro-USB
connector. Shunting ꢀins 1-± of jumꢀer JU1 connects
J1 to IN on the MAX8900A. Shunting ꢀins ±-3 of JU1
connects J3 to IN on the MAX8900A. The IN ꢀad next to
JU1 is always connected and can be used to measure
the voltage on JU1 or JU3, or used as an inꢀut only.
tion current (I ) and done current (I ). The MAX8900A
PQ
DN
suꢀꢀorts I
and I
currents from 10mA to ±00mA.
DN
PQ
Table 3 shows the I
and I
values that are easily
PQ
DN
attained with the EV kit. The relationshiꢀ between R
,
DNI
I
, and I
DN
is as follows:
PQ
Charger Input Enable (CEN)
CEN is a digital inꢀut. Driving CEN (JU±) high (ꢀins 1-±)
disables the battery charger. Driving CEN (JU±) low
(ꢀins ±-3) enables the MAX8900A. Leaving CEN (JU±)
unconnected (ꢀins oꢀen) also enables the charger.
I
= 384V/R
= 415V/R
DN
DNI
I
PQ
DNI
Thermistor (THM)
The MAX8900A adjusts the charge current and termi-
nation voltage, as described in the JEITA sꢀecification
for safe use of secondary lithium-ion batteries (A Guide
to the Safe Use of Secondary Lithium Ion Batteries in
Notebook-type Personal Computers, Aꢀril ±0, ±007).
The temꢀerature thresholds are exꢀlained in detail in the
MAX8900A/MAX8900B IC data sheet.
Setting the Fast-Charge
Current Limit (SETI)
As shown in Figure 3, MOSFET and resistor combina-
tions adjust the total resistance from SETI to ground.
The MAX8900_ suꢀꢀorts values of fast-charge current
(I ) from 50mA to 1±00mA. Table ± shows the I
FC
FC
The EV kit includes four oꢀtions for thermistor evaluation:
values that are easily obtainable by adjusting jumꢀers JU5
and JU10. The relationshiꢀ between R
follows:
and I is as
SETI
FC
1) Disable thermistor (JU11 = Pins 3-4): Biases THM
at AVL/±, which the MAX8900A interꢀrets as the
battery temꢀerature at +±5°C.
I
= 3405V/R
SETI
FC
Maxim Integrated
5
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
±) Ambient temꢀerature monitor (JU11 = Pins 1-±):
Connects the on-board thermistor (THRM), which
is a 10kI NTC thermistor (β = 3380K), allowing
ambient temꢀerature monitoring.
The toꢀ-off time (t ) is fixed at 16s:
TO
t
= 16s
TO
Connect CT to GND to disable the ꢀrequalification
and fast-charge timers. With the internal timers of the
MAX8900A disabled, an external device such as a
microꢀrocessor (µP) can control the charge time through
the CEN inꢀut.
3) Potentiometersimulation(JU11=ꢀins5-6): Connects
a ±00kI ꢀotentiometer (R±5), allowing user adjust-
ment of V
to quickly evaluate all thermistor
THM
oꢀerating regions.
4) Battery ꢀack (JU11 = Oꢀen): Leaves JU11 oꢀen
such that the EV kit user can wire the THM ꢀad
directly to the battery ꢀack's internal thermistor for
“true” battery temꢀerature monitoring.
Status Outputs
STAT_ includes ꢀulluꢀ resistors R4, R5, and R6, which
allow voltage monitoring on the STAT_ ꢀads near the
edge of the PCB. Jumꢀers JU3, JU6, and JU7 allow the
connection of indicator LEDs D1, D±, and D3. Table 1
describes the jumꢀer connections. Tables 4 and 5 define
the status outꢀut truth tables.
Charge Timers
A fault timer ꢀrevents the battery from charging
indefinitely. The ꢀrequalification and fast-charge timers
are controlled by the caꢀacitance at C : C4.
CT
When evaluating the MAX8900A, STAT3 ꢀulls low when
the battery-temꢀerature monitor detects that the battery
temꢀerature is greater than the T4 threshold; otherwise,
STAT3 is high imꢀedance. Some systems may want to
reduce the battery loading when STAT3 ꢀulls low to ꢀre-
vent the battery from getting excessively hot.
C
CT
0.1µF
t
= 30min×
PQ
C
CT
0.1µF
t
=180min ×
FC
Table 2. Fast-Charge Current-Limit Settings
JU5
(FC0)
JU5
(FC1)
JU5
(FC2)
JU10
(ADJ)
RESISTORS CONNECTED IN
PARALLEL FROM SETI TO
GROUND
TOTAL
RESISTANCE
(I)
I *
FC
(mA)
1-2
2-3
(0)
4-5
5-6
(0)
7-8
8-9
(0)
1-2
(1)
—
O
(1)
—
—
O
(1)
—
—
—
—
O
O
—
O
O
O
O
O
O
O
O
O
O
O
O
O
R10, R11, R1±
R11, R1±
R10, R1±
R1±
±869
31±0
419±
4750
7±45
9090
35700
Oꢀen
1187
1091
81±
717
470
375
95
—
O
—
—
O
O
—
O
O
O
—
O
—
—
O
—
—
—
—
R10, R11
R11
—
O
O
O
—
O
—
—
O
R10
—
O
O
—
0
Adjustable
5±±60 to ±±60
Adjustable
65.± to 1507**
O
—
O
—
O
—
—
R±4 + R±8
Note: ( ) = Parenthetic items reference the silkscreen.
— = Contact closed (i.e., shunt installed).
O = Contact open (i.e., shunt not installed).
*Current values shown assume T2 < THM < T4.
**Device rated up to 1200mA.
6
Maxim Integrated
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
Table 3. Prequalification and Done Current-Limit Settings
JU4
RESISTANCE (kI)
I
(mA)
I
(mA)*
PQ
DN
1-2
3-4
5-6
7-8
R±7 + R±3
(51.±1 to 1.±1)
Adjustable
8.1 to 343**
Adjustable
7.5 to 317**
—
O
O
O
O
O
O
—
O
O
O
—
O
O
O
R18 (35.7)
R19 (7.68)
R±0 (3.83)
10.76
50.00
11.63
54.04
—
100.±6
108.36
Note: — = Contact closed (i.e., shunt installed).
O = Contact open (i.e., shunt not installed).
*Current values shown assume T2 < THM < T4.
**Device rated for 9.8mA to 200mA.
Table 4. MAX8900A 2-Pin Status Output Truth Table
STAT1
STAT2
PAD
INDICATION
PAD
D1
D2
0
On
0
On
Undefined
Charging (dead-battery state or dead battery and ꢀrequalification state or
ꢀrequalification state or fast-charge state)
0
On
1
Off
1
1
Off
Off
0
1
On
Off
Timer fault or V > V
or battery cold (THM < T1) or battery hot (THM > T4)
IN
OVLO
Done state or CEN = 1 or V < V
or V < (V
+ V ) or thermal shutdown
IN±BAT
IN
UVLO
IN
BAT
Note: STAT1 and STAT2 are open-drain outputs. 0 indicates that the output device is pulling low; 1 indicates that the output is
high impedance.
Table 5. MAX8900B 3-Pin Status Output Truth Table
STAT1
STAT2
PAD
STAT3
PAD
INDICATION
PAD
D1
On
On
D2
On
On
D3
On
Off
0
0
0
0
0
1
Battery cold (THM < T1)
V
IN
> V
OVLO
Charging (dead-battery state or dead battery and ꢀrequalification state
or ꢀrequalification state or fast-charge state)
0
On
1
Off
0
On
0
1
1
1
1
On
Off
Off
Off
Off
1
0
0
1
1
Off
On
On
Off
Off
1
0
1
0
1
Off
On
Off
On
Off
Battery hot (THM >T4)
Done state
Undefined
Timer fault
V
IN
< V
or CEN = 1 or V < (V
+ V
) or thermal shutdown
UVLO
IN
BAT
IN±BAT
Note: STAT1, STAT2, and STAT3 are open-drain outputs. 0 indicates that the output device is pulling low; 1 indicates that the
output is high impedance.
Maxim Integrated
7
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
1) When the steꢀ-down converter’s high-side MOSFET
turns on, C delivers a high di/dt current ꢀulse
PCB Layout Guidelines
The MAX8900_ wafer-level ꢀackage (WLP) and bumꢀ
configuration allows for a small-size, low-cost PCB
design. Figure 4 shows that the 30 bumꢀs on the
MAX8900_ WLP are combined into 18 functional nodes.
The bumꢀ configuration ꢀlaces all like nodes adjacent
to each other to minimize the area required for routing.
The bumꢀ configuration also allows for a layout that
does not use any vias within the WLP bumꢀ matrix (i.e.,
no micro vias). To utilize this no-via layout, CEN is left
unconnected and the STAT3 ꢀin is not used (±-ꢀin status
version). Note that although layouts without micro vias
are ꢀossible, this EV kit uses filled micro vias that are
on the WLP ꢀads of the MAX8900A (A±, A5, A6, B±, C±,
D±, and E6). These filled micro vias on ꢀads were used
to showcase the small solution size.
INBP
to INBP. Because of this high di/dt current ꢀulse,
ꢀlace C close to INBP to minimize the ꢀarasitic
INBP
imꢀedance in the PCB trace.
±) When the steꢀ-down converter is increasing the
current in the inductor, the high-side MOSFET is on
and current flows in the following ꢀath: from C
INBP
into INBP out of LX through the inductor
into CS out of BAT through C and back
BAT
to C
through the ground ꢀlane. This current
INBP
looꢀ should be keꢀt small and the electrical length
from the ꢀositive terminal of C to INBP should
INBP
be keꢀt short to minimize ꢀarasitic imꢀedance. The
electrical length from the negative terminal of C
BAT
to the negative terminal of C
should be short
INBP
to minimize ꢀarasitic imꢀedance. Keeꢀ all sensi-
tive signals such as feedback nodes or audio lines
outside of this current looꢀ with as much isolation as
your design allows.
Figure 5 shows the recommended land ꢀattern for the
MAX8900_. Figure 6 shows the bumꢀ cross section of
the MAX8900_ under-bumꢀ metal (UBM). The diameter
of each ꢀad in the land ꢀattern is close to the diameter
of the UBM. This land ꢀattern to UBM relationshiꢀ is
imꢀortant to get ꢀroꢀer reflow of each solder bumꢀ. Note
that although layouts without micro vias are ꢀossible, this
EV kit uses filled micro vias that are on the WLP ꢀads of
the MAX8900A (A±, A5, A6, B±, C±, D±, and E6). These
filled micro vias on ꢀads were used to showcase the
small solution size.
3) When the steꢀ-down converter is decreasing the
inductor current, the low-side MOSFET is on and
the current flows in the following ꢀath: out of LX
through the inductor into CS out of BAT
through C
into PGND out of LX again. This
BAT
current looꢀ should be keꢀt small and the electrical
length from the negative terminal of C to PGND
BAT
should be short to minimize ꢀarasitic imꢀedance.
Keeꢀ all sensitive signals such as feedback nodes
or audio lines outside of this current looꢀ with as
much isolation as your design allows.
Underfill is not necessary for the MAX8900_ WLP to
ꢀass the JESD±±-B111 Board Level Droꢀ Test Method
for Handheld Electronic Products. JESD±±-B111 cov-
ers end aꢀꢀlications such as cell ꢀhones, PDAs, cam-
eras, and other ꢀroducts that are more ꢀrone to being
droꢀꢀed during their lifetime due to their size and
weight. Consider using underfill for aꢀꢀlications that
require higher reliability than what is covered in the
JESD±±-B111 standard.
4) The LX node voltage switches between INBP and
PGND during the oꢀeration of the steꢀ-down con-
verter. Minimize the stray caꢀacitance on the LX
node to maintain good efficiency. Also, keeꢀ all
sensitive signals such as feedback nodes or audio
lines away from LX with as much isolation as your
design allows.
Careful ꢀrinted circuit layout is imꢀortant for minimizing
ground bounce and noise. Figure 4 is an examꢀle layout
of the critical ꢀower comꢀonents for the MAX8900_. The
arrangement of the comꢀonents that are not shown in
Figure 4 is less critical. Figures 8–10 show the entire lay-
out of the MAX8900A EV kit and Table 6 shows the EV kit
construction attributes. To ensure a successful layout for
the MAX8900A, use the following list of guidelines and
refer to Aꢀꢀlication Note 1891: Wafer-Level Packaging
(WLP) and Its Applications, which is available at
www.maximintegrated.com.
5) In Figure 4, the CS node is connected to the second
layer of metal with vias. Use low-imꢀedance vias
caꢀable of handling 1.5A of current. Also, keeꢀ
the routing inductor current ꢀath on layer ± just
underneath the inductor current ꢀath on layer 1 to
minimize imꢀedance.
6) Both C
and C
deliver current ꢀulses for the
PVL
BST
MAX8900_’s MOSFET drivers. These comꢀonents
should be ꢀlaced as shown in Figure 4 to minimize
ꢀarasitic imꢀedance.
The following guidelines are listed in order of imꢀor-
tance, with the most imꢀortant elements listed first:
8
Maxim Integrated
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
7) Each of the MAX8900_ WLP bumꢀs have aꢀꢀroxi-
check the solder-mask oꢀenings on the PCB Gerber files
before ordering boards because some PCB layout tools
have configuration settings that automatically oversize
solder-mask oꢀenings. Also, give sꢀecial instruction
in your PCB construction attributes (Table 6) that the
BGA solder mask under the MAX8900A should not be
modified by the board manufacturer. Occasionally,
oꢀtimization tools are used at the PCB fabrication house
that modify solder masks. Layouts that do not use
solder-mask defined ꢀads are ꢀossible. When using
these layouts, adhere to guidelines 1–7.
mately the same ability to remove heat from the die.
Connect as much metal as ꢀossible to each bumꢀ
to minimize the θ associated with the MAX8900_.
JA
Refer to the Thermal Management section in the
MAX8900A/MAX8900B IC data sheet for more infor-
mation on θ
.
JA
In Figure 4, many of the toꢀ-layer bumꢀ ꢀads are con-
nected together in toꢀ metal. When connecting bumꢀs
together with toꢀ-layer metal, the solder mask must
define the ꢀads from 180µm to ±10µm, as shown in
Figure 5. When using solder-mask defined ꢀads, double-
EPOXY
WAFER
EPOXY
COPPER PILLAR (UBM)
F
EPOXY
COPPER PILLAR (UBM)
EPOXY
G
E
Figure 4. Power PCB Layout Example
TOP VIEW SCALE DRAWING
5x6 BUMP ARRAY (30 BUMPS)
1oz COPPPER PAD
1oz COPPPER PAD
1
2
3
4
5
6
PCB
A: FINISHED PAD DIAMETER:
180µm (min)
210µm (max)
A
B
C
D
E
E: BUMP DIAMETER: 260µm
F: COPPER PILLAR (UBM) WIDTH: 210µm
G: COPPER PILLAR PITCH: 400µm
B: PAD PITCH: 400µm
C: HEIGHT: 1.6mm
D: WIDTH: 2.0mm
C
A
B
Figure 6. Bump Cross Section and Copper Pillar Detail
A
B
D
Figure 5. Recommended Land Pattern
Maxim Integrated
9
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
Evaluating the MAX8900B
The EV kit comes with the MAX8900A installed, but
can also be used to evaluate the MAX8900B. To
evaluate the MAX8900B, carefully remove the MAX8900A
(U1) from the EV kit and reꢀlace it with a MAX8900B;
no other comꢀonent changes are required.
For guidelines on how to remove and reꢀlace the
MAX8900_, refer to the Comꢀonent Rework sec-
tion in Aꢀꢀlication Note 3377: Maxim Wafer-Level
Package Assembly Guide, which is available at
www.maximintegrated.com.
Table 6. PCB Construction Attributes
RoHS-comꢀliant FR-4 laminate
MATERIAL:
material comꢀatible with lead-free
soldering ꢀrocesses
SIZE:
4.000in x 4.000in
0.064in
THICKNESS:
LAYERS:
Two
SOLDER MASK:
Green LPI SMOBC
White (cliꢀꢀed all legends from
exꢀosed metal)
LEGENDS:
Request a free samꢀle of the MAX8900B when you order
the MAX8900A EV kit.
COPPER CLAD
FINISH:
1oz toꢀ and 1oz bottom
EV Kit I/O Pads
The EV kit has I/O ꢀads on several ꢀoints of interest
(see Figure 9: IN, BAT, GND, etc.). A ±0AWG bare wire
installed in the I/O ꢀad ꢀrovides a convenient means to
attach scoꢀe ꢀrobes or the cliꢀ leads of a ꢀower suꢀ-
ꢀly or DMM. Figure 7 shows a ±0AWG bare wire looꢀ
installed in an I/O ꢀad. Note that most ꢀroduction EV kits
are shiꢀꢀed without wire installed in the I/O ꢀads. EV kits
that have been customized or have been used for addi-
tional testing within Maxim tyꢀically have wire installed in
the I/O ꢀads.
6 mil drill and 3 mill annular ring
on toꢀ and bottom layers, filled
via (Figure 8)
VIA UNDER WLP:
10 mil drill and 5 mill annular ring
on toꢀ and bottom layers
(Figure 8)
VIA ON REMAINING
AREA OF PCB:
SPECIAL
INSTRUCTIONS
(WLP SPECIFIC):
BGA is solder-mask defined
(do not oversize during manufac-
turing)
SPECIAL
INSTRUCTIONS
(6 MIL VIAS):
Nonconductive eꢀoxy on the 6 mil
drill vias
3mil ANNULAR
RING
5mil ANNULAR
RING
6mil
DRILL
10mil
DRILL
20AWG
WIRE LOOP
I/O PAD
B. NONFILLED VIA
A. FILLED VIA
Figure 7. Wire Loop in I/O Pad Provides Convenient Attach
Point
Figure 8. Via Details
10
Maxim Integrated
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
IN
C5
0.1FF
D3
IN
1
2
3
4
5
1
2
3
A5
BST
D4
D5
D6
IN
IN
IN
JU1
J3
A3
B3
LX
LX
R21
OPEN
C1
0.47FF
25V
C7
OPEN
A4
B4
B5
B6
C3
C4
C5
C6
L1
1FH
PGND
PGND
4
1
3
2
A2
B2
CS
CS
PGND
PGND
TP1
BAT
J1
BAT
INBP
J2-10 J2
J2-9
A1
C6
0.47FF
25V
INBP
INBP
INBP
BAT
BAT
C3
2.2FF
J2-8
J2-7
J2-6
J2-5
THM
GND
LOGIC
C8
2.2FF
B1
C2
J2-4
J2-3
CEN
AVL
INBP
AVL
1
J2-2
J2-1
CEN
2
3
JU2
E5
U1
C2
CW TO INCREASE
CURRENT
0.1FF
GND1
MAX8900A
STAT1
R23
50kI
D1
C1
STAT1
STAT2
STAT3
A6
E3
PVL
CT
C9
1FF
STAT2
STAT3
R27
1.21kI
1%
D2
CT
R18
C4
0.47FF
1
2
35.7kI
D1
D2
D3
1%
R17
0I
1%
R19
7.68kI
1%
BAT
JU9
R4
560kI
1%
R1
422I
1%
R5
560kI
1%
R2
R6
R3
422I
1%
422I 560kI
1%
JU6
1%
R20
3.83kI
1%
1
2
LOGIC
JU3
JU7
R16
OPEN
E1
E6
8
JU4
7
LOGIC
R22
0I
1%
DNI
AVL
GND
R7
R9
0I
1%
10kI
1%
THM
E4
THM
E2
SETI
THM
CW TO INCREASE
TEMPERATURE
R8
OPEN
R25
200kI
6
5
R26
10kI
1%
VL
R12
4.75kI
1%
R10
R11
JU10
35.7kI 9.09kI
1%
R13
100kI
1%
R28
2.26kI
1%
1%
1
2
3
M1
R14
100kI
1%
2
1
THRM
10kI
4
5
6
JU11
M2
CW TO INCREASE
CURRENT
THERMISTOR
R15
100kI
1%
JU5
7
8
9
M3
R24
50kI
Figure 9. MAX8900A EV Kit Schematic
Maxim Integrated
11
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
Figure 10. MAX8900A EV Kit Component Placement Guide—Top Layer
12
Maxim Integrated
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
Figure 11. MAX8900A EV Kit PCB Layout—Top Layer
Maxim Integrated
13
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
Figure 12. MAX8900A EV Kit PCB Layout—Bottom Layer
14
Maxim Integrated
MAX8900A Evaluation Kit
Evaluates: MAX8900A/MAX8900B
Revision History
REVISION REVISION
PAGES
DESCRIPTION
CHANGED
NUMBER
DATE
0
4/10
Initial release
—
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
15
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±010 Maxim Integrated Products, Inc.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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