MAX9150EUI [MAXIM]

Low-Jitter, 10-Port LVDS Repeater; 低抖动, 10端口LVDS中继器
MAX9150EUI
型号: MAX9150EUI
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Low-Jitter, 10-Port LVDS Repeater
低抖动, 10端口LVDS中继器

中继器
文件: 总10页 (文件大小:205K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-1815; Rev 0; 10/00  
Low-Jitter, 10-Port LVDS Repeater  
General Description  
Features  
The MAX9150 low-jitter, 10-port, low-voltage differential  
signaling (LVDS) repeater is designed for applications  
that require high-speed data or clock distribution while  
minimizing power, space, and noise. The device  
accepts a single LVDS input and repeats the signal at  
10 LVDS outputs. Each differential output drives a total  
of 50 , allowing point-to-point distribution of signals on  
transmission lines with 100 terminations on each end.  
Ultra-Low 120ps  
(max) Total Jitter  
p-p  
(Deterministic and Random)  
100ps (max) Skew Between Channels  
Guaranteed 400Mbps Data Rate  
60µA Shutdown Supply Current  
Conforms to EIA/TIA-644 LVDS Standard  
Single +3.3V Supply  
Ultra-low 120ps (max) peak-to-peak jitter (deterministic  
and random) ensures reliable communication in high-  
speed links that are highly sensitive to timing error,  
especially those incorporating clock-and-data recovery,  
or serializers and deserializers. The high-speed switch-  
ing performance guarantees 400Mbps data rate and  
less than 100ps skew between channels while operat-  
ing from a single +3.3V supply.  
Fail-Safe Circuit Sets Output High for Undriven  
Inputs  
High-Impedance LVDS Input when V  
= 0  
CC  
Supply current at 400Mbps is 160mA (max) and is  
reduced to 60µA (max) in low-power shutdown mode.  
Inputs and outputs conform to the EIA/TIA-644 LVDS  
standard. A fail-safe feature sets the outputs high when  
the input is undriven and open, terminated, or shorted.  
The MAX9150 is available in a 28-pin TSSOP package.  
Ordering Information  
PART  
TEMP. RANGE  
PIN-PACKAGE  
MAX9150EUI  
-40°C to +85°C  
28 TSSOP  
Refer to the MAX9110/MAX9112 and MAX9111/MAX9113  
data sheets for LVDS line drivers and receivers.  
Pin Configuration  
________________________Applications  
TOP VIEW  
Cellular Phone Base Stations  
MAX9150  
Add/Drop Muxes  
DO2+  
1
2
28 DO3+  
27 DO3-  
26 DO4+  
25 DO4-  
24 DO5+  
23 DO5-  
Digital Crossconnects  
Network Switches/Routers  
Backplane Interconnect  
Clock Distribution  
DO2-  
DO1+  
DO1-  
PWRDN  
GND  
3
4
5
Typical Application Circuit  
6
RIN+  
7
22 V  
CC  
RIN-  
8
21 GND  
20 DO6+  
19 DO6-  
18 DO7+  
17 DO7-  
16 DO8+  
15 DO8-  
LVDS  
GND  
9
MAX9150  
1
R
X
100 100  
V
CC  
10  
LVDS  
100  
DO10+ 11  
DO10- 12  
DO9+ 13  
DO9- 14  
BACKPLANE  
OR CABLE  
MAX9111  
T
X
10  
R
X
100 100  
MAX9110  
MAX9111  
TSSOP  
________________________________________________________________ Maxim Integrated Products  
1
For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  
Low-Jitter, 10-Port LVDS Repeater  
ABSOLUTE MAXIMUM RATINGS  
CC  
RIN+, RIN- to GND................................................-0.3V to +4.0V  
PWRDN to GND..........................................-0.3V to (V + 0.3V)  
DO_+, DO_-...........................................................-0.3V to +4.0V  
V
to GND...........................................................-0.3V to +4.0V  
Storage Temperature.........................................-65°C to +150°C  
Maximum Junction Temperature .....................................+150°C  
Operating Temperature Range...........................-40°C to +85°C  
Lead Temperature (soldering, 10s) .................................+300°C  
CC  
Short-Circuit Duration (DO_+, DO_-) .........................Continuous  
Continuous Power Dissipation (T = +70°C)  
A
28-Pin TSSOP (derate 12.8mW/°C above +70°C) .....1026mW  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
DC ELECTRICAL CHARACTERISTICS  
(V  
= +3.0V to +3.6V, R = 50  
1ꢀ, V = 0.1V to 1.0V, V  
= V / 2 to 2.4V - V / 2 , PWRDN = high, T = -40°C to +85°C,  
A
CC  
L
| ID|  
CM | ID  
|
| ID  
|
unless otherwise noted. Typical values are at V  
= +3.3V, T = +25°C.) (Note 1)  
CC  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
2.0  
TYP  
MAX  
UNITS  
PWRDN  
Input High Voltage  
V
V
V
IH  
Input Low Voltage  
V
0.8  
15  
IL  
Input Current  
I
V
= V and 0  
CC  
-15  
µA  
IN  
IN  
LVDS INPUT  
Differential Input High Threshold  
Differential Input Low Threshold  
V
7
100  
mV  
mV  
TH  
V
-100  
-6  
-7  
TL  
PWRDN = high or low; V  
RIN-= open or RIN+= open, V  
= 2.4V,  
RIN+  
+1  
+1  
= 2.4V  
RIN-  
Single-Ended Input Current  
I
µA  
IN  
PWRDN = high or low; V  
RIN-= open or RIN+= open, V  
= 0,  
RIN+  
-18  
= 0  
RIN-  
Power-Off Single-Ended Input  
Current  
V
= 0; V  
= 2.4V, RIN-= open  
RIN+  
CC  
I
-1  
5
+12  
µA  
k
IN(OFF)  
or RIN+= open, V  
= 2.4V  
RIN-  
Differential Input Resistance  
LVDS DRIVER  
RI  
V
= +3.6V or 0, PWRDN = high or low  
CC  
DIFF  
Differential Output Voltage  
V
Figure 1  
Figure 1  
Figure 1  
Figure 1  
250  
320  
450  
25  
mV  
mV  
V
OD  
Change in VOD Between  
Complementary Output States  
V
OD  
OS  
Offset (Common-Mode) Voltage  
V
0.90  
1.25  
1.375  
25  
Change in VOS Between  
Complementary Output States  
V
mV  
OS  
Output High Voltage  
Output Low Voltage  
V
Figure 1  
Figure 1  
1.6  
V
V
OH  
V
0.7  
OL  
Differential Output Resistance  
(Note 2)  
RO  
V
= +3.6V or 0, PWRDN = high or low  
CC  
150  
240  
330  
450  
DIFF  
Differential High Output Voltage  
in Fail-Safe  
R
, R undriven with short, open, or  
IN+ IN-  
V
250  
-15  
mV  
mA  
OD+  
100 termination  
V
V
= +100mV, V  
= GND  
ID  
ID  
DO_+  
Output Short-Circuit Current  
I
SC  
= -100mV, V  
= GND  
DO_-  
2
_______________________________________________________________________________________  
Low-Jitter, 10-Port LVDS Repeater  
DC ELECTRICAL CHARACTERISTICS (continued)  
(V  
= +3.0V to +3.6V, R = 50  
1ꢀ, V = 0.1V to 1.0V, V  
= V / 2 to 2.4V - V / 2 , PWRDN = high, T = -40°C to +85°C,  
A
CC  
L
| ID|  
CM | ID  
|
| ID  
|
unless otherwise noted. Typical values are at V  
= +3.3V, T = +25°C.) (Note 1)  
CC  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
= 0, PWRDN = GND;  
CC  
V
V
_
= 3.6V or 0, DO_-= open; or  
-1  
+1  
µA  
DO +  
_ = 3.6V or 0, DO_+= open  
DO -  
Single-Ended Output High-  
Impedance Current  
I
OZ  
PWRDN = GND;  
V
V
_ = 3.6V or 0, DO_- = open; or  
DO +  
_ = 3.6V or 0, DO_+ = open  
DO -  
-1  
+1  
µA  
SUPPLY CURRENT  
DC  
100  
130  
140  
160  
60  
Supply Current (Note 2)  
Power-Down Supply Current  
I
Figure 2  
mA  
µA  
CC  
200MHz (400Mbps)  
I
PWRDN = GND  
CCZ  
AC ELECTRICAL CHARACTERISTICS  
(V  
= +3.0V to +3.6V, R = 50  
1ꢀ, C = 5pF, V = 0.2V to 1.0V, V  
= V / 2 to 2.4V - V / 2 , PWRDN = high, T = -40°C  
A
CC  
L
L
| ID|  
CM | ID  
|
| ID  
|
to +85°C, unless otherwise noted. Typical values are at V  
= +3.3V, T = +25°C.) (Notes 25)  
CC  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
Differential Propagation Delay  
High-to-Low  
t
Figures 2, 3  
Figures 2, 3  
1.6  
1.6  
2.2  
3.5  
ns  
PHLD  
PLHD  
Differential Propagation Delay  
Low-to-High  
t
2.2  
20  
40  
3.5  
120  
100  
ns  
Total Peak-to-Peak Jitter  
(Random and Deterministic)  
(Note 6)  
t
Figures 2, 3  
ps  
p-p  
JPP  
Differential Output-to-Output  
Skew (Note 7)  
t
Figures 2, 3  
Figures 2, 3  
ps  
SKOO  
Differential Part-to-Part Skew  
(Note 8)  
t
1.9  
ns  
SKPP  
Rise/Fall Time  
T
t
Figures 2, 3  
Figures 2, 3  
150  
400  
220  
450  
ps  
TLH, THL  
Maximum Input Frequency (Note 9)  
f
Mbps  
MAX  
_______________________________________________________________________________________  
3
Low-Jitter, 10-Port LVDS Repeater  
AC ELECTRICAL CHARACTERISTICS (continued)  
(V  
= +3.0V to +3.6V, R = 50  
1ꢀ, C = 5pF, V = 0.2V to 1.0V, V  
= V / 2 to 2.4V - V / 2 , PWRDN = high, T = -40°C  
A
CC  
L
L
| ID|  
CM | ID  
|
| ID  
|
to +85°C, unless otherwise noted. Typical values are at V  
= +3.3V, T = +25°C.) (Notes 25)  
CC  
A
PARAMETER  
Power-Down Time  
Power-Up Time  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
100  
UNITS  
ns  
t
t
PD  
PU  
Figures 4, 5  
100  
µs  
Note 1: Current-into-device pins is defined as positive. Current-out-of-device pins is defined as negative. All voltages are  
referenced to ground, except V , V , V , and  
V
.
TH TL OD  
OD  
Note 2: Guaranteed by design, not production tested.  
Note 3: AC parameters are guaranteed by design and characterization.  
Note 4: C includes scope probe and test jig capacitance.  
L
Note 5: Signal generator conditions, unless otherwise noted: frequency = 200MHz, 50ꢀ duty cycle, R = 50 , t = 1ns, and t =  
O
R
F
1ns (0ꢀ to 100ꢀ).  
Note 6: Signal generator conditions for t : V  
= 200mV, V = 1.2V, frequency = 200MHz, 50ꢀ duty cycle, R = 50 , t = 1ns,  
JPP OD  
OS  
O
R
and t = 1ns (0ꢀ to 100ꢀ. t  
includes pulse (duty cycle) skew.  
F
JPP  
Note 7: t  
is the magnitude difference in differential propagation delay between outputs for a same-edge transition.  
SKOO  
Note 8: t  
Note 9: Device meets V  
is the MAX - MIN differential propagation delay.  
SKPP  
|
|
and AC specifications while operating at f  
.
MAX  
OD  
Typical Operating Characteristics  
(Figure 2, V  
= +3.3V, R = 50 , C = 5pF, IV I = 200mV, V  
= 1.2V, f = 50MHz, T = +25°C, unless otherwise noted.)  
CC  
L
L
ID  
CM IN A  
DIFFERENTIAL PROPAGATION DELAY  
vs. OUTPUT LOAD  
DIFFERENTIAL PROPAGATION DELAY  
vs. SUPPLY VOLTAGE  
SUPPLY CURRENT vs. FREQUENCY  
150  
140  
130  
2.40  
2.35  
2.30  
2.25  
2.20  
2.15  
2.10  
2.40  
2.35  
2.30  
2.25  
2.20  
2.15  
2.10  
t
PLHD  
t
PLHD  
120  
110  
100  
t
PHLD  
t
PHLD  
90  
50  
60  
70  
80  
90  
100  
0.1  
1
10  
100  
1000  
3.0  
3.1  
3.2  
3.3  
(V)  
3.4  
3.5  
3.6  
INPUT FREQUENCY (MHz)  
R (  
L
)
V
CC  
4
_______________________________________________________________________________________  
Low-Jitter, 10-Port LVDS Repeater  
Typical Operating Characteristics (continued)  
(Figure 2, V  
= +3.3V, R = 50 , C = 5pF, IV I = 200 mV, V  
= 1.2V, f = 50MHz, T = +25°C, unless otherwise noted.)  
CC  
L
L
ID  
CM IN A  
DIFFERENTIAL PROPAGATION DELAY  
vs. COMMON-MODE VOLTAGE  
DIFFERENTIAL OUTPUT-TO-OUTPUT  
SKEW vs. SUPPLY VOLTAGE  
TRANSITION TIME vs. SUPPLY VOLTAGE  
2.50  
2.45  
2.40  
2.35  
2.30  
2.25  
2.20  
2.15  
2.10  
40  
30  
20  
10  
0
215  
210  
205  
200  
195  
190  
185  
H
t
G
TLH  
B
A, E  
F, I  
D
t
PLHD  
C
t
PHLD  
t
THL  
-10  
-20  
A = D02 - D01 B = D03 - D01 C = D04 - D01  
D = D05 - D01 E = D06 - D01 F = D07 - D01  
G = D08 - D01 H = D09 - D01 I = D010 - D01  
0
0.5  
1.0  
1.5  
(V)  
2.0  
2.5  
3.0  
3.1  
3.2  
3.3  
(V)  
3.4  
3.5  
3.6  
3.0  
3.1  
3.2  
3.3  
(V)  
3.4  
3.5  
3.6  
V
V
V
CC  
CM  
CC  
TRANSITION TIME vs. OUTPUT LOAD  
TRANSITION TIME vs. CAPACITANCE  
240  
600  
230  
220  
210  
200  
190  
180  
t
TLH  
500  
400  
300  
200  
100  
t
TLH  
t
THL  
t
THL  
50  
60  
70  
80  
90  
100  
5
7
9
11  
13  
15  
R (  
L
)
C (pF)  
L
DIFFERENTIAL OUTPUT vs. SUPPLY VOLTAGE  
DIFFERENTIAL OUTPUT vs. OUTPUT LOAD  
335  
570  
520  
470  
420  
370  
320  
270  
330  
325  
320  
315  
310  
3.0  
3.1  
3.2  
3.3  
(V)  
3.4  
3.5  
3.6  
50  
60  
70  
80  
90  
100  
V
R (  
L
)
CC  
_______________________________________________________________________________________  
5
Low-Jitter, 10-Port LVDS Repeater  
Pin Description  
PIN  
NAME  
FUNCTION  
1, 3, 11, 13,  
16, 18, 20,  
24, 26, 28  
DO2+, DO1+, DO10+,  
DO9+, DO8+, DO7+,  
DO6+, DO5+, DO4+, DO3+  
Differential LVDS Outputs. Connect a 100 resistor across each of the output  
pairs (DO_+ and DO_-) adjacent to the IC, and connect a 100 resistor at the  
input of the receiving circuit.  
2, 4, 12, 14,  
15, 17, 19,  
23, 25, 27  
DO2-, DO1-, DO10-, DO9-,  
DO8-, DO7-,  
DO6-, DO5-, DO4-, DO3-  
Power Down. Drive PWRDN low to disable all outputs and reduce supply current  
to 60µA. Drive PWRDN high for normal operation.  
5
PWRDN  
6, 9, 21  
GND  
Ground  
10, 22  
V
Power. Bypass each V  
pin to GND with 0.1µF and 1nF ceramic capacitors.  
CC  
CC  
7
8
RIN+  
RIN-  
LVDS Receiver Inputs. RIN+ and RIN- are high-impedance inputs. Connect a  
resistor from RIN+ to RIN- to terminate the input signal.  
transmission loop. Because the device switches the  
Detailed Description  
direction of current flow and not voltage levels, the out-  
put voltage swing is determined by the total value of  
the termination resistors multiplied by the output cur-  
rent. With a typical 6.4mA output current, the MAX9150  
produces a 320mV output voltage when driving a trans-  
mission line terminated at each end with a 100 termi-  
nation resistor (6.4mA x 50 = 320mV). Logic states  
are determined by the direction of current flow through  
the termination resistors.  
The LVDS interface standard is a signaling method  
intended for point-to-point communication over a con-  
trolled impedance medium, as defined by the  
ANSI/TIA/EIA-644 and IEEE 1596.3 standards. The  
LVDS standard uses a lower voltage swing than other  
common communication standards, achieving higher  
data rates with reduced power consumption while  
reducing EMI emissions and system susceptibility to  
noise.  
Fail-Safe  
Fail-safe is a receiver feature that puts the output in a  
known logic state (high) under certain fault conditions.  
The MAX9150 outputs are differential high when the  
inputs are undriven and open, terminated, or shorted  
(Table 1).  
The MAX9150 is a 400Mbps, 10-port LVDS repeater  
intended for high-speed, point-to-point, low-power  
applications. This device accepts an LVDS input and  
repeats it on 10 LVDS outputs. The device is capable of  
detecting differential signals as low as 100mV and as  
high as 1V within a 0 to 2.4V input voltage range. The  
LVDS standard specifies an input voltage range of 0 to  
2.4V referenced to ground.  
Table 1. Input/Output Function Table  
The MAX9150 outputs use a current-steering configura-  
tion to generate a 5mA to 9mA output current. This cur-  
rent-steering approach induces less ground bounce  
and no shoot-through current, enhancing noise margin  
and system speed performance. The driver outputs are  
short-circuit current limited, and are high impedance  
(to ground) when PWRDN = low or the device is not  
powered. The outputs have a typical differential resis-  
tance of 240 .  
INPUT, V  
OUTPUTS, V  
High  
ID  
OD  
+100mV  
-100mV  
Open  
Low  
High  
Short  
High  
Undriven  
Terminated  
High  
Note: V = RIN+ - RIN-, V  
= DO_+ - DO_-  
OD  
ID  
High = 450mV > V  
Low = -250mV > V  
> 250mV  
> -450mV  
OD  
OD  
The MAX9150 current-steering architecture requires a  
resistive load to terminate the signal and complete the  
6
_______________________________________________________________________________________  
Low-Jitter, 10-Port LVDS Repeater  
tend to pick up noise as common mode, which is  
Applications Information  
rejected by the LVDS receiver.  
Supply Bypassing  
Termination  
Bypass each of the V  
pins with high-frequency sur-  
CC  
Termination resistors should match the differential char-  
acteristic impedance of the transmission line. Since the  
MAX9150 has current-steering devices, an output volt-  
age will not be generated without a termination resistor.  
Output voltage levels are dependent upon the value of  
the total termination resistance. The MAX9150 pro-  
duces LVDS output levels for point-to-point links that  
are double terminated (100 at each end). With the  
typical 6.4mA output current, the MAX9150 produces  
an output voltage of 320mV when driving a transmis-  
sion line terminated at each end with a 100 termina-  
tion resistor (6.4mA x 50 = 320mV). Termination  
resistance values may range between 90 and 150 ,  
depending on the characteristic impedance of the  
transmission medium.  
face-mount ceramic 0.1µF and 1nF capacitors in paral-  
lel as close to the device as possible, with the smaller  
valued capacitor closest to the V  
pins.  
CC  
Differential Traces  
Output trace characteristics affect the performance of  
the MAX9150. Use controlled impedance traces to  
match trace impedance to both the transmission medi-  
um impedance and termination resistor. Ensure that  
noise couples as common mode by running the differ-  
ential traces close together. Reduce skew by matching  
the electrical length of the traces. Excessive skew can  
result in a degradation of magnetic field cancellation.  
Maintain the distance between the differential traces to  
avoid discontinuities in differential impedance. Avoid  
90° turns and minimize the number of vias to further  
prevent impedance discontinuities.  
Minimize the distance between the output termination  
resistor and the corresponding MAX9150 transmitter  
output. Use 1ꢀ surface-mount resistors.  
Cables and Connectors  
Transmission media should have a controlled differen-  
tial impedance of 100 . Use cables and connectors  
that have matched differential impedance to minimize  
impedance discontinuities.  
Minimize the distance between the input termination  
resistor and the MAX9150 receiver input. Use a 1ꢀ  
surface-mount resistor.  
Chip Information  
TRANSISTOR COUNT: 11,117  
Avoid the use of unbalanced cables, such as ribbon or  
simple coaxial cable. Balanced cables, such as twisted  
pair, offer superior signal quality and tend to generate  
less EMI due to canceling effects. Balanced cables  
PROCESS : CMOS  
Test Circuits and Timing Diagrams  
DO1+  
25  
MAX9150  
V
OD  
V
OS  
25  
50  
DO1-  
DO10+  
RIN+  
GENERATOR  
RIN-  
25  
25  
V
OD  
V
OS  
50  
DO10-  
Figure 1. Driver-Load Test Circuit  
_______________________________________________________________________________________  
7
Low-Jitter, 10-Port LVDS Repeater  
Test Circuits and Timing Diagrams (continued)  
C
L
5pF  
MAX9150  
DO1+  
DO1-  
R
L
50  
C
L
5pF  
50  
50  
C
L
RIN+  
RIN-  
5pF  
GENERATOR  
DO10+  
DO10-  
R
L
50  
C
L
5pF  
Figure 2. Repeater Propagation Delay and Transition Time Test Circuit  
R
IN-  
V
CM  
0
DIFFERENTIAL  
V
ID  
V
CM  
R
IN+  
t
t
PHLD  
PLHD  
80%  
80%  
50%  
O
O
t
50%  
V
DIFF  
= (V  
) - (V  
)
DO_+  
DO_-  
20%  
20%  
t
TLH  
THL  
Figure 3. Propagation Delay and Transition Time Waveforms  
8
_______________________________________________________________________________________  
Low-Jitter, 10-Port LVDS Repeater  
Test Circuits and Timing Diagrams (continued)  
C
L
5pF  
DO1+  
R
L
25  
MAX9150  
R
25  
L
1.2V  
C
L
5pF  
DO1-  
1.1V  
C
L
5pF  
RIN+  
RIN-  
DO10+  
1.0V  
1.1V  
R
L
25  
1.0V  
R
L
1.2V  
C
L
5pF  
25  
DO10-  
PWRDN  
50  
GENERATOR  
Figure 4. Power-Up/Down Delay Test Circuit  
3.0V  
O
PWRDN  
1.5V  
1.5V  
t
PD  
t
PU  
V
OH  
50%  
50%  
50%  
50%  
V
V
WHEN V = +100mV  
ID  
DO_+  
DO_-  
WHEN V = -100mV  
ID  
1.2V  
1.2V  
V
DO_+  
V
DO_-  
WHEN V = -100mV  
ID  
WHEN V = +100mV  
ID  
V
OL  
t
PU  
t
PD  
Figure 5. Power-Up/Down Delay Waveform  
_______________________________________________________________________________________  
9
Low-Jitter, 10-Port LVDS Repeater  
Package Information  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are  
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.  
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600  
© 2000 Maxim Integrated Products  
Printed USA  
is a registered trademark of Maxim Integrated Products.  

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