MAX9164ESD [MAXIM]
3.3V Single LVDS Driver/Receiver; 3.3V单路LVDS驱动器/接收器
| 型号： | MAX9164ESD |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 3.3V Single LVDS Driver/Receiver |
| 文件： | 总10页 (文件大小：237K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2738; Rev 0; 1/03
3.3V Single LVDS Driver/Receiver
General Description
Features
The MAX9164 high-speed LVDS driver/receiver is
designed specifically for low-power point-to-point appli-
cations. The MAX9164 operates from a single 3.3V
power supply, and is pin compatible with DS90LV019.
The device features an independent differential driver
and receiver.
ꢀ 3.3V Operation
ꢀ 35% Lower Power than DS90LV019
ꢀ 200Mbps Data Signaling Rate
ꢀ
ꢀ
1V Common-Mode Range
100mV Receiver Sensitivity
The MAX9164 driver output uses a current-steering
configuration to generate a 3.1mA drive current. The
driver accepts a single-ended input and translates it to
LVDS signals at speeds up to 200Mbps over con-
trolled-impedance media of approximately 100Ω. The
transmission media may be printed circuit board traces
or cables. The enable logic input, DE, is used to enable
or disable the driver.
ꢀ Flow-Through Pinout
ꢀ Receiver Output High for Open Input
Ordering Information
PART
MAX9164ESD
MAX9164EUD
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
14 SO
The MAX9164 receiver detects a differential input as
low as 100mV and translates it to single-ended output
at speeds up to 200Mbps. The enable logic input, RE,
is used to enable or disable the receiver.
14 TSSOP
Pin Configuration
Inputs and outputs conform to the ANSI TIA/EIA-644
LVDS standard. The MAX9164 is offered in 14-lead SO
and TSSOP packages, and is specified for operation
from -40°C to +85°C.
TOP VIEW
DE
DIN
1
2
3
4
5
6
7
14 V
CC
13 N.C.
12 DO+
11 DO-
10 RI+
N.C.
ROUT
N.C.
N.C.
GND
Applications
MAX9164
Cell-Phone Base Stations
Add/Drop Muxes
Digital Cross-Connects
DSLAMs
Network Switches/Routers
Backplane Interconnect
Clock Distribution
9
8
RI-
RE
SO/TSSOP
Typical Application Circuit
MAX9164
MAX9164
DO+
RI+
ROUT
DIN
100Ω
DO-
RI+
RI-
DO+
RE
DE
ROUT
DIN
DE
100Ω
RI-
DO-
RE
TABLE 2. RECEIVER FUNCTION TABLE
TABLE 1. DRIVER FUNCTION TABLE
INPUTS
RI+ - RI-
L (≤ -100mV)
OUTPUT
ROUT
INPUTS
DIN
OUTPUTS
DO+
RE
L
DE
DO-
H
L
L
H
H
L (≤ 0.8V)
L
L
H(≥ 100mV)
H
H (≥ 2.0V)
H
L
(> -100mV and < 100mV)
Undefined
H
(> 0.8V and < 2.0V) Undefined Undefined
L
H
Open
X
H
Z
L
X
Z
Z
X: High or low
Z: High impedance
X: High or low
Z: High impedance
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
3.3V Single LVDS Driver/Receiver
ABSOLUTE MAXIMUM RATINGS
CC
DO+, DO-, RI+, RI- to GND...................................-0.3V to +4.0V
DIN, ROUT, DE, RE to GND .......................-0.3V to (V + 0.3V)
Driver Short-Circuit Current .......................................Continuous
V
to GND...........................................................-0.3V to +4.0V
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
ESD Protection
CC
Continuous Power Dissipation (T = +70°C)
14-Pin SO (derate 8.3mW/°C above +70°C)................667mW
14-Pin TSSOP (derate 9.1mW/°C above +70°C) .........727mW
HBM (1.5kΩ, 100pF), DO+, DO-, RI+, RI-, DE, RE, DIN,
ROUT......................................................................> 2kV
Lead Temperature (soldering, 10s) .................................+300°C
A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
= 3.0V to 3.6V, |V | = 0.1V to 2.4V, common-mode input voltage (V ) = |V /2| to 2.4V - |V |/2, R = 100Ω 1ꢀ, T = -40°C to
CC
ID CM ID ID L A
+85°C. Typical values are at V
= 3.3V, |V | = 0.2V, V
= 1.2V, T = +25°C, unless otherwise noted.) (Notes 1, 2)
CM A
CC
ID
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SINGLE-ENDED INPUTS (DIN, DE, RE)
Input High Voltage
V
2.0
0
V
V
V
IH
CC
Input Low Voltage
V
0.8
IL
IN
Input Current
I
RE, DE, DIN = high or low
-10
-1.5
+10
µA
V
Input Diode Clamp Voltage
DRIVER OUTPUT (DO+, DO-)
Differential Output Voltage
V
I
= -18mA
CLAMP
CL
V
Figure 1
250
1.0
310
0.02
1.29
0.8
450
25
mV
mV
V
OD
Change in Magnitude of V
Between
OD
∆V
Figure 1
OD
OS
Complementary Output States
Offset Voltage
V
Figure 1
1.7
25
Change in Magnitude of V Between
OS
Complementary Output States
∆V
Figure 1
mV
OS
High-Impedance Leakage Current
Power-Off Leakage Current
I
I
DE = 0; DO+, DO- = V
or 0
CC
-1
-1
+1
+1
µA
µA
OZD
OXD
DO+, DO- = 3.6V or 0; V
= 0
CC
DO+ = 0 at DIN = V
DO- = 0 at DIN = 0
-3
-3
-10
-10
CC
Output Short-Circuit Current
Output Capacitance
I
mA
pF
OSD
Capacitance from DO+ or
DO- to 0
C
3.7
DO
RECEIVER INPUT (RI+, RI-)
Differential Input High Threshold
Differential Input Low Threshold
V
100
+10
mV
mV
TH
V
-100
-10
TL
V
= 3.6V or 0;
CC
Input Current
I
µA
pF
IN
RI+, RI- = 2.4V or 0
Input Capacitance
C
RI+ or RI- to 0
5
RI
RECEIVER OUTPUT (ROUT)
V
= 100mV
ID
Output High Voltage
V
I
I
= -400µA
2.9
-20
3.28
V
OH
OH
OL
RI+, RI- open
Output Low Voltage
V
I
= +2.0mA, V = -100mV
ID
0.025
-28
0.4
-75
V
OL
Output Short-Circuit Current
V
= +100mV, ROUT = 0
mA
OS
ID
2
_______________________________________________________________________________________
3.3V Single LVDS Driver/Receiver
DC ELECTRICAL CHARACTERISTICS (continued)
(V
= 3.0V to 3.6V, |V | = 0.1V to 2.4V, common-mode input voltage (V ) = |V /2| to 2.4V - |V |/2, R = 100Ω 1ꢀ, T = -40°C to
CC
ID CM ID ID L A
+85°C. Typical values are at V
= 3.3V, |V | = 0.2V, V
= 1.2V, T = +25°C, unless otherwise noted.) (Notes 1, 2)
CM A
CC
ID
PARAMETER
SUPPLY CURRENT
Supply Current
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
I
DE = V , RE = 0
7.4
7.4
4.4
4.4
12.5
12.5
7.0
mA
mA
mA
mA
CC
CC
Driver Supply Current
Receiver Supply Current
Disable Supply Current
I
DE = RE = V
CCD
CC
I
DE = RE = 0
CCR
I
DE = 0, RE = V
7.0
CCZ
CC
AC ELECTRICAL CHARACTERISTICS
(V
= 3.0V to 3.6V, |V | = 0.2V, V
= 1.2V, R = 100Ω 1ꢀ, C = 10pF, T = -40°C to +85°C. Typical values are at V = 3.3V,
CC
CC
ID
CM
L
L
A
|V | = 0.2V, V
ID
= 1.2V, T = +25°C, unless otherwise noted.) (Notes 3, 4, 5)
CM
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DRIVER
Differential High-to-Low Propagation Delay
Differential Low-to-High Propagation Delay
t
t
Figure 2
Figure 2
Figure 2
Figure 2
Figure 2
Figure 3
Figure 3
Figure 3
Figure 3
2.0
1.0
4.4
4.2
0.2
0.9
0.8
6.0
5.5
5.5
5.0
6.5
7.0
1.0
3.0
3.0
8.0
9.0
8.0
8.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
PHLD
PLHD
Differential Skew | t
Rise Time
- t
|
t
SKD
PHLD PLHD
t
0.2
0.2
1.5
2.5
4.0
3.8
TLHD
THLD
Fall Time
t
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
RECEIVER
t
PHZ
t
PLZ
PZH
t
t
PZL
Differential High-to-Low Propagation Delay
Differential Low-to-High Propagation Delay
t
t
Figure 4
Figure 4
Figure 4
Figure 4
Figure 4
Figure 5
Figure 5
Figure 5
Figure 5
3.0
3.0
5.4
5.3
0.14
0.8
0.4
5.4
5.1
5.4
5.1
7.0
9.0
1.5
3.0
3.0
6.0
6.0
8.0
8.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
PHL
PLH
Differential Skew | t
Rise Time
- t
|
T
PHL PLH
SK
TLH
THL
PHZ
t
t
0.15
0.15
3.0
Fall Time
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
t
t
3.0
PLZ
t
3.0
PZH
t
3.0
PZL
Note 1: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are 100ꢀ tested
at T = +25°C.
A
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to device
ground except V , V , V , V , and ∆V
.
TH TL ID OD
OD
Note 3: C includes probe and jig capacitance.
L
Note 4: AC parameters are guaranteed by design and characterization.
Note 5: Generator waveforms for all tests unless otherwise specified: f = 100MHz, Z = 50Ω, t = t = 6.0ns (0 to 3V, 0ꢀ to 100ꢀ)
0
R
F
for DE and RE, t = t = 3.0ns (0 to 3V, 0ꢀ to 100ꢀ) for DIN, and t = t = 1.0ns (|V | = 0.2V, 20ꢀ to 80ꢀ) for RI+/RI-
R
F
R
F
ID
inputs.
_______________________________________________________________________________________
3
3.3V Single LVDS Driver/Receiver
Typical Operating Characteristics
(V
= 3.3V, |V | = 0.2V, V
= 1.2V, R = 100Ω 1ꢀ, FREꢁ = 100MHz, C = 10pF, T = +25°C, unless otherwise noted.)
CC
ID
CM
L
L
A
DRIVER SUPPLY CURRENT
vs. FREQUENCY
DRIVER DIFFERENTIAL OUTPUT VOLTAGE
vs. LOAD RESISTANCE
DRIVER DIFFERENTIAL OUTPUT VOLTAGE
vs. SUPPLY VOLTAGE
13
12
11
10
9
313
460
440
420
400
380
360
340
320
300
280
260
240
220
200
180
160
312
311
310
309
308
307
306
8
7
0
25 50 75 100 125 150 175 200
FREQUENCY (MHz)
3.0
3.1
3.2
3.3
3.4
3.5
3.6
60 70 80 90 100 110 120 130 140 150
SUPPLY VOLTAGE (V)
LOAD RESISTANCE (Ω)
DRIVER SUPPLY CURRENT (I
vs. SUPPLY VOLTAGE
)
SUPPLY CURRENT (I
vs. TEMPERATURE
)
DRIVER DIFFERENTIAL PROPAGATION
DELAY vs. SUPPLY VOLTAGE
CC
CC
7.8
7.7
7.6
7.5
7.4
7.3
7.2
8.0
7.8
7.6
7.4
7.2
7.0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
DE = HIGH
RE = HIGH
DC CURRENT
DE = HIGH
RE = LOW
DC CURRENT
t
PHLD
t
PLHD
3.0
3.1
3.2
3.3
3.4
3.5
3.6
-40
-15
10
35
60
85
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
DRIVER DIFFERENTIAL PROPAGATION
DELAY vs. TEMPERATURRE
DRIVER DIFFERENTIAL SKEW
vs. SUPPLY VOLTAGE
DRIVER DIFFERENTIAL SKEW
vs. TEMPERATURE
5.5
5.0
4.5
4.0
3.5
3.0
0.23
0.22
0.21
0.20
0.19
0.18
0.17
0.35
0.30
0.25
0.20
0.15
0.10
t
PHLD
t
PLHD
-40
-15
10
35
60
85
3.0
3.1
3.2
3.3
3.4
3.5
3.6
-40
-15
10
35
60
85
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
4
_______________________________________________________________________________________
3.3V Single LVDS Driver/Receiver
Typical Operating Characteristics (continued)
(V
= 3.3V, |V | = 0.2V, V
= 1.2V, R = 100Ω 1ꢀ, FREꢁ = 100MHz, C = 10pF, T = +25°C, unless otherwise noted.)
CC
ID
CM
L
L
A
DRIVER TRANSITION TIME
vs. SUPPLY VOLTAGE
DRIVER TRANSITION TIME
vs. TEMPERATURE
DRIVER TRANSITION TIME
vs. TOTAL LOAD CAPACITANCE
1.3
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
t
TLHD
t
TLHD
t
THLD
t
THLD
t
THLD
t
TLHD
3.0
3.1
3.2
3.3
3.4
3.5
3.6
-40
-15
10
35
60
85
10
15
20
25
30
35
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
CAPACITANCE (pF)
RECEIVER OUTPUT SHORT-CIRCUIT
CURRENT vs. SUPPLY VOLTAGE
RECEIVER OUTPUT HIGH VOLTAGE
vs. SUPPLY VOLTAGE
RECEIVER OUTPUT LOW VOLTAGE
vs. SUPPLY VOLTAGE
3.7
3.6
3.5
3.4
3.3
3.2
3.1
3.0
2.9
2.8
40
35
30
25
20
15
10
5
0.029
0.028
0.027
0.026
0.025
0.024
0.023
0.022
I
= -400µA
LOAD
I
= 2mA
LOAD
V = -100mV
ID
V
ID
= +100mV
V
= +100mV
3.5 3.6
ID
0
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.0
3.1
3.2
3.3
3.4
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
RECEIVER DIFFERENTIAL PROPAGATION
DELAY vs. SUPPLY VOLTAGE
RECEIVER TRANSITION TIME
vs. TOTAL LOAD CAPACITANCE
RECEIVER DIFFERENTIAL PROPAGATION
DELAY vs. TEMPERATURE
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
3.0
2.5
2.0
1.5
1.0
0.5
0
6.00
5.75
5.50
5.25
5.00
4.75
t
PHL
t
TLH
t
PHL
t
t
THL
PLH
t
PLH
35
3.0
3.1
3.2
3.3
3.4
3.5
3.6
10
15
20
25
30
35
-40
-15
10
60
85
SUPPLY VOLTAGE (V)
CAPACITANCE (pF)
TEMPERATURE (°C)
_______________________________________________________________________________________
5
3.3V Single LVDS Driver/Receiver
Pin Description
PIN
NAME
FUNCTION
LVTTL/LVCMOS Driver Enable Input. The driver is enabled when DE is high. When DE is low,
the driver outputs, DO+ and DO-, are disabled and are high impedance.
1
DE
2
DIN
N.C.
LVTTL/LVCMOS Driver Input
No Connection. Not internally connected.
LVTTL/LVCMOS Receiver Output
Ground
3, 5, 6, 13
4
7
ROUT
GND
LVTTL/LVCMOS Receiver Enable Input. The receiver is enabled when RE is low. When RE is
high, the receiver output is disabled and is high impedance.
8
RE
9
RI-
RI+
Inverting LVDS Receiver Input. RI- has an integrated pulldown to GND.
10
11
12
14
Noninverting LVDS Receiver Input. RI+ has an integrated pullup to V
.
CC
DO-
DO+
Inverting LVDS Driver Output
Noninverting LVDS Driver Output
V
Power-Supply Input. Bypass V
to GND with 0.1µF and 0.001µF ceramic capacitors.
CC
CC
DO+
R /2
L
2.0V
0.8V
DIN
V
V
OD
OS
R /2
L
DO-
Figure 1. Differential Driver DC Test Circuit
6
_______________________________________________________________________________________
3.3V Single LVDS Driver/Receiver
C
C
L
L
RI+
PULSE
DO+
DO-
ROUT
RI-
DIN
GENERATOR
PULSE
GENERATOR
R
C
L
L
50Ω
50Ω
50Ω
3V
0V
1.5V
1.5V
1.3V
1.1V
RI-
DIN
V
ID
0V DIFF
PLH
V
= 1.2V
CM
t
t
PHLD
PLHD
RI+
DO-
DO+
V
0V
OD
t
t
PHL
V
OH
OL
80%
80%
80%
80%
1.5V
20%
1.5V
20%
V
V
OD
0V (DIFFERENTIAL)
20%
V
ROUT
OD
20%
DO+ - DO-
t
t
THL
TLH
t
t
THLD
TLHD
Figure 2. Driver Differential Propagation Delay and Transition
Time Test Circuit and Waveforms
Figure 4. Receiver Propagation Delay and Transition Time Test
Circuit and Waveforms
RI+
C
C
L
L
ROUT
DO+
DO-
RI-
C
L
500Ω
R /2
L
2.0V
0.8V
DIN
V
RE
CC
PULSE
R /2
L
1.2V
GENERATOR
DE
PULSE
GENERATOR
50Ω
50Ω
V
WHEN ROUT IS LOW,
CC
GND WHEN ROUT IS HIGH.
3V
3V
DE
1.5V
1.5V
1.5V
1.5V
0V
0V
RE
t
t
PHZ
PZH
t
t
PHZ
DO- (DIN = L)
DO+ (DIN = H)
PZH
V
OH
V
OH
ROUT
V
- 0.5V
OH
50%
1.2V
1.2V
50%
50%
50%
GND
t
t
PZL
PLZ
t
t
PZL
V
CC
PLZ
V
DO- (DIN = H)
DO+ (DIN = L)
OL
50%
50%
V
OL
V
+ 0.5V
OL
ROUT
Figure 3. Driver High-Impedance Delay Test Circuit and
Waveforms
Figure 5. Receiver High-Impedance Delay Test Circuit and
Waveforms
_______________________________________________________________________________________
7
3.3V Single LVDS Driver/Receiver
The differential output requires a termination resistor at
Detailed Description
the far end of the transmission line. This termination
resistor should match the differential impedance of the
output transmission line.
The MAX9164 high-speed LVDS driver/receiver is
designed specifically for low-power point-to-point
applications. The MAX9164 operates from a single 3.3V
power supply, and is pin compatible with the
DS90LV019. The device features an independent dif-
ferential driver and receiver.
These termination resistors are typically 100Ω. Min-
imize the distance between the input termination resis-
tor and the MAX9164 receiver input.
The MAX9164 driver outputs use a current-steering
configuration to generate a 3.1mA (typ) output current.
This current-steering approach induces less ground
bounce and no shoot-through current, enhancing noise
margin and system speed performance. The outputs
are short-circuit current limited. The MAX9164 output
requires a resistive load to terminate the signal and
complete the transmission loop. With a typical 3.1mA
output current, the MAX9164 produces a 310mV output
voltage when driving a bus terminated with a 100Ω
resistor (3.1mA x 100Ω = 310mV).
Traces, Cables, and Connectors
The characteristics of differential input and output con-
nections affect the performance of the device. Use
controlled-impedance traces, cables, and connectors
with matched characteristic impedance.
Ensure that noise couples as common mode by run-
ning the traces of a differential pair close together.
Reduce within-pair skew by matching the electrical
length of the conductors within a differential pair.
Excessive skew can result in a degradation of magnet-
ic field cancellation.
The MAX9164 receiver detects a differential input as
low as 100mV and translates it to single-ended output.
The device features input biasing that drives the output
high if the inputs are left open.
Maintain the distance between conductors within a dif-
ferential pair to avoid discontinuities in differential
impedance. Minimize the number of vias to further pre-
vent impedance discontinuities.
Power-On Reset
The power-on reset voltage of the MAX9164 is typically
2.2V. When the supply falls below this voltage, the
device is disabled and the outputs (DO+, DO-, and
ROUT) are high impedance.
Board Layout
For LVDS applications, a four-layer PC board with sep-
arate power, ground, LVDS, and logic signal layers is
recommended. Separate the LVTTL/LVCMOS and
LVDS signals to prevent coupling.
Applications Information
Power-Supply Bypassing
Chip Information
TRANSISTOR COUNT: 901
Bypass V
with high-frequency, surface-mount
CC
ceramic 0.1µF and 0.001µF capacitors in parallel as
close to the device as possible, with the smaller valued
PROCESS: CMOS
capacitor closest to V
.
CC
Termination
The MAX9164 requires an external termination resistor
at the differential input. This termination resistor should
match the differential impedance of the input transmis-
sion line.
8
_______________________________________________________________________________________
3.3V Single LVDS Driver/Receiver
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
INCHES
MILLIMETERS
DIM
A
MIN
MAX
0.069
0.010
0.019
0.010
MIN
1.35
0.10
0.35
0.19
MAX
1.75
0.25
0.49
0.25
0.053
0.004
0.014
0.007
N
A1
B
C
e
0.050 BSC
1.27 BSC
E
0.150
0.228
0.016
0.157
0.244
0.050
3.80
5.80
0.40
4.00
6.20
1.27
E
H
H
L
VARIATIONS:
INCHES
1
MILLIMETERS
DIM
D
MIN
MAX
0.197
0.344
0.394
MIN
4.80
8.55
9.80
MAX
5.00
N
8
MS012
AA
TOP VIEW
0.189
0.337
0.386
D
8.75 14
10.00 16
AB
D
AC
D
C
A
B
0 -8
e
A1
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, .150" SOIC
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0041
B
1
_______________________________________________________________________________________
9
3.3V Single LVDS Driver/Receiver
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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