MAX9321AEKA [MAXIM]
Line Transceiver;
| 型号： | MAX9321AEKA |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Line Transceiver |
| 文件： | 总9页 (文件大小：178K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2152; Rev 2; 11/02
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
General Description
Features
The MAX9321/MAX9321A are low-skew differential
receiver/drivers designed for clock and data distribu-
tion. The differential input can be adapted to accept a
ꢀ Improved Second Source of the MC10LVEP16
(MAX9321)
ꢀ +2.25V to +3.8V Differential HSTL/LVPECL
single-ended input by connecting the on-chip V sup-
BB
Operation
ply to an input as a reference voltage.
The MAX9321/MAX9321A feature ultra-low propagation
delay (172ps) and part-to-part skew (20ps) with 24mA
maximum supply current, making these devices ideal
for clock buffering or repeating. For interfacing to differ-
ential HSTL and LVPECL signals, these devices oper-
ate over a +2.25V to +3.8V supply range, allowing
high-performance clock and data distribution in sys-
tems with a nominal +2.5V or +3.3V supply. For differ-
ential LVECL operation, these devices operate from a
-2.25V to -3.8V supply. Multiple pinouts are provided to
simplify routing across a backplane to either side of a
double-sided board.
ꢀ -2.25V to -3.8V Differential LVECL Operation
ꢀ Low 17mA Supply Current
ꢀ 20ps Part-to-Part Skew
ꢀ 172ps Propagation Delay
ꢀ Minimum 300mV Output at 3GHz
ꢀ Output Low for Open Input
ꢀ ESD Protection >2kV (Human Body Model)
ꢀ On-Chip Reference for Single-Ended Input
ꢀ Available in Thermally Enhanced Exposed-Pad
Both devices are offered in space-saving 8-pin SOT23,
SO, and µMAX packages.
SO Package
Ordering Information
TEMP
RANGE
PIN-
PACKAGE
TOP
MARK
Applications
PART
Precision Clock Buffers
MAX9321EKA-T -40°C to +85°C
8 SOT23-8
8 µMAX
AALK
—
Low-Jitter Data Repeaters
MAX9321EUA*
MAX9321ESA
-40°C to +85°C
-40°C to +85°C
8 SO
—
MAX9321AEKA-T -40°C to +85°C
8 SOT23-8
8 µMAX
AAIX
—
MAX9321AEUA* -40°C to +85°C
MAX9321AESA
-40°C to +85°C
8 SO-EP**
—
*Future product—contact factory for availability.
**EP = Exposed pad.
Pin Configurations
V
Q
Q
N.C.
D
V
1
2
3
4
8
7
1
2
3
4
8
7
MAX9321
CC
CC
MAX9321
V
CC
V
CC
60kΩ
Q
V
EE
60kΩ
100kΩ
100kΩ
N.C.
Q
V
D
6
5
6
5
D
100kΩ
100kΩ
V
D
V
BB
EE
BB
V
EE
SOT23
Pin Configurations continued at end of data sheet.
µMAX/SO
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
ABSOLUTE MAXIMUM RATINGS
V
to V ..........................................................................+4.1V
Junction-to-Case Thermal Resistance
CC
EE
D or D .................................................. V - 0.3V to V
+ 0.3V
8-Pin SOT23...............................................................+80°C/W
8-Pin µMAX ................................................................+39°C/W
8-Pin SO.....................................................................+40°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-ꢁ5°C to +150°C
ESD Protection
EE
CC
D to D ................................................................................. 3.0V
Continuous Output Current.................................................50mA
Surge Output Current........................................................100mA
V
Sink/Source Current ................................................. 0.ꢁmA
BB
Junction-to-Ambient Thermal Resistance in Still Air
8-Pin SOT23.............................................................+112°C/W
8-Pin µMAX ..............................................................+221°C/W
8-Pin SO-EP ...............................................................+53°C/W
Junction-to-Ambient Thermal Resistance with
Human Body Model (D, D, Q, Q, V ).............................>2kV
BB
Soldering Temperature (10s)...........................................+300°C
500 LFPM Airflow
8-Pin SOT23...............................................................+78°C/W
8-Pin µMAX ..............................................................+155°C/W
8-Pin SO.....................................................................+99°C/W
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
- V = +2.25V to +3.8V, outputs loaded with 50Ω 1ꢀ to V
- 2.0V. Typical values are at V
- V = +3.3V, V
EE
= V
- 1V,
CC
EE
= V
CC
CC
IHD
CC
V
- 1.5V, unless otherwise noted.) (Notes 1–5)
ILD
CC
-40°C
+25°C
+85°C
PARAMETER SYMBOL
CONDITIONS
UNITS
MIN
TYP
MAX MIN
TYP
MAX MIN
TYP MAX
DIFFERENTIAL INPUT (D, D)
V
connected to D
BB
IL
Single-Ended
Input High
Voltage
V
-
V
-
V
-
CC
CC
CC
(V for V
connected to D),
Figure 1
BB
V
V
V
V
V
V
IH
CC
CC
CC
1.210
1.145
1.085
V
connected to D
BB
IH
Single-Ended
Input Low
Voltage
V
1.65
-
V
-
V
-
CC
1.485
CC
CC
(V for V
connected to D),
Figure 1
BB
V
V
V
V
IL
EE
EE
EE
1.545
High Voltage of
Differential
Input
Low Voltage of
Differential
Input
V
1.2
+
V
1.2
+
V
1.2
+
EE
EE
EE
V
V
V
V
V
V
IHD
CC
CC
CC
V
V
-
V
V
-
V
V
-
CC
0.1
CC
0.1
CC
0.1
V
V
V
V
ILD
EE
EE
EE
-
EE
-
EE
-
EE
CC
V
CC
V
CC
V
For V
- V < 3.0V
EE
0.1
0.1
0.1
0.1
0.1
0.1
CC
V
-
Differential
Input Voltage
IHD
V
V
ILD
For V
- V ≥ 3.0V
3.0
3.0
3.0
CC
EE
Input High
Current
I
150
150
100
150
100
+150
µA
µA
µA
IH
D Input Low
Current
I
-10
100
-10
-10
ILD
D Input Low
Current
I
-150
+150
-150
+150
-150
ILD
2
_______________________________________________________________________________________
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
DC ELECTRICAL CHARACTERISTICS (continued)
(V
- V = +2.25V to +3.8V, outputs loaded with 50Ω 1ꢀ to V
- 2.0V. Typical values are at V
- V = +3.3V, V
EE
= V
- 1V,
CC
CC
EE
= V
CC
CC
IHD
V
- 1.5V, unless otherwise noted.) (Notes 1–5)
ILD
CC
-40°C
+25°C
+85°C
PARAMETER SYMBOL
CONDITIONS
UNITS
MIN
TYP
MAX MIN
TYP
MAX MIN
TYP
MAX
DIFFERENTIAL OUTPUT (Q, Q)
Single-Ended
V
-
V
-
V
1.07
-
-
V
0.82
-
V
1.01
-
-
V
0.76
-
CC
CC
CC
CC
CC
CC
V
Figure 1
V
Output High
Voltage
OH
1.135
0.885
Single-Ended
Output Low
Voltage
V
-
V
-
V
1.87
V
1.62
-
V
1.81
V
1.56
-
CC
CC
CC
CC
CC
CC
V
Figure 1
Figure 1
V
OL
1.935
1.685
V
-
Differential
Output Voltage
OH
550
550
550
mV
V
OL
REFERENCE (V
)
BB
Reference
Voltage Output
(Note 6)
V
1.55
-
V
1.31
-
V
-
V
-
V
-
V
-
CC
CC
CC
CC
CC
CC
V
I
= 0.5mA
BB
V
BB
1.445
1.245
1.385
1.185
POWER SUPPLY
Supply Current
(Note 7)
I
16
24
17
24
18
24
mA
EE
AC ELECTRICAL CHARACTERISTICS
(V
- V = +2.25V to +3.8V, outputs loaded with 50Ω 1ꢀ to V
- 2V, input frequency = 1.5GHz, input transition time = 125ps
CC
CC
EE
(20ꢀ to 80ꢀ), V
= V + 1.2V to V , V
= V to V
- 0.15V, V
- V
= 0.15V to the smaller of 3V or V - V . Typical
IHD
EE
CC ILD
EE
CC
IHD
ILD
CC EE
values are at V
- V = 3.3V, V
= V
- 1V, V
= V
- 1.5V, unless otherwise noted.) (Notes 8, 11)
CC
EE
IHD
CC
ILD
CC
-40°C
+25°C
+85°C
PARAMETER SYMBOL
CONDITIONS
UNITS
MAX
MIN
145
TYP
MAX MIN
TYP
MAX MIN
TYP
Differential
t
t
,
PLHD
Input-to-
Figure 2
184
235
145
172
245
130
167
230
ps
ps
PHLD
Output Delay
Part-to-Part
Skew (Note 9)
t
25
1.7
0.6
90
2.8
1.5
20
1.7
0.6
100
2.8
1.5
20
1.7
0.6
100
2.8
1.5
SKPP
f
= 1.5GHz, Clock
pattern
IN
Added
Random Jitter
(Note 10)
ps
t
RJ
(RMS)
f
= 3.0GHz, Clock
pattern
IN
_______________________________________________________________________________________
3
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
AC ELECTRICAL CHARACTERISTICS (continued)
(V
- V = +2.25V to +3.8V, outputs loaded with 50Ω 1ꢀ to V
- 2V, input frequency = 1.5GHz, input transition time = 125ps
CC
EE
CC
(20ꢀ to 80ꢀ), V
= V + 1.2V to V , V
= V to V
- 0.15V, V
- V
= 0.15V to the smaller of 3V or V - V . Typical
CC EE
IHD
EE
CC ILD
EE
CC
IHD
ILD
values are at V
- V = 3.3V, V
= V
- 1V, V
= V
- 1.5V, unless otherwise noted.) (Notes 8, 11)
CC
EE
IHD
CC
ILD
CC
-40°C
+25°C
+85°C
PARAMETER
SYMBOL
CONDITIONS
UNITS
MAX
MIN
TYP
MAX MIN
TYP
MAX MIN
TYP
Added
Deterministic
Jitter (Note 10)
3.0Gbps
ps
80
t
57
80
57
80
57
DJ
223 -1 PRBS pattern
(p-p)
V
- V ≥ 300mV,
OL
OH
3.0
2.0
50
3.0
2.0
3.0
2.0
Clock pattern,
Figure 2
Switching
Frequency
f
GHz
MAX
V
- V ≥ 550mV,
OL
OH
Clock pattern,
Figure 2
Output Rise/
Fall Time
(20ꢀ to 80ꢀ)
t , t
R
Figure 2
88
120
50
89
120
50
90
120
ps
F
Note 1: Guaranteed by design and characterization.
Note 2: Measurements are made with the device in thermal equilibrium.
Note 3: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 4: DC parameters production tested at T = +25°C. Guaranteed by design and characterization over the full operating temp-
A
erature range.
Note 5: Single-ended input operation is limited to V
- V ≥ 3.0V.
EE
CC
Note 6: Use V as a reference for inputs on the same device only.
BB
Note 7: All pins open except V
and V
.
EE
CC
Note 8: Guaranteed by design and characterization. Limits are set at 6 sigma.
Note 9: Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transition.
Note 10: Device jitter added to the input signal.
4
_______________________________________________________________________________________
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
Typical Operating Characteristics
(SO packages) (V
= +3.3V, V = 0, input transition time = 125ps (20ꢀ to 80ꢀ), V
= V
- 1V, V
= V
- 1.5V, f
IN
=
CC
EE
IHD
CC
ILD
CC
1.5GHz, outputs loaded with 50Ω to V
- 2V, T = +25°C, unless otherwise noted.)
CC
A
OUTPUT AMPLITUDE, V - V
OH
OL
vs. FREQUENCY
TRANSITION TIME vs. TEMPERATURE
SUPPLY CURRENT, I vs. TEMPERATURE
EE
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
20
90
89
88
19
18
17
16
15
14
t
F
t
R
87
0
500 1000 1500 2000 2500 3000 3500
FREQUENCY (MHz)
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
PROPAGATION DELAY vs. HIGH VOLTAGE
OF DIFFERENTIAL INPUT, V
PROPAGATION DELAY vs. TEMPERATURE
IHD
200
200
190
V
- V = 0.5V
ILD
IHD
195
190
185
180
175
170
165
160
155
150
180
170
t
t
PLHD
PHLD
t
PLHD
160
150
140
t
PHLD
130
120
1.0 1.4 1.8 2.2 2.6 3.0 3.4 3.8
(V)
-40
-15
10
35
60
85
V
IHD
TEMPERATURE (°C)
_______________________________________________________________________________________
5
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
Pin Description (MAX9321)
PIN
µMAX/SO
NAME
FUNCTION
SOT23
1
2
3
6
3
4
N.C.
D
No Connection
Noninverting Differential Input. 100kΩ pulldown to V
.
EE
D
Inverting Differential Input. 60kΩ pullup to V
and 100kΩ pulldown to V
.
CC
EE
Reference Output Voltage. Connect to the inverting or noninverting input to provide a
reference for single-ended operation. When used, bypass with a 0.01µF ceramic
capacitor to V ; otherwise leave open.
CC
4
5
V
V
BB
5
6
7
2
7
8
Negative Supply Voltage
EE
Q
Inverting Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
Q
Noninverting Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
Positive Supply Voltage. Bypass from V
to V with 0.1µF and 0.01µF ceramic
EE
CC
8
1
V
capacitors. Place the capacitors as close to the device as possible with the smaller
value capacitor closest to the device.
CC
Pin Description (MAX9321A)
PIN
NAME
FUNCTION
µMAX/SO
SOT23
1
2
3
6
3
4
N.C.
D
No Connection
Inverting Differential Input. 60kΩ pullup to V
and 100kΩ pulldown to V
.
CC
EE
D
Noninverting Differential Input. 100kΩ pulldown to V
.
EE
Reference Output Voltage. Connect to the inverting or noninverting input to provide a
reference for single-ended operation. When used, bypass with a 0.01µF ceramic
capacitor to V ; otherwise leave open.
CC
4
5
V
BB
EE
5
6
7
2
8
7
V
Negative Supply Voltage
Q
Noninverting Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
Q
Inverting Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
Positive Supply Voltage. Bypass from V
to V with 0.1µF and 0.01µF ceramic
EE
CC
8
1
V
capacitors. Place the capacitors as close to the device as possible with the smaller
value capacitor closest to the device.
CC
6
_______________________________________________________________________________________
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
D
D
V
IH
V
BB
V
IL
(CONNECTED TO D)
V
Q
Q
OH
V
- V
OH OL
V
OL
Figure 1. Switching with Single-Ended Input
D
D
V
IHD
V
- V
ILD
IHD
V
ILD
t
t
PHLD
PLHD
Q
Q
V
OH
V
- V
OH
OL
V
OL
80%
0 (DIFFERENTIAL)
80%
0 (DIFFERENTIAL)
20%
20%
(Q) - (Q)
t
t
F
R
Figure 2. Differential Transition Time and Propagation Delay Timing Diagram
V
to D and connecting the single-ended input to D.
BB
Detailed Description
With the differential input configured as single ended
(using V ), the single-ended input can be driven to
The MAX9321/MAX9321A are low-skew differential
receiver/drivers designed for clock and data distribu-
tion. For interfacing to differential HSTL and LVPECL
signals, these devices operate over a +2.25V to +3.8V
supply range, allowing high-performance clock and
data distribution in systems with a nominal +2.5V or
+3.3V supply. For differential LVECL operation, these
devices operate from a -2.25V to -3.8V supply.
BB
and V
V
or with a single-ended LVPECL/LVECL
EE
CC
signal.
When the differential input is configured as a single-
ended input (using V ), the approximate supply range
BB
is V
- V = 3.0V to 3.8V. This is because one of the
CC
EE
inputs must be V + 1.2V or higher for proper opera-
EE
tion of the input stage. V must be at least V + 1.2V
BB
EE
Inputs
because it becomes the high-level input when the other
(single-ended) input swings below it. Therefore, mini-
The differential input can be configured to accept a sin-
mum V = V + 1.2V.
BB
EE
gle-ended input when operating at approximately V
-
CC
V
= 3.0V to 3.8V. This is accomplished by connect-
EE
The minimum V
the minimum V
minimum supply of 2.71V. Rounding up to a standard
supply gives the single-ended operating supply range
of V
output is V
- 1.510V. Substituting
BB
BB
CC
ing the on-chip reference voltage, V , to an input as a
BB
into V
= V
+ 1.2V results in a
EE
BB
reference. For example, the differential D, D input is
converted to a noninverting, single-ended input by con-
necting V
to D and connecting the single-ended
BB
- V = 3.0V to 3.8V.
EE
CC
input to D. An inverting input is obtained by connecting
_______________________________________________________________________________________
7
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
When using the V
reference output, bypass it with a
capacitor closest to the device. Use multiple parallel
vias for low inductance. When using the V reference
BB
0.01µF ceramic capacitor to V . If the V
reference
CC
BB
BB
is not used, it can be left open. The V
reference can
output, bypass it with a 0.01µF ceramic capacitor to
BB
source or sink 0.5mA. Use V
only for an input on the
V
(if the V reference is not used, it can be left
BB
BB
CC
same device as the V reference.
open).
BB
The maximum magnitude of the differential input from D
Traces
to D is 3.0V or V
- V , whichever is less. This limit
EE
CC
Input and output trace characteristics affect the perfor-
mance of the MAX9321/MAX9321A. Connect each sig-
nal of a differential input or output to a 50Ω
characteristic impedance trace. Minimize the number of
vias to prevent impedance discontinuities. Reduce
reflections by maintaining the 50Ω characteristic
impedance through connectors and across cables.
Reduce skew within a differential pair by matching the
electrical length of the traces.
also applies to the difference between any reference
voltage input and a single-ended input.
The differential input has bias resistors that drive the
output to a differential low when the inputs are open.
The inverting input is biased with a 60kΩ pullup to V
CC
and a 100kΩ pulldown to V . The noninverting input is
EE
biased with a 100kΩ pulldown to V
.
EE
Specifications for the high and low voltage of the differ-
ential input (V
and V ) and the differential input
ILD
The exposed-pad (EP) SO package can be soldered to
the PC board for enhanced thermal performance. If the
EP is not soldered to the PC board, the thermal resis-
tance is the same as the regular SO package. The EP is
IHD
voltage (V
IHD
- V ) apply simultaneously (V
cannot
ILD
ILD
be higher than V
).
IHD
Outputs
connected to the chip V supply. Be sure that the pad
EE
Output levels are referenced to V
and are consid-
CC
does not touch signal lines or other supplies.
ered LVPECL or LVECL, depending on the level of the
Contact Maxim's Packaging department for guidelines
on the use of EP packages.
V
supply. With V
connected to a positive supply
CC
CC
and V connected to GND, the output is LVPECL. The
EE
output is LVECL when V
EE
is connected to GND and
CC
Output Termination
V
is connected to a negative supply.
Terminate outputs through 50Ω to V
- 2V or use an
CC
A single-ended input of at least V
100mV or a differ-
ential input of at least 100mV switches the outputs to
the V and V levels specified in the DC Electrical
equivalent Thevenin termination. When a single-ended
signal is taken from the differential output, terminate
both outputs. For example, when Q is used as a single-
ended output, terminate both Q and Q.
BB
OH
OL
Characteristics table.
Applications Information
Chip Information
Supply Bypassing
to V with high-frequency surface-mount
EE
Bypass V
TRANSISTOR COUNT: 162
CC
ceramic 0.1µF and 0.01µF capacitors in parallel as
close to the device as possible, with the 0.01µF value
Pin Configurations (continued)
V
CC
V
1
2
3
4
8
7
6
5
Q
1
2
3
4
8
7
N.C.
D
V
CC
MAX9321A
MAX9321A
CC
V
CC
60kΩ
Q
V
Q
EE
60kΩ
100kΩ
100kΩ
D
N.C.
D
6
5
Q
V
100kΩ
100kΩ
D
V
V
BB
BB
EE
V
EE
SOT23
µMAX/SO
8
_______________________________________________________________________________________
Differential LVPECL/LVECL/HSTL
Receiver/Drivers
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ______________________9
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
相关型号：
MAX9321AESA+
Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, PDSO8, 0.150 INCH, EXPOSED PAD, SOIC-8
MAXIM
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