MAX9360ESA [MAXIM]
LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators; LVTTL / TTL / CMOS到差分LVECL / ECL转换器
| 型号： | MAX9360ESA |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | LVTTL/TTL/CMOS-to-Differential LVECL/ ECL Translators |
| 文件： | 总9页 (文件大小：160K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2327; Rev 1; 7/02
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
General Description
Features
The MAX9360/MAX9361 are low-skew, single LVTTL/
TTL/CMOS-to-differential LVECL/ECL translators
designed for high-speed signal and clock driver appli-
cations. For interfacing to LVTTL/TTL/CMOS input sig-
nals, these devices operate over a 3.0V to 5.5V supply
range, allowing high-performance clock or data distrib-
ution. For interfacing to differential LVECL/ECL output
signals, these devices operate from a -2.375V to -5.5V
supply.
ꢀ Output High with Input Open
ꢀ -2.375V to -5.5V LVECL/ECL Operation
ꢀ ESD Protection >2kV (Human Body Model)
ꢀ 3.0V to 3.6V LVTTL/CMOS Operation (MAX9360)
Improved Second Source of the MC100EPT24
Low 13.8mA (typ) I Supply Current
EE
440ps (typ) Propagation Delay
>300mV Output at 1GHz
The MAX9360 is a 3.3V LVTTL/CMOS-to-LVECL/ECL
translator that operates at a typical speed of 3GHz. The
MAX9361 is a 5V TTL/CMOS-to-LVECL/ECL translator
that operates at a typical speed of 1.3GHz. Both
devices can be used to drive either LVECL devices or
standard ECL devices with a negative supply range of
-2.375V to -5.5V.
ꢀ 4.5V to 5.5V TTL Operation (MAX9361)
Improved Second Source of the MC100ELT24
Low 6.6mA (typ) I Supply Current
EE
600ps (typ) Propagation Delay
>300mV Output at 250MHz
The devices default to high if the input is disconnected,
and feature ultra-low propagation delay: 440ps for the
MAX9360, 810ps for the MAX9361.
The MAX9360 is specified for operation from -40°C to
+85°C in an 8-pin SO package, and 0°C to +85°C in a
space-saving, 8-pin SOT23 package.
Ordering Information
PIN-
PACKAGE
TOP
MARK
PART
TEMP RANGE
The MAX9361 is specified for operation from -40°C to
+85°C for both 8-pin SO and SOT23 packages.
MAX9360EKA-T
MAX9360ESA
MAX9361EKA-T
MAX9361ESA
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
8 SOT23-8
8 SO
AAJI
—
8 SOT23-8
8 SO
AAJJ
—
Applications
Clock/Data-Level Translation
Pin Configurations
TOP VIEW
D
1
2
8
7
GND
Q
V
1
2
8
7
V
CC
EE
V
D
Q
EE
Q
N.C.
N.C.
3
4
6
5
N.C.
N.C.
3
4
6
5
Q
V
GND
CC
MAX9360/
MAX9361
MAX9360/
MAX9361
SOT23
SO
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
ABSOLUTE MAXIMUM RATINGS
V
V
to GND..............................................................-0.3V to +6V
to GND...............................................................-6V to +0.3V
Junꢂtion-to-Case Thermaꢃ Resistanꢂe
8-Pin SOT23...............................................................+80°C/W
8-Pin SO..................................................................+40°C/mW
CC
EE
D to GND....................................................-0.3V to (V
+ 0.3V)
CC
Continuous Output Current ................................................50mA
Surge Output Current........................................................100mA
Junꢂtion-to-Ambient Thermaꢃ Resistanꢂe in Stiꢃꢃ Air
8-Pin SOT23.............................................................+112°C/W
8-Pin SO...................................................................+170°C/W
Junꢂtion-to-Ambient Thermaꢃ Resistanꢂe
Continuous Power Dissipation (T = +70°C)
A
8-Pin SOT23 (derate 8.9mW/°C aboꢄe +70°C)............714mW
8-Pin SO (derate 5.9mW/°C aboꢄe +70°C)..................470mW
Operating Temperature Range ...........................-40°C to +85°C
Junꢂtion Temperature......................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
ESD Proteꢂtion
with 500LFPM Airfꢃow
8-Pin SOT23...............................................................+78°C/W
8-Pin SO.....................................................................+99°C/W
Human Bodꢁ Modeꢃ (D, Q, Q).........................................>2kV
Soꢃdering Temperature (10s)...........................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS—MAX9360
(V
= 3.0V to 3.6V, V = -2.375V to -5.5V, GND = 0, outputs terminated with 50Ω 1ꢀ to -2.0V. Tꢁpiꢂaꢃ ꢄaꢃues are at V
= 3.3V,
CC
EE
CC
V
= 2.0V, V = 0.8V, unꢃess otherwise noted.) (Notes 1, 2, 3)
IH
IL
0°C (SOT23)
-40°C (SO)
+25°C
+85°C
PARAMETER
SYMBOL
CONDITIONS
UNITS
MIN
TYP MAX MIN
TYP MAX MIN
TYP MAX
LVTTL INPUT (D)
Input High Current
Input Low Current
V
V
V
= 2.7V
-20
-10
+20
+10
-20
-10
+20
+10
-20
-10
+20
+10
IN
IN
IN
I
µA
µA
V
IH
= V
CC
I
= 0.5V
-200
-1.2
2.0
-51
-200
-60
-200
-67
IL
Input Cꢃamp
Voꢃtage
V
I
= -18mA
-1.2
2.0
-1.2
2.0
IK
IN
Input High Voꢃtage
Input Low Voꢃtage
V
V
V
IH
V
0.8
0.8
0.8
IL
LVECL/ECL OUTPUTS (Q, Q)
Output High
Voꢃtage
V
-1.145
-1.935
550
-0.885 -1.145
-1.625 -1.935
550
-0.885 -1.145
-1.625 -1.935
550
-0.885
-1.625
V
V
OH
Output Low Voꢃtage
V
OL
Differentiaꢃ Output
V
-
OH
mV
Swing (V
- V
OL
)
V
OH
OL
Power-Suppꢃꢁ
Current
I
(Note 4)
(Note 4)
4.3
7.0
20
5.0
7.0
20
5.6
7.0
20
mA
mA
CC
Internaꢃ Chip
Current
I
12.3
13.8
15.2
EE
2
_______________________________________________________________________________________
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
DC ELECTRICAL CHARACTERISTICS—MAX9361
(V
= 4.5V to 5.5V, V = -2.375V to -5.5V, GND = 0, outputs terminated with 50Ω 1ꢀ to -2.0V. Tꢁpiꢂaꢃ ꢄaꢃues are at V
= 5V, V
CC IH
CC
EE
= 2.0V, V = 0.8V, unꢃess otherwise noted.) (Notes 1, 2, 3)
IL
-40°C (SO)
TYP MAX MIN
+25°C
+85°C
PARAMETER
SYMBOL
CONDITIONS
UNITS
MIN
TYP MAX MIN
TYP MAX
TTL INPUT (D)
V
V
V
= 2.7V
-30
-10
+30
-30
-10
+30
-30
-10
+30
+10
IN
IN
IN
Input High Current
Input Low Current
I
µA
µA
V
IH
= V
+10
+10
CC
I
= 0.5V
-200
-1.2
2.0
-55
-200
-61
-200
-71
IL
Input Cꢃamp
Voꢃtage
V
I
= -18mA
-1.2
2.0
-1.2
2.0
IK
IN
Input High Voꢃtage
Input Low Voꢃtage
V
V
V
IH
V
0.8
0.8
0.8
IL
LVECL/ECL OUTPUTS (Q, Q)
Output High
Voꢃtage
V
-1.055
-1.875
550
-0.880 -1.055
-1.555 -1.810
550
-0.880 -1.025
-1.605 -1.810
550
-0.880
-1.605
V
V
OH
Output Low Voꢃtage
V
OL
Differentiaꢃ Output
V
-
OH
699
691
677
mV
Swing (V
- V
OL
)
V
OH
OL
POWER SUPPLY
Power-Suppꢃꢁ
Current
I
(Note 4)
(Note 4)
3.0
9
7.0
20
3.5
10
7.0
20
4.3
11
7.0
20
mA
mA
CC
Internaꢃ Chip
Current
I
EE
_______________________________________________________________________________________
3
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
AC ELECTRICAL CHARACTERISTICS—MAX9360
(V
= 3.0V to 3.6V, V = -2.375V to -5.5V, GND = 0, outputs terminated with 50Ω 1ꢀ to -2.0V, input frequenꢂꢁ = 1.0GHz, input
CC
EE
transition time = 125ps (20ꢀ to 80ꢀ). Tꢁpiꢂaꢃ ꢄaꢃues are at V
= 3.3V, V = 2.0V, V = 0.8V, unꢃess otherwise noted.) (Note 5)
IH IL
CC
0°C (SOT23)
-40°C (SO)
+25°C
TYP MAX MIN
+85°C
PARAMETER
SYMBOL
CONDITIONS
UNITS
MIN
TYP MAX MIN
TYP MAX
V
V
- V ≥ 300mV
1.0
3.0
1.5
1.0
3.0
1.5
1.0
3.0
1.5
OH
OH
OL
Maximum Toggꢃe
Frequenꢂꢁ
f
GHz
ps
MAX
- V ≥ 500mV 0.85
OL
0.85
0.85
Input-to-Output
Propagation Deꢃaꢁ
t
,
PLHD
t
PHLD
Figure 1
Figure 1
300
70
800
150
300
80
800
150
300
100
800
Output Rise/Faꢃꢃ
Time
t , t
R
97
43
105
43
122
43
150
70
ps
F
2Gbps
Added
Deterministiꢂ Jitter
t
223 - 1 PRBS pattern
(Note 6)
70
70
ps
(P-P)
DJ
Added Random
Jitter
1.0GHz ꢂꢃoꢂk
pattern (Note 6)
t
RJ
1.4
3.0
1.5
3.0
1.5
3.0 ps
(RMS)
AC ELECTRICAL CHARACTERISTICS—MAX9361
(V
= 4.5V to 5.5V, V = -2.375V to -5.5V, GND = 0, outputs terminated with 50Ω 1ꢀ to -2.0V, input frequenꢂꢁ = 100MHz, input
CC
EE
transition time = 125ps (20ꢀ to 80ꢀ). Tꢁpiꢂaꢃ ꢄaꢃues are at V
= 5.0V, V = 2.0V, V = 0.8V, unꢃess otherwise noted.) (Note 5)
IH IL
CC
-40°C
TYP MAX MIN
- V ≥ 300mV 250 1300
+25°C
+85°C
PARAMETER
SYMBOL
CONDITIONS
UNITS
MHz
ps
MIN
TYP MAX MIN
TYP MAX
V
V
250 1300
250 1300
OH
OH
OL
Maximum Toggꢃe
Frequenꢂꢁ
f
MAX
- V ≥ 500mV 150
OL
500
150
500
150
500
Input-to-Output
Propagation Deꢃaꢁ
t
,
PLHD
Figure 1
Figure 1
300
250
561
900
300
583
900
300
607
900
t
PHLD
Output Rise/Faꢃꢃ
Time
t , t
R
340 1000 250
342 1000 250
353 1000
ps
F
200Mbps
Added
Deterministiꢂ Jitter
223 - 1 PRBS pattern
(Note 6)
t
81
4
150
10
83
4
150
10
85
4
150 ps
(P-P)
DJ
Added Random
Jitter
100MHz ꢂꢃoꢂk
pattern (Note 6)
t
RJ
10 ps
(RMS)
Note 1: Measurements are made with the deꢄiꢂe in thermaꢃ equiꢃibrium.
Note 2: Current into a pin is defined as positiꢄe. Current out of a pin is defined as negatiꢄe.
Note 3: DC parameters are produꢂtion tested at +25°C. DC ꢃimits are guaranteed bꢁ design and ꢂharaꢂterization oꢄer the fuꢃꢃ
operating temperature range.
Note 4: Aꢃꢃ pins are open exꢂept V , V , and GND.
CC EE
Note 5: Guaranteed bꢁ design and ꢂharaꢂterization. Limits are set to 6 sigma.
Note 6: Deꢄiꢂe jitter added to the input signaꢃ.
4
_______________________________________________________________________________________
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
Typical Operating Characteristics
(MAX9360: V
= 3.3V and V = -5V, V = 2.0V, V = 0.8V, T = +25°C, outputs terminated with 50Ω to -2V, input frequenꢂꢁ
EE IH IL A
CC
= 1GHz, input transition time = 125ps (20ꢀ to 80ꢀ), unꢃess otherwise noted.)
OUTPUT AMPLITUDE vs. FREQUENCY
SUPPLY CURRENT vs. TEMPERATURE
800
20
750
700
16
I
EE
650
600
550
500
450
400
350
300
12
8
I
CC
4
0
0
500 1000 1500 2000 2500 3000
FREQUENCY (MHz)
-40
-15
10
35
60
85
TEMPERATURE (°C)
PROPAGATION DELAY vs. TEMPERATURE
TRANSITION TIME vs. TEMPERATURE
500
475
450
425
400
375
350
130
120
110
100
90
t
PLHD
t
R
t
PHLD
t
F
80
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
5
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
Pin Description
PIN
NAME
FUNCTION
SO
SOT23
Negatiꢄe Suppꢃꢁ Voꢃtage. Bꢁpass V to GND with 0.1µF and 0.01µF ꢂeramiꢂ ꢂapaꢂitors.
EE
1
2
V
Pꢃaꢂe the ꢂapaꢂitors as ꢂꢃose to the deꢄiꢂe as possibꢃe with the smaꢃꢃer ꢄaꢃue ꢂapaꢂitor
ꢂꢃosest to the deꢄiꢂe.
EE
2
3, 4
5
1
3, 4
8
D
N.C.
GND
Q
LVTTL/CMOS Input for MAX9360. TTL/CMOS input for MAX9361.
No Conneꢂt. Conneꢂt to GND.
Ground
6
7
Inꢄerting Differentiaꢃ LVECL/ECL Output. Tꢁpiꢂaꢃꢃꢁ terminate with 50Ω resistor to -2V.
Noninꢄerting Differentiaꢃ LVECL/ECL Output. Tꢁpiꢂaꢃꢃꢁ terminate with 50Ω resistor to -2V.
7
6
Q
Positiꢄe Suppꢃꢁ Voꢃtage. Bꢁpass V
to GND with 0.1µF and 0.01µF ꢂeramiꢂ ꢂapaꢂitors.
CC
8
5
V
Pꢃaꢂe the ꢂapaꢂitors as ꢂꢃose to the deꢄiꢂe as possibꢃe with the smaꢃꢃer ꢄaꢃue ꢂapaꢂitor
ꢂꢃosest to the deꢄiꢂe.
CC
V
IH
50%
50%
D
Q
V
V
IL
t
t
PHL
PLH
OH
V
- V
SINGLE-ENDED WAVEFORMS
OH
OH
OL
OL
V
Q
OL
V
V
- V
- V
80%
80%
0 (DIFFERENTIAL)
20%
20%
OH
OL
DIFFERENTIAL WAVEFORM
Q - Q
t
t
F
R
Figure 1. Input-to-Output Propagation Delay and Transition Timing Diagram
6
_______________________________________________________________________________________
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
Traces
Detailed Description
Input and output traꢂe ꢂharaꢂteristiꢂs affeꢂt the perfor-
The MAX9360/MAX9361 are ꢃow-skew, singꢃe LVTTL/
manꢂe of the MAX9360/MAX9361. Conneꢂt eaꢂh signaꢃ
of a differentiaꢃ output to a 50Ω ꢂharaꢂteristiꢂ imped-
anꢂe traꢂe. Minimize the number of ꢄias to preꢄent
impedanꢂe disꢂontinuities. Reduꢂe refꢃeꢂtions bꢁ main-
taining the 50Ω ꢂharaꢂteristiꢂ impedanꢂe through ꢂon-
neꢂtors and aꢂross ꢂabꢃes. Reduꢂe skew within a
differentiaꢃ pair bꢁ matꢂhing the eꢃeꢂtriꢂaꢃ ꢃength of the
traꢂes.
CMOS/TTL-to-differentiaꢃ LVECL/ECL transꢃators
designed for high-speed signaꢃ and ꢂꢃoꢂk driꢄer appꢃi-
ꢂations. For interfaꢂing to LVTTL/TTL/CMOS input sig-
naꢃs, these deꢄiꢂes operate oꢄer a 3.0V to 5.5V suppꢃꢁ
range, aꢃꢃowing high-performanꢂe ꢂꢃoꢂk or data distrib-
ution in sꢁstems with a nominaꢃ 3.3V or 5.0V suppꢃꢁ. For
interfaꢂing to differentiaꢃ LVECL/ECL output signaꢃs,
these deꢄiꢂes operate from a -2.375V to -5.5V suppꢃꢁ.
On the MAX9360, if the input edge rate approaꢂhes the
eꢃeꢂtriꢂaꢃ ꢃength of the interꢂonneꢂt, then ꢂontroꢃꢃed-
impedanꢂe transmission ꢃines shouꢃd be used for the
input traꢂes.
The MAX9360 is a 3.3V LVTTL/CMOS-to-LVECL/ECL
transꢃator that operates at tꢁpiꢂaꢃ speeds of 3GHz. The
MAX9361 is a 5V TTL/CMOS-to-LVECL/ECL transꢃator that
operates at tꢁpiꢂaꢃ speeds of 1.3GHz. Both deꢄiꢂes ꢂan
be used to driꢄe either LVECL deꢄiꢂes or standard ECL
deꢄiꢂes with a negatiꢄe suppꢃꢁ range of -2.375V to -5.5V.
Output Termination
Terminate outputs through 50Ω to -2V or use an equiꢄa-
ꢃent Theꢄenin termination. Terminate both outputs and
use the same termination on eaꢂh for the ꢃowest output-
to-output skew. When a singꢃe-ended signaꢃ is taken
from a differentiaꢃ output, terminate both outputs. For
exampꢃe, if Q is used as a singꢃe-ended output, termi-
nate both Q and Q.
Input
The MAX9360/MAX9361 inputs aꢂꢂept standard LVTTL/
TTL/CMOS ꢃeꢄeꢃs. The input has puꢃꢃup ꢂirꢂuitrꢁ that dri-
ꢄes the outputs to a differentiaꢃ high if the inputs are open.
Differential Output
Output ꢃeꢄeꢃs are referenꢂed to GND and are ꢂonsidered
Ensure that the output ꢂurrents do not exꢂeed the ꢂon-
tinuous safe output ꢂurrent ꢃimit or surge output ꢂurrent
ꢃimit as speꢂified in the Absolute Maximum Ratings
tabꢃe. Under aꢃꢃ operating ꢂonditions, the deꢄiꢂe’s totaꢃ
thermaꢃ ꢃimits shouꢃd be obserꢄed.
ECL or LVECL, depending on the ꢃeꢄeꢃ of the V suppꢃꢁ.
EE
With GND ꢂonneꢂted to zero and V at -4.2V to -5.5V,
EE
the outputs are ECL. The outputs are LVECL when GND is
ꢂonneꢂted to zero and V is at -2.375V to -3.8V.
EE
Applications Information
Chip Information
TRANSISTOR COUNT: 330
Supply Bypassing
Bꢁpass V
and V
to ground with high-frequenꢂꢁ
EE
CC
surfaꢂe-mount ꢂeramiꢂ 0.1µF and 0.01µF ꢂapaꢂitors in
paraꢃꢃeꢃ as ꢂꢃose to the deꢄiꢂe as possibꢃe, with the
0.01µF ꢄaꢃue ꢂapaꢂitor ꢂꢃosest to the deꢄiꢂe. Use muꢃti-
pꢃe paraꢃꢃeꢃ ꢄias for ꢃow induꢂtanꢂe.
PROCESS: Bipoꢃar
_______________________________________________________________________________________
7
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
Package Information
(The paꢂkage drawing(s) in this data sheet maꢁ not refꢃeꢂt the most ꢂurrent speꢂifiꢂations. For the ꢃatest paꢂkage outꢃine information,
go to www.maxim-ic.com/packages.)
8
_______________________________________________________________________________________
LVTTL/TTL/CMOS-to-Differential LVECL/
ECL Translators
Package Information (continued)
(The paꢂkage drawing(s) in this data sheet maꢁ not refꢃeꢂt the most ꢂurrent speꢂifiꢂations. For the ꢃatest paꢂkage outꢃine information,
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9
© 2002 Maxim Integrated Produꢂts
Printed USA
is a registered trademark of Maxim Integrated Produꢂts.
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CMOS to ECL Translator, 1 Func, Complementary Output, BIPolar, PDSO8, SOT-23, 8 PIN
MAXIM
MAX9361EKA+T
CMOS to ECL Translator, 1 Func, Complementary Output, BIPolar, PDSO8, SOT-23, 8 PIN
MAXIM
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