MAX9611_V01 [MAXIM]
High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator;
| 型号： | MAX9611_V01 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | High-Side, Current-Sense Amplifiers with 12-Bit ADC and Op Amp/Comparator |
| 文件： | 总20页 (文件大小：1492K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
General Description
Features
The MAX9611/MAX9612 are high-side current-sense
amplifiers with an integrated 12-bit ADC and a gain block
that can be configured either as an op amp or comparator,
making these devices ideal for a number of industrial and
automotive applications.
● 0V to +60V Input Common-Mode Voltage Range
● 2.7V to 5.5V Power-Supply Range, Compatible with
1.8V and 3.3V Logic
● 5μA Software Shutdown Current
● Integrated 12-Bit ADC
The high-side, current-sense amplifiers operate over a
wide 0V to 60V input common-mode voltage range. The
programmable full-scale voltage (440mV, 110mV, and
55mV) of these amplifiers offers wide dynamic range,
accurate current measurement, and application flexibility
in choosing sense resistor values. A choice of either an
internal op amp or a comparator is provided to the user.
The internal amplifier can be used to limit the inrush cur-
rent or to create a current source in a closed-loop system.
The comparator can be used to monitor fault events for
fast response.
● 13μV Current-Sense ADC Resolution
● 500μV (max) Current-Sense ADC Input Offset
Voltage
● 0.5% (max) Current-Sense ADC Gain Error
2
● I C Bus with 16 Addresses
● Small, 3mm x 5mm 10-Pin μMAX Package
● -40°C to +125°C Operating Temperature Range
Ordering Information/Selector Guide
2
An I C-controlled 12-bit, 500sps analog-to-digital con-
PART
OUTPUT
Noninverting
Inverting
PIN-PACKAGE
10 µMAX
verter (ADC) can be used to read the voltage across the
MAX9611AUB+
MAX9612AUB+
sense resistor (V ), the input common-mode voltage
SENSE
10 µMAX
(V ), op-amp/comparator output (V
RSCM
), op-amp/
), and internal die
OUT
Note: All devices operate over the -40°C to +125°C tempera-
ture range.
comparator reference voltage (V
2
SET
temperature. The I C bus is compatible with 1.8V and 3.3V
logic, allowing modern microcontrollers to interface to it.
+Denotes a lead(Pb)-free/RoHS-compliant package.
The MAX9611 features a noninverting input-to-output
configuration while the MAX9612 features an inverting
input-to-output configuration.
Typical Application Circuit
R
SENSE
0V TO 60V
The MAX9611/MAX9612 operate with a 2.7V to 5.5V
supply voltage range, are fully specified over the -40°C to
+125°C automotive temperature range, and are available
®
RS+
RS-
in a 3mm x 5mm, 10-pin µMAX package.
LOAD
V
IN
Applications
● Hybrid Automotive Power Supplies
● Server Backplanes
V
CC
A0
A1
0.1µF
MAX9611
MAX9612
● Base-Station PA Control
● Base-Station Feeder Cable Bias-T
● Telecom Cards
OUT
SET
µC
SCL
SCL
SDA
● Battery-Operated Equipment
1.8V LOGIC
SDA
GND
µMAX is a registered trademark of Maxim Integrated Products, Inc.
Functional Diagrams appear at end of data sheet.
19-5543; Rev 5; 12/19
MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Absolute Maximum Ratings
V
to GND ............................................................-0.3V to +6V
µMAX Package Junction-to-Ambient
CC
RS+, RS-, OUT to GND ........................................-0.3V to +65V
Differential Input Voltage, RS+ - RS- ..................................±65V
All Other Pins to GND.............................................-0.3V to +6V
OUT Short-Circuit to GND.........................................Continuous
Continuous Current into Any Pin......................................±20mA
Thermal Resistance (θ ) (Note 1) .............................13°C/W
JA
Operating Temperature Range......................... -40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow).......................................+260°C
Continuous Power Dissipation (T = +70°C)
A
10-Pin µMAX (derate 8.8mW/°C above +70°C)..........707mW
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V
= 3.3V, V
= V
= +12V, V
= (V
- V
) = 0V, T = -40°C to +125°C, unless otherwise noted. Typical values are
RS- A
CC
RS+
RS-
SENSE
RS+
at T = +25°C.) (Note 2)
A
PARAMETER
SYMBOL
CONDITIONS
Guaranteed by CMRR
MIN
TYP
MAX
UNITS
CURRENT-SENSE AMPLIFIER DC CHARACTERISTICS
Input Common-Mode Range
0
60
0.5
2
V
T
T
T
T
T
T
T
T
T
T
T
T
T
= +25°C, gain = 8x
0.045
0.045
0.1
A
A
A
A
A
A
A
A
A
A
A
A
A
= -40°C to +125°C, gain = 8x
= +25°C, gain = 4x
0.5
2
Input Offset Voltage ADC Path
V
mV
OS
(Note 3)
= -40°C to +125°C, gain = 4x
= +25°C, gain = 1x
0.8
2.6
0.5
1.8
2.5
1.7
3.1
4
= -40°C to +125°C, gain = 1x
= +25°C, gain = 8x
0.1
= -40°C to + 85°C, gain = 8x
= -40°C to +125°C, gain = 8x
= +25°C, gain = 4x
Gain Error (Note 3)
GE
0.4
1
%
= -40°C to +125°C, gain = 4x
= +25°C, gain = 1x
= -40°C to +125°C, gain = 1x
4.7
Differential Input Resistance
R
R
300
12
1
kΩ
INDM
Common-Mode Input Resistance
MΩ
INCM
T
T
T
T
= +25°C
2
5
6
6
A
A
A
A
Input Bias Current
I
, I
µA
nA
RS+ RS-
= -40°C to +125°C
= +25°C
3
Input Offset Current (Note 4)
(I
) - (I
RS+ RS-)
= -40°C to +125°C
Maxim Integrated
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Electrical Characteristics (continued)
(V
= 3.3V, V
= V
= +12V, V
= (V
- V
) = 0V, T = -40°C to +125°C, unless otherwise noted. Typical values are
CC
RS+
RS-
SENSE
RS+
RS- A
at T = +25°C.) (Note 2)
A
PARAMETER
SYMBOL
CONDITIONS
Gain = 8x,
= 50mV
MIN
TYP
MAX
UNITS
106
120
V
SENSE
V
= 0V to 60V,
= +25°C
Gain = 4x,
V = 100mV
SENSE
RS-
106
100
94
120
120
T
A
Gain = 1x,
V
= 400mV
= 50mV
SENSE
Common-Mode Rejection Ratio
CMRR
dB
Gain 8x,
V
SENSE
V
= 0V to 60V,
= -40°C to +125°C
Gain 4x,
RS-
94
T
V
= 100mV
= 400mV
A
SENSE
Gain 1x,
84
V
SENSE
Gain = 8x,
= 50mV
57
72
67
57
V
SENSE
Gain = 4x,
= 100mV
Power-Supply Rejection Ratio
PSRR
V
= 2.7V to 5.5V
56
dB
CC
V
SENSE
Gain = 1x,
= 400mV
48
V
SENSE
Gain = 8x
Gain = 4x
Gain = 1x
55
110
Used in gain error
measurement
FS
mV
µV
Full-Scale Sense Voltage
440
Gain = 8x
Gain = 4x
Gain = 1x
13.44
26.88
107.50
LSB Step Size
LSB
ANALOG PATH, CSA + AMPLIFIER/COMPARATOR
T
T
= +25°C
0.350
4
A
Input Offset Voltage
V
mV
nA
V
OS
= -40°C to +125°C
10
50
A
SET Input Bias Current
I
1
B
Maximum SET Input Voltage
Range
1.126
Signal Bandwidth
Gain Bandwidth
BW
Gain = 1x, R = 11.6V
4
MHz
MHz
µs
S-
GBW
2.5
1.5
8
Propagation Delay
Internal Hysteresis
Output Sink Current
Output Leakage Current
t
In comparator mode, 10mV overdrive
In comparator mode, nonlatching
PD
V
mV
mA
µA
HYS
V
V
= 4V
15
1.7
OUT
= 36V
3
1
OUT
I
I
= 8mA, T = -40°C to +85°C
A
SINK
SINK
Output Voltage Low
V
V
OL
= 8mA, T = -40°C to +125°C
0.5
1.5
A
Maxim Integrated
│ 3
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Electrical Characteristics (continued)
(V
= 3.3V, V
= V
= +12V, V
= (V
- V
) = 0V, T = -40°C to +125°C, unless otherwise noted. Typical values are
CC
RS+
RS-
SENSE
RS+
RS- A
at T = +25°C.) (Note 2)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OUT VOLTAGE MEASUREMENT (V
Full-Scale Input Voltage
LSB Step Size
)
OUT
57.3
14
V
LSB
GE
mV
T
T
= +25°C
0.8
6
V
(V
=
- V
A
RSCM
RS+
Gain Error
%
)/2
= -40°C to +125°C
7
RS-
A
T
T
= +25°C
14
110
160
A
Input Offset Voltage
V
mV
OSOUT
= -40°C to +125°C
A
COMMON-MODE VOLTAGE MEASUREMENT (V
)
RSCM
Full-Scale Input Voltage
57.3
14
V
LSB Step Size
LSB
GE
mV
T
T
= +25°C
0.3
6
7
V
(V
=
- V
A
RSCM
RS+
Gain Error
%
)/2
= -40°C to +125°C
RS-
A
T
T
= +25°C
14
80
160
A
Input Offset Voltage
V
mV
OSOUT
= -40°C to +125°C
A
SET VOLTAGE MEASUREMENT (V
Full-Scale Input Voltage
LSB Step Size
)
SET
1.10
268
0.2
V
µV
T
= +25°C
5
6
V
(V
=
- V
A
RSCM
RS+
Gain Error
GE
%
)/2
T
= -40°C to +125°C
RS-
A
T
T
= +25°C
0.3
10
14
A
Input Offset Voltage
V
mV
OSOUT
= -40°C to +125°C
A
Integral Nonlinearity
INL
1
LSB
LSB
Differential Nonlinearity
TEMPERATURE MEASUREMENT
Accuracy
DNL
0.2
0.48
0.48
°C
°C
°C
Typical Measurement Range
LSB Step Size
-40
+125
LSB
ANALOG-TO-DIGITAL CONVERTER
Resolution
12
2
Bit
Conversion Time
ms
SCL/SDA LOGIC LEVELS
V
V
= 2.7V to 5.5V
0.4
0.9
V
V
V
CC
Input Voltage Low
V
IL
= 3.3V, T = +25°C
A
CC
Input Voltage High
Input Hysteresis
V
V
= 2.7V to 5.5V
1.45
IH
CC
0.05 x
V
V
HYS
V
CC
1
Input Leakage Current
200
nA
A1/A0 LOGIC LEVELS
Logic State 00-01 Threshold
Logic State 01-10 Threshold
Logic State 10-11 Threshold
Input Leakage Current
1/4 x V
1/2 x V
3/4 x V
1
V
V
CC
CC
CC
V
200
nA
Maxim Integrated
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Electrical Characteristics (continued)
(V
= 3.3V, V
= V
= +12V, V
= (V
- V
) = 0V, T = -40°C to +125°C, unless otherwise noted. Typical values are
CC
RS+
RS-
SENSE
RS+
RS- A
at T = +25°C.) (Note 2)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER-SUPPLY CHARACTERISTICS
Power-Supply Input Range
Quiescent Current
V
Guaranteed by PSRR
No activity on SCL
2.7
5.5
2.6
10
V
CC
I
1.6
5
mA
µA
CC
Shutdown Current
I
SHDN
2
I C TIMING CHARACTERISTICS (COMPATIBLE WITH SMBus)
Serial-Clock Frequency
f
0
400
kHz
µs
SCL
Bus Free Time Between a STOP
and a START Condition
t
1.3
BUF
Hold Time, (Repeated) START
Condition
t
t
0.6
µs
DH,STA
SCL Clock Low Period
SCL Clock High Period
t
1.3
0.6
µs
µs
LOW
t
HIGH
Setup Time for a Repeated
START Condition
0.6
µs
SU,STA
DH,DAT
Data Hold Time
t
0
900
µs
ns
Data Setup Time
t
100
SU,DAT
SDA/SCL Receiving Rise Time
SDA/SCL Receiving Fall Time
SDA Transmitting Fall Time
STOP Condition Setup Time
Bus Capacitance
t
(Note 5)
(Note 5)
(Note 5)
20 + 0.1C
20 + 0.1C
20 + 0.1C
0.6
300
300
250
R
B
B
B
t
t
ns
F
F
t
µs
pF
ns
SU,STO
C
400
B
Pulse Width of Spike Suppressed
t
50
SP
Note 2: All devices are 100% production tested at T = +25°C. Temperature limits are guaranteed by design.
A
Note 3: V
and gain error of current-sense amplifier extrapolated from a two-point measurement made at V
= (V + - V
)
RS-
OS
SENSE
RS
= 5mV to 50mV in gain of 8x, 5mV to 100mV in gain of 4x, and 10mV to 400mV in gain of 1x.
Note 4: Guaranteed by design.
Note 5: C is in pF.
B
2
I C Timing Diagram
SDA
t
BUF
t
SU,STA
t
SU,DAT
t
HD,STA
t
LOW
t
SU,STO
t
HD,DAT
t
SCL
HIGH
t
HD,STA
t
R
t
F
START CONDITION
REPEATED START CONDITION
STOP
CONDITION
START
CONDITION
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Typical Operating Characteristics
(V
= 3.3V, V
= 12V, T = +25°C, unless otherwise noted.)
CC
CM A
MAX9611 CSA OFFSET VOLTAGE
vs. COMMON-MODE VOLTAGE
TOTAL OFFSET VOLTAGE
vs. COMMON-MODE VOLTAGE
CSA HISTOGRAM
30
700
600
500
400
300
200
100
0
4
3
8x ADC PATH
GAIN = 8x
ANALOG PATH
T
A
= -40°C
T
= +125°C
A
25
20
15
10
5
2
T
= +25°C
A
T
= +85°C
1
A
0
-1
-2
-3
-4
T
A
= -40°C
20
-100
-200
-300
T
= +25°C
40
T
= +85°C
20
A
A
T
= +125°C
A
0
0
10
30
50
60
0
10
30
(V)
40
50
60
V
(µV)
V
CM
(V)
OFFSET_CSA
V
CM
TOTAL OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
CSA OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
200
800
700
600
500
400
300
200
OP-AMP PATH
ADC PATH
GAIN = 8x
150
100
50
0
-50
-100
-150
-200
-250
2.5
3.0
3.5
4.0
(V)
4.5
5.0
5.5
2.5
3.0
3.5
4.0
(V)
4.5
5.0
5.5
V
V
CC
CC
RS- BIAS CURRENT
vs. COMMON-MODE VOLTAGE
RS+, RS- OFFSET CURRENT
vs. COMMON-MODE VOLTAGE
5
4
3
2
1
0
2.5
2.0
1.5
1.0
0.5
0
T
= +85°C
A
T
= +25°C
A
T
A
= -40°C
T
A
= +125°C
0
10
20
30
(V)
40
50
60
0
10
20
30
(V)
40
50
60
V
V
CM
CM
Maxim Integrated
│
6
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Typical Operating Characteristics (continued)
(V
= 3.3V, V
= 12V, T = +25°C, unless otherwise noted.)
CC
CM A
MAX9611 CSA GAIN ERROR
vs. COMMON-MODE VOLTAGE
TOTAL GAIN ERROR
vs. COMMON-MODE VOLTAGE
SDA/SCL V
vs. SINKING CURRENT
OL
1.00
0.4
0.2
0.05
0.04
0.03
0.02
0.01
0
8x ADC PATH
ANALOG PATH
0.80
T
A
= -40°C
0.60
0.40
T
A
= +25°C
0
0.20
-0.2
-0.4
-0.6
-0.8
-1.0
0
-0.20
-0.40
T
= +85°C
A
T
A
= +125°C
-0.60
-0.80
-1.00
0
10
20
30
(V)
40
50
60
0
10
20
30
(V)
40
50
60
0
0.5
1.0
1.5
2.0
2.5
3.0
V
V
SDA SINKING CURRENT (mA)
CM
CM
OUTPUT LOW VOLTAGE
vs. OUTPUT SINK CURRENT
SUPPLY CURRENT vs. SUPPLY VOLTAGE
2.0
1.7
1.4
1.1
0.8
0.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2.5
3.0
3.5
4.0
(V)
4.5
5.0
5.5
0
5
10
15
20
V
OUTPUT SINK CURRENT (mA)
CC
CSA GAIN vs. FREQUENCY
(RS+/RS- TO OUT PATH)
OP-AMP GAIN vs. FREQUENCY
(SET TO OUT)
15
10
5
15
10
5
0
0
-5
-5
-10
-15
-10
-15
-20
-25
-30
-20
-25
-30
R
V
- R = 220mV
S-
S+
IN
= 100mV
R
- R = V
S-
+ V = 200mV + 300mV
SENSE DC P-P
P-P
S+
1
10
100
1,000
10,000
1
10
100
1,000
10,000
FREQUENCY (kHz)
FREQUENCY (kHz)
Maxim Integrated
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7
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Typical Operating Characteristics (continued)
(V
= 3.3V, V
= 12V, T = +25°C, unless otherwise noted.)
CC
CM A
CMRR vs. FREQUENCY
CSA ADC PATH
CMRR vs. FREQUENCY
ANALOG OP-AMP PATH
P-P NOISE (RS+/RS- TO OUT)
MAX9611 toc17
0
-70
-75
V
CM
V
AC
= 12V
= 10V
P-P
-20
-40
-60
-80
-85
-90
-95
-80
-100
-105
-110
-115
-120
-100
-120
-140
1
10
100
1000
0.01
0.1
1
10
100
1000
TIME (10s/div)
FREQUENCY (kHz)
FREQUENCY (kHz)
INTEGRAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
(SET INPUT)
DIFFERENTIAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
(SET INPUT)
1.0
0.5
0.3
0.8
0.6
0.4
0.2
0
0.1
-0.1
-0.3
-0.5
-0.7
-0.9
-1.1
-1.3
-1.5
-0.2
-0.4
-0.6
-0.8
-1.0
0
512 1024 1536 2048 2560 3072 3584 4096
DIGITAL CODE
0
512 1024 1536 2048 2560 3072 3584 4096
DIGITAL CODE
ADC NOISE HISTOGRAM ON
ADC NOISE HISTOGRAM ON
V
= 0.5V
V
= 20mV (GAIN = 8x)
SET
SENSE
1000
900
800
700
600
500
400
300
200
100
0
1000
900
800
700
600
500
400
300
200
100
0
DIGITAL CODE
DIGITAL CODE
Maxim Integrated
│ 8
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Typical Operating Characteristics (continued)
(V
= 3.3V, V
= 12V, T = +25°C, unless otherwise noted.)
CC
CM A
HOT-SWAP OPERATION WITH
p-CHANNEL FET MODE 000
WATCHDOG LATCH RETRY MODE 111
WATCHDOG LATCH RETRY MODE 111
MAX9611 toc22
MAX9611 toc23
MAX9611 toc24
DTIM = 0, RTIM = 1
SET
PULSE WIDTH > 1ms
DTIM = 0, RTIM = 0
V
= 600mV
V
= 600mV
SET
V
PULSE WIDTH < 1ms
PULLUP
V
V
CSAIN
V
OUT
(UNREGULATED)
200mV/div
200mV/div
CSAIN
V
OUT
(REGULATED)
V
5V/div
V
OUT
5V/div
OUT
R
= 8Ω
OUT
TIME (100µs/div)
TIME (400µs/div)
TIME (4ms/div)
WATCHDOG LATCH MODE 111
WATCHDOG LATCH MODE 111
MAX9611 toc26
MAX9611 toc25
200mV/div
V
CSAIN
V
CSAIN
200mV/div
V
OUT
10V/div
DTIM = 1, RTIM = 1
5V/div
DTIM = 0, RTIM = 1
V
OUT
V
= 600mV
V
= 600mV
SET
SET
PULSE WIDTH > 1ms
PULSE WIDTH > 1ms
TIME (100µs/div)
TIME (1ms/div)
WATCHDOG LATCH RETRY MODE 111
WATCHDOG LATCH RETRY MODE 111
MAX9611 toc27
MAX9611 toc28
DTIM = 0, RTIM = 0
DTIM = 0, RTIM = 1
V
= 600mV
V
= 600mV
SET
SET
V
CSAIN
PULSE WIDTH > 1ms
PULSE WIDTH > 1ms
200mV/div
V
CSAIN
200mV/div
V
OUT
5V/div
V
5V/div
OUT
TIME (10ms/div)
TIME (10ms/div)
Maxim Integrated
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Pin Configuration
TOP VIEW
+
OUT
RS+
RS-
10
9
V
CC
1
2
3
4
5
A0
MAX9611
MAX9612
8
A1
SET
GND
7
SDA
SCL
6
µMAX
Pin Description
PIN
1
NAME
OUT
RS+
RS-
FUNCTION
Internal Amplifier/Comparator Output
2
Positive Current-Sensing Input. Power side connects to external sense resistor.
3
Negative Current-Sensing Input. Load side connects to external sense resistor.
4
SET
GND
SCL
SDA
A1
External Set-Point Voltage
Ground
5
2
6
I C Interface Clock Input
2
7
I C Interface Data Input/Output
8
Address Input 1
Address Input 0
9
A0
10
V
Supply Voltage Input. Bypass V
to GND with a 0.1µF and a 4.7µF capacitor in parallel.
CC
CC
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Functional Diagrams
V
CC
RS+
RS-
CSA
MAX9611
1x, 4x,
8x
A0
2.5x
DECODER
A1
SCL
2
12-BIT
ADC
I C
MUX
OP AMP/
COMP
OUT
SDA
TEMP
REGISTERS
SET
GND
V
CC
RS+
RS-
CSA
MAX9612
1x, 4x,
8x
A0
A1
2.5x
DECODER
SCL
SDA
2
12-BIT
ADC
I C
MUX
OUT
OP AMP/
COMP
TEMP
REGISTERS
SET
GND
NOTE: ANALOG PATH IN BOLD.
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
nates input stage crossover distortion, typical in most
rail-to-rail input current-sense amplifiers. Low input bias
currents and low input offset currents allow a wide selec-
tion of input filters to be designed without degrading the
accuracy of the current-sense amplifier.
Detailed Description
The MAX9611/MAX9612 are high-side, current-sense
amplifiers with an integrated 12-bit ADC and an internal
selectable op amp/comparator. These devices are ideal
for a variety of industrial and automotive applications.
The current-sense amplifier inputs feature both a
-0.3V/+65V common-mode absolute maximum rating
as well as a ±65V differential absolute maximum rating,
allowing a wide variety of fault conditions to be withstood
easily by the device without damage.
The MAX9611/MAX9612’s high-side, current-sense
amplifiers operate over a wide 0V to 60V input common-
mode voltage range. The programmable full-scale voltage
(440mV, 110mV, and 55mV) allows for a wide dynamic
range current measurement and application flexibility in
choosing sense resistor values.
The current-sense amplifier has a gain of 2.5V/V and
connects directly to the output op-amp/comparator inputs.
The ADC path features a 1x, 4x, and 8x programmable
gain providing for 440mV, 110mV, and 55mV full-scale
sense voltage.
2
The I C bus is 1.8V and 3.3V logic compatible and
can interface with modern microcontrollers. An inter-
nal 12-bit, 500sps integrating analog-to-digital converter
(ADC) allows the user to read analog signals such as die
temperature, V
, V
, V
, and V
.
OUT SET RSCM
SENSE
Analog-to-Digital Converter (ADC)
At power-up, the selectable op-amp/comparator block
is configured in the op-amp mode. The op amp has an
effective 60V Class A-type output stage and can be used
to limit inrush currents and create a current source when
used in a closed-loop system. When the internal compara-
tor is selected, the MAX9611/MAX9612 can be configured
to have a latched and retry functionality, allowing a 60V
open-drain transistor output, ideal to operate high-side
relay-disconnect FETs. The MAX9611 has a noninverting
input-to-output configuration while the MAX9612 has an
inverting input-to-output configuration.
The MAX9611/MAX9612 feature an internal dual-slope
integrating 12-bit ADC that has a 2ms conversion time
and a 1.8V and 3.3V logic-compatible I C bus. An inter-
nal mux allows the following on-chip variables to be read:
input sense voltage, input common-mode voltage, SET
voltage, OUT voltage, and die temperature.
2
Temperature Measurement
Die temperature can be read by the ADC over the entire
operating range (-40°C to +125°C) with 0.5°C resolution.
Die temperature can be used for application calibration
and thermal monitoring and is available in a 9-bit, two’s
complement format. Readings outside of normal operat-
ing temperature range (-40°C to +125°C) are inaccurate
and should be considered invalid. See Table 1 for binary
and hex values.
Current-Sense Amplifier
The MAX9611/MAX9612 feature a precision current-
sense amplifier with a 0V to 60V input common-mode
voltage range. An internal negative charge pump elimi-
Table 1. Binary and Hex Digital Output Values for Temperature Measurements
DIGITAL OUTPUT
TEMPERATURE (°C)
BINARY
HEX
7F8x
190x
008x
000x
FF8x
E70x
D98x
+122.4
+24
+0.48
0
0111 1111 1xxx xxxx
0001 1001 0xxx xxxx
0000 0000 1xxx xxxx
0000 0000 0xxx xxxx
1111 1111 1xxx xxxx
1110 0111 0xxx xxxx
1101 1001 1xxx xxxx
-0.48
-24
-40
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
SET Voltage Measurement
Watchdog/Latch/Retry Functionality
The SET voltage serves as a reference voltage for the
internal op amp or comparator around which a control
loop can be designed. The low bias current for SET
allows high-impedance resistor-dividers and current out-
put DACs to be used, making it easy to interface without
introducing additional errors.
Internal digital circuitry is used to implement a watchdog
feature that can be useful to handle normal application
transients that are not true fault conditions. This feature
applies both to the op amp and comparator modes of
part operation. A watchdog delay time is internally set to
1ms by default but can be changed to 100µs. The retry
delay time is internally set to 50ms by default, but can be
changed to 10ms (see Tables 6 and 7).
The SET input can also serve as an auxiliary input port
to the ADC if the op amp or comparator is not utilized in
the application. Its full-scale input range extends from 0V
to 1.10V.
In normal operation mode, (Control Register 1 (0x0A)
000x xxxx), the amplifier output responds to the difference
between its inputs, i.e., the CSA output voltage and the
SET voltage. In open-loop configuration, the op amp can
be used as a comparator.
OUT Voltage Measurement
The internal amplifier/comparator output voltage can be
monitored over the entire 0V to 57.3V range by the ADC.
An internal high-value resistor-divider on OUT reduces
leakage current effects.
In a watchdog-latch-retry mode (Control Register 1 (0x0A)
111x xxxx), the output of the comparator waits for a
watchdog delay time (to ensure the CSA output continues
to stay above the SET voltage for this duration) before
responding, and then latches onto this state. After a retry
delay time, it resets the comparator state and the cycle
repeats.
Common-Mode Voltage Measurement
The input common-mode voltage is defined as the aver-
age of the voltage at RS+ and RS-. A high-value resistor-
divider allows measurement of the input common-mode
voltage over the 0V to 57.3V range.
Similar functionality is implemented for the op-amp mode
as well (Control Register 1 (0x0A) 000x xxxx to 011x
xxxx).
Sense Voltage Measurement
Three programmable gains allow for a wide range of cur-
rents to be read by the ADC. The current-sense amplifier
gain can be set to 1x, 4x, or 8x. The full-scale sense volt-
ages are then 440mV, 110mV, and 55mV, respectively.
A RESET bit is defined in Control Register 1 (0x0A) to
reset a latched state when commanded by the user.
2
I C Interface
Output Amplifier/Comparator
2
The MAX9611/MAX9612 I C interface consists of a
serial-data line (SDA) and serial-clock line (SCL). SDA
and SCL facilitate bidirectional communication between
the MAX9611/MAX9612 and the master at rates up to
400kHz. The MAX9611/MAX9612 are slave devices that
transfer and receive data. The master (typically a micro-
controller) initiates data transfer on the bus and generates
the SCL signal to permit that transfer.
The MAX9611/MAX9612 feature an internally selectable
op amp and comparator where one of the inputs is con-
nected to the 2.5x current-sense amplifier, and the other
input is connected to the SET input. The op amp or the
comparator output can be selected and connected to
OUT. The output stage is an open-drain 60V nFET, that
requires a suitable pullup resistor for proper operation.
The op amp then behaves like a Class-A output stage.
Select op amp or comparator function in Control Register
1 (0x0A) bit 7 (see Tables 4 and 5).
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
2
Slave Address
I C Read Operation
2
In an I C read operation (Figure 2), the bus master issues
A bus master initiates communication with a slave device
by issuing a START (S) condition followed by a slave
address. When idle, the MAX9611/MAX9612 continu-
ously wait for a START condition followed by their slave
address. When the MAX9611/MAX9612 recognize a
slave address, it is ready to accept or send data. The
MAX9611/MAX9612 offer 16 different slave addresses
using two address inputs, A1 and A0. See Table 2 for
different slave address options. The least significant bit
(LSB) of the address byte (R/W) determines whether
the master is writing to or reading from the MAX9611/
MAX9612 (R/W = 0 selects a write condition, R/W = 1
selects a read condition). After receiving the address, the
MAX9611/MAX9612 (slave) issue an acknowledge by
pulling SDA low for one clock cycle.
a write command first by initiating a START condition fol-
lowed by seven address bits, a write bit (R/W = 0) and the
8-bit register address. The master then issues a Repeated
START (Sr) condition, followed by seven address bits,
a read bit (R/W = 1). If the address byte is success-
fully received, the MAX9611/MAX9612 (slave) issue an
acknowledge (A). The master then reads from the slave.
For continuous read, the master issues an acknowledge
bit (AM) after each received byte. The master terminates
the read operation by sending a not acknowledge (NA)
bit. The MAX9611/MAX9612 then release the data line
SDA allowing the master to generate a STOP condition.
SINGLE WRITE ACKNOWLEDGE FROM
MAX9611/MAX9612
2
I C Write Operation
S
SLAVE ADDRESS
0
A
A
REGISTER ADDRESS
A write operation (Figure 1) begins with the bus master
issuing a START condition followed by seven address bits
and a write bit (R/W = 0). If the address byte is success-
fully received, the MAX9611/MAX9612 (slave) issue an
acknowledge (A). The master then writes to the slave and
the sequence is terminated by a STOP (P) condition for a
single write operation.
R/W
A
DATA
P
STOP
ACKNOWLEDGE FROM
MAX9611/MAX9612
BURST WRITE
S
SLAVE ADDRESS
0
A
REGISTER ADDRESS
R/W
For a burst write operation, more data bytes are sent after
the register address before the transaction is terminated.
A
A
DATA 1
DATA 3
A
A
DATA 2
DATA N
A
P
Table 2. MAX9611/MAX9612 Address
Description
STOP
2
DEVICE WRITE
ADDRESS (hex) ADDRESS (hex)
DEVICE READ
Figure 1. I C Write Operation
A1
A0
0
0
0
0xE0
0xE2
0xE4
0xE6
0xE8
0xEA
0xEC
0xEE
0xF0
0xF2
0xF4
0xF6
0xF8
0xFA
0xFC
0xFE
0xE1
0xE3
0xE5
0xE7
0xE9
0xEB
0xED
0xEF
0xF1
0xF3
0xF5
0xF7
0xF9
0xFB
0xFD
0xFF
SINGLE READACKNOWLEDGE FROM
MAX9611/MAX9612
1/3 x V
2/3 x V
CC
0
CC
S
SLAVE ADDRESS
0
A
1
REGISTER ADDRESS
DATA
0
V
CC
0
R/W
SLAVE ADDRESS
1/3 x V
1/3 x V
1/3 x V
1/3 x V
2/3 x V
2/3 x V
2/3 x V
2/3 x V
CC
CC
CC
CC
CC
CC
CC
CC
A
Sr
A
AM P
1/3 x V
2/3 x V
CC
R/W
ACKNOWLEDGE FROM
FROM MASTER
BURST READ ACKNOWLEDGE FROM
MAX9611/MAX9612
CC
V
CC
0
S
SLAVE ADDRESS
0
A
1
REGISTER ADDRESS
R/W
SLAVE ADDRESS
1/3 x V
2/3 x V
CC
DATA
A
Sr
A
CC
REPEAT
START
AM
R/W
V
CC
0
DATA N
DATA
AM
NA P
V
V
V
V
CC
CC
CC
CC
NO READ-ACKNOWLEDGE
FROM MASTER
1/3 x V
2/3 x V
CC
CC
2
V
Figure 2. I C Read Operation
CC
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
The two control registers are read/write registers used to
configure the ADC for different modes of operation.
Registers
The MAX9611/MAX9612 include five 12-bit data register
banks and two 8-bit control registers.
Table 3 lists all the registers, their corresponding POR
values and their addresses.
Table 3. Internal Register/Addresses
REGISTERS
POR VALUES (hex)
0x000
REGISTER ADDRESS (hex)
CSA DATA BYTE 1 (MSBs)
CSA DATA BYTE 1 (LSBs)
RS+ DATA BYTE 1 (MSBs)
RS+ DATA BYTE 1 (LSBs)
OUT DATA BYTE 1 ( MSBs)
OUT DATA BYTE 1 (LSBs)
SET DATA BYTE 1 (MSBs)
SET DATA BYTE 1 (LSBs)
TEMP DATA BYTE 1 (MSBs)
TEMP DATA BYTE 1 (LSBs)
CONTROL REGISTER 1
CONTROL REGISTER 2
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x000
0x000
0x000
0x000
0x000
0x000
0x000
0x800
0x000
0x000
0x000
Data Registers
The five 12-bit data registers banks comprise two 8-bit registers for 8 MSBs and 4 LSBs. The 12-bit data is split between
the two 8-bit data bytes as seen in Figure 1. They are read-only registers that hold the converted data. Do not issue a
STOP command until both bytes are read. Instead use a Repeated START command to read the second byte.
Byte 1
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MSB12
MSB11
MSB10
MSB09
MSB08
MSB07
MSB06
MSB05
Byte 2
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LSB05
LSB03
LSB02
LSB01
0
0
0
0
Control Register 1
Control Register 1 is an 8-bit write/read register that configures the MAX9611/MAX9612 for different modes of operation.
Tables 4 and 5 show the bit location and function for Control Register 1.
Table 4. Control Register 1 Bit Location
BIT NUMBER
BIT NAME
7
MODE2
0
6
MODE1
0
5
MODE0
0
4
LR
0
3
SHDN
0
2
MUX2
0
1
MUX1
0
0
MUX0
0
POR VALUE
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Table 5. Control Register 1 Bit Description
BIT
BIT NAME
FUNCTION
000 Channel A: Read current-sense amplifier output from ADC, gain = 1x
001 Channel A: Read current-sense amplifier output from ADC, gain = 4x
010 Channel A: Read current-sense amplifier output from ADC, gain = 8x
011 Channel B: Read average voltage of RS+ (input common-mode voltage) from ADC
100 Channel C: Read voltage of OUT from ADC
MUX2, MUX1,
MUX0
2, 1, 0
101 Channel D: Read voltage of SET from ADC
110 Channel E: Read internal die temperature from ADC
111 Read all channels in fast-read mode, sequentially every 2ms. Uses last gain setting.
Power-on state = 0
0 = Normal operation
1 = Shutdown mode
3
4
SHDN
LR
0 = Normal operation
1 = Reset if comparator is latched due to MODE = 111. This bit is automatically reset after a 1
is written.
000 = Normal operation for op amp/comparator
111 = Comparator mode. OUT remains low until CSA output > V
for 1ms, OUT latches
SET
high for 50ms, then OUT autoretries by going low. The comparator has an internal
±10mV hysteresis voltage to help with noise immunity. For MAX9612, the polarity is
reversed.
MODE2, MODE1,
MODE0
7, 6, 5
011 = Op-amp mode. OUT regulates pFET for 1ms at V
, OUT latches high for 50ms,
SET
then OUT autoretries by going low. For MAX9612, the polarity is reversed.
Control Register 2
Control Register 2 is an 8-bit write/read register that provides the different time delay options for asserting the comparator
output when monitoring fault events. Tables 6 and 7 show the bit location and function for Control Register 2.
Table 6. Control Register 2
BIT NUMBER
BIT NAME
7
X
0
6
X
0
5
X
0
4
X
0
3
DTIM
0
2
RTIM
0
1
X
0
0
X
0
POR VALUE
Table 7. Control Register 2 Bit Descriptions
BIT
BIT NAME
FUNCTION
7, 6, 5, 4
X
Set to 0
Watchdog delay time
0 = 1ms
3
DTIM
1 = 100µs
Watchdog retry delay time
0 = 50ms
1 = 10ms
2
RTIM
X
1, 0
Set to 0
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Choose a suitable sense resistor and a low R
pFET
Power-On Reset
DS-ON
to ensure the best efficiency during normal operation.
Choose a pFET with large power dissipation to ensure com-
pliance with safe operating area of the pFET. The MAX9611
comes equipped with a variety of watchdog options to help
with this design (see Control Register 2, Table 7).
The MAX9611/MAX9612 include power-on reset circuitry
that ensures all registers reset to a known state on power-
up. Once V
goes above 2.4V, the POR circuit releases
CC
the registers for normal operation.
Applications Information
Choose resistor values R1 and R2 to ensure that the
pFET is fully on in normal operating conditions and to
ensure that the VGS maximum rating is not exceeded.
Also, R1 and R2 help limit the current in the open-drain
Inrush Current Limiter
The MAX9611 can be used as an inrush current limiter
for a number of applications as shown in Figure 3. Note
that the sense resistor can be placed on either side of
the pFET. Since the input common-mode voltage of the
MAX9611 extends to ground, the sense resistor can be
placed at the load side as well, allowing current to be
sensed even when there is a dead-short on the load.
output stage of the internal op amp. R
and C
COMP
COMP
help rolloff high-frequency gain of the feedback control
system. R2 and C set a pole, for which 10kHz is a
COMP
good choice. R
and C
set a zero, for which
COMP
COMP
100kHz is a good choice.
With the internal gain of the current-sense amplifier
(2.5V/V), the inrush current-limit threshold can be set
using resistor-divider R3 and R4 as follows:
The inrush current limiting circuit reads and measures
the load current during normal operation and can limit
the load current to a user-set value. In normal operation,
the load current is below the set threshold. The pFET is
fully turned on because the op-amp output is at 0V. In the
event of an overcurrent situation at the load, the op-amp
controls the pFET’s gate-voltage so it transitions to a
linear region, thus limiting the load current. In this case,
V
×R3
CC
= I
LIMIT
R4 + R3 2.5×R
(
)
(
)
SENSE
Note: The inrush current limiter can be changed to a high-
side relay-disconnect circuit by using the MAX9611 set to
comparator mode (MODE 111).
the op-amp output voltage is between 0V and V
required for current-limiting.
, as
BAT
INRUSH CURRENT LIMITER
R
SENSE
V
BAT
C
COMP
R2
P
RS+
RS-
2.7V TO 5.5V
R
COMP
LOAD
V
A0
A1
CC
0.1µF
R1
R4
MAX9611
OUT
SET
2
I C CLOCK
INPUT
0.1µF
1µF
SCL
SDA
2
I C DATA
R3
INPUT/OUTPUT
GND
(OUTPUT SET TO OP-AMP MODE)
Figure 3. Inrush Current Limiter
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
When the OUT open-dran transistor is off, the gate volt-
age of the PA FET is:
Base-Station PA Gain Control
While the MAX9611 is designed to control high-side
pFETs, the MAX9612 can be similarly used to control
low-side nFETs. For example, the MAX9612 can be used
to control the DC bias point of power amplifier LDMOS
or GaN nFETs in base-station applications. The circuit
shown in Figure 4 also allows the option to apply negative
bias voltages to the PA FET, which is required for certain
types of transistors for proper operation.
V
R2 + R3
V
R1
(
)
NEG
CLAMP
V
=
+
GATE
R1+ R2 + R3
R1+ R2 + R3
R
and C
COMP
connected to the OUT pin compen-
COMP
sate the internal amplifier. Choose a corner frequency of
100kHz.
Choose suitable R
as required for the application.
SENSE
In the circuit shown, the nFET is in a linear mode of opera-
tion to allow it to amplify high-frequency RF signals, while
the MAX9612 sets the DC operating point. The gain of
the FET can be varied by changing its drain current. This
operating point can be varied by an external DAC voltage
that feeds the SET pin.
The inductor isolates the DC measuring point of current
from the high-frequency AC signals through the PA FET,
as well as helping with the high-frequency gain.
Power-Supply Bypassing and Grounding
The MAX9611/MAX9612 share a common ground pin for
both the analog and digital on-chip circuitry. It is therefore
V
NEG
and V
together with R1, R2, and R3 set the
CLAMP
DC bias point limits for the PA transistor. V
is a suit-
very important to properly bypass the V
to GND, and to
CLAMP
CC
have a solid low-noise ground plane on the circuit board so
as to minimize ground bounce. Bypass V to GND with
able positive voltage and V
is a suitable negative volt-
NEG
age. When V
= 0V, the gate voltage of the PA FET is:
OUT
CC
low ESR 0.1µF in parallel with a 4.7µF ceramic capacitor
to GND placed as close as possible to the device.
V
×R2
NEG
= V
OUT
R1+ R2
(
)
BASE-STATION PA GAIN CONTROL
2.7V TO 5.5V
RS-
RS+
RF
OUT
V
CC
A0
A1
C
IN
V
CLAMP
MAX9612
R3
2
I C CLOCK
SCL
SDA
R2
N
INPUT
OUT
2
I C DATA
INPUT/OUTPUT
R
COMP
R1
10-BIT
DAC
SET
C
COMP
V
NEG
GND
RF
IN
(OUTPUT SET TO OP-AMP MODE)
Figure 4. Base-Station PA Gain Control
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MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
LAND
PATTERN
NO.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
10 µMAX
U10+2
21-0061
90-0330
Maxim Integrated
│ 19
www.maximintegrated.com
MAX9611/MAX9612
High-Side, Current-Sense Amplifiers with
12-Bit ADC and Op Amp/Comparator
Revision History
REVISION REVISION
PAGES
DESCRIPTION
CHANGED
NUMBER
DATE
0
1
2
3
9/10
11/10
1/11
Initial release
—
Updated text in Table 5 to add “comparator” to mode 000 for bits 7, 6, 5
Relaxed room temperature limits for 4x and 8x gains from 0.3mV to 0.5mv
Updated TYP spec for output current sink in the Electrical Characteristics and TOC 11
16
1, 2
3, 7
6/11
4
5
6/14
Update equation in Inrush Current Limiter section
Updated Electrical Characteristics
17
4
12/19
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2020 Maxim Integrated Products, Inc.
│ 20
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