MAX9760EVSYS/EVKIT [MAXIM]
Evaluation System/Evaluation Kit for the MAX9760/MAX9761/MAX9762/MAX9763 ; 评估系统/评估板MAX9760 / MAX9761 / MAX9762 / MAX9763\n
| 型号： | MAX9760EVSYS/EVKIT |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Evaluation System/Evaluation Kit for the MAX9760/MAX9761/MAX9762/MAX9763
|
| 文件： | 总14页 (文件大小：356K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2833; Rev 1; 9/03
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
General Description
Features
The MAX9760 evaluation system (EV system) consists
of a MAX9760 evaluation kit (EV kit) and a companion
Maxim System Management Bus (SMBus™) interface
board. The MAX9760 EV kit is also capable of evaluat-
ing the MAX9761/MAX9762/MAX9763.
ꢀ 4.5V to 5.5V Single-Supply Operation
ꢀ 3W Stereo Bridge-Tied-Load (BTL) Amplifier
ꢀ 100dB Power-Supply Rejection Ratio
ꢀ SMBus/I2C-Compatible 2-Wire Serial Interface
ꢀ 2:1 Stereo Input MUX
The MAX9760 EV kit is a fully assembled and tested
surface-mount circuit board that evaluates the
MAX9760 3W stereo audio power amplifier plus head-
phone driver. The EV kit is designed to be driven by
any stereo audio source such as a CD player. The EV
kit includes RCA jacks on the inputs, a 3.5mm head-
phone jack, and terminal blocks on the outputs to facili-
tate easy connections to the circuit board. The EV kit
includes Windows®98/2000/XP-compatible software,
which provides a user interface for exercising the
MAX9760’s features.
ꢀ Selectable Bass-Boost Circuitry
ꢀ No Detectable Clicks or Pops
ꢀ Easy-to-Use, Menu-Driven Software
ꢀ Assembled and Tested
ꢀ Software-Controlled Mute, Shutdown, Input
Selection, and Gain
The Maxim SMBus interface board (MAXSMBUS) allows
an IBM-compatible PC to use its parallel port to emulate
an SMBus/I2C™ 2-wire interface. Windows 98/2000/XP-
compatible software provides a user-friendly interface to
exercise the MAX9760 features. The program is menu
driven and offers a graphical user interface (GUI) with
control buttons and a status display.
ꢀ Automatic Headphone-Sensing Circuitry
ꢀ Includes Windows 98/2000/XP-Compatible
Software and Demo PC Board
ꢀ Evaluates the MAX9760–MAX9763
The MAX9760EVSYS includes both the EV kit and the
MAXSMBUS interface board. Order the MAX9760EVKIT
if you already have an SMBus interface. The MAX9761
EV kit functions as a stand-alone unit, the MAXSMBUS
interface is not required.
Block Diagram
SINGLE SUPPLY
4.5V TO 5.5V
SMBus is a trademark of Intel Corp.
Windows is a registered trademark of Microsoft Corp.
2
2
I C is a trademark of Philips Corp. Purchase of I C compo-
nents of Maxim Integrated Products, Inc., or one of its subli-
censed Associated Companies, conveys a license under the
INPUT L1
INPUT L2
2
2
LEFT
Philips I C Patent Rights to use these components in an I C
2
system, provided that the system conforms to the I C Standard
Specification as defined by Philips.
INPUT R1
Ordering Information
INPUT R2
SMBus
INTERFACE
TYPE
RIGHT
IC
PART
TEMP RANGE
PACKAGE
SMBUS/I2C-
COMPATIBLE
INTERFACE
MAX9760EVKIT 0°C to +70°C
MAX9760EVSYS 0°C to +70°C
MAX9761EVKIT 0°C to +70°C
28 QFN
28 QFN
28 QFN
Not included
MAXSMBUS
Not required
SE/
BTL
I2C
HPS
COMPATIBLE
Note: To evaluate the MAX9762, or MAX9763, request a
MAX9762ETI or MAX9763ETI free sample with the
MAX9760EVKIT. To evaluate the MAX9761, order the
MAX9761EVKIT. The MAX9760 EV kit software is provided with
the MAX9760EVKIT; however, the MAXSMBUS board is
required to interface the EV kit to the computer when using the
included software.
Figure 1. MAX9760/61 EV Kit Block Diagram
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
Component List
DESIGNATION QTY
DESCRIPTION
DESIGNATION QTY
DESCRIPTION
R13, R14
R17
2
1
1
2
2
1kΩ 5ꢀ resistors (0402)
0.68µF 10ꢀ, 20V tantalum
capacitors (R-case)
AVX TAJR684K020
C1–C4
C5, C6, C16
C7, C8
4
3
2
5
2
680kΩ 5ꢀ resistor (0402)
47kΩ 5ꢀ resistor (0402)
Phono jacks, white
R19
J1, J3
J2, J4
100pF 5ꢀ, 50V C0G ceramic
capacitors (0402)
TDK C1005C0G1H101J
Phono jacks, red
Switched stereo headphone jack
(3.5mm dia)
J5
1
0.047µF 10ꢀ, 16V X7R ceramic
capacitors (0402)
TDK C1005X7R1C473K
J6
JU1
1
1
4
1
0
2
1
6
1
2 x 10 right-angle female receptacle
Jumper, dual row, 12-pin header
3-pin headers
JU2–JU5
JU6
220µF 20ꢀ, 6.3V tantalum
capacitors (C-case)
AVX TPSC227M006R0250
C9, C10, C11,
C14, C15
2-pin header
JU7
Not installed (SIP-3)
2-circuit terminal blocks
MAX9760ETI (28-pin QFN)
Shunts
TB1, TB2
U1
1.0µF 20ꢀ, 10V X7R ceramic
capacitors (0603)
TDK C1608X7R1A105M
C12, C13
None
None
R1–R6, R18
R7, R8
7
2
2
15.0kΩ 1ꢀ resistors (0402)
33.2kΩ 1ꢀ resistors (0402)
27.4kΩ 1ꢀ resistors (0402)
MAX9760 PC Board
Software disk (CD-ROM)
MAX9760 Evaluation Kit
None
1
R9, R10
R11, R12, R15,
R16
4
10kΩ 5ꢀ resistors (0402)
Component Suppliers
SUPPLIER
PHONE
FAX
WEBSITE
www.avxcorp.com
AVX
TDK
843-946-0238
847-803-6100
843-626-3123
847-390-4405
www.component.tdk.com
Note: Please indicate that you are using the MAX9760 when contacting these component suppliers.
Procedure
Quick Start
Recommended Equipment
• Computer running Windows 98, 2000, or XP
The MAX9760 EV kit is fully assembled and tested. Follow
the steps below to verify board operation. Do not turn on
the power supply until all connections are completed:
• Parallel printer port (this is a 25-pin socket on the
1) Carefully connect the boards by aligning the 20-pin
connector of the MAX9760 EV kit with the 20-pin
header of the MAXSMBUS interface board. Gently
press them together.
back of the computer)
• Standard 25-pin, straight-through, male-to-female
cable (printer extension cable) to connect the comput-
er’s parallel port to the Maxim SMBus interface board
2) Ensure that a shunt is placed across pins 1 and 2 of
jumpers JU1, JU4, and JU5.
• 9V/100mA DC power supply (for the SMBus card)
• 5V/4A DC power supply
3) Ensure that jumpers JU2 and JU3 do not have a
shunt placed on them.
• One pair of headphones (16Ω or greater)
4) Ensure that a shunt is installed on jumper JU6.
• Two stereo audio sources (to demonstrate the input
5) Connect a cable from the computer’s parallel port to
the SMBus interface board. Use a straight-through
mux feature)
• One pair of speakers (3Ω or greater)
2
_______________________________________________________________________________________
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
25-pin male-to-female cable. To avoid damaging
9) Ensure that both stereo audio sources are turned off.
the EV kit or your computer, do not use a 25-pin
SCSI port or any other connector that is physically
similar to the 25-pin parallel printer port.
10)Connect the first stereo audio source to the input
jacks labeled J1 and J2.
11)Connect the second stereo audio source to the
input jacks labeled J3 and J4.
6) The MAX9760.EXE software program can be run
from the CD-ROM or hard drive. Use the Windows
program manager to run the program. If desired,
you may use the INSTALL.EXE program to copy the
files and create icons in the Windows 98/2000/XP
Start menu.
12)Plug the headphones into the 3.5mm headphone
jack labeled J5.
13)Connect the speakers to the terminal blocks labeled
TB1 and TB2.
Do not turn on the power until all connections
are made.
14)Turn on the DC power supplies.
15)Enable the stereo audio sources.
7) Connect the 9V power supply to the pads labeled
POS9 and GND1 of the SMBus interface board.
16)Start the MAX9760 program by opening its icon in
the Start menu.
8) Connect the 5.0V power supply to the pads labeled
VDD and GND on the MAX9760 EV kit board.
17)Normal device operation can be verified by the SMBus
Status: DUT Board Found text in the Interface box.
Figure 2. MAX9760 EV Kit Software Main Window
_______________________________________________________________________________________
3
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
Output Gain Selection
Detailed Description of
Selecting the desired option in the Output Gain
Selection box allows the MAX9760 EV kit to amplify the
chosen input signal using one of two different gains.
Selecting Gain A (with Bass-Boost) amplifies the input
signal using the feedback networks connected to the
GAINRA and GAINLA pins of the MAX9760. Selecting
Gain B (Flat) amplifies the input signal using the feed-
back networks connected to the GAINRB and GAINLB
pins. When the device is in Automatic mode, the output
gain is dependent on the insertion of the headphones.
Refer to the MAX9760–MAX9763 data sheet for more
details.
Software
User-Interface Panel
The user interface (shown in Figure 2) is easy to operate;
use the mouse, or a combination of the Tab and Arrow
keys to manipulate the software. Each of the buttons
corresponds to bits in the command and configuration
bytes. By clicking on them, the correct SMBus write
operation is generated to update the internal registers of
the MAX9760. The Interface box indicates the current
Device Address, the Register Address, and the Data
Sent/Received for the last read/write operation. This
data is used to confirm proper device operation.
Simple SMBus Commands
There are two methods for communicating with the
MAX9760: through the normal user-interface panel or
through the SMBus commands available by selecting
the 2-Wire Interface Diagnostic item from the Options
pulldown menu. A display pops up that allows the
SMBus protocols, such as Read Byte and Write Byte, to
be executed. To stop normal user-interface execution
so that it does not override the manually set values, turn
off the update timer by unchecking the Automatic
Read checkbox.
Note: Words in boldface are user-selectable features in
the software.
Signal Input Selection
The MAX9760 EV kit can route one of two independent
stereo signals to the speakers or headphones. The
input signal is selected by choosing the desired option
in the Signal Input Selection box. Choosing Signal
Input #1, routes the signal from input jacks J1 and J2.
Choosing Signal Input #2, routes the signal from input
jacks J3 and J4.
The SMBus dialog boxes accept numeric data in binary,
decimal, or hexadecimal. Hexadecimal numbers should
be prefixed by $ or 0x. Binary numbers must be exactly
eight digits. See Figure 3 for an example of this tool.
MAX9760 Status
The program continually polls the device for new status
data and monitors the alert conditions. To disable contin-
uous polling of data, uncheck the Automatic Read
checkbox. If an interrupt condition is generated by the
headphones being inserted, the message INTERRUPT
appears.
Note: In places where the slave address asks for an 8-bit
value, it must be the 7-bit slave address of the MAX9760
as determined by ADD with the last bit set to 1 for a read
operation or a zero for a write. Refer to the MAX9760
data sheet for a complete list of registers and functions.
Speaker/Headphone Control
Selecting the desired option in the Speaker/Headphone
Control box allows the MAX9760 EV kit to operate in one
of three independent modes. The Automatic mode
(default) detects the insertion of the headphones in jack
J5. The speaker outputs are disabled if the headphones
are present, and enabled if the headphones are absent.
Selecting the Speaker Mode (BTL) provides drive to the
speakers and headphones (if both are present). Selecting
the Headphone Mode (Single-Ended) provides drive to
the headphones only.
Detailed Description of
Hardware
The MAX9760 EV kit is a stereo, single-supply speak-
er/headphone amplifier. The EV kit is designed to be
driven by any stereo audio source.
The input impedance is 15kΩ. The EV kit is shipped
with components selected to produce a bass-boosted
frequency response (6dB, f = 100Hz) and a 0dB flat-
c
frequency response. The EV kit is powered with a 4.5V
to 5.5V supply. A highpass filter is implemented on the
MAX9760 EV kit. The lower 16Hz, -3dB corner frequen-
cy is dependent on components R1, R4, and C1, C4,
C9, and C10.
Software Mute and Shutdown Control
Selecting the desired option in the Mute and Shutdown
Control box allows the MAX9760 EV kit to disable the left,
right, or both output channels. Checking the Mute Left
option mutes the left channel. Checking the Mute Right
option mutes the right channel. Checking the Mute
Left+Right option mutes both channels.
Multiple input and output jacks facilitate easy connec-
tions to the board. Connect the speakers to terminal
blocks TB1 and TB2. Connect the two stereo input
sources through jacks J1, J2 and J3, J4. Connect the
headphones through jack J5.
Checking the Shutdown all Audio Circuitry places the
MAX9760 into a low-power shutdown mode.
4
_______________________________________________________________________________________
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
Figure 3. The above example shows a simple SMBusWriteByte operation using the included 2-Wire Interface Diagnostics. In this
example, the software is writing data (0x18) to Device Address 0x92, Register Address 0x01. The above data sequence mutes both
output channels of the MAX9760.
Address Selection
Jumper JU1 sets the MAX9760 slave address. The
default address is 1001 001Y (ADD = VDD). See Table
1 for a complete list of addresses.
Manual Headphone Sense Control
To simulate a pair of headphones being inserted into
the headphone jack J5, remove the shunt from jumper
JU6. Connect the load to the LEFT, RIGHT, and GND
pads located by headphone jack J5 (see Table 3 for
jumper settings).
Note: The first 7 bits shown are the address. Y (bit 0) is
the SMBus read/write bit. This bit is a 1 for a read oper-
ation or a zero for a write.
Bass-Boost
The MAX9760 EV kit includes circuitry to increase the
low-frequency (bass) response. To alter the bass
response (see Figure 4), follow the steps below:
Hardware Shutdown Control
Jumper JU5 controls the shutdown function of the
MAX9760 EV kit. Removing the shunt from JU5 allows
the shutdown function to be controlled by an external
signal source connected to the SHDN pad. See Table 2
for shutdown shunt positions.
1) Choose appropriate gains A and A .
1
2
2) Choose the center frequency f .
c
Table 1. Shunt Settings for SMBus Address
MAX9760 ADDRESS
JUMPER
SHUNT POSITION
MAX9760 ADDRESS PIN
BINARY
HEXADECIMAL
0x92
1–2*
3–4
V
1001 001Y
1001 010Y
1001 000Y
1001 011Y
DD
SDA
SGND
SCL
0x94
5–6
0x90
JU1
7–8
0x96
9–10
11–12
Not used for the MAX9760 or the MAX9762
(see the Gain Selection Table for more details).
*Default configuration.
_______________________________________________________________________________________
5
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
3) Calculate and install components R –R , C , and
7
10
7
OUTPUT MAGNITUDE (dB)
C using equations 1, 2, and 3.
8
A1
(Eq1)
R =R =10 20 ×15kΩ
A
1
7
8
A1
A + A
1
2
R ×10 20 ×15kΩ
2
7
R =R
=
9
10
A1
(Eq2)
(Eq3)
R − 10 20 ×15kΩ
A
2
7
FREQUENCY (Hz)
f
C
1
C
= C
=
Figure 4. The Bass-Boost Components Create an Output
Magnitude Response Similar to the Diagram Shown Above
7
8
2πf
R × R
7 9
C
where:
A = bass-boosted gain (dB)
Table 2. MAX9760 Shutdown Selection
1
SHUNT
JUMPER
DESCRIPTION
A = nonbass-boosted gain (dB)
2
POSITION
f = center frequency (Hz).
c
1–2*
MAX9760 enabled
MAX9760 shut down
JU5
2–3
Evaluating the MAX9761
*Default configuration.
MAX9761 Shutdown Control
Jumper JU5 controls the shutdown function of the
MAX9761. Removing the shunt from JU5 allows the
shutdown function to be controlled by an external sig-
nal source connected to the SHDN pad. See Table 4
for shutdown shunt positions.
Table 3. MAX9760 Manual Headphone
Sense Control
SHUNT
POSITION
JUMPER
DESCRIPTION
MAX9761 Gain Selection
Jumper JU1 controls the gain selection of the
MAX9761. The gain selection function can be set to
select gain A or gain B. Alternatively, the gain selection
can be controlled by an external signal source through
the GAINA/B pad. Gain selection can also be con-
trolled by the headphone sense pin, which enables
automatic gain selection. See Table 5 for gain selection
shunt positions.
MAX9760 EV kit headphone
sense controlled by the insertion
of headphones
Installed*
JU6
MAX9760 EV kit headphone
sense switch forced open
Not installed
*Default configuration.
Table 4. MAX9761 Shutdown Selection
MAX9761 Headphone Sense Enable
Jumper JU4 controls the HPS_EN pin of the MAX9761.
Alternatively, the shunt can be removed from JU4 and
the HPS_EN pin can be driven by an external signal
source connected to the HPS_EN pad. The HPS_EN
pin in conjunction with the HPS pin determines the out-
put mode of the MAX9761. Refer to the MAX9760–
MAX9763 data sheet for more details. See Table 6 for
headphone sense enable shunt positions.
SHUNT
POSITION
JUMPER
DESCRIPTION
1–2*
MAX9761 enabled
2–3
MAX9761 shutdown
JU5
SHDN function controlled by an
external signal source
Not installed
*Default configuration.
MAX9761 Mute Control
Jumper JU3 controls the Mute function of the
MAX9761. Alternatively, the shunt can be removed from
JU3 allowing the mute function to be driven by an
external signal source connected to the MUTE pad.
See Table 7 for mute shunt positions.
6
_______________________________________________________________________________________
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
MAX9761 Input Selection
Table 5. MAX9761 Gain Selection
Jumper JU2 controls the input selection function of the
SHUNT
POSITION
MAX9761
GAINA/B PIN
MAX9761. Alternatively, the shunt can be removed from
JU2 allowing the input selection function to be driven
by an external signal source connected to the IN1/2
pad. See Table 8 for input selection shunt positions.
JUMPER
DESCRIPTION
1–2*
3–4
5–6
7–8
VDD
SDA
Gain B selected
Not valid
DGND
SCL
Gain A selected
Not valid
Evaluating the MAX9762 and
MAX9763
The MAX9760 EV kit is also capable of evaluating the
SMBus/I2C-compatible MAX9762 and the parallel-drive
MAX9763. To evaluate the MAX9762 or MAX9763 mono
speaker/headphone driver, follow the directions given
below.
Gain selection
controlled by an
external signal
source
JU1
9–10
GAINA/B pad
HPS pin of
MAX9761
Automatic gain
selection mode
11–12
When evaluating the MAX9763, ensure that the
MAX9760 EV kit is not connected to the MAXSMBUS
board, as undesirable device operation may occur.
*Default configuration.
Hardware Setup
The MAX9760 EV kit must be modified to evaluate the
MAX9762 or MAX9763 mono speaker/headphone driver:
Table 6. MAX9761 Headphone Sense
Enable Selection
SHUNT
POSITION
1) Replace the MAX9760 with MAX9762 or MAX9763.
2) Cut the trace between pins 2 and 3 of jumper JU7.
JUMPER
DESCRIPTION
1–2*
HPS_EN pin tied high
HPS_EN pin tied low
3) Install a 3-pin header into the location designated
by JU7.
2–3
JU4
4) Install a shunt on pins 1–2 of jumper JU7.
The mono speaker output is accessed through the ter-
minal block designated TB2.
HPS_EN pin controlled by an
external signal source
Not installed
*Default configuration.
Software Control and Gain Selection
The MAX9762 can be controlled with the provided
MAX9760 EV kit software. Unlike the MAX9760, the
MAX9762 and MAX9763 have an additional gain for the
mono speaker. The feedback network that controls the
mono gain is composed of components R18 and C16. If
the output is forced into speaker mode (BTL), the mono
gain is selected regardless of the A/B gain. If the output is
forced into headphone mode (single ended), the output
gain is either A or B. Refer to the MAX9760–MAX9763
data sheet for more details.
Table 7. MAX9761 Mute Control
SHUNT
POSITION
JUMPER
DESCRIPTION
1–2
Output disabled
Output enabled
2–3*
JU3
Mute function controlled by an
external signal source
Not installed
*Default configuration.
Table 8. MAX9761 Input Selection
SHUNT
POSITION
JUMPER
DESCRIPTION
1–2
Input 2 selected
2–3*
Input 1 selected
JU2
Input selection controlled by an
external signal source
Not installed
*Default configuration.
_______________________________________________________________________________________
7
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
J6
VDD
VDD
C13
1µF
HEADER 20 PIN
VDD
GND
J6-2
J6-3
J6-7
SDA
SCL
J6-4
J6-5
VDD
C14
220µF
6.3V
C15
220µF
6.3V
J6-9
SGND
INT
J6-6
J6-11
J6-13
J6-15
J6-17
J6-20
J6-1
C16
J6-8
RPGND LPGND DGND SGND
100pF
R13
RPGND
LPGND
SCL
J6-10
J6-12
J6-14
J6-16
J6-18
J6-19
1kΩ
11
25
3
VDD
MUTE
IN1/2
R18
15kΩ
1%
PV
DD
PV
V
DD
DD
SDA
SCL
1
2
1
JU7
JU2
18
21
28
1
2
GND
R14
1kΩ
3
3
VDD
R10
27.4kΩ
1%
SGND
C8
1
2
DGND
SDA
INT
SCL
GAINA/B
HPS_EN
HPS
JU3
DGND
0.047µF
SDA
INT
GAINA/B
INT
R15
GAINRA
GAINRB
3
10kΩ
VDD
R8
33.2kΩ
1%
1
DGND
JU4
2
U1
MAX9760
2
R16
10kΩ
C6
3
100pF
HPS
22
R6
15kΩ
1%
1
DGND
SHDN
SHDN
JU5
14
5
2
SHDN
INL1
C10
220µF
6.3V
SHDN
3
C1
R1
15kΩ
1%
0.68µF
24
26
OUTR+
OUTR-
20V
J1
J2
J3
J4
2
1
DGND
R12
10kΩ
C2
0.68µF
20V
TB2
RIGHT
TB2-1 TB2-2
R2
15kΩ
1%
SGND
TERMINAL BLOCK
RPGND
19
6
2
1
R19
47kΩ
INR1
INL2
INR2
16
7
HPS
HPS
C3
0.68µF
20V
R3
15kΩ
1%
R9
27.4kΩ
1%
SGND
C7
0.047µF
2
1
GAINLA
R7
33.2kΩ
1%
C4
0.68µF
20V
R4
15kΩ
1%
SGND
VDD
20
2
1
C5
R17
680kΩ
100pF
8
GAINLB
RIGHT
SGND
JU1
HEADER 12 PIN
R5
15kΩ
1%
VDD
C9
220µF
6.3V
15
4
JU6
J5
JU1-1
JU1-4
JU1-5
JU1-8
JU1-2
ADD
4
3
2
SDA
SCL
JU1-3
JU1-6
JU1-7
10
12
SV
DD
OUTL+
OUTL-
1
17
GND
LEFT
R11
10kΩ
BIAS
DGND
GAINA/B
HPS
JU1-9 JU1-10
JU1-12 JU1-11
PGND PGND PGND PGND
TB1
LEFT
TB1-1 TB1-2
C11
SGND
13
9
23
27
TERMINAL BLOCK
220µF
LPGND
6.3V
C12
1µF
DGND
SGND
LPGND
RPGND
Figure 5. MAX9760 EV Kit Schematic
_______________________________________________________________________________________
8
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
Figure 6. MAX9760 EV Kit Component Placement Guide—Component Side
Figure 7. MAX9760 EV Kit PC Board Layout—Component Side
_______________________________________________________________________________________
9
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
Figure 8. MAX9760 EV Kit PC Board Layout—Inner Layer 2
Figure 9. MAX9760 EV Kit PC Board Layout—Inner Layer 3
10 ______________________________________________________________________________________
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
Figure 10. MAX9760 EV Kit PC Board Layout—Solder Side
______________________________________________________________________________________ 11
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
J6
VDD
VDD
C13
1µF
HEADER 20 PIN
VDD
GND
J6-2
J6-3
J6-7
SDA
SCL
J6-4
J6-5
VDD
C14
220µF
6.3V
C15
220µF
6.3V
J6-9
SGND
INT
J6-6
J6-11
J6-13
J6-15
J6-17
J6-20
J6-1
C16
J6-8
RPGND LPGND DGND SGND
100pF
R13
RPGND
LPGND
IN1/2
J6-10
J6-12
J6-14
J6-16
J6-18
J6-19
1kΩ
11
25
3
VDD
MUTE
IN1/2
R18
15kΩ
1%
PV
DD
PV
V
DD
DD
SDA
SCL
1
2
1
JU7
JU2
18
21
28
1
2
GND
R14
1kΩ
3
3
VDD
R10
27.4kΩ
1%
SGND
C8
1
2
DGND
SDA
INT
SCL
GAINA/B
HPS_EN
HPS
JU3
DGND
0.047µF
MUTE
GAINA/B
INT
R15
GAINRA
GAINRB
3
10kΩ
VDD
R8
33.2kΩ
1%
1
DGND
JU4
2
U1
MAX9761
2
HPS_EN
R16
10kΩ
C6
3
100pF
HPS
22
R6
15kΩ
1%
1
DGND
SHDN
SHDN
JU5
14
5
2
SHDN
INL1
C10
220µF
6.3V
SHDN
3
C1
R1
15kΩ
1%
0.68µF
24
26
OUTR+
OUTR-
20V
J1
J2
J3
J4
2
1
DGND
R12
10kΩ
C2
0.68µF
20V
TB2
RIGHT
TB2-1 TB2-2
R2
15kΩ
1%
SGND
TERMINAL BLOCK
RPGND
19
6
2
1
R19
47kΩ
INR1
INL2
INR2
16
7
HPS
HPS
C3
0.68µF
20V
R3
15kΩ
1%
R9
27.4kΩ
1%
SGND
C7
0.047µF
2
1
GAINLA
R7
33.2kΩ
1%
C4
0.68µF
20V
R4
15kΩ
1%
SGND
VDD
20
2
1
C5
R17
680kΩ
100pF
8
GAINLB
RIGHT
SGND
JU1
HEADER 12 PIN
R5
15kΩ
1%
VDD
C9
220µF
6.3V
15
4
JU6
J5
GAINA/B
JU1-1
JU1-4
JU1-5
JU1-8
JU1-2
4
3
2
SDA
SCL
JU1-3
JU1-6
JU1-7
10
12
SV
DD
OUTL+
OUTL-
1
17
GND
LEFT
R11
10kΩ
BIAS
DGND
GAINA/B
HPS
JU1-9 JU1-10
JU1-12 JU1-11
PGND PGND PGND PGND
TB1
LEFT
TB1-1 TB1-2
C11
SGND
13
9
23
27
TERMINAL BLOCK
220µF
LPGND
6.3V
C12
1µF
DGND
SGND
LPGND
RPGND
Figure 11. MAX9761 EV Kit Schematic
12 ______________________________________________________________________________________
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
J6
VDD
VDD
C13
1µF
HEADER 20 PIN
VDD
GND
J6-2
J6-3
J6-7
SDA
SCL
J6-4
J6-5
VDD
C14
220µF
6.3V
C15
220µF
6.3V
J6-9
SGND
INT
J6-6
J6-11
J6-13
J6-15
J6-17
J6-20
J6-1
C16
J6-8
RPGND LPGND DGND SGND
100pF
R13
RPGND
LPGND
SCL
J6-10
J6-12
J6-14
J6-16
J6-18
J6-19
1kΩ
11
25
3
VDD
MUTE
IN1/2
R18
15kΩ
1%
PV
DD
PV
V
DD
DD
SDA
SCL
1
2
1
JU7
JU2
18
21
28
1
2
GAINM
R14
1kΩ
3
3
VDD
R10
27.4kΩ
1%
SGND
C8
1
2
DGND
SDA
INT
SCL
GAINA/B
HPS_EN
HPS
JU3
DGND
0.047µF
SDA
INT
GAINA/B
INT
R15
GAINRA
3
10kΩ
VDD
R8
33.2kΩ
1%
1
DGND
JU4
2
U1
MAX9762
2
R16
10kΩ
C6
3
100pF
HPS
22
GAINRB
R6
15kΩ
1%
1
DGND
SHDN
SHDN
JU5
14
5
2
SHDN
INL1
C10
220µF
6.3V
SHDN
3
C1
R1
15kΩ
1%
0.68µF
24
26
OUTR+
OUTR-
20V
J1
J2
J3
J4
2
1
DGND
R12
10kΩ
C2
0.68µF
20V
TB2
MONO
TB2-1 TB2-2
R2
15kΩ
1%
SGND
TERMINAL BLOCK
RPGND
19
6
2
1
R19
47kΩ
INR1
INL2
INR2
16
7
HPS
HPS
C3
0.68µF
20V
R3
15kΩ
1%
R9
27.4kΩ
1%
SGND
C7
0.047µF
2
1
GAINLA
R7
33.2kΩ
1%
C4
0.68µF
20V
R4
15kΩ
1%
SGND
VDD
20
2
1
C5
R17
680kΩ
100pF
8
GAINLB
RIGHT
SGND
JU1
HEADER 12 PIN
R5
15kΩ
1%
VDD
C9
220µF
6.3V
15
4
JU6
J5
JU1-1
JU1-4
JU1-5
JU1-8
JU1-2
ADD
4
3
2
SDA
SCL
JU1-3
JU1-6
JU1-7
10
12
SV
DD
OUTL+
N.C.
1
17
GND
LEFT
R11
10kΩ
BIAS
DGND
GAINA/B
HPS
JU1-9 JU1-10
JU1-12 JU1-11
GND PGND PGND PGND
TB1
N.C.
TB1-1 TB1-2
C11
SGND
13
9
23
27
TERMINAL BLOCK
220µF
LPGND
6.3V
C12
1µF
DGND
SGND
LPGND
RPGND
Figure 12. MAX9760 EV Kit Schematic (Modified for MAX9762)
______________________________________________________________________________________ 13
MAX9760/MAX9761 Evaluation
System/Evaluation Kit
J6
VDD
VDD
C13
1µF
HEADER 20 PIN
VDD
GND
J6-2
J6-3
J6-7
SDA
SCL
J6-4
J6-5
VDD
C14
220µF
6.3V
C15
220µF
6.3V
J6-9
SGND
INT
J6-6
J6-11
J6-13
J6-15
J6-17
J6-20
J6-1
C16
J6-8
RPGND LPGND DGND SGND
100pF
R13
RPGND
LPGND
IN1/2
J6-10
J6-12
J6-14
J6-16
J6-18
J6-19
1kΩ
11
25
3
VDD
MUTE
IN1/2
R18
15kΩ
1%
PV
PV
V
DD
DD
DD
SDA
SCL
1
2
1
JU7
JU2
18
21
28
1
2
GAINM
R14
1kΩ
3
3
VDD
R10
27.4kΩ
1%
SGND
C8
1
2
DGND
SDA
INT
SCL
GAINA/B
HPS_EN
HPS
JU3
DGND
0.047µF
MUTE
GAINA/B
INT
R15
GAINRA
3
10kΩ
VDD
R8
33.2kΩ
1%
1
DGND
JU4
2
U1
MAX9763
2
HPS_EN
R16
10kΩ
C6
3
100pF
HPS
22
GAINRB
R6
15kΩ
1%
1
DGND
SHDN
SHDN
JU5
14
5
2
SHDN
INL1
C10
220µF
6.3V
SHDN
3
C1
R1
15kΩ
1%
0.68µF
24
26
OUTR+
OUTR-
20V
J1
J2
J3
J4
2
1
DGND
R12
10kΩ
C2
TB2
MONO
TB2-1 TB2-2
R2
15kΩ
1%
SGND 0.68µF
TERMINAL BLOCK
20V
RPGND
19
6
2
1
R19
47kΩ
INR1
INL2
INR2
16
7
HPS
HPS
C3
R3
15kΩ
1%
R9
27.4kΩ
1%
SGND 0.68µF
C7
20V
0.047µF
2
1
GAINLA
R7
33.2kΩ
1%
C4
R4
15kΩ
1%
SGND 0.68µF
VDD
20V
20
2
1
C5
R17
680kΩ
100pF
8
GAINLB
RIGHT
SGND
JU1
HEADER 12 PIN
R5
15kΩ
1%
VDD
C9
220µF
6.3V
15
4
JU6
J5
GAINA/B
JU1-1
JU1-4
JU1-5
JU1-8
JU1-2
4
3
2
SDA
SCL
JU1-3
JU1-6
JU1-7
10
12
SV
DD
OUTL+
N.C.
1
17
GND
LEFT
R11
10kΩ
BIAS
DGND
GAINA/B
HPS
JU1-9 JU1-10
JU1-12 JU1-11
GND PGND PGND PGND
TB1
N.C.
TB1-1 TB1-2
C11
220µF
6.3V
SGND
13
9
23
27
TERMINAL BLOCK
LPGND
C12
1µF
DGND
SGND
LPGND
RPGND
Figure 13. MAX9760 EV Kit Schematic (Modified for MAX9763)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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