MAX9765 [MAXIM]
750mW Audio Amplifiers with Headphone Amp, Microphone Preamp, and Input Mux; 750MW音频放大器，耳机放大器，麦克风前置放大器和输入复用器
| 型号： | MAX9765 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 750mW Audio Amplifiers with Headphone Amp, Microphone Preamp, and Input Mux |
| 文件： | 总32页 (文件大小：1095K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2862; Rev 1; 2/05
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
General Description
Features
The MAX9765/MAX9766/MAX9767 family combines
speaker, headphone, and microphone amplifiers, all in
a small thin QFN package. The MAX9765 is targeted at
stereo speaker playback applications and includes a
stereo bridge-tied load (BTL) speaker amp, stereo
headphone amp, single-ended output mic amp, input
♦ 750mW BTL Stereo Speaker Amplifier
♦ 65mW Stereo Headphone Amplifier
♦ 2.7V to 5.5V Single-Supply Operation
♦ Patented Click-and-Pop Suppression
♦ Low 0.003% THD+N
2
MUX, and I C control. The MAX9766 is targeted at
♦ Low Quiescent Current: 13mA
♦ Low-Power Shutdown Mode: 5µA
♦ MUTE Function
mono speaker playback applications and includes a
mono BTL speaker amp, stereo headphone amp, differ-
2
ential output mic amp, input MUX, and I C control. The
MAX9767 is targeted at applications that do not require
a headphone amp and includes a stereo BTL speaker
amp, differential output mic amp, and parallel control.
These devices operate from a single 2.7V to 5.5V supply.
A high 95dB PSRR allows these devices to operate from
noisy supplies without additional power conditioning. An
ultra-low 0.003% THD+N ensures clean, low distortion
amplification of the audio signal. Patented click-and-pop
suppression eliminates audible transients on power and
shutdown cycles.
In speaker mode, the amplifiers can deliver up to
750mW of continuous average power into a 4Ω load. In
headphone mode, the amplifier can deliver up to 65mW
of continuous average power into a 16Ω load. The gain
of the amplifiers is externally set, allowing maximum
flexibility in optimizing output levels for a given load.
The MAX9765/MAX9766 also feature a 2:1 input multi-
plexer, allowing multiple audio sources to be selected.
The various functions are controlled by either an I2C-
compatible (MAX9765/MAX9766) or simple parallel
control interface (MAX9767).
♦ Headphone Sense Input
♦ Stereo 2:1 Input Multiplexer
♦ Optional 2-Wire, I2C-Compatible, or Parallel
Interface
♦ Small 32-Pin Thin QFN (5mm ✕ 5mm ✕ 0.8mm)
Package
Ordering Information
PART
TEMP RANGE
-40oC to +85oC
-40oC to +85oC
-40oC to +85oC
PIN-PACKAGE
32 Thin QFN-EP*
32 Thin QFN-EP*
32 Thin QFN-EP*
MAX9765ETJ
MAX9766ETJ
MAX9767ETJ
*EP = Exposed paddle.
Pin Configurations and Functional Diagrams appear at end of data
sheet.
Simplified Diagram
MUX
All devices include two low-noise microphone pre-
amps, a differential amp for internal microphones, and
a single-ended amplifier for additional external micro-
phones. A microphone bias output is provided, reduc-
ing external component count.
INL1
HEADPHONE
SPKR
LEFT
INL2
MUX
The MAX9765/MAX9766/MAX9767 are available in a
thermally efficient 32-pin thin QFN package (5mm ✕
5mm ✕ 0.8mm). All devices have short-circuit and
thermal-overload protection (OVP) and are specified
over the extended -40°C to +85°C temperature range.
INR1
INR2
SPKR
RIGHT
DEVICE
CONTROL
Applications
Notebooks
CONTROL
PDA Audio Systems
Tablet PCs
Digital Cameras
MICIN-
MICIN+
Cell Phones
MUX
MICOUT
2
AUXIN
Purchase of I C components from Maxim Integrated Products,
Inc., or one of its sublicensed Associated Companies, conveys a
2
MAX9765
license under the Philips I C Patent Rights to use these compo-
nents in an I C system, provided that the system conforms to the
I C Standard Specification defined by Philips.
MICBIAS
BIAS
2
2
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
ABSOLUTE MAXIMUM RATINGS
DD
V
to GND ...........................................................................+6V
Continuous Power Dissipation (T = +70°C)
A
SV
SV
PV
to GND .........................................................................+6V
32-Pin Thin QFN (derate 26.3mW/°C above +70°C) ...2105.3mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
DD
DD
DD
to V .........................................................................-0.3V
DD
DD
to V
....................................................................... 0.3V
PGND to GND..................................................................... 0.3V
All Other Pins to GND.................................-0.3V to (V + 0.3V)
DD
Output Short-Circuit Duration (to V or GND)..........Continuous
DD
Continuous Input Current (into any pin except power-supply
and output pins) ............................................................... 20mA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= PV
= 3.0V, GND = 0, HPS = MUTE = GND, SHDN = 3V, C
= 1µF, R = R = 15kΩ, R = ∞. T = T
to T
, unless
MAX
DD
DD
BIAS
IN
F
L
A
MIN
otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
5.5
28
UNITS
Supply Voltage Range
V
/PV
Inferred from PSRR test
2.7
V
DD
DD
MAX9765/MAX9767
MAX9766
12
7
Speaker mode
Quiescent Supply Current
I
17
mA
DD
(I
+ I
)
VDD
PVDD
Headphone mode, HPS = V
7
17
DD
Shutdown Current
Switching Time
I
SHDN = GND
5
18
µA
µs
SHDN
Gain or input switching
(MAX9765/MAX9766)
t
10
SW
C
C
= 1µF, settled to 90%
250
25
BIAS
BIAS
Turn-On/Turn-Off Time
t
ms
ON/OFF
= 0.1µF, settled to 90%
Input Bias Current
I
50
nA
oC
oC
A
BIAS
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Output Short-Circuit Current
150
8
To V
or GND
1.2
DD
STANDBY SUPPLY (SV
)
DD
V
V
= 1.25V, V
= 0V
230
400
5
BIAS
BIAS
DD
Standby Current
I
µA
SVDD
= 1.5V, V
= 3V
DD
OUTPUT AMPLIFIERS (SPEAKER MODE)
Output Offset Voltage
V
V
V
- V
, A = 1V/V
10
85
45
mV
dB
OS
OUT_+
OUT_-
V
= 2.7V to 5.5V
72
DD
Power-Supply Rejection Ratio
PSRR
f = 1kHz, V
= 200mV
72
RIPPLE
P-P
R = 8Ω
450
750
L
f
T
= 1kHz, THD+N = 1%,
= +25oC (Note 2)
IN
Output Power
P
mW
%
OUT
A
R = 4Ω
L
400
P
= 200mW,
OUT
0.033
0.065
89
R = 8Ω
L
Total Harmonic Distortion Plus
Noise
f
IN
= 1kHz, BW = 22Hz to
THD+N
SNR
22kHz
P
= 400mW,
OUT
R = 4Ω
L
R = 8Ω, V
22kHz
= 1.4V , BW = 22Hz to
RMS
L
OUT_
Signal-to-Noise Ratio
dB
2
_______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
ELECTRICAL CHARACTERISTICS (continued)
(V
= PV
= 3.0V, GND = 0, HPS = MUTE = GND, SHDN = 3V, C
= 1µF, R = R = 15kΩ, R = ∞. T = T
to T
, unless
MAX
DD
DD
BIAS
IN
F
L
A
MIN
otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
Maximum Capacitive Load Drive
Slew Rate
SYMBOL
CONDITIONS
MIN
TYP
400
1.4
MAX
UNITS
pF
C
No sustained oscillations
L
SR
V/µs
dB
Crosstalk
f
= 10kHz
73
IN
OUTPUT AMPLIFIERS (HEADPHONE MODE)
V
= 2.7V to 5.5V
95
75
50
40
65
DD
Power-Supply Rejection Ratio
Output Power
PSRR
f = 1kHz, V
= 200mV
dB
RIPPLE
P-P
f = 20kHz, V
= 200mV
P-P
RIPPLE
R = 32Ω
L
f
IN
= 1kHz, THD+N = 1%,
= +25oC (Note 2)
P
mW
OUT
T
A
R = 16Ω
L
35
V
= 0.7
,
OUT
RMS
0.002
0.005
0.004
89
R = 10kΩ
L
Total Harmonic Distortion Plus
Noise
f
= 1kHz, BW = 22Hz to
P
= 15mW,
OUT
IN
THD+N
%
22kHz
R = 32Ω
L
P
= 30mW,
OUT
R = 16Ω
L
R = 8Ω, V
BW = 20Hz to 22kHz
= 1.4V
RMS
,
L
OUT_
Signal-to-Noise Ratio
SNR
SR
dB
Slew Rate
0.7
200
79
V/µs
pF
Maximum Capacitive Load Drive
Crosstalk
C
No sustained oscillations
= 10kHz
L
f
dB
IN
BIAS VOLTAGE (BIAS)
BIAS Voltage
V
1.4
1.5
50
1.6
V
BIAS
Output Resistance
R
kΩ
BIAS
MICROPHONE AMPLIFIER GENERAL
V
V
V
V
- V
35
50
80
70
0.6
10
50
70
DD
OL
DD
OL
OH
R = 100kΩ
L
- GND
- V
400
150
400
Output Voltage Swing
V
mV
OUT
OH
R = 2kΩ
L
- GND
Slew Rate
SR
A = 10dB
V
V/µs
mA
pF
Output Short-Circuit Current
Maximum Capacitive Load Drive
To V
or GND
DD
C
No sustained oscillations
L
DIFFERENTIAL INPUT AMPLIFIER (MICIN+, MICIN-)
Input Offset Voltage
V
2
5
mV
OS
A = 20dB
31
V
Input Noise-Voltage Density
e
f
IN
= 1kHz
nV/√Hz
N
A = 40dB
V
11.6
Total Harmonic Distortion Plus
Noise
V
= 3V, V
= 0.35V
A = 10dB,
DD
OUT
RMS, V
THD+N
0.01
%
f
= 1kHz, BW = 22Hz to 22kHz
IN
Small-Signal Bandwidth
Input Resistance
BW
R
A = 40dB, V
= 100mV
P-P
300
100
kHz
-3dB
V
OUT
MICIN_ to GND
kΩ
IN
_______________________________________________________________________________________
3
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
ELECTRICAL CHARACTERISTICS (continued)
(V
= PV
= 3.0V, GND = 0, HPS = MUTE = GND, SHDN = 3V, C
= 1µF, R = R = 15kΩ, R = ∞. T = T
to T
, unless
MAX
DD
DD
BIAS
IN
F
L
A
MIN
otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Resistance Matching
R
1
2
2
2
%
MATCH
MAX9765, A = 4dB to 39dB
V
4
4
4
Differential Gain Accuracy
A
%
MAX9766, A = 10dB to 45dB
V
VDIFF
MAX9767, A = 10dB, 20dB, 30dB
V
A = 10dB, f = 1kHz, V
R = 2kΩ
S
= 200mV
,
V
IN
CM
P-P
Common-Mode Rejection Ratio
CMRR
PSRR
60
80
80
dB
V
= 2.7V to 5.5V
62
DD
f = 1kHz, V
200mV
=
RIPPLE
A = 10dB, output
V
referred
Power-Supply Rejection Ratio
P-P
dB
V
f = 20kHz, V
200mV
=
RIPPLE
68
1
P-P
Common-Mode Input Voltage
Range
V
CM
SINGLE-ENDED INPUT AMPLIFIER (AUXIN)
Input Offset Voltage
V
4
10
mV
OS
Input Noise-Voltage Density
e
A = 20dB, f = 1kHz
73
nV/√Hz
N
V
IN
Total Harmonic Distortion Plus
Noise
A = 10dB, f = 1kHz, BW = 22Hz to
V
IN
THD+N
0.01
%
22kHz, V
= 0.7V
RMS
OUT
Small-Signal Bandwidth
Input Resistance
BW
R
A = 20dB, V
= 100mV
P-P
200
100
4
kHz
kΩ
%
-3dB
V
OUT
IN
Voltage Gain Accuracy
A
V
V
= 2.7V to 5.5V
65
80
DD
f = 1kHz, V
=
RIPPLE
76
58
A = 10dB, output
V
referred
200mV
Power-Supply Rejection Ratio
PSRR
P-P
dB
f = 20kHz, V
=
RIPPLE
200mV
P-P
MICROPHONE BIAS OUTPUT (MICBIAS)
Microphone Bias Output Voltage
Output Noise-Voltage Density
V
V
= 2.7V to 5.5V, I = 500µA
LOAD
2.4
63
2.5
52
72
70
2.6
V
MICBIAS
DD
e
f = 1kHz
= 2.7V to 5.5V
nV/√Hz
N
V
DD
Power-Supply Rejection Ratio
PSRR
dB
f
= 1kHz, V = 200mV
RIPPLE P-P
IN
DIGITAL INPUTS (MUTE, SHDN, INT/EXT)
Input Voltage High
Input Voltage Low
Input Leakage Current
V
2
V
V
IH
V
0.8
1
IL
I
µA
IN
MAX9767 MICGAIN INPUT (TRI-STATE PIN))
Input Voltage High
Input Voltage Low
Input Voltage Mid
V
V
V
V
V
IH
DD
V
V
GND
IL
FLOAT
IZ
4
_______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
ELECTRICAL CHARACTERISTICS (continued)
(V
= PV
= 3.0V, GND = 0, HPS = MUTE = GND, SHDN = 3V, C
= 1µF, R = R = 15kΩ, R = ∞. T = T
to T
, unless
MAX
DD
DD
BIAS
IN
F
L
A
MIN
otherwise noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
HEADPHONE SENSE INPUT (HPS)
0.9 x
Input Voltage High
V
V
IH
V
DD
0.7 x
Input Voltage Low
V
V
IL
V
DD
Input Leakage Current
I
1
µA
IN
2-WIRE SERIAL INTERFACE (SCL, SDA, ADD) (MAX9765/MAX9766)
V
V
> 3.6V
3
2
DD
DD
Input Voltage High
V
V
IH
≤ 3.6V
Input Voltage Low
V
0.8
V
V
IL
Input Hysteresis
0.2
10
Input High Leakage Current
Input Low Leakage Current
Input Capacitance
I
V
V
= 3V
= 0V
1
1
µA
µA
pF
V
IH
IN
IN
I
IL
C
IN
OL
OH
Output Voltage Low
Output Current High
V
I
= 3mA
0.4
1
OL
I
V
= 3V
µA
OH
TIMING CHARACTERISTICS (MAX9765/MAX9766)
Serial Clock Frequency
f
400
kHz
µs
SCL
Bus Free Time Between STOP
and START Conditions
t
1.3
BUF
START Condition Hold Time
START Condition Setup Time
Clock Period Low
t
0.6
0.6
1.3
0.6
100
0
µs
µs
µs
µs
ns
µs
HD:STA
t
SU:STA
t
LOW
Clock Period High
t
HIGH
Data Setup Time
t
SU:DAT
HD:DAT
Data Hold Time
t
(Note 3)
0.9
20 +
Receive SCL/SDA Rise Time
Receive SCL/SDA Fall Time
t
(Note 4)
(Note 4)
300
ns
ns
R
0.1C
B
20 +
0.1C
t
t
300
250
F
F
B
20 +
0.1C
Transmit SDA Fall Time
(Note 4)
(Note 5)
ns
ns
B
Pulse Width of Suppressed Spike
t
SP
50
Note 1: All devices are 100% production tested at +25°C. All temperature limits are guaranteed by design.
Note 2: P limits are tested by a combination of electrical and guaranteed by design.
OUT
Note 3: A device must provide a hold time of at least 300ns for the SDA signal to bridge the undefined region of SCL’s falling edge.
Note 4: C = total capacitance of one of the bus lines in picofarads. Device tested with C = 400pF. 1kΩ pullup resistors connected
B
B
from SDA/SCL to V
.
DD
Note 5: Input filters on SDA, SCL, and ADD suppress noise spikes less than 50ns.
_______________________________________________________________________________________
5
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Typical Operating Characteristics
(V
= PV
= 5V, BW = 22Hz to 22kHz, T = +25°C, unless otherwise noted.)
DD
A
DD
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
1
P
= 100mW
P
= 250mW
OUT
P
= 100mW
OUT
OUT
P
= 100mW
= 500mW
P
= 250mW
OUT
P
= 250mW
OUT
OUT
0.1
0.1
0.1
0.01
P
P
= 500mW
OUT
P
= 500mW
OUT
OUT
0.01
0.001
0.01
0.001
V
= 5V
V
= 5V
DD
L
V
V
= 3V
DD
L
V
DD
R = 4Ω
A
R = 4Ω
A
R = 4Ω
L
= 2V/V
= 4V/V
A
= 2V/V
V
0.001
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
1
1
1
P
= 250mW
P
= 100mW
OUT
OUT
P
= 50mW
OUT
P
= 50mW
P
= 300mW
P
= 300mW
OUT
OUT
OUT
0.1
0.1
0.1
P
= 500mW
OUT
P
= 150mW
P
= 150mW
OUT
0.01
0.001
0.01
0.001
0.01
0.001
OUT
V
= 3V
V
= 5V
R = 8Ω
= 2V/V
V
= 5V
DD
R = 8Ω
A = 4V/V
V
DD
L
V
DD
L
V
R = 4Ω
A
L
= 4V/V
A
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SPEAKER MODE)
1
100
V
= 5V
DD
R = 4Ω
V
L
A
f = 1kHz
= 2V/V
10
P
= 50mW
P
= 50mW
OUT
OUT
P
= 150mW
P
= 300mW
OUT
OUT
0.1
0.1
1
f = 10kHz
0.1
P
= 300mW
OUT
P
= 150mW
OUT
0.01
0.001
0.01
0.01
0.001
f = 20Hz
V
= 3V
R = 8Ω
= 4V/V
V
= 3V
R = 8Ω
= 4V/V
DD
L
V
DD
L
V
A
A
0.001
10
100
1k
FREQUENCY (Hz)
10k
100k
0
0.25
0.50
0.75
1.00
1.25
10
100
1k
FREQUENCY (Hz)
10k
100k
OUTPUT POWER (W)
6
_______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Typical Operating Characteristics (continued)
(V
= PV
= 5V, BW = 22Hz to 22kHz, T = +25°C, unless otherwise noted.)
DD
A
DD
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
100
100
100
V
= 5V
V
= 3V
DD
DD
V
= 3V
DD
f = 1kHz
R =4Ω
V
R = 4Ω
V
L
L
A
f = 1kHz
R = 4Ω
V
L
f = 1kHz
A
= 4V/V
= 4V/V
10
A
= 2V/V
10
1
10
1
1
f = 10kHz
f = 10kHz
f = 10kHz
0.1
0.1
0.01
0.1
f = 20Hz
0.01
0.001
0.01
0.001
f = 20Hz
f = 20Hz
0.2
0.001
0
0.25
0.50
0.75
1.00
0
0.4
0.6
0.8
0
0.25
0.50
0.75
1.00
OUTPUT POWER (W)
OUTPUT POWER (W)
OUTPUT POWER (W)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
100
100
100
V
= 3V
V
= 5V
V
= 5V
DD
DD
DD
R = 8Ω
V
f = 1kHz
f = 1kHz
R = 8Ω
V
R = 8Ω
L
A
L
L
f = 1kHz
= 2V/V
A
= 2V/V
A = 4V/V
V
10
10
10
1
1
1
f = 10kHz
f = 10kHz
f = 10kHz
0.1
0.1
0.1
0.01
0.001
0.01
0.001
0.01
0.001
f = 20Hz
f = 20Hz
f = 20Hz
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7
OUTPUT POWER (W)
0
0.2
0.4
OUTPUT POWER (W)
0.6
0.8
0
0.2
0.4
OUTPUT POWER (W)
0.6
0.8
OUTPUT POWER vs. LOAD RESISTANCE
(SPEAKER MODE)
OUTPUT POWER vs. LOAD RESISTANCE
(SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (SPEAKER MODE)
1200
1000
800
600
400
200
0
1000
900
800
700
600
500
400
300
200
100
0
100
V
= 5V
V
= 3V
CC
V
= 3V
CC
DD
L
V
f = 1kHz
R = 8Ω
A
= 4V/V
10
1
THD+N = 10%
THD+N = 1%
f = 10kHz
THD+N = 10%
THD+N = 1%
0.1
0.01
0.001
f = 20Hz
0
10
100
1k
10k
0
10
100
1k
10k
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7
OUTPUT POWER (W)
LOAD RESISTANCE (Ω)
LOAD RESISTANCE (Ω)
_______________________________________________________________________________________
7
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Typical Operating Characteristics (continued)
(V
= PV
= 5V, BW = 22Hz to 22kHz, T = +25°C, unless otherwise noted.)
DD
A
DD
POWER DISSIPATION vs. OUTPUT POWER
(SPEAKER MODE)
POWER DISSIPATION vs. OUTPUT POWER
(SPEAKER MODE)
POWER DISSIPATION vs. OUTPUT POWER
(SPEAKER MODE)
1.6
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.6
0.5
0.4
0.3
0.2
0.1
0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
V
= 5V
V
= 5V
V
= 3V
DD
DD
DD
R = 4Ω
R = 8Ω
R = 4Ω
L
L
L
f = 1kHz
f = 1kHz
f = 1kHz
0
0.25
0.50
0.75
1.00
0
0.15
0.30
0.45
0.60
0.75
0
0.25
0.50
0.75
1.00
OUTPUT POWER (W)
OUTPUT POWER (W)
OUTPUT POWER (W)
POWER DISSIPATION vs. OUTPUT POWER
(SPEAKER MODE)
OUTPUT POWER vs. TEMPERATURE
(SPEAKER MODE)
OUTPUT POWER vs. TEMPERATURE
(SPEAKER MODE)
0.30
0.25
0.20
0.15
0.10
0.05
0
800
700
600
500
400
300
200
100
0
1200
1000
800
600
400
200
0
THD+N = 10%
THD+N = 1%
THD+N = 10%
THD+N = 1%
V
= 3V
DD
R = 8Ω
f = 1kHz
R = 8Ω
L
L
f = 1kHz
R = 4Ω
L
f = 1kHz
0
0.15
0.30
0.45
0.60
-40
-15
10
35
60
85
-40
-15
10
35
60
85
OUTPUT POWER (W)
TEMPERATURE (°C)
TEMPERATURE (°C)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (SPEAKER MODE)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (SPEAKER MODE)
ENTERING SHUTDOWN (SPEAKER MODE)
MAX9765 toc27
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
V
= 3V
V
= 5V
DD
DD
SHDN
2V/div
OUT_+ AND
OUT_-
500mV/div
OUT_+ -
OUT_-
100mV/div
10
100
1k
10k
100k
200ms/div
10
100
1k
10k
100k
R = 8Ω
L
FREQUENCY (Hz)
FREQUENCY (Hz)
INPUT AC-COUPLED TO GND
8
_______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Typical Operating Characteristics (continued)
(V
= PV
= 5V, BW = 22Hz to 22kHz, T = +25°C, unless otherwise noted.)
DD
A
DD
ENTERING POWER-DOWN
(SPEAKER MODE)
EXITING SHUTDOWN (SPEAKER MODE)
MAX9765 toc28
MAX9765 toc29
V
CC
SHDN
2V/div
2V/div
OUT_+ AND
OUT_-
500mV/div
500mV/div
100mV/div
OUT_+ AND
OUT
OUT_+ -
OUT_-
OUT_+ - OUT
100mV/div
200ms/div
200ms/div
INPUT AC-COUPLED TO GND
R = 8Ω
L
R = 8Ω
L
INPUT AC-COUPLED TO GND
= 1µF
C
BIAS
POWER-UP
(SPEAKER MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
MAX9765 toc30
1
V
= 5V
DD
R = 16Ω
V
2V/div
L
A
= 1V/V
V
CC
0.1
500mV/div
100mV/div
OUT_+ AND
OUT
P
= 10mW
OUT
P
= 25mW
OUT
0.01
0.001
OUT_+ - OUT
P
= 50mW
OUT
200ms/div
10
100
1k
FREQUENCY (Hz)
10k
100k
R = 8Ω
L
INPUT AC-COUPLED TO GND
= 1µF
C
BIAS
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
1
V
= 3V
V
= 5V
DD
V
= 3V
DD
DD
R = 16Ω
R = 16Ω
L
R = 16Ω
L
L
A
V
= 1V/V
A
= 2V/V
A = 2V/V
V
V
0.1
0.1
0.01
0.1
P
= 25mW
P
= 10mW
OUT
OUT
P
= 50mW
OUT
P
= 25mW
OUT
P
= 25mW
P
= 50mW
OUT
OUT
0.01
0.001
0.01
0.001
P
= 50mW
P
= 10mW
10k
OUT
OUT
P
= 10mW
OUT
0.001
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
FREQUENCY (Hz)
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
_______________________________________________________________________________________
9
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Typical Operating Characteristics (continued)
(V
= PV
= 5V, BW = 22Hz to 22kHz, T = +25°C, unless otherwise noted.)
DD
A
DD
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
1
V
= 3V
V
= 5V
V
= 5V
DD
L
DD
L
V
DD
L
V
R = 32Ω
A
R = 32Ω
A
R = 32Ω
A = 2V/V
V
= 1V/V
= 1V/V
0.1
0.1
0.01
0.1
P
= 10mW
OUT
P
= 5mW
OUT
P
= 10mW
P
= 10mW
OUT
OUT
P
= 5mW
OUT
P
= 5mW
OUT
0.01
0.001
0.01
0.001
P
= 20mW
OUT
P
= 20mW
P
= 20mW
10k
OUT
OUT
0.001
10
100
1k
10k
100k
10
100
1k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (HEADPHONE MODE)
1
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
100
100
V
= 5V
DD
V
= 5V
DD
V
= 3V
DD
f = 1kHz
R = 16Ω
V
L
R = 16Ω
f = 1kHz
R = 32Ω
L
L
A
= 1V/V
A = 2V/V
V
10
A
= 2V/V
10
V
0.1
1
1
P
= 10mW
OUT
P
= 5mW
OUT
f = 20Hz
f = 10kHz
f = 20Hz
0.1
0.1
0.01
0.001
f = 10kHz
0.01
0.001
0.01
0.001
P
= 20mW
OUT
0
20
40
60
80
100
120
10
100
1k
FREQUENCY (Hz)
10k
100k
0
20
40
60
80
100
120
OUTPUT POWER (mW)
OUTPUT POWER (mW)
OUTPUT POWER vs. LOAD RESISTANCE
(HEADPHONE MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER (HEADPHONE MODE)
160
140
120
100
80
100
100
V = 5V
CC
V
= 3V
V
= 3V
DD
DD
f = 1kHz
f = 1kHz
R = 16Ω
V
R = 16Ω
V
L
L
A
= 2V/V
A
= 1V/V
10
10
1
1
THD+N = 10%
THD+N = 1%
f = 20Hz
f = 10kHz
f = 20Hz
f = 10kHz
0.1
0.1
60
40
0.01
0.001
0.01
0.001
20
0
1
10
100
1k
10k
0
20
40
60
80
100
120
0
20
40
60
80
100
120
LOAD RESISTANCE (Ω)
OUTPUT POWER (mW)
OUTPUT POWER (mW)
10 ______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Typical Operating Characteristics (continued)
(V
= PV
= 5V, BW = 22Hz to 22kHz, T = +25°C, unless otherwise noted.)
DD
A
DD
OUTPUT POWER vs. LOAD RESISTANCE
(HEADPHONE MODE)
POWER DISSIPATION vs. OUTPUT POWER
(HEADPHONE MODE)
POWER DISSIPATION vs. OUTPUT POWER
(HEADPHONE MODE)
140
120
100
80
60
50
40
30
20
10
0
140
V
= 3V
CC
R = 16Ω
R = 16Ω
L
L
120
100
80
60
40
20
0
R = 32Ω
L
THD+ N = 10%
THD+N = 1%
R = 32Ω
L
60
40
20
V
= 5V
V
= 3V
DD
DD
f = 1kHz
f = 1kHz
0
1
10
100
1k
10k
0
25
50
75
100
0
15
30
45
60
75
LOAD RESISTANCE (Ω)
OUTPUT POWER (mW)
OUTPUT POWER (mW)
OUTPUT POWER vs. TEMPERATURE
(HEADPHONE MODE)
OUTPUT POWER vs. TEMPERATURE
(HEADPHONE MODE)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (HEADPHONE MODE)
60
50
40
30
20
10
0
100
80
60
40
20
0
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
THD+N = 10%
V
= 5V
DD
THD+N = 10%
THD+N = 1%
THD+N = 1%
f = 1kHz
R = 32Ω
L
f = 1kHz
R = 16Ω
L
-40
-15
10
35
60
85
-40
-15
10
35
60
85
10
100
1k
10k
100k
TEMPERATURE (°C)
TEMPERATURE (°C)
FREQUENCY (Hz)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (HEADPHONE MODE)
ENTERING SHUTDOWN (HEADPHONE MODE)
EXITING SHUTDOWN (HEADPHONE MODE)
MAX9765 toc51
MAX9765 toc52
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
V
= 3V
DD
SHDN
2V/div
SHDN
2V/div
OUT_+
500mV/div
OUT_+
500mV/div
HP JACK
100mV/div
HP JACK
100mV/div
200ms/div
200ms/div
10
100
1k
10k
100k
R = 16Ω
R = 16Ω
L
L
FREQUENCY (Hz)
INPUT AC-COUPLED TO GND
INPUT AC-COUPLED TO GND
______________________________________________________________________________________ 11
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Typical Operating Characteristics (continued)
(V
= PV
= 5V, BW = 22Hz to 22kHz, T = +25°C, unless otherwise noted.)
DD
A
DD
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (DIFFERENTIAL INPUT)
ENTERING POWER-DOWN (HEADPHONE MODE)
EXITING POWER-DOWN (HEADPHONE MODE)
MAX9765 toc53
MAX9765 toc54
1
0.1
V
= 5V
DD
V
CC
V
CC
2V/div
2V/div
OUT_+
500mV/div
V
= 0.26V
RMS
OUT
OUT_+
500mV/div
0.01
0.001
HP JACK
100mV/div
HP JACK
100mV/div
V
= 0.35V
RMS
OUT
200ms/div
INPUT AC-COUPLED TO GND
200ms/div
10
100
1k
FREQUENCY (Hz)
10k
100k
R = 16Ω
R = 16Ω
L
L
INPUT AC-COUPLED TO GND
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT AMPLITUDE (DIFFERENTIAL INPUT)
100
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (DIFFERENTIAL INPUT)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT AMPLITUDE (DIFFERENTIAL INPUT)
1
100
V
= 3V
V
= 3V
V
= 5V
DD
DD
DD
f = 1kHz
10
1
10
1
0.1
f = 1kHz
V
= 0.26V
RMS
OUT
f = 10kHz
0.1
0.1
f = 10kHz
0.01
0.001
0.01
0.001
0.01
0.001
V
= 0.35V
RMS
OUT
1k
f = 100Hz
f = 100Hz
0
1
2
3
10
100
10k
100k
0
1
2
3
OUTPUT VOLTAGE (V
)
FREQUENCY (Hz)
OUTPUT VOLTAGE (V
)
RMS
RMS
DIFFERENTIAL MICROPHONE AMPLIFIER
INPUT-REFERRED NOISE
(DIFFERENTIAL MICROPHONE AMPLIFIER)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (DIFFERENTIAL INPUT)
SMALL-SIGNAL TRANSIENT RESPONSE
MAX9765 toc61
1000
0
-20
IN
50mV/div
A
= 20dB
V
-40
100
V
= 5V
-60
DD
-80
OUT
50mV/div
A
= 40dB
100
V
-100
-120
V
= 3V
DD
10
200µs/div
10
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
A
= 4dB
V
f
IN
= 1kHz
12 ______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Typical Operating Characteristics (continued)
(V
= PV
= 5V, BW = 22Hz to 22kHz, T = +25°C, unless otherwise noted.)
DD
A
DD
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SINGLE-ENDED INPUT)
DIFFERENTIAL MICROPHONE AMPLIFIER
DIFFERENTIAL MICROPHONE AMPLIFIER
OVERDRIVEN OUTPUT
LARGE-SIGNAL TRANSIENT RESPONSE
MAX9765 toc63
MAX9765 toc62
1
V
= 5V
DD
IN
1V/div
IN
500mV/div
0.1
V
= 176mV
RMS
OUT
0.01
0.001
OUT
1V/div
OUT
1V/div
V
= 265mV
OUT
RMS
10
100
1k
FREQUENCY (Hz)
10k
100k
200µs/div
200µs/div
A
f
= 4dB
= 1kHz
A
f
= 4dB
= 1kHz
V
IN
V
IN
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT AMPLITUDE (SINGLE-ENDED INPUT)
100
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY (SINGLE-ENDED INPUT)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT AMPLITUDE (SINGLE-ENDED INPUT)
100
1
V
= 3V
V
= 3V
V
= 5V
DD
DD
DD
10
1
10
1
0.1
f = 1kHz
V
= 176mV
RMS
OUT
f = 10kHz
f = 10kHz
0.1
0.1
0.01
0.001
0.01
0.001
0.01
0.001
f = 100Hz
f = 100Hz
V
= 265mV
RMS
OUT
1k
f = 1kHz
0.5
0
1.0
1.5
)
2.0
10
100
10k
100k
0
0.5
1.0
1.5
)
2.0
OUTPUT VOLTAGE (V
FREQUENCY (Hz)
OUTPUT VOLTAGE (V
RMS
RMS
INPUT-REFERRED NOISE
(SINGLE-ENDED INPUT
MICROPHONE AMPLIFIER)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY (SINGLE-ENDED INPUT)
0
-20
600
A
= 40dB
V
500
400
300
200
100
0
-40
V
= 5V
DD
-60
-80
V
= 3V
DD
-100
-120
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
______________________________________________________________________________________ 13
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Typical Operating Characteristics (continued)
(V
= PV
= 5V, BW = 22Hz to 22kHz, T = +25°C, unless otherwise noted.)
DD
A
DD
SINGLE-ENDED MICROPHONE AMPLIFIER
SINGLE-ENDED MICROPHONE AMPLIFIER
SMALL-SIGNAL TRANSIENT RESPONSE
LARGE-SIGNAL TRANSIENT RESPONSE
MAX9765 toc70
MAX9765 toc71
IN
IN
50mV/div
500mV/div
OUT
100mV/div
OUT
1V/div
200µs/div
200µs/div
A
= 10dB
= 1kHz
A
= 10dB
= 1kHz
V
V
f
IN
f
IN
SINGLE-ENDED MICROPHONE AMPLIFIER
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(SPEAKER MODE)
OVERDRIVEN OUTPUT
MAX9765 toc72
20
16
12
8
T
= +85°C
A
T
= +25°C
A
IN
1V/div
T
= -40°C
A
OUT
4
1V/div
0
2.7
3.4
4.1
4.8
5.5
200µs/div
A
= 10dB
= 1kHz
V
SUPPLY VOLTAGE (V)
f
IN
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(HEADPHONE MODE)
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
10
8
30
25
20
15
10
5
T
= +85°C
A
T
= +25°C
A
T
= +85°C
A
6
T
= +25°C
A
T
= -40°C
A
4
2
T
= -40°C
A
0
0
2.7
3.4
4.1
4.8
5.5
2.7
3.4
4.1
4.8
5.5
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
14 ______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Pin Description
PIN
NAME
FUNCTION
MAX9765
MAX9766
MAX9767
1
1
1
SHDN
Active-Low Shutdown. Connect SHDN to V
for normal operation.
DD
2, 7, 8,
18, 23,
2, 7, 18
2, 7, 18
N.C.
No Connection. Not internally connected.
24, 27, 32
Left-Channel Bridged Amplifier Positive Output. OUTL+ also serves as the
left-channel headphone amplifier output.
3
3
6
OUTL+
4, 21
5, 20
6
4, 21
5, 20
6
4, 21
5, 20
3
PV
Output Amplifier Power Supply. Connect PV to V
DD
.
DD
DD
PGND
OUTL-
INL2
Power Ground. Connect PGND to GND.
Left-Channel Bridged Amplifier Negative Output
Left-Channel Input 2
8
8
—
9
9
—
INL1
Left-Channel Input 1
10
11
12
13
10
11
12
13
10
MICIN+
MICIN-
AUXIN
Differential Microphone Amplifier Noninverting Input
Differential Microphone Amplifier Inverting Input
Single-Ended Microphone Amplifier Input
Power Supply
11
12
13
V
DD
Standby Power Supply. Connect to a standby power supply that is always on,
or connect to V through a Schottky diode and bypass with a 220µF
DD
14
14
14
SV
DD
capacitor to GND. Short to V
if clickless operation is not essential.
DD
15
16
17
19
15
—
17
—
15
—
—
19
MICBIAS
MICOUT
GAINR
Microphone Bias Output. Bypass MICBIAS with a 1µF capacitor to GND.
Microphone Amplifier Output
Right-Channel Gain Set
OUTR-
Right-Channel Bridged Amplifier Negative Output
Right-Channel Bridged Amplifier Positive Output. OUTR+ also serves as the
right-channel headphone amplifier output.
22
23
22
—
22
—
OUTR+
ADD
Address Select. A logic high sets the address LSB to 1, a logic low sets the
address LSB to 0.
24
25
24
25
—
—
29
—
—
—
SDA
SCL
Bidirectional Serial Data I/O
Serial Clock Line
26, 29
27
26, 29
27
GND
INR2
INR1
HPS
Ground
Right-Channel Input 2
Right-Channel Input 1
Headphone Sense Input
28
28
30
30
DC Bias Bypass. See BIAS Capacitor section for capacitor selection.
31
31
31
BIAS
Connect C
capacitor from BIAS to GND.
BIAS
32
—
32
16
—
GAINL
Left-Channel Gain Set
MICOUT+
16
Microphone Amplifier Positive Output
______________________________________________________________________________________ 15
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Pin Description (continued)
PIN
NAME
FUNCTION
MAX9765
MAX9766
MAX9767
—
—
—
19
23
—
17
—
9
MICOUT-
GAINM
INL
Microphone Amplifier Negative Output
Mono Mode Gain Set
Left-Channel Input
Internal (Differential) or External (Single-Ended) Input Select. Drive INT/EXT
low to select internal or high to select external microphone amplifier.
—
—
—
—
25
26
INT/EXT
Microphone Amplifier Gain Set. Tri-State Pin. Connect to V
float for gain = 20dB, and to GND for gain = 30dB.
for gain = 10dB,
DD
MICGAIN
—
—
—
—
—
—
28
30
—
INR
MUTE
EP
Right-Channel Input
Mute Input
Exposed Pad. Connect to ground plane of PC board to optimize heatsinking.
continuous average power into a 4Ω load with less than
Detailed Description
1% THD+N in speaker mode. The MAX9765/MAX9766
can deliver 70mW of continuous average power into a
16Ω load with less than 1% THD+N in headphone
mode. The speaker amplifiers also feature thermal-
overload and short-circuit current protection.
The MAX9765/MAX9766/MAX9767 feature 750mW BTL
speaker amplifiers, 65mW headphone amplifiers, input
multiplexers, headphone sensing, differential and sin-
gle-ended input microphone amplifiers, and compre-
hensive click-and-pop suppression. The MAX9765/
MAX9766 are controlled through an I2C-compatible, 2-
wire serial interface. The MAX9767 is controlled
through three logic inputs: MUTE, SHDN, INT (see the
Selector Guide). The MAX9765 family features excep-
tional PSRR (95dB at 1kHz), allowing these devices to
operate from noisy digital supplies without the need for
a linear regulator.
All devices feature microphone amplifiers with both dif-
ferential and single-ended inputs. Differential input is
intended for use with internal microphones. Single-
ended input is intended for use with external (auxiliary)
microphones. The differential input configuration is par-
ticularly effective when layout constraints force the
microphone amplifier to be physically remote from the
ECM microphone and/or the rest of the audio circuitry.
The MAX9766/MAX9767 feature a complementary out-
put, creating an ideal interface with CODECs and other
devices with differential inputs. All devices also feature
an internal microphone bias generator.
The speaker amplifiers use a BTL configuration. The
MAX9765/MAX9766 main amplifiers are composed of
an input amplifier and an output amplifier. Resistor R
IN
sets the input amplifier’s gain, and resistor R sets the
F
output amplifier’s gain. The output of these two ampli-
fiers serves as the input to a slave amplifier configured
as an inverting unity-gain follower. This results in two
outputs, identical in magnitude, but 180° out of phase.
The overall gain of the speaker amplifiers is twice the
product of the two amplifier gains (see the Gain-Setting
Resistor section). A unique feature of this architecture
is that there is no phase inversion from input to output.
The MAX9767 does not use a two-stage input amplifier
and therefore has phase inversion from input to output.
Amplifier Common-Mode Bias
These devices feature an internally generated com-
mon-mode bias voltage of 1.5V referenced to GND.
BIAS provides both click-and-pop suppression and
sets the DC bias level for the audio signal. BIAS is inter-
nally connected to the noninverting input of each
speaker amplifier (see the Typical Application Circuit).
Choose the value of the bypass capacitor as described
in the BIAS Capacitor section.
When configured as a headphone (single-ended) ampli-
fier, the slave amplifier is disabled, muting the speaker
and the main amplifier drives the headphone. The
MAX9765/MAX9766/MAX9767 can deliver 700mW of
Input Multiplexer
The MAX9765/MAX9766 feature a 2:1 input multiplexer
on the front end of each amplifier. The multiplexer is
controlled by bit 1 in the control register. A logic low
16 ______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
which mutes the speaker amplifier and sets the device
into headphone mode.
Connect HPS to the control pin of a 3-wire headphone
MAX9765
15kΩ
jack as shown in Figure 2. With no headphone present,
IN_1
the resistive voltage-divider created by R1 and R2 sets
the voltage on HPS to 44mV, setting the device to speak-
AUDIO
INPUT
30kΩ
er mode. When a headphone plug is inserted into the
jack, the control pin is disconnected from the tip contact,
IN_2
and HPS is pulled to V
through R1, setting the device
DD
into headphone mode. Place a resistor in series with the
control pin and HPS (R3) to prevent any audio signal
from coupling into HPS when the device is in speaker
mode.
Figure 1. Using the Input Multiplexer for Gain Setting
Shutdown
selects input IN_1 and a logic high selects input IN_2.
Both right- and left-channel multiplexers are controlled
by the same input.
The MAX9765/MAX9766/MAX9767 feature a 5µA, low-
power shutdown mode that reduces quiescent current
consumption and extends battery life. The drive and
microphone amplifiers and the bias circuitry are dis-
abled, the amplifier outputs (OUT_/MIC_) go high
impedance, and BIAS and MICBIAS are driven to GND.
The digital section of the MAX9765/MAX9766 remains
active when the device is shut down through the inter-
face. A logic high on bit 0 of the SHDN register places
the MAX9765/MAX9766 in shutdown. A logic low
enables the device. A logic low on the SHDN input
places the devices into shutdown mode, disables the
interface, and resets the I2C registers to a default state.
A logic high on SHDN enables the device. A logic high
on SHDN enables the devices.
The input multiplexer can also be used to further
expand the number of gain options available from the
MAX9765/MAX9766. Connect the audio source to the
device through two different input resistors for multiple
gain configurations (Figure 1). Additionally, the input
multiplexer allows a speaker equalization network to be
switched into the speaker signal path. This is typically
useful in optimizing acoustic response from speakers
with small physical dimensions.
Mono Mode
The mono MAX9766 incorporates a mixer/attenuator
(see the Functional Diagram). In speaker (mono) mode,
the mixer/attenuator combines the two stereo inputs
(INL_ and INR_) and attenuates the resultant signal by
a factor of 2. This allows for full reproduction of a stereo
signal through a single speaker while maintaining opti-
mum headroom. The resistor connected between
GAINM and OUTL+ sets the device gain in speaker
mode. This allows the speaker amplifier to have a dif-
ferent gain and feedback network from the headphone
amplifier.
MUTE
All devices feature a mute mode. When the device is
muted, the input is disconnected from the amplifiers.
MUTE only affects the power amplifiers, and does not
shut down the device. The MAX9765/MAX9766 MUTE
mode is selected by writing to the MUTE register (see
Command Byte Definitions). The left and right channels
can be independently muted. The MAX9767 features
an active-high MUTE input that mutes both channels.
Headphone Sense Disable Input
The headphone sensing function can be disabled by
the HPS_D bit (MAX9765/MAX9766). HPS_D bit deter-
mines whether the device is in automatic-detection
mode, or fixed-mode operation.
INT/EXT
The MAX9767 microphone amplifier input configuration
is controlled by the INT/EXT input. A logic low In
INT/EXT selects internal (differential) microphone
mode. A logic high selects external (single-ended)
mode.
Headphone Sense Input (HPS)
When the MAX9765/MAX9766 are in automatic head-
phone-detection mode, the state of the headphone
sense input (HPS) determines the operating mode of
Click-and-Pop Suppression
The MAX9765/MAX9766/MAX9767 feature Maxim’s
patented comprehensive click-and-pop suppression.
During startup and shutdown, the common-mode bias
voltage of the amplifiers is slowly ramped to and from
the DC bias point using an S-shaped waveform. In
the device. A voltage on HPS less than 0.7 ✕ V
sets
DD
the device to speaker mode. A voltage greater than 0.9
disables the inverting bridge amplifier (OUT_-),
✕ V
DD
______________________________________________________________________________________ 17
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
headphone mode, this waveform shapes the frequency
3V
spectrum, minimizing the amount of audible compo-
R1
680kΩ
nents present at the headphone. In speaker mode, the
R3
47kΩ
MAX9765
MAX9766
BTL amplifiers start up in the same fashion as in head-
phone mode. When entering shutdown, both amplifier
outputs ramp to GND quickly and simultaneously. The
devices can also be connected to a standby power
source that ensures that the device undergoes its full
shutdown cycle even after power has been removed.
The value of the capacitor on the BIAS pin affects the
click-and-pop energy. For optimum click/pop perfor-
mance, use a 1µF capacitor.
HPS
OUTL+
OUTR+
R2
10kΩ
10kΩ
Standby Power Supply (SV
)
DD
Figure 2. HPS Configuration Circuit
The MAX9765/MAX9766/MAX9767 feature a patented
system that provides clickless power-down when
slave-only devices, relying upon a master to generate a
clock signal. The master (typically a microcontroller) ini-
tiates data transfer on the bus and generates SCL to
permit that transfer.
power is removed from the device. SV
is an optional
DD
secondary supply that powers the device through its
shutdown cycle when V is removed. During this
DD
cycle, the amplifier output DC level slowly ramps to
GND, ensuring clickless power-down. If clickless
A master device communicates to the MAX9765/
MAX9766 by transmitting the proper address followed
by a command and/or data words. Each transmit
sequence is framed by a START (S) or REPEATED
START (S ) condition and a STOP (P) condition. Each
r
word transmitted over the bus is 8 bits long and is
always followed by an acknowledge clock pulse.
power-down is required, connect SV
to either a sec-
DD
ondary power supply that is always on, or connect a
reservoir capacitor from SV to GND. SV does not
DD
DD
need to be connected to either a secondary power
supply or reservoir capacitor for normal device opera-
tion. If click-and-pop suppression during power-down
The MAX9765/MAX9766 SDA and SCL amplifiers are
open-drain outputs requiring a pullup resistor to gener-
ate a logic-high voltage. Series resistors in line with
SDA and SCL are optional. These series resistors pro-
tect the input stages of the devices from high-voltage
spikes on the bus lines, and minimize crosstalk and
undershoot of the bus signals.
is not required, connect SV
to V
directly.
DD
DD
The clickless power-down cycle only occurs when the
device is in headphone mode. The speaker mode is
inherently clickless, the differential architecture cancels
the DC shift across the speaker. The MAX9765/
MAX9766/MAX9767 BTL outputs are pulled to GND
quickly and simultaneously, resulting in no audible
components. If the MAX9765/MAX9766/MAX9767 are
only used as speaker amplifiers, then reservoir capaci-
tors or secondary supplies are not necessary.
Bit Transfer
One data bit is transferred during each SCL clock
cycle. The data on SDA must remain stable during the
high period of the SCL clock pulse. Changes in SDA
while SCL is high are control signals (see the START
and STOP Conditions section). SDA and SCL idle high
when the I2C bus is not busy.
When using a reservoir capacitor, a 220µF capacitor
provides optimum charge storage for the shutdown
cycle for all conditions. If a smaller reservoir capacitor
is desired, decrease the size of C
. A smaller C
BIAS
BIAS
causes the output DC level to decay at a faster rate,
increasing the audible content at the speaker, but
reducing the duration of the shutdown cycle.
START and STOP Conditions
When the serial interface is inactive, SDA and SCL idle
high. A master device initiates communication by issu-
ing a START condition. A START condition is a high-to-
low transition on SDA with SCL high. A STOP condition
is a low-to-high transition on SDA while SCL is high
(Figure 4). A START condition from the master signals
the beginning of a transmission to the MAX9765/
MAX9766. The master terminates transmission by issu-
ing the STOP condition; this frees the bus. If a REPEAT-
ED START condition is generated instead of a STOP
Digital Interface
The MAX9765/MAX9766 feature an I2C/SMBus-compat-
ible 2-wire serial interface consisting of a serial data
line (SDA) and a serial clock line (SCL). SDA and SCL
facilitate bidirectional communication between the
MAX9765/MAX9766 and the master at clock rates up to
400kHz. Figure 3 shows the 2-wire interface timing dia-
gram. The MAX9765/MAX9766 are transmit/receive
18 ______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
SDA
SCL
t
BUF
t
t
HD, STA
SU, DAT
t
t
SP
HD, STA
t
SU, STO
t
t
HD, DAT
LOW
t
HIGH
t
HD, STA
t
t
F
R
START
CONDITION
REPEATED
START
STOP
CONDITION
START
CONDITION
CONDITION
Figure 3. 2-Wire Serial Interface Timing Diagram
condition, the bus remains active. When a STOP con-
dition or incorrect address is detected, the
MAX9765/MAX9766 internally disconnects SCL from
the serial interface until the next START condition, mini-
mizing digital noise and feedthrough.
S
Sr
P
SCL
SDA
Early STOP Conditions
The MAX9765/MAX9766 recognize a STOP condition at
any point during the transmission except if a STOP con-
dition occurs in the same high pulse as a START condi-
tion (Figure 5). This condition is not a legal I2C format;
at least one clock pulse must separate any START and
STOP conditions.
Figure 4. START/STOP Conditions
REPEATED START Conditions
tem fault has occurred. In the event of an unsuccessful
data transfer, the bus master should reattempt commu-
nication at a later time.
A REPEATED START (S ) condition may indicate a
r
change of data direction on the bus. Such a change
occurs when a command word is required to initiate a
Slave Address
The bus master initiates communication with a slave
device by issuing a START condition followed by a 7-bit
slave address (Figure 6). When idle, the MAX9765/
MAX9766 wait for a START condition followed by its
slave address. The serial interface compares each
address value bit-by-bit, allowing the interface to power
down immediately if an incorrect address is detected.
The LSB of the address word is the Read/Write (R/W)
bit. R/W indicates whether the master is writing to or
reading from the MAX9765/MAX9766 (R/W = 0 selects
the write condition, R/W = 1 selects the read condition).
After receiving the proper address, the MAX9765/
MAX9766 issue an ACK by pulling SDA low for one
clock cycle.
read operation. S may also be used when the bus
r
master is writing to several I2C devices and does not
want to relinquish control of the bus. The MAX9765/
MAX9766 serial interface supports continuous write
operations with or without an S condition separating
r
them. Continuous read operations require S conditions
r
because of the change in direction of data flow.
Acknowledge Bit (ACK)
The acknowledge bit (ACK) is the ninth bit attached to
any 8-bit data word. The receiving device always gen-
erates ACK. The MAX9765/MAX9766 generate an ACK
when receiving an address or data by pulling SDA low
during the ninth clock period. When transmitting data,
the MAX9765/MAX9766 wait for the receiving device to
generate an ACK. Monitoring ACK allows for detection
of unsuccessful data transfers. An unsuccessful data
transfer occurs if a receiving device is busy or if a sys-
The MAX9765 has a factory/user-programmed address
(Table 2). The MAX9766 has a factory-programmed
address: 1001011.
______________________________________________________________________________________ 19
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Table 1. HPS Setting (MAX9765/MAX9766)
SCL
SPKR/
HP BIT
HPS_D BIT
HPS
MODE
0
0
1
1
0
1
X
X
X
X
0
1
BTL
SE
SDA
BTL
SE
STOP
START
LEGAL STOP CONDITION
2
Table 2. I C Slave Addresses
SCL
SDA
ADD CONNECTION
I2C ADDRESS
GND
100 1000
100 1001
100 1010
100 1011
V
DD
SDA
SCL
START
ILLEGAL
STOP
Table 3. MUTE Register Format
ILLEGAL EARLY STOP CONDITION
REGISTER
0000 0001
ADDRESS
Figure 5. Early STOP Condition
BIT
7
NAME
VALUE
Don’t Care
Don’t Care
Don’t Care
0*
DESCRIPTION
X
X
X
—
S
A6
A5
A4
A3
A2
A1
A0
R/W
6
—
5
—
Figure 6. Slave Address Byte Definition
Unmute right channel
4
3
MUTER
MUTEL
1
Mute right channel
Write Data Format
0*
Unmute left channel
There are three registers that configure the
MAX9765/MAX9766: the MUTE register, SHDN register,
and control register. In write data mode (R/W = 0), the
register address and data byte follow the device
address (Figure 7).
1
Mute left channel
2
1
0
X
X
X
Don’t Care
Don’t Care
Don’t Care
—
—
—
MUTE Register
The MUTE register (01hex) is a read/write register that
sets the MUTE status of the device. Bit 3 (MUTEL) of
the MUTE register controls the left channel, bit 4
(MUTER) controls the right channel. A logic high mutes
the respective channel, a logic low brings the channel
out of mute.
*Default state.
Control Register
The control register (03hex) is a read/write register that
determines the device configuration. Bit 1 (IN1/IN2)
controls the input multiplexer, a logic high selects input
1, a logic low selects input 2. Bit 2 (HPS_EN) controls
the headphone sensing. A logic low configures the
device in automatic headphone detection mode. A
logic high disables the HPS input. Bit 3 (INT/EXT) con-
trols the microphone amplifier inputs. A logic low
selects differential (internal) input mode. A logic high
selects single-ended (external) input mode. Bit 4
(SPKR/HP) selects the amplifier operating mode when
SHDN Register
The SHDN register (02hex) is a read/write register that
controls the power-up state of the device. A logic high
in bit 0 of the SHDN register shuts down the device; a
logic low turns on the device. A logic high is required in
bits 2 to 7 to reset all registers to their default register
settings.
20 ______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Table 4. SHDN Register Format
Table 5. Control Register Format
REGISTER
0000 0011
ADDRESS
REGISTER
0000 0010
ADDRESS
BIT
7
NAME
MG2
VALUE
DESCRIPTION
BIT
NAME
VALUE
DESCRIPTION
0*
—
Reset device
—
Microphone amplifier
gain set; 3-bit code sets
the gain of the
microphone amplifiers
(Table 6)
7
RESET
6
MG1
1
0*
6
5
4
3
RESET
RESET
RESET
RESET
5
4
MG0
1
Reset device
—
0*
0*
1
Speaker mode selected
1
Reset device
—
SPKR/HP
Headphone mode
selected
0*
1
Reset device
—
0*
1
Differential input selected
0*
3
2
INT/EXT
Single-ended input
selected
1
Reset device
—
0*
2
1
0
RESET
X
Automatic headphone
detection enabled
0*
1
1
Reset device
—
Don’t Care
HPS_D
Automatic headphone
detection disabled
(HPS ignored)
0*
1
Normal operation
Shutdown
SHDN
*Default state.
0*
1
Input 1 selected
Input 2 selected
—
1
0
IN1/IN2
X
Don’t Care
S
S
ADDRESS
7 BITS
WR ACK
COMMAND
8 BITS
ACK
DATA
ACK
P
1
8 BITS
2
I C SLAVE ADDRESS.
SELECTS DEVICE.
REGISTER ADDRESS.
SELECTS REGISTER TO BE
WRITTEN TO.
REGISTER DATA.
ADDRESS
7 BITS
WR ACK
COMMAND
8 BITS
ACK
S
ADDRESS
7 BITS
WR ACK
DATA
P
1
8 BITS
2
2
I C SLAVE ADDRESS.
SELECTS DEVICE.
REGISTER ADDRESS.
SELECTS REGISTER
TO BE READ.
I C SLAVE ADDRESS.
SELECTS DEVICE.
DATA FROM
SELECTED REGISTER.
Figure 7. Write/Read Data Format Example
HPS_EN = 1. A logic high selects speaker mode, a
logic low selects headphone mode. Bits 5 to 7 (MG0-2)
control the gain of the microphone amplifiers (Table 5).
direction of the data flow reverses following the
address acknowledge by the MAX9765/MAX9766. The
master device reads the contents of all registers,
including the read-only status register. Table 7 shows
the status register format. Figure 7 shows an example
read data sequence.
Read Data Format
In read mode (R/W = 1), the MAX9765/MAX9766 write
the contents of the selected register to the bus. The
______________________________________________________________________________________ 21
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Table 6. Microphone Gain Setting
MAX9765
DIFF GAIN (dB)
MAX9766
DIFF GAIN (dB)
SINGLE-ENDED GAIN
(dB)
MG2
MG1
MG0
0*
0
0
0
1
1
1
1
0*
0
1
1
0
0
1
1
0*
1
0
1
0
1
0
1
4
10
15
20
25
30
35
40
45
10
15
20
25
29
34
36
40
9
14
19
24
29
34
39
*Default state.
2
I C Compatibility
V
OUT(P−P)
The MAX9765/MAX9766 are compatible with existing I2C
systems. SCL and SDA are high-impedance inputs; SDA
has an open drain that pulls the data line low during the
ninth clock pulse. The communication protocol supports
the standard I2C 8-bit communications. The general call
address is ignored. The MAX9765/MAX9766 addresses
are compatible with the 7-bit I2C addressing protocol
only. No 10-bit formats are supported.
V
=
=
RMS
2 2
2
V
RMS
P
OUT
R
L
Since the outputs are differential, there is no net DC
voltage across the load. This eliminates the need for
DC-blocking capacitors required for single-ended
amplifiers. These capacitors can be large, expensive,
consume board space, and degrade low-frequency
performance.
Applications Information
BTL Amplifiers
The MAX9765/MAX9766/MAX9767 feature speaker
amplifiers designed to drive a load differentially, a con-
figuration referred to as bridge-tied load (BTL). The BTL
configuration (Figure 8) offers advantages over the sin-
gle-ended configuration, where one side of the load is
connected to ground. Driving the load differentially
doubles the output voltage compared to a single-
ended amplifier under similar conditions. Thus, the
devices’ differential gain is twice the closed-loop gain
of the input amplifier. The effective gain is given by:
Single-Ended Headphone Amplifier
The MAX9765/MAX9766 can be configured as single-
ended headphone amplifiers through software or by
sensing the presence of a headphone plug (HPS). In
headphone mode, the inverting output of the BTL
amplifier is disabled, muting the speaker. The gain is
1/2 that of the device in speaker mode, and the output
power is reduced by a factor of 4.
In headphone mode, the load must be capacitively
coupled to the device, blocking the DC bias voltage
from the load (see the Typical Application Circuit and
the Output-Coupling Capacitor section).
R
F
A
= 2×
VD
R
IN
Microphone Amplifiers
Substituting 2 x V
for V
into the follow-
OUT(P-P)
OUT(P-P)
Differential Microphone Amplifier
The MAX9765/MAX9766/MAX9767 feature a low-noise,
high CMRR, differential input microphone amplifier. The
differential input structure is almost essential in noisy
digital systems where amplification of low-amplitude
analog signals is necessary such as notebooks and
PDAs. When properly employed, the differential input
architecture offers the following advantages:
ing equations yields four times the output power due to
doubling of the output voltage:
22 ______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Table 7. Status Register Format
REGISTER ADDRESS
0000 0000
BIT
NAME
VALUE
DESCRIPTION
0
Device temperature below thermal limit
Device temperature exceeding thermal limit
OUTR- current below current limit
OUTR- current exceeding current limit
OUTR+ current below current limit
OUTR+ current exceeding current limit
OUTL- current below current limit
OUTL- current exceeding current limit
OUTL+ current below current limit
OUTL+ current exceeding current limit
Device in speaker mode
7
6
5
4
3
2
THRM
1
0
AMPR-
AMPR+
AMPL-
AMPL+
HPSTS
1
0
1
0
1
0
1
0
1
Device in headphone mode
1
0
X
X
Don’t Care
Don’t Care
—
—
●
●
●
Improved PSRR.
Higher ground noise immunity.
V
+1
Microphone and preamplifier can be placed physi-
cally farther apart, easing PC board layout require-
ments.
OUT(P-P)
2 x V
V
OUT(P-P)
Common-Mode Rejection Ratio
Common-mode rejection ratio (CMRR) refers to an
amplifier’s ability to reject any signal applied equally to
both inputs. In the case of amplifying a low-level micro-
phone signal in noisy digital environments, CMRR is a
key figure of merit. In audio circuits, CMRR is given by:
-1
OUT(P-P)
Figure 8. Bridge-Tied Load Configuration
A
A
V
INDIFF
DM
CM
CMRR(dB) =
=
∆V
Power Dissipation and Heat Sinking
Under normal operating conditions, the MAX9765/
MAX9766/MAX9767 can dissipate a significant amount
of power. The maximum power dissipation for each
package is given in the Absolute Maximum Ratings
section under Continuous Power Dissipation or can be
calculated by the following equation:
INCM
where A
is the differential gain, A
is the common-
DM
CM
mode gain, ∆V
is the change in input common-
INCM
mode voltage (IN+ and IN- connected together), and
is the differential input voltage.
V
INDIFF
Typical input voltage magnitudes are small enough
such that the output is not clipped in either differential
or common-mode application. The MAX9765/MAX9766/
MAX9767 differential microphone amplifier architecture
CMRR actually improves as A
tional advantage to the use of differential inputs.
T
− T
A
J(MAX)
P
=
DISSPKG(MAX)
θ
JA
increases—an addi-
DM
where T
is +150°C, T is the ambient tempera-
J(MAX) A
ture, and θ is the reciprocal of the derating factor in
JA
°C/W as specified in the Absolute Maximum Ratings
______________________________________________________________________________________ 23
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
section. For example, θ
of the QFN package is
As shown, the two-stage amplifier architecture results
in a noninverting gain configuration, preserving relative
phase through the MAX9765/MAX9766. The gain of the
device in BTL mode is twice that of the single-ended
JA
+42°C/W.
The increase in power delivered by the BTL configura-
tion directly results in an increase in internal power dis-
sipation over the single-ended configuration. The
maximum power dissipation for a given V
given by the following equation:
mode. Choose R between 10kΩ and 15kΩ and R
IN
F
between 15kΩ and 100kΩ.
and load is
DD
Input Filter
The input capacitor (C ), in conjunction with R , forms
IN
IN
2
2V
DD
a highpass filter that removes the DC bias from an
incoming signal. The AC-coupling capacitor allows the
amplifier to bias the signal to an optimum DC level.
Assuming zero-source impedance, the -3dB point of
the highpass filter is given by:
P
=
DISS(MAX)
2
π R
L
If the power dissipation for a given application exceeds
the maximum allowed for a given package, either reduce
V
, increase load impedance, decrease the ambient
DD
temperature, or add heatsinking to the device. Large
output, supply, and ground PC board traces improve the
maximum power dissipation in the package.
1
f
=
−3dB
2πR C
IN IN
Thermal-overload protection limits total power dissipa-
tion in these devices. When the junction temperature
exceeds +150°C, the thermal-protection circuitry dis-
ables the amplifier output stage. The amplifiers are
enabled once the junction temperature cools by 8°C.
This results in a pulsing output under continuous ther-
mal-overload conditions as the device heats and cools.
Choose R according to the Gain-Setting Resistors
IN
section. Choose the C such that f
is well below
IN
-3dB
the lowest frequency of interest. Setting f
too high
-3dB
affects the amplifier’s low-frequency response. Use
capacitors whose dielectrics have low-voltage coeffi-
cients, such as tantalum or aluminum electrolytic.
Capacitors with high-voltage coefficients, such as
ceramics, may result in an increased distortion at low
frequencies.
Component Selection
Gain-Setting Resistors
Other considerations when designing the input filter
include the constraints of the overall system,
the actual frequency band of interest, and click-and-
pop suppression. Although high-fidelity audio calls for
a flat gain response between 20Hz and 20kHz,
portable voice-reproduction devices such as cellular
phones and two-way radios need only concentrate on
the frequency range of the spoken human voice (typi-
cally 300Hz to 3.5kHz). In addition, speakers used in
portable devices typically have a poor response below
150Hz. Taking these two factors into consideration, the
input filter may not need to be designed for a 20Hz to
20kHz response, saving both board space and cost
due to the use of smaller capacitors.
External feedback components set the gain of the
MAX9765/MAX9766/MAX9767. Resistor R sets the
IN
gain of the input amplifier (A ) and resistor R sets
VIN
F
the gain of the second-stage amplifier (A
):
VOUT
15kΩ
R
F
15kΩ
A
= −
, A
= −
VOUT
VIN
R
IN
Combining A
and A
, R and R set the single-
VIN
VOUT IN
F
ended gain of the device as follows:
15kΩ
R
15kΩ
R
F
F
A
= A
× A = −
VOUT
× −
= +
V
VIN
R
R
IN
IN
(MAX9765/MAX9766)
= −
R
F
A
(MAX9767)
VIN
R
IN
24 ______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Output-Coupling Capacitor
The MAX9765/MAX9766/MAX9767 require output-cou-
pling capacitors to operate in single-ended (head-
phone) mode. The output-coupling capacitor blocks the
DC component of the amplifier output, preventing DC
current from flowing to the load. The output capacitor
and the load impedance form a highpass filter with a
-3dB point determined by:
Smaller capacitor values produce faster turn-on/off
times and may impact the click/pop levels.
Supply Bypassing
Proper power-supply bypassing ensures low-noise,
low-distortion performance. Place a 0.1µF ceramic
capacitor from V
to GND. Add additional bulk
DD
capacitance as required by the application. Bypass
PV with a 100µF capacitor to GND. Locate bypass
DD
capacitors as close to the device as possible.
1
f
=
−3dB
2πR C
Layout and Grounding
L
OUT
Good PC board layout is essential for optimizing perfor-
mance. Use large traces for the power-supply inputs
and amplifier outputs to minimize losses due to para-
sitic trace resistance, as well as route heat away from
the device. Good grounding improves audio perfor-
mance, minimizes crosstalk between channels, and
prevents any digital switching noise from coupling into
the audio signal. If digital signal lines must cross over
or under audio signal lines, ensure that they cross per-
pendicular to each other.
As with the input capacitor, choose C
such that
OUT
f
is well below the lowest frequency of interest.
-3dB
Setting f
quency response.
too high affects the amplifier‘s low-fre-
-3dB
Load impedance is a concern when choosing C
.
OUT
Load impedance can vary, changing the -3dB point of
the output filter. A lower impedance increases the cor-
ner frequency, degrading low-frequency response.
Select C
such that the worst-case load/C
com-
OUT
OUT
bination yields an adequate response. Select capaci-
tors with low ESR.
The MAX9765/MAX9766/MAX9767 thin QFN packages
feature exposed thermal pads on their undersides. This
pad lowers the package’s thermal resistance by provid-
ing a direct heat conduction path from the die to the
printed circuit board. Connect the pad to signal ground
by using a large pad, or multiple vias to the ground
plane.
BIAS Capacitor
BIAS is the output of the internally generated 1.5VDC
bias voltage. The BIAS bypass capacitor, C
,
BIAS
improves PSRR and THD+N by reducing power supply
and other noise sources at the common-mode bias
node, and also generates the clickless/popless, start-
up/shutdown DC bias waveforms for the speaker ampli-
fiers. Bypass BIAS with a 1µF capacitor to GND.
______________________________________________________________________________________ 25
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Typical Application Circuit
0.1µF
V
DD
PV
DD
BIAS
SV
DD
*C
SVDD
220µF
1µF
15kΩ
GAINL
OUTL+
0.47µF 15kΩ
0.47µF 15kΩ
INL1
INL2
OUTL-
HPF
CODEC
MAX9765
0.47µF 15kΩ
0.47µF 15kΩ
INR1
INR2
OUTR-
HPF
OUTR+
GAINR
220µF
15kΩ
SCL
SDA
ADD
HPS
0.1µF
MICROCONTROLLER
AUX_IN
SHDN
2.2kΩ
MICBIAS
MICOUT
2.2kΩ
0.1µF
0.1µF
IN+
IN-
*C
IS ONLY REQUIRED IF LOW CLICK-AND-POP LEVELS ARE NECESSARY DURING POWER-DOWN.
SVDD
26 ______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Functional Diagrams
V
DD
*
0.1µF
C
SVDD
V
SV
DD
PV
DD
DD
15kΩ
GAINL
OUTL+
V
DD
0.47µF
0.47µF
15kΩ
15kΩ
AUDIO
INPUT
INL1
INL2
2:1
INPUT
MUX
15kΩ
15kΩ
680kΩ
AUDIO
INPUT
220µF
15kΩ
BIAS
BIAS
15kΩ
1µF
OUTL-
GAINR
15kΩ
0.47µF
0.47µF
15kΩ
15kΩ
AUDIO
INPUT
INR1
INR2
2:1
INPUT
MUX
15kΩ
15kΩ
AUDIO
INPUT
OUTR+
220µF
15kΩ
SHDN
SCL
15kΩ
2
I C
OUTR-
HPS
SDA
ADD
LOGIC
47kΩ
HPS
0.1µF
AUXIN
10kΩ
2.2kΩ
2:1
OUTPUT
MUX
MICOUT
MICBIAS
MIC
BIAS
0.1µF
2.2kΩ
0.1µF
0.1µF
MICIN+
MICIN-
MAX9765
GND
*C
IS ONLY REQUIRED IF LOW CLICK-AND-POP LEVELS ARE NECESSARY DURING POWER-DOWN.
SVDD
______________________________________________________________________________________ 27
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Functional Diagrams (continued)
V
DD
*
0.1µF
C
SVDD
PV
DD
V
SV
DD
DD
15kΩ
GAINL
GAIN
MUX
GAINM
0.47µF
0.47µF
15kΩ
15kΩ
V
DD
AUDIO
INPUT
INL1
INL2
2:1
INPUT
MUX
15kΩ
15kΩ
15kΩ
AUDIO
INPUT
OUTL+
680kΩ
220µF
BIAS
BIAS
15kΩ
1µF
15kΩ
OUTL-
15kΩ
GAINR
OUTR
0.47µF
0.47µF
15kΩ
15kΩ
AUDIO
INPUT
INR1
INR2
2:1
INPUT
MUX
15kΩ
15kΩ
AUDIO
INPUT
220µF
SHDN
SCL
I2C
LOGIC
SDA
47kΩ
0.1µF
HPS
AUXIN
HPS
MAX9766
10kΩ
2.2kΩ
MICBIAS
MIC
BIAS
MICOUT+
MICOUT-
0.1µF
2:1
OUTPUT
MUX
2.2kΩ
0.1µF
0.1µF
MICIN+
MICIN-
GND
*C
SVDD
IS ONLY REQUIRED IF LOW CLICK-AND-POP LEVELS ARE NECESSARY DURING POWER-DOWN.
28 ______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Functional Diagrams (continued)
15kΩ
15kΩ
0.1µF
15kΩ
INL
AUDIO
INPUT
OUTL+
OUTL-
15kΩ
15kΩ
V
DD
V
DD
0.1µF
PV
DD
BIAS
0.1µF
OUTR+
OUTR+
SHDN
MUTE
INTEXT
15kΩ
15kΩ
0.47µF
15kΩ
INR
AUDIO
INPUT
0.1µF
MAX9767
AUXIN
MICOUT+
MICOUT-
2.2kΩ
OUTPUT
MUX
MICBIAS
MIC
BIAS
1µF
2.2kΩ
0.1µF
GND
MICIN+
MICIN-
PGND
0.1µF
GADJ
GAIN
CONTROL
______________________________________________________________________________________ 29
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Pin Configurations
32 31 30 29 28 27 26 25
32 31 30 29 28 27 26 25
SHDN
N.C.
1
2
3
4
5
6
7
8
24 SDA
23 ADD
22 OUTR+
SHDN
N.C.
1
2
3
4
5
6
7
8
24 SDA
23 GAINM
22 OUTR+
OUTL+
OUTL+
PV
DD
21 PV
DD
PV
DD
21 PV
DD
MAX9765
MAX9766
PGND
OUTL-
N.C.
20 PGND
19 OUTR-
18 N.C.
PGND
OUTL-
N.C.
20 PGND
19 MICOUT-
18 N.C.
INL2
17 GAINR
INL2
17 GAINR
9
10 11 12 13 14 15 16
9
10 11 12 13 14 15 16
THIN QFN
THIN QFN
32 31 30 29 28 27 26 25
SHDN
N.C.
1
24 N.C.
23 N.C.
22 OUTR+
2
3
4
5
6
7
8
OUTL-
PV
DD
21 PV
DD
MAX9767
PGND
OUTL+
N.C.
20 PGND
19 OUTR-
18 N.C.
N.C.
17 MICOUT-
9
10 11 12 13 14 15 16
THIN QFN
30 ______________________________________________________________________________________
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Selector Guide
MICROPHONE
AMPLIFIER
OUTPUT
CONTROL
INTERFACE
SPEAKER
AMPLIFIER
INPUT
MULTIPLEXER
HEADPHONE
AMPLIFIER
PART
MAX9765
MAX9766
MAX9767
I2C compatible
I2C compatible
Parallel
Stereo
Mono
✓
✓
Stereo
Stereo
—
Single ended
Differential
Differential
Stereo
—
Chip Information
MAX9765 TRANSISTOR COUNT: 4829
MAX9766 TRANSISTOR COUNT: 4533
MAX9767 TRANSISTOR COUNT: 4731
PROCESS: BiCMOS
______________________________________________________________________________________ 31
750mW Audio Amplifiers with Headphone Amp,
Microphone Preamp, and Input Mux
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
D2
D
b
0.10 M
C A B
C
L
D2/2
D/2
k
L
MARKING
XXXXX
E/2
E2/2
C
(NE-1) X
e
L
E2
E
PIN # 1 I.D.
0.35x45∞
DETAIL A
e
PIN # 1
I.D.
(ND-1) X
e
DETAIL B
e
L
C
C
L
L1
L
L
L
e
e
0.10
C
A
0.08
C
C
A3
A1
PACKAGE OUTLINE,
16, 20, 28, 32L THIN QFN, 5x5x0.8mm
1
-DRAWING NOT TO SCALE-
21-0140
G
2
COMMON DIMENSIONS
20L 5x5 28L 5x5
EXPOSED PAD VARIATIONS
D2 E2
MIN. NOM. MAX. MIN. NOM. MAX. ±0.15
DOWN
BONDS
ALLOWED
L
PKG.
SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX.
16L 5x5
32L 5x5
PKG.
CODES
T1655-1
T1655-2
3.00 3.10 3.20 3.00 3.10 3.20
3.00 3.10 3.20 3.00 3.10 3.20
NO
YES
NO
A
**
**
**
**
0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80
0.02 0.05 0.02 0.05 0.02 0.05 0.02 0.05
0.20 REF. 0.20 REF. 0.20 REF. 0.20 REF.
A1
0
0
0
0
T1655N-1 3.00 3.10 3.20 3.00 3.10 3.20
A3
b
T2055-2
T2055-3
T2055-4
T2055-5
3.00 3.10 3.20 3.00 3.10 3.20
3.00 3.10 3.20 3.00 3.10 3.20
3.00 3.10 3.20 3.00 3.10 3.20
NO
YES
NO
Y
0.25 0.30 0.35 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30
4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10
4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10
**
**
D
E
3.15 3.25 3.35 3.15 3.25 3.35 0.40
e
0.80 BSC.
0.25
0.30 0.40 0.50 0.45 0.55 0.65 0.45 0.55 0.65 0.30 0.40 0.50
0.65 BSC.
0.50 BSC.
0.50 BSC.
T2855-1
T2855-2
3.15 3.25 3.35 3.15 3.25 3.35
2.60 2.70 2.80 2.60 2.70 2.80
NO
NO
**
**
**
**
k
-
-
0.25
-
-
0.25
-
-
0.25
-
-
L
T2855-3
T2855-4
3.15 3.25 3.35 3.15 3.25 3.35
2.60 2.70 2.80 2.60 2.70 2.80
2.60 2.70 2.80 2.60 2.70 2.80
3.15 3.25 3.35 3.15 3.25 3.35
YES
YES
NO
L1
-
-
-
-
-
-
-
-
-
-
-
-
N
ND
16
4
20
5
28
7
32
8
T2855-5
T2855-6
T2855-7
T2855-8
**
**
**
NO
YES
4
5
7
8
NE
2.80
3.35
3.35
3.20
2.60 2.70
3.15 3.25
2.60 2.70 2.80
3.15 3.25 3.35
3.15 3.25 3.35
3.00 3.10 3.20
WHHB
WHHC
WHHD-1
WHHD-2
JEDEC
0.40
Y
N
NO
T2855N-1 3.15 3.25
**
**
**
NOTES:
T3255-2
T3255-3
T3255-4
3.00 3.10
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
3.00 3.10 3.20 3.00 3.10 3.20
3.00 3.10 3.20 3.00 3.10 3.20
YES
NO
**
**
NO
T3255N-1 3.00 3.10 3.20 3.00 3.10 3.20
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL
CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE
OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1
IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.
**SEE COMMON DIMENSIONS TABLE
5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR T2855-1,
T2855-3 AND T2855-6.
10. WARPAGE SHALL NOT EXCEED 0.10 mm.
11. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY.
12. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY.
PACKAGE OUTLINE,
16, 20, 28, 32L THIN QFN, 5x5x0.8mm
2
-DRAWING NOT TO SCALE-
21-0140
G
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________32
© 2005 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.
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