X2111TTT [MAXIM]
Analog Circuit;
| 型号： | X2111TTT |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Analog Circuit |
| 文件： | 总8页 (文件大小：70K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-0370; Rev 0; 2/95
Qu a d ra t u re Dig it ize r Circ u it s
MAX210Subcir
_______________Ge n e ra l De s c rip t io n
____________________________Fe a t u re s
The MAX2100 family of quadrature digitizers offers
complete solutions to digital demodulation problems.
The flagship of the MAX2100 family is the MAX2101 6-
bit Quadrature Digitizer. The subcircuits derived from
the MAX2101 provide excellent starting points for the
RF IC designer to develop components that bridge the
gap between existing RF downconverters and CMOS
digital signal processors.
♦ Operation at IFs from 70MHz to 700MHz*
♦ Precision Quadrature Demodulation
(1°, 0.2dB typ Mismatch, f = 650MHz)
♦ Matched Active Filters with Electronically Variable
Cutoff from 10MHz to 30MHz
♦ 40dB of AGC Range
♦ High-Speed 6-Bit ADCs with 5.8 (typ)
Each MAX2100 subcircuit comes with a detailed sche-
matic, TEKSPICE or PSPICE netlist, models, and GDSII
la yout for inc orp ora tion in your own c us tom ASIC
design. These subcircuits can be used separately or in
combination to produce complete demodulation and
digitization components for intermediate frequencies
(IF) ra ng ing from 70MHz to 700MHz, a nd for b a s e
bandwidths to 80MHz*. All are powered by a +5V sup-
ply, and are implemented in Maxim’s proprietary GST-1
Effective Bits (f = 30MHz, f = 120Msps) and
200MHz Input Bandwidth
IN
C
______________Ord e rin g In fo rm a t io n
cuits
PART
SIMULATOR
PSPICE
MEDIUM
FORMAT
DOS
TAR
X21nnPFD
X21nnPFT
X21nnPTT
X21nnPHT
X21nnPLT
X21nnPET
X21nnTFT
X21nnTTT
X21nnTHT
X21nnTLT
X21nnTET
3.5" Floppy
3.5" Floppy
Tape
PSPICE
wafer fabrication process with NPN f = 13GHz.
T
PSPICE
TAR
Maxim does not guarantee specifications or fitness for
use of these subcircuits in your custom ASIC. The sub-
circuits are intended to demonstrate Maxim’s process
and design capability, and to provide circuit designers
with a “he a d s ta rt” in d e ve lop ing the ir own ASIC.
Operation of these subcircuits in a customer-designed
ASIC is the responsibility of the customer.
PSPICE
9-track 6250 bpi
9-track 1600 bpi
Electronic mail
3.5" Floppy
Tape
TAR
PSPICE
TAR
PSPICE
TAR
TEKSPICE
TEKSPICE
TEKSPICE
TEKSPICE
TEKSPICE
TAR
TAR
9-track 6250 bpi
9-track 1600 bpi
Electronic mail
TAR
TAR
________________________Ap p lic a t io n s
Recovery of PSK and QAM Modulated RF Carriers
Direct-Broadcast Satellite (DBS) Systems
Television Receive-Only (TVRO) Systems
Cable Television (CATV) Systems
TAR
The MAX2100 cells are available in the above formats to
customers who have purchased a GST-1 ASIC Start-Up
Package and signed Maxim’s Non-Disclosure Agreement.
_______________________________________________________________Blo c k Dia g ra m
I OUT
6
X2114
400MHz to
700MHz
0°
IF IN
-90°
LO X2116
X2112
X2118
Q OUT
6
MAX2101*
X2111
X2113
X2114
fc = 10MHz to 30MHz
A/D CLOCK
60MHz
*AVAILABLE AS A STANDARD PRODUCT.
SEE MAX2101 DATA SHEET FOR SPECIFICATIONS AND ORDERING INFORMATION.
*VCO and Quadrature Generator limited to 400MHz to 700MHz
________________________________________________________________ Maxim Integrated Products
1
Ca ll t o ll fre e 1 -8 0 0 -9 9 8 -8 8 0 0 fo r fre e s a m p le s o r lit e ra t u re .
Du a l Ba la n c e d De m o d u la t o r
_____________________Blo c k Dia g ra m
____________________________Fe a t u re s
♦ Wide Output Bandwidth (>80MHz)
♦ Matched Demodulation to 700MHz
♦ 10dB Conversion Gain
I LO IN
cuits
I RF IN
I BB OUT
Q BB OUT
_________________________De s c rip t io n
The X2111 Dual Balanced Demodulator cell comprises
two Gilbert-cell, double-balanced mixers. In combina-
tion with the X2118 precision quadrature generator, the
X2111 provides precise quadrature demodulation of
QPSK and QAM modulated carriers to 700MHz.
X2111
Q RF IN
Cell Dimensions: 2 x [300µm x 230µm]
Q LO IN
X2111 DUAL BALANCED DEMODULATOR
MAX210Subcir
KEY ELECTRICAL CHARACTERISTICS
(T = 0°C to +70°C, unless otherwise noted.)
A
PARAMETER
= 5.0V ±5V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
CC
LO Input Frequency
Output Baseband Gain Flatness
I/Q Amplitude Imbalance
I/Q Phase Imbalance
Noise Figure
f
400
700
0.4
0.4
1.5
15
MHz
dB
LO
5Hz to 20MHz
∆M(I/Q)
∆φ(I/Q)
NF
f
= 650MHz
= 650MHz
= 650MHz
= 650MHz
= 650MHz
dB
LO
f
LO
°
f
LO
dB
Conversion Gain
A
f
LO
10
dB
Input Third-Order Intercept
Supply Current
IIP3
f
LO
+10
dBm
mA
MHz
I
CC
18
Output Bandwidth
f
80
-3dB
PORT LIST
PORT NAME
DESCRIPTION
PORT NAME
DESCRIPTION
V
CC
(I/Q)
+5V supply to I/Q mixer
SUB
Substrate connection (GND)
500µA PTAT reference current input
(from X2112 or equivalent)
BIAS (I/Q)
(I/Q)
OSC (I/Q)
+ LO input
V
GND for I/Q mixer
+ RF input
OSCB (I/Q)
OPA (I/Q)
- LO input
EE
IP (I/Q)
+ Baseband output
- Baseband output
IPB (I/Q)
- RF input
OPAB (I/Q)
2
_______________________________________________________________________________________
IF Am p lifie r w it h Va ria b le Ga in
MAX210Subcir
_____________________Blo c k Dia g ra m
____________________________Fe a t u re s
♦ 24dB Gain
♦ 800MHz Bandwidth
♦ Over 40dB of Gain Range
X2112
_________________________De s c rip t io n
IF IN
OUT
The X2112 IF Amplifier with Variable Gain cell compris-
es a differential input amplifier with 10dB insertion gain,
an AGC amp with 40dB of control range, and a second
IF amp with 12dB gain. The differential input can be
driven single-ended by proper AC grounding or by ter-
minating the inverting input. There is sufficient linearity
to provide IIP3 of +10dBm at minimum AGC setting.
AGC IN
cuits
Cell Dimensions: 780µm x 725µm
X2112 IF AMPLIFIER WITH VARIABLE GAIN
KEY ELECTRICAL CHARACTERISTICS
(T = 0°C to +70°C, unless otherwise noted.)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
= 5.0V ±5%, R = 1kΩ, C = 2pF
CC
L
L
Bandwidth (-3dB)
Maximum Gain
Minimum Gain
BW-3dB Max gain, Pin = -48dBm
800
MHz
dB
AVmax
AVmin
∆AV
f = 650MHz, V
= max
= min
22
40
AGC
f = 650MHz, V
-18
dB
AGC
Gain-Control Range
Noise Figure
f = 650MHz
f = 650MHz, V
dB
NF
= max
15
18
1
dB
AGC
Noise-Figure Variation
∆NF
Max gain to min gain
f = 650MHz, max gain
f = 650MHz, min gain
Z0 = 50Ω/side
dB/dB
-35
Input Third-Order Intercept
IIP3
dBm
+10
Input VSWR
2:1
2:1
Output VSWR
Supply Current
Z0 = 50Ω/side
I
CC
20
mA
PORT LIST
PORT NAME
DESCRIPTION
PORT NAME
AGCIP
2R5
DESCRIPTION
V
+5V supply
Ground
AGC control voltage input
Bandgap-derived 2.5V output
+ IF output
CC
V
EE
SUB
IP
Substrate connection (ground)
+ IF input
OP
OPB
- IF output
IPB
- IF input
BGR
Bandgap reference (1.2V) output
K250
P250
MIX(I/Q)
250µA constant reference current for X2118 VPTAT
Voltage proportional to absolute T output
250µA PTAT reference current for X2114
250µA PTAT reference current for X2118
500µA PTAT reference current for X2111
(I/Q)BIAS
_______________________________________________________________________________________
3
Du a l 6 -Bit ADCs (Me g a c e ll)
_____________________Blo c k Dia g ra m
____________________________Fe a t u re s
♦ Dual, 6-Bit, 120Msps Flash Architecture
♦ Programmable Sample Rate
cuits
♦ Excellent Dynamic Performance
(5.8 effective bits at f = 30MHz)
IN
♦ Low Incidence of Metastable States
I INPUT
ADC
I OUTPUT
6
♦ All Reference Generation Circuitry Included
_________________________De s c rip t io n
The X2113 “Megacell” contains two 6-bit flash ADCs and
associated reference and clock generation circuitry. The
comparator array in each ADC contains 63 identical dif-
ferential comparator and latch cells. The proprietary dif-
ferential architecture minimizes integral linearity error and
the occurrence of metastable states. The thermometer
code output of the comparator array is translated into
gray code using a fully differential wired-AND/wired-OR
scheme. This maximizes noise immunity. The gray code
is then converted to binary with a modified XOR array.
CLOCK OUT
REF OUT
CLOCK IN
/N
REF
GEN
SAMPLE RATE
3
ADC
Q OUTPUT
Q INPUT
6
MAX210Subcir
X2113
The reference generator applies a precision bandgap
signal to the differential ladder in the comparator array.
Additional circuitry is provided to adjust the half-scale
ladder voltage to the common-mode voltage of the dif-
ferential input signal.
X2113 DUAL 6-BIT ADCs
(MEGACELL)
A programmable divider allows the user to change
sample rate from a fixed external-clock oscillator.
Cell Dimensions: 2800µm x 1500µm
KEY ELECTRICAL CHARACTERISTICS
(T = 0°C to +70°C, unless otherwise noted.)
A
PARAMETER
= 5.0V ±5%
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
CC
Maximum Sample Rate,
Each Channel
SRmax
120
20
Msps
0.1dB Bandwidth
BW0.1dB
ENOB
IM3
MHz
Bits
dBc
ns
Effective Number of Bits
Input Third-Order Intermod
Settling Time
f
= 30MHz, f = 60Msps, 95% FS
5.8
-38
IN
S
f1 = 10MHz, FS–7dB; f2 = 12MHz, FS–7dB
Full-scale to <1%
t
10
TRAN
Full-Scale Input Range
Common-Mode Input Range
Input Resistance
∆VIN
±0.75
V
FS
VIN
2.25
5
2.75
V
cm
RIN
kΩ
pF
dB
ps
Input Capacitance
CIN
2
Amplitude Response Mismatch
Aperture Uncertainty
∆A
Channel-to-channel
0.3
80
f
= 60Msps
S
Aperture Delay Match,
Channel-to-Channel
20
ps
4
_______________________________________________________________________________________
Du a l 6 -Bit ADCs (Me g a c e ll)
MAX210Subcir
KEY ELECTRICAL CHARACTERISTICS (continued)
(T = 0°C to +70°C, unless otherwise noted.)
A
PARAMETER
Input Offset
SYMBOL
CONDITIONS
MIN
TYP
MAX
0.5
UNITS
LSB
LSB
LSB
V
V
OS
LSB = 24mV, either channel
Differential Nonlinearity
Integral Nonlinearity
Data Output High
Data Output Low
Supply Current
DNL
INL
0.5
0.5
V
OH
R
R
= 1MΩ, C = 15pF
2.4
L
L
L
V
OL
= 1MΩ, C = 15pF
0.5
V
L
I
CC
80
100
mA
PORT LIST
PORT NAME
DESCRIPTION
+5V supply, quantizer
PORT NAME
DESCRIPTION
cuits
V
AD
D
AIN (I/Q)
+ Analog input
- Analog input
CC
V
+5V supply, digital
AINB (I/Q)
CC
V
CC
O
+5V supply, outputs
BGR
Bandgap reference output
V
C
+5V supply, clock
D0 (I/Q)
D1 (I/Q)
D2 (I/Q)
D3 (I/Q)
D4 (I/Q)
D5 (I/Q)
BINEN
S2
Digital output, LSB
Digital output
CC
SUBA
Substrate (ground), analog
Substrate (ground), digital
Ground connection, quantizer
Ground connection, encoder
Ground connection, output
Ground connection, clock
Master clock input
SUBD
Digital output
VGNDAD
VGNDDD
VGNDDO
VGNDC
MCLK
Digital output
Digital output
Digital output, MSB
Binary enable/Two’s complement
Programmable sample-rate control, MSB
Programmable sample-rate control
RCLK
Reference clock (div 6) output
Data clock output
S1
DCLK
S0
Programmable sample-rate control, LSB
250µA PTAT reference current input
(from cell X2114 or equivalent)
DCLKB
Data clock complement output
P250 (I/Q)
_______________________________________________________________________________________
5
Ac t ive Lo w p a s s Filt e r
_____________________Blo c k Dia g ra m
____________________________Fe a t u re s
♦ 5-Pole Butterworth Response
♦ Adjustable Cutoff Frequency
cuits
♦ No External Components Required
X2114
_________________________De s c rip t io n
The X2114 cell is an Active Lowpass Filter for anti-alias-
ing. The 5th-order Butterworth response is realized
using a Gyrator topology. Cutoff frequency can be
adjusted from 10MHz to 30MHz. Other pole-only filter
characteristics, as well as different cutoff frequency
ranges, can be designed by changing capacitor val-
ues.
INPUT
OUTPUT
VTUNE
Filter cutoff-frequency control requires a linear PTAT
voltage between 1V and 4V (at +27°C). An on-chip ref-
erence generator provides the necessary voltage varia-
tion with temperature.
X2114 LOWPASS
ACTIVE FILTER
Cell Dimensions: 620 x 780 + 260 x 520µm
MAX210Subcir
KEY ELECTRICAL CHARACTERISTICS
(T = 0°C to +70°C, unless otherwise noted.)
A
PARAMETER
= 5.0V ±5%
SYMBOL
CONDITIONS
MIN
16
TYP
MAX
UNITS
V
CC
Cutoff Frequency
Minimum Cutoff
f
C
VTUNE = 2.1V, 3dB, T = +25°C
24
10
MHz
MHz
MHz
dB
A
f
VTUNE = 1V, 3dB, T = +25°C
A
CMIN
Maximum Cutoff
Passband Attenuation
f
VTUNE = 4V, 3dB, T = +25°C
A
30
CMAX
APB
f = 5MHz
0
2
f = 2 x f
C
Stop-Band Attenuation
ASB
27
30
dB
(with respect to signal level at f = 0.5 x f )
C
Maximum Input Signal, p-p
Supply Current
V
(max)
mV
mA
IN
I
CC
2.5
58
Equivalent Input Noise
e
f = 5MHz, R = 50Ω
S
n
nV/√Hz
PORT LIST
PORT NAME
DESCRIPTION
PORT NAME
OP
DESCRIPTION
V
+5V supply
Ground
Output
CC
V
REF1
Output reference
EE
250µA PTAT reference current input
(from X2112 or equivalent)
Bandgap voltage in
(from X2112 or equivalent)
BIAS
REF
IP
+ Input
ADC
250µA PTAT reference current output for X2113
Tuning voltage input (PTAT)
IPB
SUB
- Input
VTUNE
Substrate connection (GND)
6
_______________________________________________________________________________________
Diffe re n t ia l Os c illa t o r
MAX210Subcir
_____________________Blo c k Dia g ra m
____________________________Fe a t u re s
♦ Oscillates from <400MHz to >700MHz
♦ Low Phase Noise
(-88dBc/Hz @ 10kHz Offset, Qr >20)
♦ Differential Resonator Port for Immunity to
Interference and Crosstalk
X2116
EXT TANK
OUT
_________________________De s c rip t io n
The X2116 cell is a Differential Oscillator suitable for
use as the LO in a receiver system. The differential
inputs present a negative resistance for use with an
external resonator. A differential topology is used to
provide maximum interference rejection.
cuits
X2116 DIFFERENTIAL OSCILLATOR
Cell Dimensions: 520µm x 260µm
KEY ELECTRICAL CHARACTERISTICS
(T = 0°C to +70°C, unless otherwise noted.)
A
PARAMETER
= 5.0V ±5%
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
CC
Oscillation Frequency
Phase Noise Floor
Phase Noise
f
External resonator
20MHz off f , 1Hz BW, Qr = 20
400
700
MHz
dBc
dBc
mV
mA
C
ΦN
ΦN
Vo
-140
-88
C
10MHz off f , 1Hz BW, Qr = 20
C
Output Level, Differential, p-p
Supply Current
C
= 1pF/side, R = 10k/side
600
L
L
I
CC
10
PORT LIST
PORT NAME
DESCRIPTION
PORT NAME
DESCRIPTION
V
+5V supply
OP
+ Output
- Output
CC
TNKA
TNKB
Differential tank connection A
Differential tank connection B
OPB
SUB
Substrate connection (GND)
125µA constant reference current input
(from X2118 or equivalent)
250µA PTAT reference current input
(from X2118 or equivalent)
K125
P250
V
EE
Ground
_______________________________________________________________________________________
7
P re c is io n Qu a d ra t u re Ge n e ra t o r
_____________________Blo c k Dia g ra m
____________________________Fe a t u re s
♦ Precision Quadrature Generation
(<1.5° at 650MHz)
♦ Wide Input Frequency Range (400MHz to 700MHz)
cuits
I OUT
X2118
2
_________________________De s c rip t io n
The X2118 Precision Quadrature Generator cell uses a
delay-locked loop to provide tight amplitude and phase
matching. The input from an external VCO drives a
buffer and a delay line consisting of three electronically
variable delay cells. The output of the delay line drives
a second buffer identical to the first. The buffer outputs
are compared by a phase detector whose error signal
drives the variable delay cells to adjust the phase dif-
ference to 90°. This method provides precise quadra-
ture generation over the wide input frequency range of
400MHz to 700MHz.
0°
-90°
Q OUT
2
LO IN
X2118 PRECISION QUADRATURE
GENERATOR
Cell Dimensions: 570µm x 1800µm
MAX210Subcir
KEY ELECTRICAL CHARACTERISTICS
(T = 0°C to +70°C, unless otherwise noted.)
A
PARAMETER
= 5.0V ±5%
SYMBOL
CONDITIONS
MIN
TYP
400
20
MAX
UNITS
V
CC
LO Frequency
f
LO
400
700
1.5
MHz
°
∆Φ
Vo (pk-pk)
∆Vo
Output Phase Mismatch
Output Level
f
= 650MHz
= 650MHz
LO
mV
mV
dBm
Output Amplitude Mismatch
LO Input Level
f
LO
12
0
V
LO
-10
LO Input VSWR
ZC = 50Ω
2:1
Supply Current
I
CC
mA
PORT LIST
PORT NAME
DESCRIPTION
PORT NAME
DESCRIPTION
V
+5V supply
+ Input
- Input
Q
+ Quadrature output
- Quadrature output
+ Inphase output
- Inphase output
CC
IP
QB
I
IPB
V
EE
GND
IB
250µA constant reference current input
(from X2112 or equivalent)
250µA PTAT reference current input
(from X2112 or equivalent)
K250
SUB
P250
Substrate connection (GND)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8
___________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 (4 0 8 ) 7 3 7 -7 6 0 0
© 1995 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
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