MLX80004KLWBAA-001RE

更新时间:2024-09-18 22:08:35
品牌:MELEXIS
描述:Enhanced Universal Dual/Quad LIN Transceiver

MLX80004KLWBAA-001RE 概述

Enhanced Universal Dual/Quad LIN Transceiver

MLX80004KLWBAA-001RE 数据手册

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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
1. Features and Benefits  
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LIN 2.x/SAE J2602 and ISO17987-4 compliant  
Quad/Dual - enhanced master transceiver function for each channel  
Backward compatible to quad-channel master transceiver MLX80001  
Lowest space (QFN4x4, wettable flanks) and minimized external components  
Quad/Dual versions with same package and foot print for cost/space optimized design  
Slew rate selection and High Speed Flash mode  
Wide operating voltage range VS = 5 to 27 V  
Fully compatible to 3.3V and 5V devices  
Very low standby current consumption of (typ) 10µA in sleep mode  
WAKE input for local wake-up capability  
Remote and local wake-up source recognition  
Control output INH for external components  
Integrated termination (resistor & decoupling diode) for both LIN master & slave nodes  
TxD dominant time out function in slave configuration  
RxD dominant time out function in master configuration  
Sleep timer  
Low EME (emission) and high EMI (immunity) level  
High impedance LIN pin in case of loss of ground or battery  
Enhanced ESD robustness  
o
+/- 10kV according to IEC 61000-4-2 for pins LIN, Vs and WAKE  
2. Ordering Information  
Temperature  
Packing Form  
Code  
RE  
Product Code  
Package Code  
Option Code  
Code  
CAA-001  
BAA-001  
MLX80002  
MLX80004  
K
K
LW  
LW  
RE  
Legend:  
Temperature Code:  
Package Code:  
Option Code:  
K = -40 to 125°C  
LW = Quad Flat Package (QFN), wettable flanks  
BAA-001 = Design Revision  
RE = Reel  
Packing Form:  
Ordering example:  
MLX80004 KLW-BAA-001-RE  
Revision 021 Sept 2016  
Page 1 of 38  
 
 
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
3. General Description  
The MLX80004(2) is a quad/dual LIN transceiver physical layer device for a single wire data link capable of operating in  
applications using baud rates up to 20kBd. It is compliant to LIN2.x as well as to the SAE J2602 specifications. The IC  
furthermore can be used in ISO9141 systems. The MLX80004 is functionally compatible to the MLX80001 quad master  
LIN transceiver.  
The device is flexible for use in LIN master applications and slave applications as well.  
Due to the integrated master termination and the high ESD/EMC robustness of the device a minimum space and  
number of external components is required.  
The number of LIN channels can be easily adapted on the application requirements by combinations of quad and dual  
channel devices within the same foot print.  
Because of the very low power consumption of the MLX80004 while being in sleep mode it’s suitable for ECU  
applications with hard standby current requirements. The implemented high resistive LIN - termination in sleep mode as  
well as the RxD dominant time-out feature allows a comfortable handling of LIN short circuits to GND.  
In order to reduce the power consumption in case of failure modes, the integrated sleep timer takes care for switching  
the IC into the most power saving sleep mode after Power-On or Wake-Up events are not followed by a mode change  
response of the microcontroller.  
The MLX80004/2 has an improved EMI performance and ESD robustness according to the OEM Common Hardware  
Requirements for LIN in Automotive Applications Rev.1.2.  
By using the MODE0/1 pins the application can be easily adapted on the required baud rate in order to optimize the  
EMC emissions. A high speed Flash Mode with disabled slew rate control is available as well.  
To fulfill different OEM requirements, the integrated master termination can be disabled and external master resistors  
and decoupling diodes can be used. In this mode the MLX80004/2 can be used in slave applications as well.  
Revision 021 Sept 2016  
Page 2 of 38  
 
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
4. Table of Contents  
1. Features and Benefits...................................................................................................................................................1  
2. Ordering Information ...................................................................................................................................................1  
3. General Description .....................................................................................................................................................2  
4. Table of Contents.........................................................................................................................................................3  
5. Block Diagram ..............................................................................................................................................................5  
6. Pin Description.............................................................................................................................................................6  
7. Electrical Specification..................................................................................................................................................7  
7.1  
7.2  
7.3  
7.4  
Operating Conditions ..................................................................................................................................................................... 7  
Absolute Maximum Ratings ........................................................................................................................................................... 8  
Static Characteristics...................................................................................................................................................................... 9  
Dynamic Characteristics............................................................................................................................................................... 12  
7.4.1 Duty Cycle Calculation ..................................................................................................................................................... 13  
8. Functional Description ...............................................................................................................................................15  
8.1  
8.2  
8.3  
Operating Modes.......................................................................................................................................................................... 16  
Initialization and Standby mode .................................................................................................................................................. 16  
Active Modes................................................................................................................................................................................ 16  
8.3.1 High Speed mode............................................................................................................................................................. 17  
8.3.2 Low speed mode.............................................................................................................................................................. 17  
8.3.3 Normal speed mode ........................................................................................................................................................ 17  
8.4  
8.5  
8.6  
8.7  
Sleep Mode................................................................................................................................................................................... 17  
Wake Up........................................................................................................................................................................................ 18  
Wake Up Source Recognition ...................................................................................................................................................... 18  
Master / Slave configuration ....................................................................................................................................................... 21  
9. Fail-safe Features.......................................................................................................................................................22  
9.1  
9.2  
9.3  
9.4  
9.5  
9.6  
9.7  
9.8  
9.9  
Loss of battery .............................................................................................................................................................................. 22  
Loss of Ground.............................................................................................................................................................................. 22  
Short circuit to battery................................................................................................................................................................. 22  
Ground shift and short circuit to ground .................................................................................................................................... 22  
Thermal overload ......................................................................................................................................................................... 22  
Undervoltage lock out.................................................................................................................................................................. 22  
Open Circuit protection ............................................................................................................................................................... 22  
TxDx faulty start protection ......................................................................................................................................................... 23  
RxDx dominant time-out.............................................................................................................................................................. 23  
9.10 TxDx dominant time-out .............................................................................................................................................................. 23  
Application Example...............................................................................................................................................24  
10.1 Enhanced Master Mode............................................................................................................................................................... 24  
10.2 Standard Transceiver Mode......................................................................................................................................................... 25  
10.  
Revision 021 Sept 2016  
Page 3 of 38  
 
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
10.3 Application Circuitry for EMC ...................................................................................................................................................... 26  
10.3.1 External Circuitry on Supply Lines ............................................................................................................................... 27  
10.3.2 External Circuitry on LIN Lines..................................................................................................................................... 27  
10.3.3 External Circuitry on Signal Lines................................................................................................................................. 27  
11.  
12.  
13.  
14.  
Mechanical Specification QFN24 ............................................................................................................................28  
Package Marking Information.................................................................................................................................29  
Tape and Reel Specification....................................................................................................................................30  
ESD and EMC..........................................................................................................................................................33  
14.1 Automotive Qualification Test Pulses.......................................................................................................................................... 33  
14.2 Test Pulses On supply Lines ......................................................................................................................................................... 33  
14.3 Test pulses on Pin LIN................................................................................................................................................................... 34  
14.4 Test pulses on signal lines............................................................................................................................................................ 34  
14.5 Test circuitry for automotive transients...................................................................................................................................... 35  
14.6 EMC Test pulse definition ............................................................................................................................................................ 36  
Standard information regarding manufacturability of Melexis products with different soldering processes...........37  
Disclaimer ..............................................................................................................................................................38  
15.  
16.  
Revision 021 Sept 2016  
Page 4 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
5. Block Diagram  
MLX80004  
MLX80002  
VS  
INH  
Vs  
3.3V  
Supply  
Temp.  
Protection  
Vs  
monitor/  
POR  
Mode  
Control  
MODE0  
MODE1  
RCO  
Sleep timer  
Wake-up  
Control  
WAKE  
RxDx time out  
TxDx time out  
Bias  
Calibration  
& Control  
DIS_MAS  
Slew  
rate  
Master  
Pull up  
50uA  
Vs  
Wake-  
Filter  
RxD1  
TxD1  
Rec-Filter  
30K  
1K  
Receiver  
LIN1  
Filter  
Driver  
control  
TxTo  
TSD  
Local  
WU  
Vs  
Wake-  
Filter  
RxD2  
Rec-Filter  
30K  
1K  
Receiver  
LIN2  
Filter  
TxD2  
RxD3  
Driver  
control  
TxTo  
TSD  
channel3  
channel4  
LIN3  
LIN4  
TxD3  
RxD4  
TxD4  
Figure 1: Block Diagram MLX80004/2.  
Revision 021 Sept 2016  
Page 5 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
6. Pin Description  
Figure 2: Pinout MLX80004 QFN24 package  
Figure 3: Pinout MLX80002 QFN24 package  
Table 1: Pin List  
I/O-Type Description  
Pin  
1
MLX80004  
MLX80002  
RxD1  
O
I
Receive Data LIN Ch1, open drain  
2
TxD1  
Transmit Data LIN Ch1 (+ local WU-Flag)  
Operating Mode Selection Input 1  
Operating Mode Selection Input 2  
Transmit Data LIN Ch4  
3
MODE0  
MODE1  
I
4
I
5
TxD4  
RxD4  
N.C.  
N.C.  
I
6
O
I
Receive Data LIN Ch4, open drain  
disable integrated master resistor  
7
DIS_MAS  
N.C.  
8
9
LIN4  
N.C.  
N.C.  
I/O  
G
I/O  
I
LIN Bus Ch4  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
EPad  
GNDL  
WAKE  
Ground LIN  
LIN3  
LIN Bus Ch3  
local wake up input, low active  
Receive Data LIN Ch3, open drain  
Transmit Data LIN Ch3  
Ground  
RxD3  
TxD3  
N.C.  
N.C.  
O
I
GND  
TxD2  
RxD2  
N.C.  
INH  
G
I
Transmit Data LIN Ch2  
Receive Data LIN Ch2, open drain  
O
O
P
HV High Side Control Pin  
Battery Voltage  
LIN Bus Ch2  
VS  
LIN2  
GNDL  
LIN1  
N.C.  
I/O  
G
Ground LIN  
I/O  
LIN Bus Ch1  
GND / GNDL  
G
Exposed Pad of Package (grounded heatsink)1  
1 For enhanced thermal and electrical performance, the exposed pad of the QFN package should be soldered  
to the board ground plane (and not to any other voltage level).  
Revision 021 Sept 2016  
Page 6 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
7. Electrical Specification  
All voltages are referenced to ground (GND). Positive currents flow into the IC.  
The absolute maximum ratings (in accordance with IEC 60 134) given in the table below are limiting values that do not  
lead to a permanent damage of the device but exceeding any of these limits may do so. Long term exposure to limiting  
values may affect the reliability of the device.  
7.1. Operating Conditions  
Table 2: Operating Conditions  
Nr.  
Parameter  
Symbol  
Min  
Max  
Unit Remark  
101  
Battery supply voltage [1] [2]  
VS  
5
27  
V
Parameter deviations  
allowed  
102  
Extended battery supply voltage  
Vs_NON_OP  
5
40  
V
103  
104  
Operating ambient temperature  
Tamb  
-40  
+125  
5.5  
°C  
V
Voltage on low voltage I/Os (RxDx, TxDx,  
MODEx  
RxDx, TxDx,  
MODEx  
-0.3  
[1]  
[2]  
Vs is the IC supply voltage including voltage drop of reverse battery protection diode, VDROP = 0.4 to 1V,  
Operating voltage range of the LIN2.x/SAE J2602 plug & play specification is 7V…18V  
Revision 021 Sept 2016  
Page 7 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
7.2. Absolute Maximum Ratings  
Table 3: Absolute Maximum Ratings  
Nr. Parameter  
Symbol  
VS  
Condition  
Min  
-0.3  
Max  
Unit  
V
201  
202  
203  
204  
205  
206  
207  
Battery Supply Voltage  
Respective to GND  
ISO 7637/2 pulse 1[1]  
ISO 7637/2 pulse 2[1]  
ISO 7637/3 pulses 1[2]  
ISO 7637/3 pulses 2[2]  
ISO 7637/2 pulses 3A, 3B [3]  
40  
Transients at battery supply voltage  
Transients at battery supply voltage  
Transients at high voltage signal pins  
Transients at high voltage signal pins  
Transients at high voltage signal and power supply pins  
DC voltage LINx  
VVS.tr1  
VVS.tr2  
VLIN..tr1  
VLIN..tr2  
VHV..tr3  
VLIN_DC  
-100  
V
75  
V
-30  
V
30  
V
-150  
100  
V
Respective to GND and VS  
Loss of Ground( VGND=VS )  
Respective to GND and VS  
Loss of Ground( VGND=VS )  
-20  
-30  
-20  
-30  
40  
40  
40  
40  
V
208  
DC voltage WAKE  
VWAKE_DC  
V
VINH_DC  
VDISMAS_DC  
209  
210  
211  
DC voltage INH, DIS_MAS  
-0.3  
-0.3  
-10  
VS + 0.3  
7
V
V
DC voltage low voltage I/O’s (RxDx,TxDx,MODEx)  
ESD voltage, IEC 61000-4-2 [4]  
Vlv_DC  
VESD  
10  
kV  
kV  
kV  
V
Pin LIN, VS, WAKE  
Pin LIN, VS, WAKE, INH  
vs GND  
-8  
8
212  
ESD voltage, HBM (CDF-AEC-Q100-002)  
VESD  
All other pins  
-3  
3
213  
214  
215  
216  
217  
ESD voltage, CDM (CDF-AEC-Q100-011)  
Maximum latch - up free current at any Pin  
Thermal impedance  
VESD  
ILATCH  
JA  
Tstg  
-1000  
-500  
1000  
500  
50  
mA  
K/W  
°C  
°C  
JEDEC 1s2p board  
Storage temperature  
-55  
-40  
150  
150  
Junction temperature  
Tvj  
[1]  
[2]  
[3]  
ISO 7637/2 test pulses are applied to VS via a reverse polarity diode and >10uF blocking capacitor.  
ISO 7637/3 test pulses are applied to LIN via a coupling capacitance of 100nF.  
ISO 7637/3 test pulses are applied to LIN via a coupling capacitance of 1nF. ISO 7637/2 test pulses are applied to VS via a reverse polarity  
diode and >10uF blocking capacitor  
[4]  
IEC 61000-4-2 validated by external Lab during product qualification (see application examples)  
Revision 021 Sept 2016  
Page 8 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
7.3. Static Characteristics  
Table 4: Static Characteristics  
Unless otherwise specified all values in the following tables are valid for VS = 5 to 27V and Tj= -40 to 150°C. All voltages  
are referenced to ground (GND), positive currents flow into the IC.  
Nr. Parameter  
Symbol  
Condition  
Min  
Typ  
Max  
Unit  
PIN VS  
301  
302  
Undervoltage lockout  
VS_UV  
2.4  
0.1  
4.8  
0.7  
V
V
Undervoltage lockout hysteresis[1]  
VS_UV_hys  
0.3  
9
VM0DEx = 0V, Tj ≤ 85C  
VWAKE = VLINx = VS 14V  
VM0Dex = 0V, Tj ≤ 125C  
VWAKE = VLINx = VS ≤ 18V  
VM0Dex = 0V,  
15  
20  
µA  
µA  
µA  
303  
304  
305  
Supply current, sleep mode  
ISsl  
Supply current standby mode  
ISBY  
100  
200  
12  
400  
15  
after POR or WU  
VM0Dex = 5V,VTxD1-4 = 0V  
DIS_MAS = Vs (80004)  
VM0Dex = 5V,VTxD1-2 = 0V  
DIS_MAS = Vs (80002)  
VM0Dex = 5V,VTxD1-4 = 0V  
DIS_MAS = 0V (80004)  
VM0Dex = 5V,VTxD1-2 = 0V  
DIS_MAS = 0V (80002)  
Supply current active mode, dominant  
Standard transceiver mode  
ISd_slave  
mA  
7
9
100  
125  
Supply current active mode, dominant  
Enhanced master mode  
306  
307  
ISd_master  
mA  
mA  
50  
3
65  
5
Supply current active mode, recessive  
ISr  
VM0Dex = 5V,VTxD1-4 = 5V  
PIN LINx Transmitter  
Capacitance on pins LINx  
to GND  
310  
Transmitter internal capacitance[1]  
CLIN  
30  
40  
pF  
VLIN = VS,  
VM0Dex = 5V,VTxDx = 0V  
311  
312  
313  
314  
315  
Short circuit bus current  
IBUS_LIM  
40  
20  
100  
30  
200  
60  
mA  
kΏ  
Ώ
Pull up resistance bus, normal & standby  
mode  
Pull up resistance bus, normal & standby  
mode  
RSLAVE  
VDIS_MAS = VS  
VDIS_MAS = 0V  
RMaster  
900  
-100  
0.4  
1000  
-60  
1100  
-20  
1
VLINx = 0V, VS = 12V,  
VM0Dex = 0V,VTxDx = 5V  
Pull up current bus, sleep mode  
ISLAVE_SLEEP  
VSerDiode  
µA  
V
Voltage drop at int. diode in pull up path  
[1]  
RSLAVE  
VLINx =0V, VS =12V,  
VM0Dex = 5V,VTxDx = 5V,  
VDIS_MAS = VS  
VLINx=18V, VS =5V,  
VM0Dex = 5V,VTxDx = 5V,  
Tamb<125°C  
Receiver dominant input leakage current  
including pull up resistor  
316  
317  
IBUS_PAS_dom  
-400  
µA  
µA  
Receiver recessive input leakage current  
IBUS_PAS_rec  
20  
VS = 0V,  
0V < VLIN x< 18V  
Tamb<125°C  
VS = VGND = 12V,  
0 < VLINx < 18V  
318  
319  
Bus reverse current loss of battery [2]  
Bus current during loss of ground [2]  
IBUS_NO_BAT  
20  
50  
µA  
µA  
IBUS_NO_GND  
-10  
0
0
1.2  
Rload = 500, VS = 5V  
Rload = 500, VS >= 7V  
VM0Dex = 0/5V,VTxDx = 5V  
320  
321  
Transmitter dominant voltage [2]  
Transmitter recessive voltage [2]  
VolBUS  
V
V
0.2×VS  
1×VS  
VohBUS  
0.8×VS  
Revision 021 Sept 2016  
Page 9 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
Nr. Parameter  
Symbol  
Condition  
Min  
Typ  
Max  
Unit  
PIN LINx Receiver  
322  
323  
324  
325  
Receiver dominant voltage  
VBUSdom  
VBUSrec  
VBUS_CNT  
VHYS  
0.4×VS  
V
V
V
V
Receiver recessive voltage  
Center point of receiver threshold  
Receiver hysteresis  
0.6×VS  
VBUS_cnt = (VBUSdom+ VBUSrec)/2  
0.475×VS  
0.5×VS  
0.525×VS  
0.175×VS  
VHYS = ( VBUSrec VBUSdom  
)
PIN MODE0/1, TxD2/3/4  
331  
332  
High level input voltage  
Vih_xx  
Vil_xx  
Rising edge  
Falling edge  
Vih_xx = 5V  
Vil_xx = 0V  
2
V
V
Low level input voltage  
pull down resistor  
Leakage Current  
0.8  
600  
5
333  
Rpd_xx  
Ileak_xx  
200  
-5  
350  
k  
µA  
334  
PIN TxD1  
341  
High level input voltage  
Low level input voltage  
pull down resistor  
Vih_TxD1  
Vil_TxD1  
Rpd_TxD1  
Vol_txd1  
Rising edge  
Falling edge  
VTxD1 = 5V  
2
V
V
342  
0.8  
600  
0.6  
5
343  
200  
350  
k  
V
ITxD1 = 2mA  
Local WU flag  
344  
Low level output voltage  
Leakage Current  
345  
Ileak_TxD1  
VTxD1 = 0V  
-5  
µA  
PIN RxDx  
351  
Low level output voltage  
Leakage Current high  
Leakage Current low  
Vol_rxdx  
IRxDx = 2mA  
0.6  
5
V
VRxDx = 5V,VTxDx = 5V, VM0/1  
= 5V  
VRxDx = 0V,VTxDx = 5V, VM0Dex  
= 5V  
352  
Ileakh_rxdx  
Ileakl_rxdx  
-5  
-5  
µA  
µA  
353  
PIN INH  
361  
5
On resistance INH  
Ron_INH  
Ileakh_inh  
VS =12V, Tj 125°C  
20  
50  
5
362  
Leakage current INH high  
-5  
-5  
µA  
V
M0Dex = 0V,VINH = 27V  
M0Dex = VINH =0V,  
363  
Leakage current INH low  
Ileakl_inh  
5
µA  
V
PIN WAKE  
371  
372  
373  
374  
High level input voltage  
Vih_WAKE  
Vil_WAKE  
IWAKE_PU  
IWAKE_lk  
Sleep mode  
Sleep mode  
VWAKE = 0  
VS-1V  
V
V
Low level input voltage  
Pull up current WAKE  
VS-3.3V  
-30  
-5  
-10  
-1  
5
µA  
µA  
Leakage current WAKEhigh  
VWAKE = VS =27V  
Revision 021 Sept 2016  
Page 10 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
Nr. Parameter  
Symbol  
Condition  
Min  
Typ  
Max  
Unit  
PIN DIS_MAS  
Active modes  
381  
382  
383  
384  
385  
High level input voltage  
Vih_ DIS_MAS  
Vil_ DIS_MAS  
IDIS_MAS_PD  
IDIS_MAS_lkl  
IDIS_MAS_lkh  
4
VS+0.3V  
V
Low level input voltage  
Active modes  
Active modes  
VDIS_MAS = 0V  
1.9  
60  
5
V
Pull down current DIS_MAS  
Leakage current DIS_MAS_low  
Leakage current DIS_MAS_high  
50  
µA  
µA  
µA  
-5  
-5  
VDIS_MAS = 27V,  
sleep mode  
5
Thermal Protection  
391  
392  
Thermal shutdown[1]  
Thermal hysteresis[1]  
Tsd  
155  
170  
10  
190  
30  
°C  
°C  
Thys  
[1]  
[2]  
No production test, guaranteed by design and qualification  
In accordance to SAE J2602  
Revision 021 Sept 2016  
Page 11 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
7.4. Dynamic Characteristics  
Table 5: Dynamic Characteristics  
Unless otherwise specified all values in the following table are valid for VS = 5 to 27V and  
Tj = -40 to 150oC.  
Nr. Parameter  
Symbol  
Condition  
Min  
Typ  
Max  
Unit  
[1]  
[1]  
401  
402  
403  
404  
Propagation delay receiver  
trx_pdf  
CRxD =25pF falling edge  
6
µs  
Propagation delay receiver  
trx_pdr  
trx_sym  
trx_deb  
CRxD =25pF rising edge  
Calculate trx_pdf - trx_pdr  
LIN rising & falling edge  
6
2
4
µs  
µs  
µs  
Propagation delay receiver symmetry  
-2  
[2]  
Receiver debounce time  
0.5  
20kbps operation,  
normal mode  
Vs = 7 to 18V  
20kbps operation,  
normal mode  
Vs = 7 to 18V  
10.4kbs operation,  
low speed mode  
Vs = 7 to 18V  
10.4kbs operation,  
low speed mode  
Vs = 7 to 18V  
411  
412  
413  
414  
LIN duty cycle 1 [2] [3] [5]  
LIN duty cycle 2 [2] [3] [5]  
LIN duty cycle 3 [2] [3] [5]  
LIN duty cycle 4 [2] [3] [5]  
D1  
D2  
D3  
D4  
0.396  
0.581  
0.590  
0.417  
10.4kbs operation,  
low speed mode  
10.4kbs operation,  
low speed mode  
sleep mode,  
[4] [5]  
415  
416  
tREC(MAX) tDOM(MIN)  
Δt3  
Δt4  
15.9  
µs  
µs  
[4] [5]  
tDOM(MAX) tREC(MIN)  
17.28  
421  
Remote Wake-up filter time  
twux_remote  
LIN dominant time before  
30  
150  
µs  
rising edge  
sleep mode,  
WAKE falling edge  
422  
431  
432  
433  
441  
442  
Local Wake-up filter time  
twu_local  
10  
150  
27  
27  
1
50  
500  
60  
60  
5
µs  
ms  
ms  
ms  
µs  
µs  
Delay from Standby to Sleep Mode  
TxDx dominant time out time  
RxDx dominant time out time  
MODEx debounce time  
tdsleep  
VMODEx = 0  
active modes,  
VTxDx = 0  
active modes,  
VLINx = 0, VDIS_MAS = 0  
active > sleep mode  
transitions  
tTxDx_to  
TRxDx_to  
TMODE_deb  
TDIS_MAS_deb  
2
2
DIS_MAS debounce time  
master > slave transitions  
1
5
[1]  
[2]  
[3]  
[4]  
[5]  
This parameter is tested by applying a square wave signal to the LIN. The minimum slew rate for the LIN rising and falling edges is 50V/us  
See Figure 4LIN timing diagram  
Standard loads for duty cycle measurements are 1K/1nF, 660/6.8nF, 500/10nF, internal master termination disabled  
in accordance to SAE J2602, see Figure 5  
for supply voltage ranges Vs=5…7V and Vs=18…27V parametric deviations are possible  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
7.4.1. Duty Cycle Calculation  
Figure 4: LIN timing diagram (reference LIN2.1 specification)  
Figure 4: LIN timing diagram, relation between propagation delay and duty cycle  
(reference SAE J2602 specification)  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
As shown in Figure 4, both worst case duty cycles can be calculated as follows :  
Dwc1 = tBUS_rec(min) / (2 tBit )  
Dwc2 = tBUS_rec(max) / (2 tBit )  
Thresholds for duty cycle calculation for the plug & play specification in accordance to LIN2.0 / SAE J2602:  
Baud rate  
TBIT  
20kBd  
50µs  
10.4kBd  
96µs  
Dwc1  
D1  
D3  
Dwc2  
D2  
D4  
THREC(MAX)  
THDOM(MAX)  
THREC(MIN)  
THDOM(MIN)  
0.744 × VS_TX  
0.581 × VS_TX  
0.422 × VS_TX  
0.284 × VS_TX  
0.778 × VS_TX  
0.616 × VS_TX  
0.389 × VS_TX  
0.251 × VS_TX  
Table 6: Data Transmission Rates  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
8. Functional Description  
The MLX80004/2 is the physical layer interface between the master/slave microcontroller and the single wire LIN bus  
network.  
Figure 5: State Diagram of the MLX80004/2  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
8.1. Operating Modes  
Table 7: Operating Modes  
Mode  
MODE0  
MODE1  
TxDx  
RxDx  
floating/ active low [2]  
INH  
LIN transceiver  
weak pulldown/ active low  
Standby  
0
0
Vs  
Vs  
Off  
[1]  
1
1
0
1
0
1
weak pulldown/ input  
for transmit data stream  
On  
Active  
Sleep  
output for LIN data stream  
floating  
[3] [4] [5]  
0
0
weak pull down  
floating  
Off  
[1]  
[2]  
[3]  
[4]  
[5]  
Indicates the wake up flag in case of local wake up  
After power on RxDx is floating. If any wake up(local or remote) occurs it will be indicated by active low  
Active low interrupt at pin RxD will be removed when entering normal mode  
Wake up source flag at pin TxD1 will be removed when entering normal mode  
Active modes will be entered by a low -> high transition on pin MODEx. When recessive level (high) on pin TxDx is present the transmit path  
will be enabled  
8.2. Initialization and Standby mode  
When the battery supply voltage Vs exceeds the specified threshold VS_UV, the MLX80004/2 automatically enters an  
intermediate standby mode. The INH output becomes HIGH (Vs) and can be used for a battery driven interrupt or to  
switch on an external ECU voltage regulator. The pins RxDx are floating and the integrated master (slave) pull up  
resistor with decoupling diode pulls the pin LIN. The transmitter and the receiver are disabled.  
If no mode change occurs to any active mode via a MODE0/1 LOW to HIGH transition within the time stated (typically  
350ms), the IC enters the most power saving sleep mode and the INH output will become floating (logic 0).  
Furthermore the standby mode will be entered after a valid local or remote wake up event, when the MLX80004/2 is  
in sleep mode. The entering of the standby mode after wake up will be indicated by an active LOW interrupt on pin  
RxDx.  
The MLX80004/2 enters the standby mode as well in case of a battery under-voltage condition. That happens while  
being in sleep mode or any active mode.  
8.3. Active Modes  
By entering the active modes the MLX80004/2 can be used as interface between the single wire LIN bus and the  
microcontroller. The incoming bus traffic is detected by the receiver and transferred via the RxDx output pin to the  
microcontroller. (see Figure 4, LIN timing diagram)  
The active modes can be entered being in sleep or standby mode, when the pin(s) MODE0/1 are driven HIGH.  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
MODE0  
L
MODE1 Mode  
L
L
Sleep Mode  
High Speed Mode (slew rate control  
disabled)  
H
L
H
H
Low speed mode  
Normal Mode  
H
Table 8: Mode Selection Table  
8.3.1. High Speed mode  
This mode allows high speed data download up to 100Kbit/s. The slew rate control is disabled. The falling edge is the  
active driven edge, the speed of the rising edge is determined by the network time constant.  
8.3.2. Low speed mode  
This mode is the recommended operating mode for J2602 applications with a maximum baud rate of 10.4kBd. The  
slew rate control of any channel is optimized for minimum radiated noise, especially in the AM band.  
8.3.3. Normal speed mode  
Transmission bit rate in normal mode is up to 20kbps. The slew rate control of any channel is optimized for maximum  
allowed bit rate in the LIN specification package 2.x.  
8.4. Sleep Mode  
The most power saving mode of the MLX80004/2 is the sleep mode. The mode change into sleep mode is possible  
regardless of the voltage levels on the LINx bus, pins WAKE or TxDx. The MLX80004/2 offers two procedures to enter  
the sleep mode:  
The sleep mode will be entered if both the pins MODE0 and MODE1 are being driven LOW for longer than the  
specified filter time (tMODE_deb) when in active modes.  
If the MLX80004/2 is in standby mode after power-on or wake-up, a sleep counter is started and switches the  
transceiver into sleep mode after the specified time (typ. 350ms) if the microcontroller of the ECU will not  
confirm the active operation by setting MODE0/1 pins to logic HIGH. This feature allows faulty blocked LIN  
nodes to reach the most power saving sleep mode anyway.  
Being in sleep mode the INH pin becomes floating and can be used to switch off the ECU voltage regulator in order to  
minimize the current consumption of the complete LIN node (preferred feature in slave applications). The transmitters  
are disabled and the pins RxDx are disconnected from the receive path and become floating. The master(slave)  
termination resistor (LIN pull up resistor with decoupling diode between pins LIN and Vs) is disconnected, only a weak  
LIN pull up current of typically 50uA is applied to the LINx bus (see chapter 9 Fail-safe Features)  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
8.5. Wake Up  
When in sleep mode the MLX80004/2 offers three wake-up procedures:  
In applications with continuously powered ECU a wake up via mode transition to active modes is possible by  
setting the MODEx pins to high level. (see chapter 4.3 Active Modes)  
Remote wake-up via LINx bus request  
After a falling edge on the LINx bus followed by a dominant voltage level for longer than the specified  
value(twu_remote) and a rising edge on pin LINx will cause a remote wake up (see Figure 6 at page 19)  
Local wake-up via a negative edge on pin WAKE  
A negative edge on the pin WAKE and a dominant voltage level for longer than the specified time (twu_local) will  
cause a local wake-up. The current for an external switch has to be provided by an external pull up resistor  
RWK. For a reverse current limitation in case of a closed external switch and a negative ground shift or an ECU  
loss of ground a protection resistor RWK_prot between pin WAKE and the switch is recommended. (see Figure 7  
at page 20)  
The pin WAKE provides a weak pull up current towards the battery voltage that provides a HIGH level on the  
pin in case of open circuit failures or if no local wake up feature is required. In such applications it is  
recommended to connect the pin WAKE to pin Vs via a resistor of 10k ohms.  
8.6. Wake Up Source Recognition  
The device can distinguish between a local wake-up event (pin WAKE) and a remote wake-up event in dependence of  
the requesting LINx bus.  
Local Wake Up  
In case of a local wakeup via WAKE pin, the wake up request is indicated by an active LOW on pin RxD1. The wake-up  
source flag is set and is indicated by an active LOW on pin TxD1.  
The wake-up source flag can be read if an external pull up resistor at TxD1 towards the microcontroller supply voltage  
has been added and the MLX80004/2 is still in standby mode:  
When the microcontroller confirms an active mode operation by setting the pin MODE0/1 to HIGH, both the wake-up  
request on pin RxD1 as well as the wake-up source flag on pin TxD1 are reset immediately.  
Remote Wake Up  
In case of a remote wake-up via a LINx bus, the source of the wake-up request will be indicated by the RxDx pin that  
belongs to the LINx pin. (example: LOW level on RxD4 and floating RxD1-3 indicate a wake-up request on LIN4).  
The wake up source flag at TxD1 remains floating.  
This allows following the wake-up request of the requesting LIN bus while remaining the other LIN bus channels in  
recessive mode (no wake up occurs in these LIN networks).  
After a mode transition into any active mode by setting the pin MODE0/1 to HIGH, the active LOW wake-up request on  
pin RxDx is reset immediately.  
If the device is not set into an active mode after a wake up request (either local or remote) then it will return into sleep  
mode after tdsleep  
.
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
Figure 6: remote wake up and wake-up source recognition  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
Figure 7: local wake up and wake-up source recognition  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
8.7. Master / Slave configuration  
The target applications of the MLX80004/2 are BCM master modules with multiple LIN channels. In order to be able to  
use the same module for a wide variety of applications with different stages of extension, a space efficient and cost  
effective adaptation on the number of LIN channels is desired.  
The MLX80004/2 device family offers the combination of quad and dual channel LIN transceiver within the same  
advanced package and a compatible foot print.  
By the integration of the LIN master-termination (decoupling diode and 1K resistor) the external circuitry can be  
minimized in terms of space as well as BOM (bill of material). The RxD time-out feature allows the handling of a LIN  
short to ground failure without software support by the microcontroller. This application mode is called enhanced  
master mode, compatible to the functionality of the quad LIN transceiver MLX80001.  
In case of different BCM requirements it may happen that the external master termination is desired only. To cover  
these applications the pin DIS_MAS has been introduced:  
DIS_MAS  
Mode  
LIN termination  
Supported fail safe features  
RxDx time-out, independent disconnect of master  
Active mode : Diode & 1k  
sleep mode :Diode & 60µA  
termination in case of LINx short to ground  
Enhanced Master  
Mode  
GND  
TxDx time-out, independent disable of faulty  
dominant blocked transmit path  
Active mode : Diode & 30k  
sleep mode :Diode & 60µA  
Standard  
Transceiver Mode  
TxDx time-out, independent disable of faulty  
dominant blocked transmit path  
Vs  
Table 9: Time Out Modes  
In case of externally mounted master termination (standard transceiver mode), the handling of a LIN short to ground is  
not possible. By using the standard transceiver mode, the MLX80004/2 can be used in slave applications as well. To  
pull the pin DIS_MAS to high even in case the external ECU regulator is switched off in sleep mode. The pin shall be  
connected to Vs via an external resistor. (see Figure 8 at page 24, application example)  
In the standard transceiver mode, only the TxDx time-out feature is enabled.  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
9. Fail-safe Features  
9.1. Loss of battery  
If the ECU is disconnected from the battery, the bus pin is in high impedance state. There is no impact to the bus traffic  
and to the ECU itself. Reverse current is limited to < 20µA  
9.2. Loss of Ground  
In case of an interrupted ECU ground connection there is no influence to the bus lines. The current from the ECU to the  
LINx pins is limited by the weak pull up current of the pin LINx, the integrated master termination (DIS_MAS = GND) as  
well as the integrated slave termination (DIS_MAS = Vs) is disconnected in order to fulfill the SAE J2602 requirements  
for the loss of ground current (<100µA @12V).  
9.3. Short circuit to battery  
The transmitter output currents are limited to the specified value in case of short circuit to battery in order to prevent  
high current densities and thermal hot spots in the LIN drivers. In dependency of the ambient temperature as well as  
the battery voltage the junction temperature can exceed the specified value and a thermal overload condition occurs  
(see chapter 4.5)  
9.4. Ground shift and short circuit to ground  
If the LIN bus wiring is shorted to negative shifted ground levels, there is no current flow from the ECU ground to the  
LIN bus and no distortion of the bus traffic occurs.  
A LIN bus short to ground condition can cause an undesired current flow. The MLX80004/MLX80002 offers different  
opportunities to handle the LIN short to ground, see chapter 8.7.  
9.5. Thermal overload  
The MLX80004 and the MLX80002 is protected against thermal overloads. If the chip junction temperature exceeds  
the specified value, all transmitters are disabled and the master termination is switched off in order to reduce the  
power consumption. The receiver is still working during the thermal shutdown state. The pins RxDx indicate the  
voltage level from the LINx pins also if the circuit is in thermal shut down. The circuit returns automatically to the  
normal mode after thermal recovery.  
9.6. Undervoltage lock out  
If the battery supply voltage is missing or decreased under the specified value (VS_UV), all transmitters are disabled to  
prevent undefined bus traffic.  
While in sleep mode, the MLX80004/2 enters the standby mode if Vs drops below the internal power on reset  
threshold (VINH = Vs).  
9.7. Open Circuit protection  
The pins TxDx provide a weak pull down. The transmitter cannot be enabled.  
The pins MODE0/MODE1 provide a weak pull down to prevent undefined active mode transitions.  
If the battery supply voltage is disconnected, the pins RxDx are floating  
The pin WAKE provides a weak pull up current towards supply voltage Vs to prevent local wake-up requests.  
The pin DIS_MAS provides a pull down current of 50uA.  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
9.8. TxDx faulty start protection  
After power-on or wake-up a dominant level on TxDx will not lead to a dominant LINx level if the IC is being switched  
into an active mode. Only in case of recessive level before applying the first dominant level the transmit path will be  
enabled.  
9.9. RxDx dominant time-out  
A dominant LINx level longer than the specified time (typ. 40ms) indicates a faulty blocked bus. The master pull-up  
resistor of the affected LIN channel will be disconnected from the network in order to prevent thermal overload  
conditions or failure currents from the battery without any intervention from the microcontroller. Only a weak pull-up  
current (typ.60uA) is applied on the LIN bus. The RxD time-out will be reset with the next dominant -> recessive  
transition on the LIN bus if the failure disappears.  
The RxDx time-out is only active in the Enhanced Master Mode, while the master termination is enabled.  
9.10. TxDx dominant time-out  
In case of a faulty blocked permanent dominant level on pin TxDx the transmit path will be disabled after the specified  
time tTxDx_to (typ. 40ms). The data transmission is released again as soon as the failure disappears by the next rising  
edge of TxDx. The TxDx time-out is active in both, the Standard Transceiver and Enhanced Master Mode.  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
10. Application Example  
10.1. Enhanced Master Mode  
Car Battery Cl30  
LINx  
1N4001  
22uF  
network  
VBAT_ECU  
Master  
ECU  
Voltage regulator  
VBAT  
+5V  
100nF  
4,7K  
10K  
VS  
WAKE  
INH  
MLX80004  
LIN1  
TxD1  
TxD2  
LIN2  
TxD3  
TxD4  
µP  
LIN3  
LIN4  
RxD1  
RxD2  
RxD3  
RxD4  
1nF  
MODE0  
MODE1  
Control  
LIN  
DIS_MAS  
1N4001  
22uF  
VBAT_ECU  
Slave  
ECU  
Voltage regulator  
VBAT  
INH  
+5V  
100nF  
4,7K  
10k  
10K  
VS  
INH  
DIS_MAS  
WAKE  
LIN1  
LIN2  
TxD1  
TxD2  
µP  
180p  
MLX80002  
RxD1  
RxD2  
MODE0  
MODE1  
Control  
LIN  
Figure 8:  
Application example using enhanced master mode with minimized external components and LIN short to GND feature.  
Note: All pins of MLX80004/MLX80002 with „N.C.“ are internally not connected.  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
10.2. Standard Transceiver Mode  
Car Battery Cl30  
LINx  
1N4001  
22uF  
network  
VBAT_ECU  
Master  
ECU  
Voltage regulator  
VBAT  
+5V  
100nF  
4,7K  
10k 10K  
VS  
INH  
DIS_MAS  
WAKE  
1K  
LIN1  
LIN2  
TxD1  
TxD2  
TxD3  
TxD4  
µP  
LIN3  
LIN4  
RxD1  
RxD2  
RxD3  
RxD4  
1nF  
MODE0  
MODE1  
Control  
LIN  
MLX80004  
1N4001  
22uF  
VBAT_ECU  
Slave  
ECU  
Voltage regulator  
VBAT  
INH  
+5V  
100nF  
4,7K  
10K  
VS  
INH  
WAKE  
TxD  
LIN  
µP  
MLX80020  
180p  
RxD  
EN  
Control  
LIN  
Figure 9:  
Application example using standard transceiver mode without LIN short to GND feature.  
Note: All pins of MLX80004/MLX80002 with „N.C.“ are internally not connected.  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
10.3. Application Circuitry for EMC  
In order to minimize EMC influences, the external application circuitry shall be designed as followed:  
D12)  
VS  
+
C11)  
C22)  
C32)  
VS  
R12)  
R22)  
Signal  
-line  
WAKE  
LIN  
LINx  
MLX80004  
C42)  
C51)  
D21)  
GNDx  
GND  
1) optional implemented  
2) mandatory implemented  
Figure 10:  
Typical Application Circuitry for EMC  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
10.3.1. External Circuitry on Supply Lines  
In order to minimize EMC influences, the external application circuitry shall be designed as followed:  
Name  
Mounting  
Min  
Recommended  
Max  
Dim  
Comment  
Ceramic SMD: 10%, 0805,  
≥50V;  
C1  
recommended  
-
100  
-
nF  
close to the connector  
D1  
C2  
mandatory  
mandatory  
Inverse-polarity protection diode  
Tantal SMD: 10%, 7343, 35V  
1
-
22  
100  
-
μF  
Ceramic SMD: 10%, 0805,  
≥50V;  
C3  
mandatory  
100  
nF  
close to the pin  
Table 10: External Components on Supply Lines  
10.3.2. External Circuitry on LIN Lines  
In order to minimize EMC influences, the external application circuitry shall be designed as followed:  
Name  
Mounting  
Min  
Recommended  
Max  
Dim  
Comment  
ESD protection Diode: SOD323  
close to the connector;  
D2  
no  
-
PESD1LIN  
-
Ceramic SMD: 10%, 0805, ≥50V;  
CSlave≤ CD2+C4+CIC  
C4  
mandatory  
-
220/1000  
-
pF  
CSlave≤250pF/ CMaster≤1nF  
Table 11: External Components on LIN Lines  
10.3.3. External Circuitry on Signal Lines  
In order to minimize EMC influences, the external application circuitry shall be designed as followed:  
Name  
C5  
Mounting  
no  
Min  
0.1  
5k  
Recommended  
Max  
100  
Dim  
nF  
Comment  
1
Ceramic SMD: 10%, 0805, ≥50V;  
Serial resistor: 0805  
R2  
mandatory  
10k  
100k  
Ω
Table 12: External Components on Signal Lines  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
11. Mechanical Specification QFN24  
The chip will be assembled in a 24Pin QFN 4x4 Package with wettable flanks.  
Figure 11: Package Drawing  
Θja [°C/W]  
(JEDEC 1s0p board)  
Θja [°C/W]  
(JEDEC 1s2p board)  
Package  
Θjc [°C/W]  
QFN 4x4  
16  
154  
50  
Table 13: JA values  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
12. Package Marking Information  
5-digit Type Number  
Design revision  
18 17  
16 15 14 13  
12  
11  
10  
9
19  
20  
21  
22  
23  
24  
80004  
A
2345D  
1025  
5-digit Lot Number  
8
4-digit Date Code  
Format: YYWW  
7
1
2
3
4
5
6
Figure 12: Package marking of the MLX80004 device in QFN24 4x4 SMD package  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
13. Tape and Reel Specification  
Note: that the above mentioned labels are just examples which represent the label layout!  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
Revision 021 Sept 2016  
Page 31 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
Revision 021 Sept 2016  
Page 32 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
14. ESD and EMC  
In order to minimize EMC influences, the PCB has to be designed according to EMC guidelines.  
The products MLX80004/2 are ESD sensitive devices and have to be handled according to the rules in IEC61340-5-2.  
The products MLX80004/2 are evaluated according AEC-Q100-002 (HBM) and AEC-Q100-011 (CDM).  
The extended ESD/EMC tests (acc. to IEC 61000-4-2, LIN Conf. Test Specification Package for LIN2.1, OEM hardware  
requirements for LIN, CAN and FlexRay Interfaces in automotive applications Audi, BMW, Daimler, Porsche,  
Volkswagen - Rev. 1.3/2012) have been tested by external certificated test houses.  
The test reports are available on request.  
14.1. Automotive Qualification Test Pulses  
Automotive test pulses are applied on the module in the application environment and not on the naked IC. Therefore  
attention must be taken, that only protected pins (protection by means of the IC itself or by means of external  
components) are wired to a module connector. In the recommended application diagrams, the reverse polarity diode  
together with the capacitors on supply pins, the protection resistors in several lines and the load dump protected IC  
itself will protect the module against the below listed automotive test pulses. The exact value of the capacitors for the  
application has to be figured out during design-in of the product according to the automotive requirements.  
For the LIN pin the specification “LIN Physical Layer Spec 2.1 (Nov. 24, 2006)” is valid.  
Supply Pin VS is protected via the reverse polarity diode and the supply capacitors. No damage will occur for defined  
test pulses. A deviation of characteristics is allowed during pulse 1 and 2; but the module will recover to the normal  
function after the pulse without any additional action. During test pulse 3a, 3b, 5 the module will work within  
characteristic limits.  
14.2. Test Pulses On supply Lines  
test condition,  
functional status  
Parameter  
Symbol  
Min  
Max  
Dim  
Coupling  
Transient test pulses in accordance to ISO7637-2 (supply lines) & , VS=13.5V, TA=(23 ± 5)°C  
& (Document: “Hardware Requirements for LIN, CAN and FlexRay Interfaces in Automotive Applications”; Audi, BMW, Daimler,  
Porsche, VW; 2009-12-02)  
5000 pulses,  
functional state C  
5000 pulses,  
functional state A  
Test pulse #1  
vpulse1  
-100  
-150  
V
Direct  
Test pulse #2  
Test pulse #3a  
Test pulse #3b  
vpulse2  
75  
V
V
V
Direct  
Direct  
Direct  
vpulse3a  
vpulse3b  
1h,functional state A  
1h,functional state A  
100  
Load dump test pulse in accordance to ISO7637-2 (supply lines), VS=13.0V, TA=(23 ±5)°C  
1 pulse clamped to 27V (+13V  
(VS)),  
65  
87  
Test pulse #5b  
vpulse5b  
(+13V  
(VS))  
(+13V  
(VS))  
V
Direct  
(32V (+13V (VS))for  
applications for north America),  
functional state C  
Table 14: Test pulses Supply Line  
Revision 021 Sept 2016  
Page 33 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
14.3. Test pulses on Pin LIN  
test  
condition,  
functional  
status  
Parameter  
Symbol  
Min  
Max  
Dim  
Coupling  
Transient test pulses in accordance to ISO7637-3, VS=13.5V, TA=(23 ±5)°C  
& (Document: “Hardware Requirements for LIN, CAN and FlexRay Interfaces in Automotive Applications”; Audi, BMW, Daimler,  
Porsche, VW; 2009-12-02)  
1000  
Direct capacitive  
Vpulse_  
slow+  
pulses,  
functional  
state D  
Test pulse ‘DCC slow –‘  
Test pulse ‘DCC slow +‘  
-100  
-150  
V
V
coupled:  
1nF  
1000  
pulses,  
functional  
state D  
Direct capacitive  
coupled:  
Vpulse_  
slow-  
75  
1nF  
Direct capacitive  
coupled:  
10 min,  
functional  
state D  
Vpulse_  
fast_a  
Test pulse ‘DCC fast a’  
Test pulse ‘DCC fast b’  
V
V
100pF  
Direct capacitive  
coupled:  
10 min,  
functional  
state D  
Vpulse_  
fast_b  
100  
100pF  
Table 15: Test pulses LIN  
14.4. Test pulses on signal lines  
test condition,  
functional status  
Parameter  
Symbol  
Min  
Max  
Dim  
Coupling  
Transient test pulses in accordance to ISO7637-3 (signal lines). VS=13.5V, TA=(23 ± 5)°C  
Vpulse_  
slow+  
1000 pulses,  
functional state C  
1000 pulses,  
Direct capacitive  
coupled:100nF  
Test pulse ‘DCC slow –‘  
Test pulse ‘DCC slow +‘  
Test pulse ‘DCC fast a’  
Test pulse ‘DCC fast b’  
-30  
+8  
-8  
+30  
-10  
40  
V
V
V
V
Vpulse_  
slow-  
Vpulse_  
fast_a  
Vpulse_  
fast_b  
Direct capacitive  
coupled:100nF  
functional state A  
Direct capacitive  
coupled:100pF  
10 min,  
functional state A  
-60  
10  
10 min,  
functional state A  
Direct capacitive  
coupled:100pF  
Table 16: Test pulses signal lines  
Description of functional state  
A:  
B:  
All functions of the module are performed as designed during and after the disturbance.  
All functions of the module are performed as designed during the disturbance:  
One or more functions can violate the specified tolerances. All functions return automatically to within their  
normal limits after the disturbance is removed. Memory functions shall remain class A.  
A function of the module does not perform as designed during the disturbance but returns  
automatically to the normal operation after the disturbance is removed.  
C:  
D:  
A function of the module does not perform as designed during the disturbance and does not  
return automatically to the normal operation after the disturbances is removed.  
The device needs to be reset by a simple operation/action to return to the specified limits/function.  
Revision 021 Sept 2016  
Page 34 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
14.5. Test circuitry for automotive transients  
Figure 13: Test circuit for automotive transients  
Figure 13 shows the general requirement on the test circuitry for applying automotive transient test pulses.  
In order to represent the most critical network impedance, the LINx pins has to be connected via 1kOhm / decoupling  
diode to the Schaffner test generator. Including the integrated master termination of 1kOhm, the minimum network  
resistance of 500Ohm can be simulated by adding an external 1Kohm resistor.  
In slave application mode (DIS_MAS = Vs), the external coupling has to be applied via 500Ohm resistor.  
Revision 021 Sept 2016  
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MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
14.6. EMC Test pulse definition  
EMC Test Pulse shapes (ISO7637-2 (supply lines))  
Test Pulse 1  
Ri = 10 Ohm  
Test pulse 2  
Ri = 2 Ohm  
200 ms  
0.5...5s  
V
< 100 µs  
50 µs  
1 µs  
V
12 V  
0 V  
t
10%  
90%  
vpulse1  
vpulse2  
90%  
10%  
12V  
1 µs  
2 ms  
0 V  
t
200 ms  
0.5...5s  
Test Pulse 3a  
Ri = 50 Ohm  
Test Pulse 3b  
Ri = 50 Ohm  
100 ns  
5
ns  
V
90%  
V
vpulse3b  
12V  
10%  
0
V
t
vpulse3a  
vpulse3b  
vpulse3a  
10%  
12V  
0 V  
100 µs  
10 ms  
90 ms  
100 µs  
10 ms  
t
5 ns  
90%  
90 ms  
100 ns  
Test Pulse 5 (Load Dump)  
Ri = 0.5…4 Ohm (clamped to 45V during test)  
V
Pulse 5  
90%  
vpulse5  
Pulse 5 at  
device  
40V  
12V  
10%  
t
tr = 0.1...10ms  
td = 40...400ms  
Table 17: Test pulses shapes ISO7637-2  
EMC Test Pulse shapes (ISO7637-3 (non-supply lines))  
Test Pulse ‘DCC slow –’  
Test pulse ‘DCC slow +’  
Ri = 2 Ohm  
Ri = 2 Ohm  
Test Pulse ‘Fast a, DCC’  
Test Pulse ‘Fast b, DCC’  
Ri = 50 Ohm  
Ri = 50 Ohm  
Table 18: Test pulses shapes ISO7637-3  
Revision 021 Sept 2016  
Page 36 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
15. Standard information regarding  
manufacturability of Melexis products with different  
soldering processes  
Our products are classified and qualified regarding soldering technology, solderability and moisture sensitivity level  
according to following test methods:  
Reflow Soldering SMD’s (Surface Mount Devices)  
IPC/JEDEC J-STD-020  
Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices  
(classification reflow profiles according to table 5-2)  
EIA/JEDEC JESD22-A113  
Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Testing  
(reflow profiles according to table 2)  
Wave Soldering SMD’s (Surface Mount Devices) and THD’s (Through Hole Devices)  
EN60749-20  
Resistance of plastic- encapsulated SMD’s to combined effect of moisture and soldering heat  
EIA/JEDEC JESD22-B106 and EN60749-15  
Resistance to soldering temperature for through-hole mounted devices  
Iron Soldering THD’s (Through Hole Devices)  
EN60749-15  
Resistance to soldering temperature for through-hole mounted devices  
Solderability SMD’s (Surface Mount Devices) and THD’s (Through Hole Devices)  
EIA/JEDEC JESD22-B102 and EN60749-21  
Solderability  
For all soldering technologies deviating from above mentioned standard conditions (regarding peak temperature,  
temperature gradient, temperature profile etc) additional classification and qualification tests have to be agreed upon  
with Melexis.  
The application of Wave Soldering for SMD’s is allowed only after consulting Melexis regarding assurance of adhesive  
strength between device and board.  
Melexis recommends reviewing on our web site the General Guidelines soldering recommendation  
(http://www.melexis.com/Quality_soldering.aspx) as well as trim&form recommendations  
(http://www.melexis.com/Assets/Trim-and-form-recommendations-5565.aspx).  
For wettable flanks packages, please refer to the Melexis Application Note “QFN wettable flanks specific handling”.  
Melexis is contributing to global environmental conservation by promoting lead free solutions. For more information  
on qualifications of RoHS compliant products (RoHS = European directive on the Restriction Of the use of certain  
Hazardous Substances) please visit the quality page on our website: http://www.melexis.com/quality.aspx  
Revision 021 Sept 2016  
Page 37 of 38  
MLX80002/MLX80004  
Enhanced Universal Dual/Quad LIN Transceiver  
Datasheet  
16. Disclaimer  
Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its Term of  
Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the information set forth  
herein or regarding the freedom of the described devices from patent infringement. Melexis reserves the right to  
change specifications and prices at any time and without notice. Therefore, prior to designing this product into a  
system, it is necessary to check with Melexis for current information. This product is intended for use in normal  
commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or  
high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not  
recommended without additional processing by Melexis for each application.  
The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be liable to  
recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of  
profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in  
connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or  
liability to recipient or any third party shall arise or flow out of Melexis’ rendering of technical or other services.  
© 2014 Melexis NV. All rights reserved.  
For the latest version of this document, go to our website at  
www.melexis.com  
Or for additional information contact Melexis Direct:  
Europe, Africa, Asia:  
America:  
Phone: +32 1367 0495  
Phone: +1 248 306 5400  
E-mail: sales_europe@melexis.com E-mail: sales_usa@melexis.com  
ISO/TS 16949 and ISO14001 Certified  
Revision 021 Sept 2016  
Page 38 of 38  

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