WF2M16W-150DAQ5A [MERCURY]
Flash Module,;
| 型号： | WF2M16W-150DAQ5A |
| 厂家： | 
MERCURY UNITED ELECTRONICS INC |
| 描述： | Flash Module, |
| 文件： | 总8页 (文件大小：648K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
2Mx16 NOR Flash MODULE
SMD 5962-97610*
WF2M16-XXX5
FEATURES
Access Times of 90, 120, 150ns
Data# Polling and Toggle Bit feature for detection of
program or erase cycle completion.
Packaging:
Supports reading or programming data to a sector not being
erased.
Built-in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation.
RESET# pin resets internal state machine to the read
mode.
• 56 lead, Hermetic Ceramic, 0.520" CSOP (Package 207).
Fits standard 56 SSOP footprint.
• 44 pin Ceramic SOJ (Package 102)**
Sector Architecture
• 32 equal size sectors of 64KBytes each
• Any combination of sectors can be erased. Also supports
full chip erase.
Ready/Busy (RY#/BY#) output for detection of program or
erase cycle completion.
Multiple Ground Pins for Low Noise Operation
Minimum 100,000 Write/Erase Cycles Minimum
Organized as 2Mx16; User Configurable as 2 x 2Mx8
This product is subject to change without notice.
* For reference only. See table page 7.
** Package to be developed.
Commercial, Industrial, and Military Temperature Ranges
5 Volt Read and Write
Note: For programming information and waveforms refer to Flash Programming 16M5 Application
Notes AN0038.
Low Power CMOS
FIGURE 1 – PIN CONFIGURATIONS
WF2M16-XDAX5
56 CSOP
WF2M16-XXX5
44 CSOJ (DL)**
PIN DESCRIPTION
I/O0-15
A0-20
WE#
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Select
TOP VIEW
TOP VIEW
CS1-2#
OE#
Output Enable
Power Supply
Ground
CS1#
A12
A13
A14
A15
NC
CS2#
NC
A20
A19
A18
A17
A16
VCC
GND
I/O6
I/O14
I/O7
I/O15
RY/BY#
OE#
WE#
NC
I/O13
I/O5
I/O12
I/O4
VCC
1
2
3
4
5
6
7
8
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
CS1#
A12
A13
A14
A15
NC
CS2#
NC
A20
A19
A18
A17
A16
VCC
GND
I/O6
I/O14
I/O7
I/O15
RY/BY#
OE#
WE#
NC
I/O13
I/O5
I/O12
I/O4
VCC
1
2
3
4
5
6
7
8
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
NC
NC
#RESET
A11
A10
A9
A1
A2
A3
A4
A5
A6
A7
GND
A8
VCC
I/O9
I/O1
VCC
#RESET
A11
A10
A9
A1
A2
A3
A4
A5
A6
A7
GND
A8
VCC
I/O9
I/O1
VSS
RY/BY#
RESET#
Ready/Busy
Reset
9
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
BLOCK DIAGRAM
I/O0-7
I/O8-15
39 I/O8
38 I/O0
37 A0
36 NC
35 NC
34 NC
33 I/O2
32
31
30
29
39 I/O8
38 I/O0
37 A0
36 NC
35 NC
34 NC
33
32
31
30
29
RESET#
WE#
OE#
A0-20
RY/BY#
I/O2
I/O10
I/O3
I/O11
GND
I/O10
I/O3
I/O11
GND
2M x 8
2M x 8
** Package to be developed.
NOTE:
CS1#
CS2#
1. RY/BY# is an open drain output and should be pulled up to Vcc with an external resistor.
2. Address compatible with Intel 2M8 56 SSOP.
1
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com
4334.12E-0816-ss-WF2M16-XXX5
WF2M16-XXX5
ABSOLUTE MAXIMUM RATINGS
CAPACITANCE
(TA = +25°C)
Parameter
Symbol
VT
Ratings
-2.0 to +7.0
-65 to +150
20
Unit
V
Parameter
Symbol
Conditions
Max Unit
Voltage on Any Pin Relative to VSS
Storage Temperature
Data Retention (Mil Temp)
Endurance — write/erase cycles (Mil, Q)
NOTES:
1. Minimum DC voltage on input or I/O pins is –0.5 V. During voltage transitions, inputs may
overshoot VSS to –2.0 V for periods of up to 20 ns. See . Maximum DC voltage on output and
I/O pins is VCC + 0.5 V. During voltage transitions, outputs may overshoot to VCC + 2.0 V for
periods up to 20 ns. See .
OE# capacitance
WE# capacitance
CS# capacitance
Data I/O capacitance
Address input capacitance
COE
CWE
CCS
CI/O
CAD
VIN = 0V, f = 1.0 MHz
VIN = 0V, f = 1.0 MHz
VIN = 0V, f = 1.0 MHz
VI/O = 0V, f = 1.0 MHz
VIN = 0V, f = 1.0 MHz
25
25
15
15
25
pF
pF
pF
pF
pF
TSTG
°C
years
cycles
100,000 min.
This parameter is guaranteed by design but not tested.
2. Minimum DC input voltage on A9, OE#, RESET# pins is –0.5V. During voltage transitions, A9,
OE#, RESET# pins may overshoot VSS to –2.0 V for periods of up to 20 ns. See Maximum DC
input voltage on A9, OE#, and RESET# is 12.5 V which may overshoot to 13.5 V for periods up
to 20 ns.
Stresses greater than those listed in this section may cause permanent damage to the device. This
is a stress rating only; functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure of the device to
absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
Parameter
Symbol
VCC
Min
4.5
Typ
5.0
Max
5.5
Unit
V
Supply Voltage
Ground
VSS
VIH
VIL
TA
0
0
–
–
–
–
–
0
V
Input High Voltage
Input Low Voltage
2.0
-0.5
-55
-40
0
VCC + 0.5
+0.8
V
V
Operating Temperature (Mil, Q)
Operating Temperature (Ind)
Operating Temperature (Com)
+125°C
+85
°C
°C
°C
TA
TA
+70
DC CHARACTERISTICS – CMOS COMPATIBLE
Parameter
Symbol
ILI
Conditions
VCC = VCC MAX, VIN = GND to VCC
VCC = VCC MAX, VOUT = GND to VCC
CS# = VIL, OE# = VIH, f = 5MHz
Min
Max
10
Unit
Input Leakage Current
Output Leakage Current
μA
μA
mA
mA
mA
V
ILO
10
V
CC Active Current for Read (1)
VCC Active Current for Program or Erase (2)
CC Standby Current
ICC1
ICC2
ICC3
VOL
80
CS# = VIL, OE# = VIH
120
4.0
0.45
V
VCC = VCC MAX, CS# = VCC ± 0.5V, f = 5MHz, RESET# = VCC ± 0.5V
IOL = 12.0 mA, VCC = VCC MIN
Output Low Voltage
Output High Voltage
Low VCC Lock-Out Voltage
NOTES:
VOH
VLKO
IOH = -2.5 mA, VCC = VCC MIN
0.85xVCC
3.2
V
4.2
V
1. The Icc current is typically less than 4mA/MHz, with OE# at VIH.
2. CC active while Embedded Algorithm (program or erase) is in progress.
I
2
4334.12E-0816-ss-WF2M16-XXX5
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WF2M16-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS – WE# CONTROLLED
-90
-120
-150
Parameter
Symbol
Unit
Min
90
0
Max
Min
120
0
Max
Min
150
0
Max
Write Cycle Time
tAVAV
tELWL
tWC
tCS
tWP
tAS
ns
ns
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
tWLWH
tAVWL
tDVWH
tWHDX
tWLAX
tWHWL
tWHWH1
tWHWH2
tGH
45
0
50
0
50
0
ns
ns
Data Setup Time
tDS
45
0
50
0
50
0
ns
Data Hold Time
tDH
tAH
ns
Address Hold Time
45
20
50
20
50
20
ns
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase (2)
tWPH
ns
300
15
300
15
300
15
μs
sec
μs
μs
sec
sec
ns
Read Recovery Time before Write
0
0
0
W
L
VCC Setup Time
tVCS
50
50
50
Chip Programming Time
Chip Erase Time (3)
44
44
44
256
256
256
Output Enable Hold Time (4)
RESET# Pulse Width
tOEH
tRP
10
10
10
500
500
500
ns
NOTES:
1. Typical value for tWHWH1 is 7μs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 32sec.
4. For Toggle and Data Polling.
AC CHARACTERISTICS – READ-ONLY OPERATIONS
-90
-120
-150
Parameter
Symbol
Unit
Min
90
Max
Min
120
Max
Min
150
Max
Read Cycle Time
TAVAV
TAVQV
TELQV
TGLQV
TEHQZ
TGHQZ
TAXQX
TRC
TACC
TCE
TOE
TDF
TDF
TOH
ns
ns
ns
ns
ns
ns
ns
Address Access Time
90
90
40
20
20
120
120
50
150
150
55
Chip Select Access Time
Output Enable to Output Valid
Chip Select High to Output High Z (1)
Output Enable High to Output High Z (1)
30
35
30
35
Output Hold from Addresses, CS# or OE# Change,
whichever is First
0
0
0
TREADY
20
20
20
μs
RESET# Low to Read Mode (1)
1. Guaranteed by design, not tested.
3
4334.12E-0816-ss-WF2M16-XXX5
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com
WF2M16-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS# CONTROLLED
Parameter
Symbol
-90
-120
-150
Unit
Min
90
0
Max
Min
120
0
Max
Min
150
0
Max
Write Cycle Time
tAVAV
tWLEL
tELEH
tWC
tWS
tCP
ns
ns
Write Enable Setup Time
Chip Select Pulse Width
Address Setup Time
45
0
50
0
50
0
ns
tAVEL
tAS
ns
Data Setup Time
tDVEH
tEHDX
tELAX
tDS
45
0
50
0
50
0
ns
Data Hold Time
tDH
tAH
ns
Address Hold Time
45
20
50
20
50
20
ns
Chip Select Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time
tEHEL
tCPH
ns
tWHWH1
tWHWH2
tGHEL
300
15
300
15
300
15
μs
sec
μs
sec
sec
ns
0
0
0
Chip Programming Time
Chip Erase Time (3)
44
44
44
256
256
256
Output Enable Hold Time (4)
tOEH
10
10
10
NOTES:
1. Typical value for tWHWH1 is 7μs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 32sec.
4. For Toggle and Data Polling.
FIGURE 2 – AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Typ
Unit
V
Input Pulse Levels
Input Rise and Fall
VIL = 0, VIH = 3.0
5
ns
V
IOL
Input and Output Reference Level
Output Timing Reference Level
NOTES:
1.5
1.5
Current Source
V
V
I
Z is programmable from -2V to +7V.
OL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 ý.
Z is typically the midpoint of VOH and VOL
VZ 1.5V
(Bipolar Supply)
D.U.T.
CEFF = 50 pf
V
.
IOL & IOH are adjusted to simulate a typical resistive load circuit.ATE tester includes jig capacitance.
IOH
Current Source
4
4334.12E-0816-ss-WF2M16-XXX5
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WF2M16-XXX5
PACKAGE 102 – 44 LEAD, CERAMIC SOJ**
28.70 (1.13) 0.25 (0.010)
3.96 (0.156) MAX
0.89 (0.035)
Radius TYP
0.2 (0.008)
0.05 (0.002)
10.92 (0.430)
0.13 (0.005)
9.55 (0.376) 0.25 (0.010)
1.27 (0.050) 0.25 (0.010)
1.27 (0.050) TYP
26.7 (1.050) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
** Package to be developed.
PACKAGE 207 – 56 LEAD, CERAMIC SOP*
23.63 (0.930) 0.25 (0.010)
21.59 (0.850) TYP
0.20 (0.008)
0.05 (0.002)
2.87 (0.113)
MAX
1.02 (0.040)
0.18 (0.007)
16.13 (0.635)
0.13 (0.005)
12.96 (0.510)
0.15 (0.006)
1.60 (0.063) TYP
0.51 (0.020) TYP
+
+
PIN 1
IDENTIFIER
0.25 (0.010)
0.05 (0.002)
0.80 (0.031) TYP
R = 0.18 (0.007) TYP
0°/-4°
4.06 (0.160)
MAX
SEE DETAIL "A"
DETAIL "A"
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
* Package Dimensions subject to change
5
4334.12E-0816-ss-WF2M16-XXX5
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WF2M16-XXX5
FIGURE 8 – ALTERNATE PIN CONFIGURATION FOR WF2M16W-XDAX5
56 CSOP
TOP VIEW
BLOCK DIAGRAM
PIN DESCRIPTION
I/O0-15
A0-21
WE#
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Select
Output Enable
Power Supply
Ground
I/O0-7
I/O8-15
CS1#
A12
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
NC
2
RESET#
WE#
RESET#
A11
A10
A9
A13
3
OE#
A14
4
CS1-2#
OE#
A1-21
RY/BY#
A15
5
NC
6
A1
CS2#
A21
7
A2
VCC
8
A3
2M x 8
2M x 8
VSS
A20
9
A4
A19
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A5
RY/BY#
RESET#
Ready/Busy
Reset
A18
A6
CS1#
CS2#
A17
A7
A16
GND
A8
VCC
GND
I/O6
I/O14
I/O7
I/O15
RY/BY#
OE#
WE#
NC
VCC
I/O9
I/O1
I/O8
NOTE:
1. RY/BY# is an open drain output and should be pulled up toVcc with an external resistor.
2. Address compatible with Intel 1M16 56 SSOP.
38 I/O0
37 NC
36 NC
35 NC
34 NC
33 I/O2
32 I/O10
31
30
29
I/O13
I/O5
I/O12
I/O4
VCC
I/O3
I/O11
GND
6
4334.12E-0816-ss-WF2M16-XXX5
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com
WF2M16-XXX5
ORDERING INFORMATION
W F 2M16 X - XXX X X 5 X
MERCURY SYSTEMS
NOR FLASH
ORGANIZATION of 2M x 16
User configurable as 2 x 2M x 8
IMPROVEMENT MARK:
• Address Pinout for 56 CSOP Package
W = Word Wide Applications
ACCESS TIME (ns)
PACKAGE TYPE:
DA = 56 Lead CSOP (Package 207)
fits standard 56 SSOP footprint
DL = 44 Lead Ceramic SOJ (Package 102)*
DEVICE GRADE:
Q
= Military Grade**.........-55°C to +125°C
M = Military Screened ......-55°C to +125°C
I
= Industrial ..................-40°C to +85°C
= Commercial ..............0°C to +70°C
C
V
PP PROGRAMMING VOLTAGE
5 = 5V
LEAD FINISH:
Blank = Gold plated leads
A
= Solder dip leads
* Package to be developed.
** This product is processed the same as the 5962-XXXXXHXX product but all
test and mechanical requirements are per the Mercury Systems data sheet.
DEVICE TYPE
SECTOR SIZE
SPEED
150ns
PACKAGE
SMD NO.
2M x 16 Flash MCP
2M x 16 Flash MCP
2M x 16 Flash MCP
5962-97610 04HXX
5962-97610 05HXX
5962-97610 06HXX
120ns
90ns
NOTE: This table is for reference only. For 5962-97610 ordering information and specifications refer to latest SMD document.
7
4334.12E-0816-ss-WF2M16-XXX5
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com
WF2M16-XXX5
Document Title
2Mx16 NOR Flash MODULE, SMD 5962-97610
Revision History
Rev # History
Release Date Status
Rev 6
Changes (Pg. 1-13)
June 2011
Preliminary
6.1 Change document layout from White Electronic Designs to Microsemi
6.2 Add document Revision History page
Rev 7
Rev 8
Changes (Pg. 1, 13)
August 2011
June 2012
Final
Final
7.1 Add "NOR" to headline
Changes (Pg. 1, 13)
8.1 Update Features
8.2 Delete 44 Flatpack (FL)** from Figure 1
8.3 Update Absolute Maximum Ratings, Recommended DC Operating Conditions
and DC Characteristics charts.
8.4 Delete subhead from AC Characteristics charts
8.5 Delete Figure 3 and all AC Waveforms diagrams
8.6 Update Packages 102, 208 and 207.
8.7 Update Ordering Information
8.8 Add note to SMD chart
Rev 9
Change (Pg. 7)
May 2014
Final
Final
Final
Final
9.1 Changed Device Grade "Q" description from "MIL-STD-883 Compliant" to
"MIL-PRF-38534 Class H Compliant."
Rev 10
Rev 11
Rev 12
Change (Pg. 7)
August 2014
January 2016
August 2016
10.1 Changed Device Grade "Q" description from "MIL-PRF-38534 Class H
Compliant" to "Military Grade."
Change (Pg. 5) (ECN 9789)
11.1 Changed lead dimensions on Package 207
Changes (Pg. All) (ECN 10156)
12.1 Change document layout from Microsemi to Mercury Systems
Mercury Systems reserves the right to change products or specifications without notice.
© 2016 Mercury Systems. All rights reserved.
8
4334.12E-0816-ss-WF2M16-XXX5
Mercury Corp. - Memory and Storage Solutions • (602) 437-1520 • www.mrcy.com
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