MIC1232 [MICREL]
レP Supervisory Circuit; μP监控电路
| 型号： | MIC1232 |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | レP Supervisory Circuit |
| 文件： | 总8页 (文件大小：162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MIC1232 µP Supervisory Circuit
MIC1232
µP Supervisory Circuit
Pin Configuration
Description
The MIC1232 is a multifunction circuit which monitors
microprocessor activity, external reset and power
supplies in microprocessor based systems. The circuit
functions include a watchdog timer, power supply
monitor, microprocessor reset, and manual pushbutton
reset input.
Top View
The power supply line is monitored with a comparator
and an internal voltage reference. RST is forced low
when an out-of-tolerance condition exists and remains
asserted for at least 250ms after V
rises above the
CC
threshold voltage (4.5V or 4.75V). The RST pin will
remain logic low with V as low as 1.4V.
CC
MIC1232N - 8 Lead Plastic DIP Package
MIC1232M - 8 Lead Plastic SOIC Package
The Watchdog input (ST) monitors µP activity and will
assert RST if no µP activity has occurred within the
watchdog timeout period. The watchdog timeout period
is selectable with nominal periods of 150, 600, or 1200
milliseconds.
Features
Power OK/Reset Time Delay, 250ms min.
·
Watchdog Timer, 150ms, 600ms, or
1.2s typical
·
Typical Applications
Automotive Systems
Precision Supply Voltage Monitor, Select
Between 5% or 10% of Supply Voltage
·
·
Intelligent Instruments
·
Available in 8-pin Surface Mount (SO)
·
Critical Microprocessor Power Monitoring
·
Debounced External Reset Input
·
Battery Powered Computers
·
Low Supply Current, < 18µA Typ.
·
Controllers
·
Ordering Information
Typical Operating Circuit
Part
Package
Temp. Range
-40°C to +85°C
-40°C to +85°C
MIC1232N
MIC1232M
8-Lead PDIP
8-Lead SOIC
1
MIC1232 µP Supervisory Circuit
Absolute Maximum Ratings
Operating Temperature Range
Terminal Voltage
MIC1232M/N . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
MIC1232D . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage Temperature Range . . . . . . . . . . . . .-65°C to 150°C
Lead Temperature (Soldering - 10 sec.) . . . . . . . . . . . 300°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . 700mW
V
, . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to 6.0V
CC
All Other Inputs . . . . . . . . . . . . -0.3V to (V
Input Current
+ 0.3V)
CC
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250mA
CC
Gnd, All Other Inputs . . . . . . . . . . . . . . . . . . . . 25mA
Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute
maximum ratings for extended periods may affect device reliability. Operating ranges define those limits between which the functionality of the device is guaranteed.
Electrical Characteristics
V
= 4.5V to 5.5V, T = Operating Temperature Range, unless otherwise noted.
A
CC
Parameter
Conditions
Min
Typ
Max
Units
Supply Voltage Range
V
4.5
5.5
V
CC
(See Note 1)
Supply Current
I
18
40
µA
CC
ST and PBRST Input Levels
V
V
(See Note 2)
2.0
-0.3
V
+0.3
CC
0.8
V
IH
IL
Input Leakage
I
µA
mA
mA
V
IL
±1
Output Source Current, RST
Output Sink Current, RST, RST
V
= 2.4V
= 0.4V
1.0
2.0
10
10
OH
OL
V
V
5% Trip Point (Reset
TOL = Gnd
4.50
4.62
4.74
4.49
CC
Threshold Voltage)
V
10% Trip Point (Reset
TOL = V
4.25
4.37
V
CC
CC
Threshold Voltage)
Input Capacitance, ST, TOL
Output Capacitance, RST, RST
C
C
(See Note 3)
5
7
pF
pF
IN
(See Note 3)
OUT
2
MIC1232 µP Supervisory Circuit
A.C. Electrical Characteristics
V
= 4.5V to 5.5V, T = Operating Temperature Range, unless otherwise noted.
A
CC
Parameter
PBRST Min. Pulse Width, t
Conditions
Min
Typ
Max
Units
PBRST = V (see note 4)
IL
20
ms
PB
PBRST Delay, t
1
4
20
ms
ms
ns
PBD
Reset Active Time, t
250
20
610
1000
RST
ST
ST Timeout Period, t
ST Pulse Width, t
TD = 0V
TD = Open
62.5
250
500
150
600
1200
250
1000
2000
ms
TD
TD = V
CC
V
V
V
Fall Time, t
10
0
µs
ns
µs
CC
CC
CC
F
Rise Time, t
R
Detect to RST Low
V
V
Falling (see note 5)
Rising (see note 6)
50
150
CC
CC
and RST High, t
RPD
V
Detect to RST Open
250
610
1000
ms
CC
and RST Low, t
RPU
Note 1: I
is measured with outputs open and inputs within 0.5V of supply rails.
CC
Note 2: PBRST has an internal pull-up resistor to V
Note 3: Guaranteed by design.
(typ. 40kΩ).
CC
Note 4: PBRST must be held low for a minimum of 20ms to guarantee a reset.
Note 5: V falling at 1.66mv/µs.
CC
Note 6: RST has an open drain output.
3
MIC1232 µP Supervisory Circuit
Pin Functions
Pin 1: PBRST - Pushbutton reset input. This input is debounced and can be driven with external logic signals or by
means of a mechanical pushbutton to actively force a reset. All pulses less than 1ms in duration on the
PBRST pin are ignored, whereas, any pulse with a duration of 20ms or greater is guaranteed to cause a
reset.
Pin 2: TD - Time delay input. This input selects the timebase used by the watchdog timer. When TD = 0V, the
watchdog timeout period is set to a nominal value of 150ms, when TD = open, the watchdog timeout period is
set to a nominal value of 600ms and when TD = V , the watchdog timeout period is 1.2sec nominally.
CC
Pin 3: TOL - Tolerance select input. Selects whether 5% or 10% of V
is used as the reset threshold voltage.
CC
When TOL = 0V, the 5% tolerance level is selected and when TOL = V , a 10% tolerance level is selected.
CC
Pin 4: GND - IC ground pin, 0V reference.
Pin 5: RST - RST is asserted high if either V
goes below the reset threshold, the watchdog times out or PBRST is
CC
pulled low for a minimum of 20ms. RST remains asserted for one reset timeout period after V
reset threshold or after the watchdog times out or after PBRST goes high.
exceeds the
CC
Pin 6: RST - RST is asserted low if either V
goes below the reset threshold, the watchdog times out or PBRST is
CC
pulled low for a minimum of 20ms. RST remains asserted for one reset timeout period after V
reset threshold or after the watchdog times out or after PBRST goes high. Open-drain output.
exceeds the
CC
Pin 7: ST - Input to the watchdog timer. If ST does not see a transition from high to low within the watchdog timeout
period, RST and RST will be asserted.
Pin 8:
V
- Primary supply input, +5V.
CC
4
MIC1232 µP Supervisory Circuit
Block Diagram
Circuit Description
t
TD
TD Pin
Min.
Typ.
Max.
Gnd
Open
62.5ms
250ms
500ms
150ms
600ms
1200ms
250ms
1000ms
2000ms
V
CC
Table 1. Watchdog Timeout Period
5
MIC1232 µP Supervisory Circuit
Circuit Description
Power Monitor
The RST and RST pins are asserted whenever V
CC
falls below the reset threshold voltage as determined by
the TOL pin. A 5% tolerance level (4.62V reset
threshold voltage) can be selected by connecting the
TOL pin to ground and a 10% tolerance (4.37V reset
threshold voltage) can be selected by connecting the
TOL pin to V . The reset pins will remain asserted for
CC
a period of 250ms after V
has risen above the reset
CC
threshold voltage. The reset function ensures the
microprocessor is properly reset and powers up into a
known condition after a power failure. RST will remain
Figure 1. Power-Up/Power-Down Sequence
valid with V
as low as 1.4V.
CC
Watchdog Timer
The microprocessor can be monitored by connecting
the ST pin (watchdog input) to a bus line or I/O line. If a
high-to-low transition doesn’t occur on the ST pin within
the watchdog timeout period (determined by TD pin, see
Table 1), the RST and RST pins will be asserted
resulting in a microprocessor reset. RST and RST will
remain asserted for 250ms when this occurs. A
minimum pulse of 75ns or any transition high-to-low on
the ST pin will reset the watchdog timer. The watchdog
timer will be reset if ST sees a valid transition within the
watchdog timeout period.
Note: The maximum time between high-to-low transitions (t ) on the
TD
watchdog input (ST) is determined by the voltage applied to the
TD pin. If the watchdog input sees a high-to-low transition prior to
the timeout period, the watchdog timer will be reset.
Figure 2. Watchdog Input
Pushbutton Reset Input
The PBRST input can be driven with a manual
pushbutton switch or with external logic signals. The
input is internally debounced and requires an active low
signal to force the reset outputs into their active states.
The PBRST input will recognize any pulse that is 20ms
in duration or greater and will ignore all pulses that are
less than 1ms in duration.
Figure 3. Pushbutton Reset
6
MIC1232 µP Supervisory Circuit
Alternate Source Cross Reference Guide
MIC Direct
Replacement
MIC1232N
MIC1232M
MIC1232N
MIC1232N
MIC1232M
MIC1232N
MIC1232N
MIC1232M
MIC1232N
MIC1232M
MIC1232D
Industry P/N
DS1232LP
DS1232LPS-2
DS1232
DS1232LPN
DS1232LPSN-2
DS1232N
MAX1232CPA
MAX1232CSA
MAX1232EPA
MAX1232ESA
MAX1232C/D
7
MIC1232 µP Supervisory Circuit
Packaging Information
M Package, 8-Pin Small Outline
N Package, 8-Pin Plastic Dual-In-Line
0.400
0.370
0.260
0.240
0.310
0.290
0.150
0.035
0.120
0.015
0.150
0.125
0.110
0.090
0.370
0.300
0.023
0.015
8
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