MIC2184BQS [MICREL]
Low Voltage Buck PWM Control IC Final Information; 低电压降压型PWM控制IC最终信息型号: | MIC2184BQS |
厂家: | MICREL SEMICONDUCTOR |
描述: | Low Voltage Buck PWM Control IC Final Information |
文件: | 总12页 (文件大小:78K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MIC2184
Low Voltage Buck PWM Control IC
Final Information
General Description
Features
Micrel’s MIC2184 is a high efficiency PWM buck control IC.
With its wide input voltage range of 2.9V to 14V, the MIC2184
can be used to efficiently step voltages down in 1- or 2-cell Li
Ion battery powered applications, as well as in fixed 3.3V, 5V,
or 12V systems.
• Input voltage range: 2.9V to 14V
• >90% efficiency
• Oscillator frequency of 400kHz
• Frequency divide-by-two pin
• Frequency sync to 600kHz
• FrequOut oscillator output allows simple charge pump
implementation in low voltage systems
• 1.245V reference output
• Front edge blanking
• 5Ω output driver
• Soft start
• PWM current mode control
• 1µA shutdown current
• Cycle-by-cycle current limiting
• Frequency foldback short circuit protection
• Adjustable under-voltage lockout
• 16 pin narrow-body SOIC and QSOP package options
Efficiencies over 90% are achievable over a wide range of
load conditions with the MIC2184’s PWM control scheme.
The operating frequency can be divided by two by raising the
FREQ/2pintoV . Thisallowstheusertooptimizeefficiency
DD
versus board space. It also allows the MIC2184 to be exter-
nally synchronized to frequencies below its nominal 400KHz.
The MIC2184 features an oscillator output, FreqOut, which
can be used to implement a simple charge pump in low
voltage applications. The output of the charge pump can be
fed into the gate drive power circuitry via the V P pin,
IN
allowing enhanced gate drive, hence higher efficiencies,
despite low input voltages.
Applications
• 3.3V to 2.5V/1.8V/1.5V conversion
• DC power distribution systems
• Wireless Modems
• ADSL line cards
• 1-and 2-cell Li Ion battery operated equipment
• Satellite Phones
MIC2184 features a 1µA shutdown mode, and a program-
mableundervoltagelockout, makingitwellsuitedforportable
applications.
The MIC2184 is available in 16 pin SOP and QSOP package
options with a junction temperture range range from –40°C
to +125°C.
Typical Application
VIN = 3.3V
16
15mΩ
120µF (x2)
MIC2184 EFFICIENCY
VINP
6.3V
100
1
9
VINA
CSH
CSL
95
90
85
7
2
8
EN/UVLO
FreqOut
FREQ/2
VDD
14
OUTP
Q3
80
75
70
65
60
55
50
VOUT
Si9803DY(x2)
16
10
4
2.5V @5A
MIC2184
4.7µH
V
V
f
= 3.3V
IN
OUT
= 2.5V
= 200kHz
COMP
3
12
6
220µF(x2)
6.3V
SS
PGND
FB
S
13
VREF
0
1
2
3
4
5
OUTPUT CURRENT (A)
SYNC SGND
11
5
Adjustable Output Buck Converter
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com
December 10, 2001
1
MIC2184
MIC2184
Micrel
Ordering Information
Part Number
MIC2184BM
MIC2184BQS
Output Voltage
Frequency
400KHz
Junction Temp. Range
–40°C to +125°C
Package
Adjustable
Adjustable
16-lead SOP
16-lead QSOP
400KHz
–40°C to +125°C
Pin Configuration
VINA
1
2
3
4
5
6
7
8
16 VINP
15 FREQ/2
14 OUTP
13 VREF
12 PGND
11 SYNC
10 VDD
FreqOut
SS
COMP
SGND
FB
EN/UVLO
CSL
9
CSH
16 Lead SOIC
(M)
MIC2184
2
December 10, 2001
MIC2184
Micrel
Pin Description
Pin Number
Pin Name
Pin Function
1
VINA
Analog voltage input voltage to the circuit. This powers up the analog
sections of the die and does not need to be the same voltage as Pin 16
(VINP).
2
3
FreqOut
SS
This provides a digital signal output signal at half the switching frequency.
This signal swings from 0 to 3V, and can be used to drive an external
capacitive doubler to provide a higher voltage to the VINP input.
Soft start reduces the inrush current and delays and slows the output voltage
rise time. A 5µA current source will charge the capacitor up to VDD. A 1µF
capacitor will soft start the switching regulator in 1.5ms.
4
5
COMP
SGND
Compensation (Output): Internal error amplifier output. Connect to a
capacitor or series RC network to compensate the regulator’s control loop.
Small signal ground: must be routed separately from other grounds to the (-)
terminal of COUT
.
6
7
FB
Feedback Input - the circuit regulates this pin to 1.245V.
EN/UVLO
Enable/UnderVoltage Lockout (input): A low level on this pin will power down
the device, reducing the quiescent current to under 5uA. This pin has two
separate thresholds, below 1.5V the output switching is disabled, and below
0.9V the part is forced into a complete micropower shutdown. The 1.5V
threshold functions as an accurate undervoltage lockout (UVLO) with 140mV
hysteresis.
8
9
CSL
CSH
The (-) input to the current limit comparator. A built in offset of 100mV
between CSH and CSL in conjunction with the current sense resistor sets
the current limit threshold level. This is also the (-) input to the current
amplifier.
The (+) input to the current limit comparator. A built in offset of 100mV
between CSH and CSL in conjunction with the current sense resistor sets
the current limit threshold level. This is also the (+) input to the current
amplifier.
10
11
VDD
3V internal linear-regulator output. VDD is also the supply voltage bus for the
chip. Bypass to SGND with 1µF.
SYNC
Frequency Synchronization (Input): Connect an external clock signal to
synchronize the oscillator. Leading edge of signal above 1.5V starts the
switching cycle. Connect to SGND if not used.
12
13
14
15
16
PGND
VREF
OUTP
FREQ/2
VINP
MOSFET driver power ground, connects to source of synchronous MOSFET
and the (-) terminal of CIN.
The 1.245V voltage reference is available on this pin. A 0.1µF capacitor
should be connected from this pin to ground.
High current drive for high side P channel MOSFET. Voltage swing is from
ground to VINP. On-resistance is typically 2.5Ω.
When this is low, the oscillator frequency is 400KHz. When this pin is raised
to VDD, the oscillator frequency is 200KHz.
Power Input voltage to the circuit. The output gate drivers are powered from
this supply. The current sense resistor RCS should be connected as close as
possible to this pin.
December 10, 2001
3
MIC2184
MIC2184
Micrel
Absolute Maximum Ratings (Note 1)
Operating Ratings (Note 2)
Supply Voltage (V A, V P) .........................................15V
Supply Voltage (V A, V P) ........................ +2.9V to +14V
IN
IN
IN IN
Digital Supply Voltage (V ) ...........................................7V
Ambient Operating Temperature......... –40°C ≤ T ≤ +85°C
DD
A
Comp Pin Voltage (V
)............................ –0.3V to +3V
Junction Temperature ....................... –40°C ≤ T ≤ +125°C
COMP
J
Feedback Pin Voltage (V ) .......................... –0.3V to +3V
Output Voltage Range...................................... 1.3V to 12V
PackageThermal Resistance
FB
EN/UVLO
Enable Pin Voltage (V
) ..................... –0.3V to 15V
) ............... –0.3V to 1V
Current Sense Voltage (V
V
θ
θ
16-lead SOP ...............................................100°C/W
16-lead QSOP.............................................163°C/W
CSH– CSL
JA
JA
Sync Pin Voltage (V
) ................................ –0.3V to 7V
SYNC
Freq/2 Pin Voltage (V
) ............................ -0.3V to 7V
FREQ/2
Power Dissipation (P )
D
16 lead SOIC................................. 400mW @ T = 85°C
A
16 lead QSOP ............................... 245mW @ T = 80°C
A
Ambient Storage Temp ............................ –65°C to +150°C
ESD Rating, ............................................................. Note 3
Electrical Characteristics
VINA = VINP = VCSH = 5V, VOUT = 3.3V, VEN/UVLO = 5V, VFREQ/2 = 0V, TJ = 25ºC, unless otherwise specified. Bold values indicate
–40ºC < TJ < +125ºC.
Parameter
Condition
Min
Typ
Max
Units
Regulation
Feedback Voltage Reference
(±1%)
(±2%)
1.233 1.245 1.257
V
V
1.22
1.27
Feedback Bias Current
50
0.04
0.9
nA
% / V
%
Output Voltage Line Regulation
Output Voltage Load Regulation
Output Voltage Total Regulation
Input & VDD Supply
5V ≤ VIN ≤ 12V
0mV < (VCSH – VCSL) < 75mV
5V ≤ VINA ≤ 12V, 0mV < (VCSH – VCSL) < 75mV (±3%)
1.208
1.282
V
VINA Input Current
0.7
1.0
mA
mA
µA
V
VINP Input Current, Note 4
Shutdown Quiescent Current
(Excluding external MOSFET gate current)
VEN/UVLO = 0V; (IVINA + IVINP
)
0.5
5
Digital Supply Voltage (VDD
)
IL = 0
2.82
3.0
3.18
Digital Supply load regulation
Undervoltage Lockout
UVLO Hysteresis
IL = 0 to 1mA
0.03
2.75
100
V
VDD upper threshold (turn on threshold)
V
mV
Reference Output(VREF)
Reference Voltage
(±1.5%)
1.226 1.245 1.264
V
V
(±2.5%)
1.213
1.276
Reference Voltage Line
Regulation
5V < VINA < 12V
2
1
mV
Reference Voltage Load
Regulation
0 < IREF < 100µA
mV
Enable/UVLO
Enable Input Threshold
UVLO Threshold
0.6
1.4
0.9
1.5
140
0.2
1.2
1.6
V
V
(Turn-on threshold)
VEN/UVLO = 5V
UVLO Hysteresis
Enable Input Current
mV
µA
5
MIC2184
4
December 10, 2001
MIC2184
Micrel
Parameter
Condiion
Min
Typ
5
Max
Units
Soft Start
Soft Start Current
µA
mV
V/V
V/V
Current Limit
Current Limit Threshold Voltage
Error Amplifier
Voltage on CSH-CSL to trip current limit
100
20
Error Amplifier Gain
Current Amplifier
Current Amplifier Gain
Oscillator Section
Oscillator Frequency (fO)
Maximum Duty Cycle
Minimum On Time
3.0
400
360
100
440
230
kHz
%
VFB = 1.0V
VFB = 1.5V
185
200
0.3
90
ns
Freq/2 Frequency (fO)
Frequency Foldback Threshold
Frequency Foldback Frequency
SYNC Threshold Level
SYNC Input Current
SYNC Minimum Pulse Width
SYNC Capture Range
FreqOut Output
VFREQ/2 = 5V
Measured on FB
170
0.6
kHz
V
kHz
V
1.4
0.1
2.2
5
µA
ns
200
Note 5
fO +15 %
600
kHz
FreqOut Frequency
FreqOut Current Drive
Note 6
Sink
fO / 2
8
kHz
mA
mA
Source
–6
Gate Drivers
Rise/Fall Time
CL = 3300pF
50
1.8
1.6
2.6
2.4
ns
Ω
Ω
Ω
Ω
Output Driver Impedance
Source; VINP = 12V
Sink; VINP = 12V
Source; VINP = 5V
Sink; VINP = 5V
4
3.5
Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when
operating the device outside of its operating ratings. The maximum allowable power dissipation is a function of the maximum junction
temperature, T (Max), the junction-to-ambient thermal resistance, θ , and the ambient temperature, T .
J
JA
A
Note 2. The device is not guaranteed to function outside its operating rating.
Note 3. Devices are ESD sensitive. Handling precautions recommended.
Note 4: See application information for I(V P) vs. V P.
IN
IN
Note 5: See application information for limitations on maximum operating frequency.
Note 6: The frequency on FreqOut is half the frequency of the oscillator, or half the frequency of the external Sync signal.
December 10, 2001
5
MIC2184
MIC2184
Micrel
Typical Characteristics
Quiescent Current
vs. Input Voltage
Quiescent Current
vs. Temperature
V
vs. Input Voltage
DD
4.5
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
3.10
3.05
3.00
2.95
2.90
2.85
2.80
400kHz
VINA = VIN
P
4
400kHz
IQ = IVINA + IVINP
3.5
3
200kHz
2.5
ISTANDBY
2
200kHz
1.5
1
IQ = IVINA + IVINP
VINA = VINP = 3.3V
ISTANDBY
0.5
0
0
5
10
15
0
5
10
15
-40 -20
0 20 40 60 80 100120140
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
TEMPERATURE (°C)
Error Amp Reference Voltage
vs. Input Voltage
V
vs. Load
V
vs. Temperature
DD
DD
3.005
3.000
2.995
2.990
2.985
2.980
2.975
2.970
3.08
3.06
3.04
3.02
3.00
2.98
2.96
2.94
2.92
1.2451
VINA = VINP = 5V
1.2449
1.2447
1.2445
1.2443
1.2441
VIN = 5V
0
0.2 0.4 0.6 0.8
1
1.2
-40 -20
0
20 40 60 80 100120140
0
2
4
6
8
10 12 14
V
LOAD CURRENT (mA)
TEMPERATURE (°C)
INPUT VOLTAGE (V)
DD
Error Amp Reference Voltage
vs. Temperature
Frequency Variation
vs. Input Voltage
Frequency Variation vs.
Temperature
1.246
5
3
2
1.5
1
200kHz
200kHz
400kHz
1.245
1.244
1.243
1.242
1.241
1.24
1
-1
0.5
0
-3
-5
-7
-0.5
-1
-9
-11
-13
-15
400kHz
-1.5
-2
VIN = 3.3V
-40 -20
0
20 40 60 80 100120140
-50 -30 -10 10 30 50 70 90 110
0
2
4
6
8
10 12 14
TEMPERATURE (°C)
TEMPERATURE (°C)
INPUT VOLTAGE (V)
Soft Start Current vs.
Temperature
Overcurrent Threshold
vs. Input Voltage
Overcurrent Threshold
vs. Temperature
102.0
100.0
98.0
96.0
94.0
92.0
90.0
102
VIN = 3.3V
4.9
4.8
4.7
4.6
4.5
4.4
101
100
99
98
97
96
95
-40 -20
0
20 40 60 80 100120140
0
2
4
6
8
10 12 14
-40 -20
0
20 40 60 80 100120140
TEMPERATURE (°C)
INPUT VOLTAGE (V)
TEMPERATURE (°C)
MIC2184
6
December 10, 2001
MIC2184
Micrel
OUTP Drive Impedance vs.
Input Voltage
4
3.5
3
2.5
2
SINK
1.5
1
SOURCE
0
5
10
15
INPUT VOLTAGE (V)
December 10, 2001
7
MIC2184
MIC2184
Micrel
Functional Diagram
VIN
CIN
CDECOUP
VINA
1
OVERCURRENT
COMPARATOR
VREF
1.245V
0.1V
9
8
CSH
CSL
EN/UVLO
7
RSENSE
BIAS
GAIN
3.7
VDD 10
VDD
CURRENT
SENSE
AMP
16 VINP
ON
fs/4
14 OUTP
CONTROL
Q1
L1
VOUT
SYNC 11
D1
COUT
FREQ/2 15
OSC
RESET
12 PGND
SLOPE
COMPENSATION
FreqOut
2
∑
÷2
PWM
COMPARATOR
gm = 0.0002
gain = 20
VREF
SS
3
4
COMP
ERROR
AMP
6
FB
100k
0.3V
fs/4
VREF 13
VREF
FREQUENCY
FOLDBACK
5
SGND
Figure 1. MIC2184 Block Diagram
P-Channel MOSFET, Q1. Current flows from the input to the
output through the current sense resistor, MOSFET and
inductor. The current amplitude increases, controlled by the
inductor. The voltage developed across the current sense
Functional Characteristics
Controller Overview and Functional Description
The MIC2184 is a BiCMOS, switched mode, synchronous,
step down (buck) converter controller. It uses a P-Channel
MOSFET,whichallowsthecontrollertooperateat100%duty
cycle and eliminates the need for a high side drive bootstrap
circuit. Current mode control is used to achieve superior
transient line and load regulation. An internal corrective ramp
provides slope compensation for stable operation above a
50%dutycycle.Thecontrollerisoptimizedforhighefficiency,
high performance DC-DC converter applications.
resistor, R
, is amplified inside the MIC2184 and com-
SENSE
bined with an internal ramp for stability. This signal is com-
pared to the output of the error amplifier. When the current
signalequalstheerrorvoltagesignal,theP-channelMOSFET
isturnedoff.Theinductorcurrentflowsthroughthediode,D1.
At the beginning of the next switching cycle, the P-channel
MOSFET is turned on which turns off the diode, D1.
Figure 1 is a block diagram of the MIC2184 configured as a
synchronous buck converter. At the beginning of the switch-
ing cycle, the OUTP pin pulls low and turns on the high-side
MIC2184
8
December 10, 2001
MIC2184
Micrel
The MIC2184 controller is broken down into 7 functions.
Current Limit
The output current is detected by the voltage drop across the
external current sense resistor (R in Figure 1.). The
current sense resistor must be sized using the minimum
current limit threshold. The external components must be
designedtowithstandthemaximumcurrentlimit. Thecurrent
sense resistor value is calculated by the equation below:
• Control loop
• PWM operation
• Current mode control
• Current limit
• Reference, enable and UVLO
• FreqOut
SENSE
• MOSFET gate drive
• Oscillator and Sync
• Soft-start
MIN_ CURRENT _ SENSE_ THRESHOLD
RSENSE
=
IOUT _MAX
The maximum output current is:
Control Loop
MAX _ CURRENT _ SENSE_ THRESHOLD
RSENSE
PWM Control Loop
IOUT _MAX
=
The MIC2184 uses current mode control to regulate the
output voltage. This dual control loop method (illustrated in
Figure 2) senses the output voltage (outer loop) and the
inductor current (inner loop). It uses inductor current and
output voltage to determine the duty cycle of the buck
converter. Sampling the inductor current effectively removes
the inductor from the control loop, which simplifies compen-
sation.
The current sense pins CSH (pin 9) and CSL (pin 8) are noise
sensitive due to the low signal level and high input imped-
ance. The PCB traces should be short and routed close to
each other. A small (1nF) capacitor across the pins will
attenuate high frequency switching noise.
When the peak inductor current exceeds the current limit
threshold, the overcurrent comparator turns off the high side
MOSFET for the remainder of the switching cycle, effectively
decreasing the duty cycle. The output voltage drops as
additional load current is pulled from the converter. When the
voltageatthefeedbackpin(FB)reachesapproximately0.3V,
the circuit enters frequency foldback mode and the oscillator
frequency will drop to 1/4 of the switching frequency. This
limits the maximum output power delivered to the load under
a short circuit condition.
VIN
Switching
Converter
VOUT
Voltage
Divider
IINDUCTOR
Switch
Driver
Reference, Enable and UVLO Circuits
VERROR
VREF
The output drivers are enabled when the following conditions
are satisfied:
IINDUCTOR
• The V voltage (pin 10) is greater than its
DD
undervoltage threshold.
VERROR
• The voltage on the enable pin (pin 7) is greater
than the enable UVLO threshold.
The enable pin (pin 7) has two threshold levels, allowing the
MIC2184toshutdowninalowcurrentmode,orturnoffoutput
switching in standby mode. An enable pin voltage lower than
the shutdown threshold turns off all the internal circuitry and
places the MIC2184 in a micropower shutdown mode.
tON
tPER
D = tON/tPER
If the enable pin voltage is between the shutdown and
Figure 2. Current Mode Control Example
standby thresholds, the internal bias, V
and reference
DD
voltages are turned on. The soft start pin is forced low by an
internal discharge MOSFET. The output drivers are inhibited
fromswitching. TheOUTPpinisinahighstateandtheOUTN
pin remains in a low state. Raising the enable voltage above
thestandbythresholdallowsthesoftstartcapacitortocharge
and enables the output drivers. The standby threshold is
specified in the electrical characteristics. A resistor divider
can be used with the enable pin to prevent the power supply
from turning on until a specified input voltage is reached. The
circuit in Figure 3 shows how to connect the resistors.
As shown in Figure 1, the inductor current is sensed by
measuring the voltage across the resistor, R
. A ramp is
SENSE
added to the amplified current sense signal to provide slope
compensation, which is required to prevent unstable opera-
tion at duty cycles greater than 50%.
A transconductance amplifier is used for the error amplifier,
which compares an attenuated sample of the output voltage
with a reference voltage. The output of the error amplifier is
the compensation pin (Comp), which is compared to the
current sense waveform in the PWM block. When the current
signal becomes greater than the error signal, the comparator
turns off the high side drive. The COMP pin provides access
to the output of the error amplifier and allows the use of
external components to stabilize the voltage loop.
December 10, 2001
9
MIC2184
MIC2184
Micrel
supply. The V P pin and CSH pin must be connected to the
MIC2184
IN
1.5V
Typical
same potential.
VIN
MOSFET Selection
The P-channel MOSFET must have a V threshold voltage
GS
R1
Bias
Circuitry
equal to or lower than the input voltage when used in a buck
converter topology. There is a limit to the maximum gate
charge the MIC2184 will drive. Higher gate charge MOSFET
will slow down the turn-on and turn-off time of the MOSFET.
Slower transition times will cause higher power dissipation in
the MOSFET due to higher switching transition losses.
EN/UVLO
(7)
140mV
Hysteresis
(typical)
R2
Figure 3. UVLO Circuitry
The line voltage turn on trip point is:
TheMOSFETgatechargeisalsolimitedbypowerdissipation
in the MIC2184. The power dissipated by the gate drive
circuitry is calculated below:
R2
V
INPUT _ENABLE= VTHRESHOLD ×
R1+R2
P
=
Q
GATE × V P × fS
IN
GATE_DRIVE
where:
where: Qgate is the total gate charge of both the N and P-
channel MOSFETs.
V
is the voltage level of the internal
THRESHOLD
comparator reference, typically 1.5V
f is the switching frequency
S
The input voltage hysteresis is equal to:
V P is the gate drive voltage at the V P pin
IN
IN
R1+R2
The graph in Figure 4 shows the total gate charge that can be
driven by the MIC2184 over the input voltage range, for
different values of switching frequency.
V
INPUT _HYST= VHYST ×
R2
where:
V
is the internal comparator hysteresis level,
Frequency vs.
Max. Gate Charge
HYST
typically 140mV.
-9
200x10
-9
V
is the hysteresis at the input voltage
180x10
INPUT_HYST
-9
160x10
The MIC2184 will be disabled when the input voltage drops
back down to:
200kHz
-9
-9
-9
-9
-9
-9
-9
0
140x10
120x10
100x10
80x10
60x10
40x10
20x10
300kHz
400kHz
V
V
=
INPUT_OFF
INPUT_ENABLE
500kHz
– V
=
INPUT_HYST
600kHz
R2
×
)
HYST
(V
– V
THRESHOLD
R1+R2
0x10
3
5
7
9
11 13 15 17
Either of 2 UVLO conditions will pull the soft start capacitor
low.
INPUT VOLTAGE (V)
Figure 4. MIC2184 Frequency vs Max. Gate Charge
Oscillator & Sync
• When the V voltage drops below its
DD
undervoltage lockout level.
• When the enable pin drops below the its enable
Theinternaloscillatorisfreerunningandrequiresnoexternal
components. The f/2 pin allows the user to select from two
switchingfrequencies. Alowlevelsettheoscillatorfrequency
to 400kHz and a high level set the oscillator frequency to
200kHz. The maximum duty cycle for both frequencies is
100%. This is another advantage of using a P-channel
MOSFET for the high-side drive; it can continuously turned
on.
threshold
The internal bias circuit generates an internal 1.245V band-
gap reference voltage for the voltage error amplifier and a 3V
V
voltagefortheinternalcontrolcircuitry.TheV
pin(pin
DD
REF
13) should be decoupled with a 0.1µf capacitor placed close
tothepin. TheV pinmustbedecoupledwitha1µFceramic
DD
capacitor. The capacitor must be placed close to the V pin.
DD
The other end of the capacitor must be connected directly to
the ground plane.
A frequency foldback mode is enabled if the voltage on the
feedback pin (pin 6) is less than 0.3V. In frequency foldback,
the oscillator frequency is reduced by approximately a factor
of 4. Frequency foldback is used to limit the energy delivered
to the output during a short circuit fault condition.
MOSFET Gate Drive
The MIC2184 is designed to drive a high side P-channel
MOSFET. The source pin of the P-channel MOSFET is
connected to the input of the power supply. It is turned on
when OUTP pulls the gate of the MOSFET low. The advan-
tage of using a P-channel MOSFET is that it does not require
a bootstrap circuit to boost the gate voltage higher than the
input, as would be required for an N-channel MOSFET.
The SYNC input (pin 11) lets the MIC2184 synchronize with
an external clock signal. The rising edge of the sync signal
generates a reset signal in the oscillator, which turns off the
low side gate drive output. The high side drive then turns on,
restarting the switching cycle. The sync signal is inhibited
when the controller operates in frequency foldback. The sync
signal frequency must be greater than the maximum speci-
The V P pin (pin 16) supplies the drive voltage to the gate
IN
drive pin, OUTP. V P pin is usually connected to the input
IN
MIC2184
10
December 10, 2001
MIC2184
Micrel
fiedfreerunningfrequencyoftheMIC2184. Ifthesynchroniz-
ing frequency is lower, double pulsing of the gate drive
outputs will occur. When not used, the sync pin must be
connected to ground.
Efficiency Considerations
Efficiency is the ratio of output power to input power. The
difference is dissipated as heat in the buck converter. Under
light output load, the significant contributors are:
The maximum recommended output switching frequency is
600kHz. Synchronizing to higher frequencies may be pos-
sible, however, higher power dissipation in the internal gate
drive circuits will occur. The MOSFET gates require charge
to turn on the device. The average current required by the
MOSFET gate increases with switching frequency.
• The V A supply current
IN
• The V P supply current, which includes the current
IN
required to switch the external MOSFET
• Core losses in the output inductor
To maximize efficiency at light loads:
• Use a low gate charge MOSFET or use the smallest
MOSFET, which is still adequate for maximum output
current.
Soft Start
Soft start reduces the power supply input surge current at
start up by controlling the output voltage risetime. The input
surge appears while the output capacitance is charged up. A
slower output risetime will draw a lower input surge current.
Soft start may also be used for power supply sequencing.
• Use a ferrite material for the inductor core, which has
less core loss than an MPP or iron power core.
Under heavy output loads the significant contributors to
power loss are (in approximate order of magnitude):
ThesoftstartvoltageisapplieddirectlytothePWMcompara-
tor. A5µAinternalcurrentsourceisusedtochargeupthesoft
start capacitor. The capacitor is discharged when either the
enable pin voltage drops below the standby threshold or the
• Resistive on time losses in the MOSFET
• Switching transition losses in the MOSFET
• Inductor resistive losses
• Current sense resistor losses
V
voltage drops below its UVLO level.
• Input capacitor resistive losses (due to the capacitors
ESR)
To minimize power loss under heavy loads:
DD
The part switches at a low duty cycle when the soft start pin
voltage is zero. As the soft start voltage rises from 0V to 0.7V,
the duty cycle increases from the minimum duty cycle to the
operating duty cycle. The oscillator runs at the foldback
frequency (1/4 of the switching frequency) until the feedback
voltage rises above 0.3V. The risetime of the output is
dependent of the soft start capacitor output capacitance,
input and output voltage and load current.
• Use low on resistance MOSFETs. Use low threshold
logic level MOSFETs when the input voltage is below
5V. Multiplying the gate charge by the on resistance
gives a figure of merit, providing a good balance
between low load and high load efficiency.
• Slow transition times and oscillations on the voltage
and current waveforms dissipate more power during
the turn on and turn off of the MOSFET. A clean
layout will minimize parasitic inductance and capaci
tance in the gate drive and high current paths. This
will allow the fastest transition times and waveforms
without oscillations. Low gate charge MOSFETs will
transition faster than those with higher gate charge
requirements.
Voltage Setting Components
The MIC2184 requires two resistors to set the output voltage
as shown in Figure 5.
VOUT
MIC2184
Voltage
Amplifier
R1
Pin 6
• For the same size inductor, a lower value will have
fewer turns and therefore, lower winding resistance.
However, using too small of a value will require more
output capacitors to filter the output ripple, which will
force a smaller bandwidth, slower transient response
and possible instability under certain conditions.
R2
VREF
1.245V
Figure 5
• Lowering the current sense resistor value will de
crease the power dissipated in the resistor. However,
it will also increase the overcurrent limit and will
require larger MOSFETs and inductor components.
The output voltage is determined by the equation below.
R1
V
OUT= VREF ×1+
R2
• Use low ESR input capacitors to minimize the power
Where: V
for the MIC2184 is typically 1.245V.
REF
dissipated in the capacitors ESR.
Lower values of R1 are preferred to prevent noise from
appearing on the FB pin. A typically recommended value is
10kΩ. If R1 is too small in value it will decrease the efficiency
of the power supply, especially at low output loads.
Once R1 is selected, R2 can be calculated with the following
formula.
VREF ×R1
R2=
VOUT – VREF
December 10, 2001
11
MIC2184
MIC2184
Micrel
Package Information
PIN 1
0.157 (3.99)
0.150 (3.81)
DIMENSIONS:
INCHES (MM)
0.020 (0.51)
REF
0.020 (0.51)
0.013 (0.33)
0.050 (1.27)
BSC
45°
0.0098 (0.249)
0.0040 (0.102)
0°–8°
0.050 (1.27)
0.016 (0.40)
0.394 (10.00)
0.386 (9.80)
SEATING
PLANE
0.0648 (1.646)
0.0434 (1.102)
0.244 (6.20)
0.228 (5.79)
16-Pin SOP (M)
PIN 1
DIMENSIONS:
INCHES (MM)
0.157 (3.99)
0.150 (3.81)
0.009 (0.2286)
REF
0.012 (0.30)
0.008 (0.20)
0.025 (0.635)
BSC
45°
0.0098 (0.249)
0.0075 (0.190)
0.0098 (0.249)
0.0040 (0.102)
8°
0°
0.196 (4.98)
0.189 (4.80)
0.050 (1.27)
0.016 (0.40)
SEATING 0.0688 (1.748)
PLANE
0.0532 (1.351)
0.2284 (5.801)
0.2240 (5.690)
16-Pin QSOP (QS)
MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 2001 Micrel Incorporated
MIC2184
12
December 10, 2001
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