MIC2564A-1BTS [MICREL]
Dual Serial PCMCIA/CardBus Power Controller Preliminary Information; 双串行PCMCIA / CardBus的电源控制器的初步信息
| 型号： | MIC2564A-1BTS |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | Dual Serial PCMCIA/CardBus Power Controller Preliminary Information |
| 文件： | 总16页 (文件大小：167K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MIC2564A
Dual Serial PCMCIA/CardBus Power Controller
Preliminary Information
General Description
Features
The MIC2564A is dual-slot PC Card (PCMCIA) and CardBus
power controller. It is a sophisticated power switching matrix
that controls V and V voltages to two PC Card slots. The
• Standard 3-wire serial control data input
• Controls two card slots from one surface mount device
• High-efficiency, low-resistance switches
CC
PP
MIC2564A is used in conjunction with a serial-data output
logic controller using the standard three-wire serial control
data format.
• 12V supply optional (not required by MIC2564A)
• Current limit and overtemperature shutdown
• Ultralow 1µA-typical standby power consumption
• Cross-conduction lockout (no switching transients)
• Break-before-make switching
When connected to 3.3V, 5V, and 12V system power sup-
plies, the MIC2564A can switch its V outputs between 0V,
CC
• 1A minimum V output per slot
3.3V, 5.0V, and high-impedance states and V
outputs
CC
PP
• Independent V and V voltage output (MIC2564A-1)
between 0V, 3.3V, 5V, 12V, and high-impedance states. The
outputswillsupplyaminimumof1Acurrenttothesocket
CC
PP
• 120mA minimum V output current per slot
V
PP
CC
• 24-pin surface-mount SSOP and TSSOP packages
and the V outputs will supply a minimum of 120mA to the
PP
socket. Voltage rise and fall times are well controlled. The
MIC2564A also features an efficient standby (sleep) mode at
0.3µA typical quiescent current.
Applications
• PC Card and CardBus power control
• Zoom Video port power control
• Wireless communications
• Bar code data collection systems
• Docking stations (portable and desktop)
• Power supply management
12V and 5V supplies are not required for MIC2564A opera-
tion making it possible to omit one or both supplies when they
are not needed by the system. An internal charge pump
supplies the internal bias voltages required for high-perfor-
mance switching.
Ordering Information
The MIC2564A is protected by overtemperature shutdown,
and protects itself and the system with current limiting and
cross-conduction lockout.
Part Number
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package
MIC2564A-0BSM
MIC2564A-1BSM
MIC2564A-0BTS
MIC2564A-1BTS
24-pin SSOP
24-pin SSOP
24-pin TSSOP
24-pin TSSOP
The MIC2564A is available in 24-pin SSOP and 24-pin
TSSOP.
Typical Application
Slot A
Address and data lines
V
PP1
PP2
between logic controller and
System Power Supply
PCMCIA cards not shown.
V
(
OPTIONAL
)
(
OPTIONAL
)
)
PCMCIA
Card
A
12V
3.3V
5V
VCC
System Reset
VPP IN
VCC3 IN
VCC5 IN
(
OPTIONAL
)
(OPTIONAL
Slot B
A VPP OUT
A VCC OUT
B VPP OUT
B VCC OUT
RST#
Dual-Slot
Logic Controller
PCMCIA,
CardBus,
or Zoom Video
MIC2564A
Power
VPP
1
Serial
Control
Bus
Controller
VPP2
PCMCIA
Card
B
GND
VCC
Motherboard
PCMCIA Card Power Management Application
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com
September 1999
1
MIC2564A
MIC2564A
Micrel
Pin Configuration
VCC5 IN
A VCC OUT
VCC5 IN
A FLAG
SDA
1
2
24
23
22
21
20
19
18
17
16
15
14
13
A VCC OUT
CC3 IN
V
3
A VCC OUT
GND
4
5
A VPP OUT
SCL
6
VPP IN
RST#
7
VPP IN
SLA
8
B VPP OUT
GND
B FLAG
VCC5 IN
B VCC OUT
9
10
11
12
B VCC OUT
VCC3 IN
VCC5 IN
B VCC OUT
24-lead SSOP (SM)
24-lead TSSOP (TS)
Pin Description
Pin Number
Pin Name
Pin Function
1,3,10,12
VCC5 IN
5V Supply Input: Optional system power supply connection. Required only
for 5V VCC and VPP output voltage.
2,22,24
A VCC OUT
Slot A VCC Output: Pins 2, 22, and 24 must be externally connected
together.
4
5
6
7
A FLAG
SDA
Channel A VCC and VPP Output Monitor (Output): Low on error condition.
Serial Data (Input)
Serial Clock (Input)
SCL
RST#
System Reset (Input): Active low signal deactivates the MIC2564A, clearing
the serial registers and forcing the four power outputs to 0V (GND).
8
9
SLA
Serial Data Latch (Input)
B FLAG
Channel B VCC and VPP Output Monitor (Output): Low on error condition.
11,13,15
B VCC OUT
Slot B VCC Output: Pins 11, 13, and 15 must be externally connected
together.
14,23
VCC3 IN
3.3V Supply Input: Required system power supply connection. Powers 3.3V
VCC and VPP outputs and all internal circuitry.
16,21
17
GND
Ground
B VPP OUT
VPP IN
Slot B VPP Output
18,19
12V Supply Input: Optional system power supply connection. Required only
for 12V VPP output voltage.
20
A VPP OUT
Slot A VPP Output
MIC2564A
2
September 1999
MIC2564A
Micrel
Absolute Maximum Ratings (Note 1)
Operating Ratings (Note 2)
V
V
V
V
V
IN ......................................................................+13.6V
IN.......................................................................+6.0V
V
V
V
V
IN ............................................................ 0V to +13.2V
IN........................................................ +3.0V to +5.5V
PP
PP
CC3
CC5
SCL
CC3
CC5
SCL
IN.......................................................................+6.0V
IN............................................................. 0V to +5.5V
, V , V , V ................................. 0V to +5.5V
, V
, V
, V
....................................–0.3V to +6.0V
SDA
SLA
RST#
SDA
SLA
RST#
, V
.......................................................+6.0V
A or B V OUT ................................................0 to 120mA
A FLAG
B FLAG
PP
A or B V OUT ....................... >120mA, Internally Limited
A or B V OUT .......................................................0 to 1A
PP
CC
A or B V OUT .............................. >1A, Internally Limited
Clock Frequency .................................................0 to 2MHz
CC
Power Dissipation at T ≤ 25°C (P ) ....... Internally Limited
Ambient Temperature (T ) ......................... –40°C to +85°C
A
D
A
Storage Temperature ............................... –65°C to +150°C
Lead Temperature (5 sec.)...................................... +260°C
ESD Rating, Note 3
Junction Temperature (T ) ...................................... +125°C
J
Package Thermal Resistance (θ
)
JA
SSOP .............................................................. 90˚C/W
TSSOP ............................................................ 83˚C/W
Electrical Characteristics
VCC3 IN = 3.3V, VCC5 IN = 5.0V, VPP IN = 12V; TA = 25°C, bold indicates –40°C ≤ TA ≤ +85°C; unless noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VPP Output
I
PP OUT
High Impedance Output
Leakage Current
shutdown mode
VPP OUT = 0V
1
10
µA
Hi-Z
IPPSC
RO
Short Circuit Current Limit
Switch Resistance
VPP OUT = 0V, normal mode, Note 4
120
260
1.6
400
mA
VPP OUT = 5V selected,
5
Ω
IPP OUT = –100mA (sourcing)
V
PP OUT = 3.3V selected,
1.3
1.3
5
Ω
Ω
Ω
IPP OUT = –100mA (sourcing)
VPP OUT = 12V selected, VPP IN = 12V,
2.3
IPP OUT = –100 mA (sourcing)
VPP OUT = 0V [ground] selected,
2000
5000
IPP OUT = 50µA (sinking)
VPP Switching Time (See Figure 2)
t1
Output Turn-On Delay, Note 5
VPP OUT = Hi-Z to 10% of 3.3V, RL = 100Ω
VPP OUT = Hi-Z to 10% of 5V, RL = 100Ω
VPP OUT = Hi-Z to 10% of 12, RL = 100Ω
VPP OUT = 10% to 90% of 3.3, RL = 100Ω
VPP OUT = 10% to 90% of 5, RL = 100Ω
VPP OUT = 10% to 90% of 12, RL = 100Ω
VPP OUT = 3.3V to 90% of 12V, RL = 100Ω
VPP OUT = 5V to 90% of 12, RL = 100Ω
VPP OUT = 12V to 90% of 3.3, RL = 100Ω
VPP OUT = 12V to 90% of 5, RL = 100Ω
VPP OUT = 90% to 10% of 3.3, RL = 100Ω
VPP OUT = 90% to 10% of 5, RL = 100Ω
VPP OUT = 90% to 10% of 12, RL = 100Ω
1
100
100
250
500
1000
500
500
500
500
1000
500
500
500
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
t2
1
t3
50
t4
Output Rise Time
10
10
10
10
10
10
10
100
250
100
100
100
100
250
1
t5
t6
t7
Output Transition Time, Note 5
t8
t9
t10
t11
t12
t13
Output Turnoff Fall Time
1
1
September 1999
3
MIC2564A
MIC2564A
Micrel
Symbol
Parameter
Conditions
Min
Typ
1
Max
50
Units
µs
t14
Output Turnoff Delay Time,
Notes 5, 7
VPP OUT = 3.3V to Hi-Z, RL = 100Ω
VPP OUT = 5V to Hi-Z, RL = 100Ω
VPP OUT = 12V to Hi-Z, RL = 100Ω
t15
1
50
µs
t16
1
50
µs
VCC Output
I
CC OUT Hi-Z High Impedance Output
shutdown mode, VCC OUT = 0V
1
20
3.0
µA
A
Leakage Current
ICCSC
RO
Short Circuit Current Limit
VCC OUT = 0, normal mode,
VCC3 or VCC5 switches, Note 4
1.0
2.0
Switch Resistance
VCC OUT = 3.3V selected,
ICC OUT = –1A (sourcing)
120
85
150
120
3900
mΩ
mΩ
Ω
VCC OUT = 5V selected,
ICC OUT = –1A (sourcing)
VCC OUT = 0V [ground] selected,
ICC OUT = 0.1mA (sinking)
2000
VCC Switching Time (See Figure 3)
t17
Output Turn-On Delay Time,
Note 5
VCC OUT = 0V to 10% of 3.3, RL = 10Ω
VCC OUT = 0V to 10% of 5.0, RL = 10Ω
VCC OUT = 10% to 90% of 3.3V, RL = 10Ω
VCC OUT = 10% to 90% of 5, RL = 10Ω
VCC OUT = 90% to 10% of 3.3, RL = 10Ω
VCC OUT = 90% to 10% of 5.0, RL = 10Ω
VCC OUT = 3.3V to 90% of 3.3V , RL = 10Ω
VCC OUT = 5V to 90% of 5V, RL = 10Ω
250
500
500
µs
µs
µs
µs
µs
µs
µs
µs
t18
1000
5000
5000
1000
2000
2000
2000
t19
Output Rise Time
750
1000
100
1200
2200
550
t20
t21
Output Fall Time
t22
100
400
t23
Output Turnoff Delay, Notes 5, 6
400
t24
400
Power Supply
ICC3
VCC3 IN Supply Current (3.3V)
Note 7
VCC OUT = 5V or 3.3V, ICC OUT = 0
VCC OUT = Hi-Z (sleep mode)
VCC OUT = 5V or 3.3V, ICC OUT = 0
VCC OUT = Hi-Z (sleep mode)
VPP OUT = 0V, 3.3V, 5V, or Hi-Z; IPP OUT = 0
VPP OUT = VPP IN
120
5
200
10
µA
µA
µA
µA
µA
µA
V
ICC5
VCC5 IN Supply Current (5V)
Note 8
25
0.2
1
50
10
IPP IN
VPP IN Supply Current (12V)
Note 8
10
4
50
VCC3
VCC5
VPP
Operating Input Voltage (3.3V)
Operating Input Voltage (5V)
Operating Input Voltage (12V)
Note 7
3.0
—
3.3
5.0
12
5.5
5.5
13.2
Note 8
V
Note 8, 9
—
V
Thermal Shutdown
TSD
Thermal Shutdown Temperature
145
°C
Serial Interface DC Specifications
VIH
VIL
Input Voltage: SDA, SCL, SLA pins
0.7V
IN
5.5
V
V
CC3
Input Voltage: SDA, SCL, SLA pins
Input Current
–0.3
0.3V
IN
CC3
IIN
0V < VIN < 5.5V
VFLG = 5V
–1
0.2
1
µA
Flag
IFLG
Flag Leakage Current
1
µA
MIC2564A
4
September 1999
MIC2564A
Micrel
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Serial Interface Timing Requirements (See Figure 1), Note 10
tHD:DAT
tSU:DAT
tSU:SLA
tSU:RST#
tW
SDA Hold Time
75
75
50
50
50
100
50
50
ns
ns
ns
ns
ns
ns
ns
ns
SDA Setup Time
data before clock
RST# before data
Latch Setup Time
Reset to Data Setup Time
Minimum Pulse Width
clock (tW:CLK
)
latch (tW:SLA
)
reset (tW:RST
)
data (tW:DA
)
Note 1. Exceeding the absolute maximum rating may damage the device.
Note 2. The device is not guaranteed to function outside its operating rating.
Note 3. Devices are ESD sensitive. Handling precautions recommended.
Note 4. Output enabled into short circuit.
Note 5. Measurement is from the 50% point of the SLA rising edge.
Note 6. Measurement is from the Hi-Z- or 0V-state command to the beginning of the slope. Measurement does not apply when device is in current
limit or thermal shutdown.
Note 7.
Note 8.
Note 9.
V
V
V
IN powers all internal logic, bias, and drive circuitry, and is required for operation.
CC3
and V
IN are not required for operation.
CC5
PP
IN must be either high impedance or greater than or approximately equal to the highest voltage V in the system. For example, if both
PP
CC
3.3V and 5V are connected to the MIC2564A, V IN must be either 5V, 12V, or high impedance.
PP
Note 10. Guaranteed by design not production tested.
Serial Control Timing Diagram
tW:DAT
RST#
tSU:RST#
D8
D7
D6
D5
D4
D3
D2
D1
D0
SDA
SLA
SCL
tSU:SLA
tW:SLA
tW:CLK
tSU:DAT
tHD:DAT
Figure 1. Serial Control Timing Diagram
The MIC2564A uses a three-wire serial interface to control V and V outputs for both sections A and B. The three control
CC
PP
lines have thresholds compatible with both 3.3V and 5V logic families. Data (SDA) is clocked in on the rising clock edge. The
clock signal may be continuous or it may halt after all data is clocked in.
September 1999
5
MIC2564A
MIC2564A
Micrel
Output Timing Diagrams
A
B
C
D
E
F
G
H
J
K
VPP
Enable
0
V
PP to 12V
VPP OFF
VPP to 3.3V VPP to 12V
VPP to 3.3V VPP
OFF
VPP to 5V
VPP to 12V
VPP to 5V
VPP
OFF
t13
t16
t10
t7
t9
t8
t6
12V
VPP
OUT
t2
t1
t4
t11
t5
t15
t12
t3
t14
5V
3.3V
0
FLAG
Figure 2. V Timing Diagram
PP
V
Enable is shown generically. R = 100Ω. C = negligible. Refer to the serial control timing diagrams for details.
L L
PP
At time A) V = 3.3V is selected, B) V is set to 12V, C) V = 3.3V (from 12V), D) V is disabled, E) V is programmed
PP
PP
PP
PP
PP
to 5V, F) V is set to 12V, G) V is programmed to 5V, H) V is disabled, J) V is set to 12V, K) V is again disabled.
PP
PP
PP
PP
PP
A
B
C
D
VCC
Enable
0
VCC to 3.3V
t17 t19
VCC OFF
t23 t21
VCC to 5V
t18 t20
VCC OFF
t24 t22
5V
3.3V
VCC
OUT
0
FLAG
0
Figure 3. V Timing Diagram
CC
V
Enable is shown generically. R = 10Ω. Refer to the serial control timing diagrams for specific control logic input.
L
CC
At time A) V is programmed to 3.3V, B) V is disabled, C) V is programmed to 5V, D) V is disabled.
CC
CC
CC
CC
MIC2564A
6
September 1999
MIC2564A
Micrel
ThPCrdSpefcation
September 1999
7
MIC2564A
MIC2564A
Micrel
ThPCrdSpefcation
MIC2564A
8
September 1999
MIC2564A
Micrel
Functional Diagram
VCC3 IN
3.3V
VCC5 IN
5V
(optional)
VPP IN
12V
(optional)
Gate-Drive
Charge Pump
SDA
SCL
A VPP OUT
B VPP OUT
A VCC OUT
B VCC OUT
RST#
SLA
Control
Logic
A FLAG
B FLAG
Current
Limit
Thermal
Shutdown
MIC2564
GND
September 1999
9
MIC2564A
MIC2564A
Micrel
If no card is inserted, or the system is in sleep mode, the logic
Applications Information
controller commands the MIC2564A to shut down V . This
CC
PCCardpowercontrolfortwosocketsiseasilyaccomplished
using the MIC2564A PC Card/CardBus power controller.
Control commands from a three-wire (plus Reset) serial bus
determine V and V output voltages and select standby
also places the switch into a shutdown (sleep) mode, where
current consumption drops to nearly zero, with only tiny
CMOS leakage currents flowing.
CC
PP
Internal device control logic, MOSFET drive and bias voltage
or operate mode.
is powered from V
IN. The high voltage bias is generated
CC3
V
outputs of 3.3V and 5V at the maximum allowable PC
CC
by an internal charge pump multiplier. Input logic threshold
voltages are compatible with common PC Card logic control-
lers using either 3.3V or 5V supplies.
Card current are supported. The V outputs also support
GND (0V) and high-impedance states. The V
CC
outputs
PP
support V (12V), V voltages (3.3V or 5V), GND (0V), or
PP
CC
PC Card Voltage Regulation
high impedance. When the V
= Hi-Z (high impedance)
CC
The MIC2564A has been designed to meet or exceed PC
Card voltage regulation specifications. The on-resistance of
theFETswitcheswillmeetregulationrequirementsat600mA
condition is selected, the device switches into sleep mode
and draws only leakage current.
Full protection during hot switching is provided which pre-
and 1A respectively for V = 5V ±3% and 3.3V ±3%.
CC
ventsfeedbackfromtheV output(forexample,fromthe5V
CC
Flash Memory Implementation
supply into the 3.3V supply) by locking out the low voltage
switch until the initial switch’s gate voltage drops below 0.7V.
When programming flash memory (standard +12V flash
memories), the PC Card slot logic controller enables V on
MIC2564A internal logic and MOSFET drive circuitry is
PP
the MIC2564A, which connects V IN (nominally +12V) to
powered from the V
input and internal charge-pump
PP
CC3
V
OUT. The low on-resistance of the MIC2564A switch
voltage multipliers. Switching speeds are carefully controlled
to prevent damage to sensitive loads and meet all PC Card
Specification timing requirements, including those for the
CardBus option.
PP
allows using a small bypass capacitor on the V OUT pins,
PP
with the main filtering performed by a large filter capacitor on
V
IN. (Usually the main power supply filter capacitor is
PP
sufficient.) Using a small-value capacitor such as 0.1µF on
the output causes little or no timing delays.
Supply Bypassing
The MIC2564A is a switch and has no stability problems;
however, supply bypass capacitors are recommended to
reduce inductive transients and improve output ripple. As all
internal device logic and comparison functions are powered
The V OUT transition from V
to 12.0V typically takes
CC
PP
200µs. After programming is completed, the logic controller
signalstotheMIC2564A, whichthenreducesV OUT to the
PP
V
level. Break-before-make switching action and con-
CC
fromtheV
input,thepowersupplyqualityonthislineisthe
CC3
trolled rise times reduce switching transients and lower
current spikes through the switch.
most important. Micrel recommends placing 1µF surface-
mount ceramic (low ESR) capacitors from V IN and
CC3
Output Current and Protection
V
INpinstogroundandtwo0.1µFsurface-mountceramic
CC5
capacitors, one from each V IN pin, to ground. Also, the
TheMIC2564AmeetsorexceedsallPCMCIAspecifications.
MIC2564A output switches are capable of passing the maxi-
mum current needed by any PC Card. For system and card
protection, output currents are internally limited. For full
system protection, long term (longer than a few milliseconds)
output short circuits invoke overtemperature shutdown, pro-
tecting the MIC2564A, the system power supplies, the card
socket pins, board traces, and the PC Card. Individual
internal status registers for each slot indicate when power
problems exist.
PP
V
OUT and V OUT pins may use 0.01µF to 0.1µF
CC
PP
capacitors for noise reduction and to reduce the chance of
ESD (electrostatic discharge) damage.
Power Status Feedback (Flags)
Two flag outputs monitor the V and V output voltages on
CC
PP
both slot A and B, falling low when the voltage is not proper.
Use of these open-drain flag outputs is optional; if they are
used, a pull-up resistor to either the 3.3V or 5V supply is
required. Unused flag outputs may be left open.
Control Bus Interface Overview
PC Card Slot Implementation
The MIC2564A power controller communicates with a logic
controller (host adapter) via a 3-wire serial interface. A fourth
control line attaches to the system reset line (RST#) and
places all MIC2564A switches in the high impedance (off)
state. The reset function is active low.
The MIC2564A is designed for full compatibility with the
Personal Computer Memory Card International Association
(PCMCIA) PC Card Specification including the CardBus and
Zoom Video (ZV) options.
When a PC card is initially inserted, it should receive V
CC
(3.3V ± 0.3V or 5.0V ±5%). The initial voltage is determined
by a combination of mechanical socket keys and voltage
sensepins. Thecardsendsahandshakingdatastreamtothe
logic controller, which then determines if this card requires
V
and if the card is designed for dual V . If the card is
PP
CC
compatible with, and requires, a different V level, the logic
CC
controllercommandsthepowercontrollertomakethischange
by disabling V , waiting at least 100ms, and then re-
CC
enabling the other V voltage.
CC
MIC2564A
10
September 1999
MIC2564A
Micrel
Slot A
+3.3V
1.0µF
+5V
1.0µF
+12V
Controller
Power
VPP
1
2
0.1µF 0.1µF
(3.3V or 5V)
ceramic
ceramic
ceramic
VPP
Generic
PCMCIA/CardBus
Host Adapter
330k
14, 23
1, 3, 10
18, 19
VCC
VCC3 IN
A FLG
VCC5 IN
VPP IN
VCC
A PGOOD
B PGOOD
SDATA
4
9
5
6
8
7
20
A VPP OUT
A VCC OUT
B VPP OUT
B VCC OUT
0.01µF
0.01µF
0.01µF
0.01µF
B FLG
SDA
Slot B
MIC2564A
Power
Controller
2, 22, 24
17
VPP
1
2
SCL
SCLK
VPP
11, 13, 15
SLA
SLATCH
RST#
RST#
GND
16, 21
VCC
System Reset
Figure 4. Generic “3-Wire” Serial Control Interface
Slot A
+3.3V
1.0µF
+5V
1.0µF
+12V
0.1µF
VPP
1
2
0.1µF
ceramic
ceramic
ceramic
VPP
14, 23
1, 3, 10
18, 19
Cirrus Logic
VCC
VCC3 IN
SDA
VCC5 IN
VPP IN
CL-PD6832/33
131
132
130
207
5
6
8
7
20
SDATA
SCLK
A VPP OUT
A VCC OUT
B VPP OUT
B VCC OUT
0.01µF
0.01µF
0.01µF
0.01µF
Slot B
MIC2564A
Power
Controller
2, 22, 24
17
SCL
SLA
VPP
1
2
SLATCH
RST#
VPP
11, 13, 15
RST#
GND
16, 21
VCC
System
Reset
Figure 5. Cirrus Logic CL-PD6832 and CL-PD6833 Interface
September 1999
11
MIC2564A
MIC2564A
Micrel
Slot A
+3.3V
1.0µF
+5V
1.0µF
+12V
VPP
1
2
0.1µF 0.1µF
ceramic
ceramic
ceramic
VPP
O2 Micro
14, 23
1, 3, 10
18, 19
OZ6833
VCC
VCC3 IN
SDA
VCC5 IN
VPP IN
OZ6933
131
132
130
207
5
6
8
7
20
CPWRDATA
CPWRCLK
CPWRLATC
RST#
A VPP OUT
A VCC OUT
B VPP OUT
B VCC OUT
0.01µF
0.01µF
0.01µF
0.01µF
Slot B
MIC2564A
Power
Controller
2, 22, 24
17
SCL
SLA
VPP
1
2
VPP
11, 13, 15
RST#
GND
16, 21
VCC
System
Reset
Figure 6. O Micro OZ6833 and OZ6933
2
Slot A
+3.3V
1.0µF
+5V
1.0µF
+12V
VPP
1
2
0.1µF 0.1µF
ceramic
ceramic
ceramic
VPP
14, 23
1, 3, 10
18, 19
O2 Micro
OZ6860
VCC
VCC3 IN
SDA
VCC5 IN
VPP IN
116
118
115
250
5
6
8
7
20
SDATA
SCLK
A VPP OUT
A VCC OUT
B VPP OUT
B VCC OUT
0.01µF
0.01µF
0.01µF
0.01µF
Slot B
MIC2564A
Power
Controller
2, 22, 24
17
SCL
SLA
VPP
1
2
SLATCH
RST#
VPP
11, 13, 15
RST#
GND
16, 21
VCC
System
Reset
Figure 7. O Micro OZ6860
2
MIC2564A
12
September 1999
MIC2564A
Micrel
Package Dimensions
5.40 (0.213)
5.20 (0.205)
DIMENSIONS:
MM (INCH)
7.90 (0.311)
7.65 (0.301)
0.875 (0.034) REF
8.33 (0.328)
8.07 (0.318)
2.00 (0.079)
1.73 (0.068)
10°
4°
0.22 (0.009)
0.13 (0.005)
0.38 (0.015)
0.25 (0.010)
1.25 (0.049) REF
0.21 (0.008)
0°
–8°
0.95 (0.037)
0.55 (0.022)
0.05 (0.002)
COPLANARITY:
0.10 (0.004) MAX
0.65 (0.0260) BSC
24-pin SSOP (SM)
4.50 (0.177)
4.30 (0.169)
DIMENSIONS:
MM (INCH)
6.4 BSC (0.252)
0.30 (0.012)
0.19 (0.007)
7.90 (0.311)
7.70 (0.303)
1.10 MAX (0.043)
0.20 (0.008)
0.09 (0.003)
0.65 BSC
(0.026)
1.00 (0.039) REF
8°
0°
0.15 (0.006)
0.05 (0.002)
0.70 (0.028)
0.50 (0.020)
24-pin TSSOP (TM)
September 1999
13
MIC2564A
MIC2564A
Micrel
MIC2564A
14
September 1999
MIC2564A
Micrel
September 1999
15
MIC2564A
MIC2564A
Micrel
MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 1999 Micrel Incorporated
MIC2564A
16
September 1999
相关型号：
MIC2564A-1YTS-TR
Power Supply Support Circuit, Fixed, 1 Channel, PDSO24, LEAD-FREE, TSSOP-24
MICROCHIP
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