MIC2589 [MICREL]

SINGLE-CHANNEL NEGATIVE HIGH VOLTAGE HOT SWAP POWER CONTROLLERS/SEQUENCERS; 单通道负高压热插拔电源控制器/音序器
MIC2589
型号: MIC2589
厂家: MICREL SEMICONDUCTOR    MICREL SEMICONDUCTOR
描述:

SINGLE-CHANNEL NEGATIVE HIGH VOLTAGE HOT SWAP POWER CONTROLLERS/SEQUENCERS
单通道负高压热插拔电源控制器/音序器

功率控制 高压 控制器
文件: 总17页 (文件大小:101K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MIC2589/MIC2595  
Single-Channel, Negative High-Voltage Hot  
Swap Power Controllers/Sequencers  
General Description  
Features  
The MIC2589 and MIC2595 are single-channel, negative-  
voltagehotswapcontrollersdesignedtoaddresstheneedfor  
safe insertion and removal of circuit boards into “live” system  
backplanes, while using few external components. The  
MIC2589/89R and the MIC2595/95R are each available in  
14-pin SOIC packaging and work in conjunction with an  
external N-Channel MOSFET for which the gate drive is  
controlled to provide inrush current limiting and output volt-  
age slew-rate control. Overcurrent fault protection is also  
provided for which the overcurrent threshold and the  
overcurrent duration are programmable. Very fast fault re-  
sponse is provided to ensure that system power supplies  
maintain regulation even during output short circuits. This  
familyofferstworesponsestoacircuitbreakerfaultcondition:  
the MIC2589 and MIC2595 latch the circuit breaker’s output  
off if the overcurrent threshold interval is exceeded while the  
MIC2589R and MIC2595R automatically attempt to restart at  
a fixed duty cycle after a current limit fault. A primary  
Power-Good signal and two secondary (delayed and stag-  
gered) Power-Good signals are provided to indicate that the  
output voltage of the inrush current limiter is within its valid  
operatingrange. Thesesignalscanbeusedtoperformanall-  
at-once or a sequenced enabling of one or more DC-DC  
power modules.  
Provides safe insertion and removal from live  
48V (nominal) backplanes  
Operates from 19V to 80V  
Fast responding circuit breaker (<1µs) to short circuit  
conditions  
User-programmable overcurrent detector response time  
Electronic circuit breaker function:  
Output latch OFF (MIC2589/95) or  
Output auto-retry (MIC2589R/95R)  
Active current regulation precisely controls inrush  
currents  
Regulated maximum output currents into faults  
Programmable undervoltage and overvoltage lockouts  
(MIC2589/89R)  
Programmable UVLO hysteresis (MIC2595/95R)  
Staggered Power-Goodoutputs provide load  
sequencing  
Fault reporting:  
Active-HIGH (MIC25XX-1) and Active-LOW  
(MIC25XX-2) Power-Good signal output  
Applications  
Central office switching  
• –48V power distribution  
Distributed power systems  
All support documentation can be found on Micrel’s web  
site at www.micrel.com.  
Typical Application  
DC-DC Converter  
48V  
RETURN  
+2.5V  
IN+  
OUT  
(Long Pin)  
100µF  
/ON/OFF  
MIC2589-1BM  
MIC2589R-1BM  
48V  
+2.5V  
IN–  
GND  
RETURN  
RETURN  
1
(Short Pin)  
14  
3
PWRGD1  
PWRGD2  
PWRGD3  
PGTIMER  
CFILTER  
CNLD  
VDD  
UV  
R1  
698kΩ  
1%  
12  
13  
DC-DC Converter  
IN+ OUT  
+3.3V  
2
5
6
R2  
11.8kΩ  
1%  
100µF  
/ON/OFF  
+3.3V  
RETURN  
4
IN–  
GND  
OV  
R3  
12.4kΩ  
1%  
VEE  
SENSE GATE DRAIN  
7
9
10  
11  
CFILTER  
CPG  
DC-DC Converter  
IN+ OUT  
CNLD  
R4  
0Ω  
CGATE  
+5V  
100µF  
M1  
/ON/OFF  
48V  
+5V  
RETURN  
IN–  
GND  
INPUT  
(Long Pin)  
RSENSE  
Input Overvoltage = 71.2V  
Input Undervoltage = 36.5V  
(See "Functional Description"ˇ for more detail)  
Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com  
M9999-031504  
March 2004  
1
MIC2589/2595  
Micrel  
Ordering Information  
PWRGD  
Polarity  
Circuit Breaker  
Function  
Part Number  
Input Voltage Monitor Pins  
Programmable UVLO & OVLO  
Programmable UVLO & OVLO  
Programmable UVLO & OVLO  
Programmable UVLO & OVLO  
Programmable UVLO Hysteresis  
Programmable UVLO Hysteresis  
Programmable UVLO Hysteresis  
Programmable UVLO Hysteresis  
Package  
MIC2589-1BM  
MIC2589-2BM  
MIC2589R-1BM  
MIC2589R-2BM  
MIC2595-1BM  
MIC2595-2BM  
MIC2595R-1BM  
MIC2595R-2BM  
Active-High  
Active-Low  
Active-High  
Active-Low  
Active-High  
Active-Low  
Active-High  
Active-Low  
Latched Off  
Latched Off  
Auto-Retry  
Auto-Retry  
Latched Off  
Latched Off  
Auto-Retry  
Auto-Retry  
14-pin SOIC  
14-pin SOIC  
14-pin SOIC  
14-pin SOIC  
14-pin SOIC  
14-pin SOIC  
14 pin SOIC  
14-pin SOIC  
Pin Configuration  
PWRGD1  
PGTIMER  
UV  
1
2
3
4
5
6
7
14 VDD  
/PWRGD1  
1
2
3
4
5
6
7
14 VDD  
13 PWRGD3  
12 PWRGD2  
11 DRAIN  
PGTIMER  
UV  
13 /PWRGD3  
12 /PWRGD2  
11 DRAIN  
10 GATE  
OV  
OV  
CFILTER  
CNLD  
VEE  
10 GATE  
CFILTER  
CNLD  
VEE  
9
8
SENSE  
NC  
9
8
SENSE  
NC  
14-Pin SOIC (M)  
MIC2589-1BM  
MIC2589R-1BM  
14-Pin SOIC (M)  
MIC2589-2BM  
MIC2589R-2BM  
PWRGD1  
PGTIMER  
OFF  
1
2
3
4
5
6
7
14 VDD  
/PWRGD1  
PGTIMER  
OFF  
1
2
3
4
5
6
7
14 VDD  
13 PWRGD3  
12 PWRGD2  
11 DRAIN  
10 GATE  
13 /PWRGD3  
12 /PWRGD2  
11 DRAIN  
10 GATE  
ON  
ON  
CFILTER  
CNLD  
CFILTER  
CNLD  
9
8
SENSE  
NC  
9
8
SENSE  
NC  
VEE  
VEE  
14-Pin SOIC (M)  
MIC2595-1BM  
MIC2595R-1BM  
14-Pin SOIC (M)  
MIC2595-2BM  
MIC2595R-2BM  
M9999-031504  
2
March 2004  
MIC2589/2595  
Pin Description  
Pin Number  
Micrel  
Pin Name  
Pin Function  
PWRGD1  
(MIC25XX-1)  
Active-High  
Power-Good Output 1: Asserted when the voltage on the DRAIN pin  
(VDRAIN) is within VPGTH of VEE, indicating that the output voltage is within  
proper specifications. For the MIC2589-1 and MIC2985-1, PWRGD1 will be  
high impedance when VDRAIN is less than VPGTH, and will pull-down to  
VDRAIN when VDRAIN is greater than VPGTH. For the MIC2589-2 and  
MIC2595-2, /PWRGD1 will pull-down to VDRAIN when VDRAIN is less than  
1
2
3
/PWRGD1  
(MIC25XX-2)  
Active-Low  
VPGTH, and will be high-impedance when VDRAIN is greater than VPGTH  
.
PGTIMER  
A capacitor connected from this pin to VEE sets the time interval between  
assertions of PWRGD2 (or /PWRGD2) and PWRGD3 (or /PWRGD3)  
relative to PWRGD1 (or /PWRGD1). See the Functional Descriptionfor  
further detail.  
UV  
Threshold  
MIC2589 and MIC2589R: Undervoltage Threshold Input. When the voltage  
at the UV pin is less than the VUVL threshold, the GATE pin is immediately  
pulled low by an internal 100µA current pull-down. The UV pin is also used  
to cycle the device off and on to reset the circuit breaker. Taken together,  
the OV and UV pins form a window comparator which define the limits of  
VEE within which the load may safely be powered.  
3
OFF  
MIC2595 and MIC2595R: Turn-Off Threshold. When the voltage at the OFF  
pin is less than the VOFFL threshold, the GATE pin is immediately pulled  
low by an internal 100µA current pull-down. The OFF pin is also used to cycle  
the device off and on to reset the circuit breaker. Taken together, the ON  
and OFF pins provide programmable hysteresis for the MIC2595 to be  
enabled.  
(Turn-Off Threshold)  
4
4
5
OV  
Threshold  
MIC2589 and MIC2589R: Overvoltage Threshold Input. When the voltage  
at the OV pin is greater than the VOVH threshold, the GATE pin is immediately  
pulled low by an internal 100µA current pull-down.  
ON  
MIC2595 and MIC2595R: Turn-On Threshold. At initial system power-up or  
after the part has been shut off by the OFF pin, the voltage on the ON pin  
must be above the VONH threshold in order for the MIC2595 to be enabled.  
(Turn-On Threshold)  
CFILTER  
Current Limit Response Timer: A capacitor connected between this pin and  
VEE provides filtering against nuisance tripping of the circuit breaker by  
setting a time delay, tFLT, for which an overcurrent event must last prior to  
signaling a fault condition and latching the output off. The minimum time for  
tFLT will be the time it takes for the output (capacitance) to charge to VEE  
during start-up. This pin is held to VEE with a 3µA current pull-down when  
no current limit condition exists. See the Functional Descriptionfor further  
details.  
6
CNLD  
No-Load Detect Timer: A capacitor between this pin and VEE sets the  
interval, tNLD, for which the current through the external MOSFET can drop  
below 10% of full-scale current limit before the circuit breaker is tripped.  
Tying this pin to VEE will disable this function. This pin is held to VEE by an  
internal NMOS when there is no undercurrent condition.  
7
8
9
VEE  
NC  
Negative Supply Voltage Input.  
No Internal Connection.  
SENSE  
Circuit Breaker Sense Input: A resistor between this pin and VEE sets the  
current limit trip point for the circuit. When the current limit threshold of IR =  
50mV is exceeded for tFLT, the circuit breaker is tripped and the GATE pin is  
immediately pulled low. Toggling UV or OV will reset the circuit breaker. To  
disable the circuit breaker, externally tie SENSE and VEE can be connected  
together.  
10  
11  
GATE  
Gate Drive Output: Connects to the Gate of an N-Channel MOSFET.  
Drain Sense Input: Connects to the Drain of an N-Channel MOSFET.  
DRAIN  
March 2004  
3
M9999-031504  
MIC2589/2595  
Micrel  
Pin Number  
Pin Name  
Pin Function  
12  
PWRGD2  
(MIC2589-1)  
(MIC2595-1)  
Power-Good Output 2: Asserted when the following is true: (PWRGD1 =  
Asserted) AND (Time after Assertion of PWRGD1 = Time PWRGD2, as  
programmed by the capacitor on PGTIMER). Once PWRGD1 is asserted,  
the PGTIMER pin begins to change and PWRGD2 will assert when  
PGTIMER crosses the PWRGD2 threshold (VTHRESH(PG2) = 0.63V, typical).  
Also see PWRGD1 and PGTIMER pin descriptions.  
12  
13  
13  
14  
/PWRGD2  
(MIC2589-2)  
(MIC2595-2)  
/Power-Good Output 2: Asserted when the following is true: (/PWRGD1 =  
Asserted) AND (Time after Assertion of /PWRGD1 = Time /PWRGD2, as  
programmed by the capacitor on PGTIMER). Once /PWRGD1 is asserted, the  
PGTIMER pin begins to change and /PWRGD2 will assert when PGTIMER  
crosses the /PWRGD2 threshold (VTHRESH(PG2) = 0.63V, typical). Also see  
/PWRGD1 and PGTIMER pin descriptions.  
PWRGD3  
(MIC2589-1)  
(MIC2595-1)  
Power-Good Output 3: Asserted when the following is true: (PWRGD1 =  
Asserted) AND (Time after Assertion of PWRGD1 = Time PWRGD3, as  
programmed by the capacitor on PGTIMER). Once PWRGD1 is asserted,  
the PGTIMER pin begins to change and PWRGD3 will assert when  
PGTIMER crosses the PWRGD3 threshold (VTHRESH(PG3) = 1.15V, typical).  
Also see PWRGD1 and PGTIMER pin descriptions.  
/PWRGD3  
(MIC2589-2)  
(MIC2595-2)  
/Power-Good Output 3: Open Collector. Asserted when the following is true:  
(/PWRGD1 = Asserted) AND (Time after Assertion of /PWRGD1 = Time  
/PWRGD3, as programmed by the capacitor on PGTIMER). Once /PWRGD1  
is asserted, the PGTIMER pin begins to change and /PWRGD3 will assert  
when PGTIMER crosses the /PWRGD3 threshold (VTHRESH(PG3) = 1.15V,  
typical). Also see /PWRGD1 and PGTIMER pin descriptions.  
VDD  
Positive Supply Input.  
M9999-031504  
4
March 2004  
MIC2589/2595  
Micrel  
Absolute Maximum Ratings(1)  
Operating Ratings(2)  
(All voltages are referred to V  
)
Supply Voltage (V -V )............................. +19V to +80V  
EE  
DD EE  
Ambient Temperature Range (T ) ............... 40°C to 85°C  
Supply Voltage (V V ) ......................... 0.3V to 100V  
A
DD  
EE  
Junction Temperature (T ) ........................................ 125°C  
DRAIN, PWRGD pins................................... 0.3V to 100V  
GATE pin..................................................... 0.3V to 12.5V  
SENSE, OV, UV, ON, OFF pins....................... 0.3V to 6V  
J
Package Thermal Resistance  
SOIC ) .........................................................120°C/W  
JA  
(3)  
ESD Ratings .............................................................................. 2kV  
Soldering  
Vapor Phase .......................... (60 sec.) +220°C +5 ±0°C  
Infrared ................................... (15 sec.) +235°C +5 ±0°C  
DC Electrical Characteristics(4)  
VDD = 48V, VEE = 0V, TA = 25°C, unless otherwise noted. Bold indicates specifications apply over the full operating temperature range of 40°C to 85°C.  
Symbol  
VDD VEE  
IDD  
Parameter  
Condition  
Min  
19  
Typ  
Max  
80  
6
Units  
Supply Voltage  
Supply Current  
4
mA  
mV  
VTRIP  
Circuit Breaker Trip Voltage  
No-Load Detect Threshold  
VTRIP = VSENSE VEE  
40  
50  
60  
INLDTH  
% of full-scale current limit  
IOUT decreasing  
IOUT increasing  
20  
22  
%
%
INLDHYS  
VCNLD  
No-Load Detect Threshold Hysteresis % of full-scale current limit  
2
%
V
No-Load Detect Timer High Threshold  
Voltage  
1.17  
10  
9
1.24  
1.33  
40  
ICNLD  
No-Load Detect Timer Capacitor  
Charge Current  
Note 5  
25  
10  
45  
µA  
V
VGATE  
IGATEON  
GATE Drive Voltage, (VGATE VEE  
)
15V (VDD VEE) 80V  
11  
GATE Pin Pull-Up Current  
VGATE = VEE to 8V  
30  
60  
µA  
19V (VDD VEE) 80V  
ISENSE  
SENSE Pin Current  
VSENSE = 50mV  
0.2  
µA  
IGATEOFF  
GATE Pin Sink Current  
(VSENSE VEE) = 100mV  
VGATE = 2V  
100  
240  
mA  
ICFILTER  
CFILTER Charge Current  
(VSENSE VEE) > VTRIP  
VCFILTER = 0.75V  
VGATE = 3V  
65  
95  
4
135  
6
µA  
µA  
CFILTER Pull-Down Current  
(VSENSE VEE) < VTRIP  
VCFILTER = 0.75V  
VGATE = 3V  
2
VCFILTER(TRIP) High Threshold Voltage  
Overcurrent Detect Timer  
(VSENSE VEE) > VTRIP  
1.17  
0.17  
30  
1.25  
0.22  
45  
1.33  
0.25  
80  
V
V
VCFILTER(RETRY) Voltage on CFILTER to Trigger Auto-Retry  
(MIC2589R and MIC2595R only)  
IPGTIMER  
PGTIMER Charge Current  
Voltage on PGTIMER = 0.75 V  
µA  
Notes:  
1. Exceeding the Absolute Maximum Ratingsmay damage the devices.  
2. The devices are not guaranteed to function outside the specified Operating Conditions.  
3. Devices are ESD sensitive. Handling precautions recommended. Human body model: 1.5kin series with 100pF. Machine model: 200pF, no series  
resistance.  
4. Specification for packaged product only.  
5. Not 100% tested. Parameters are guaranteed by design.  
March 2004  
5
M9999-031504  
MIC2589/2595  
Micrel  
DC Electrical Characteristics(6)  
V
= 48V, V = 0V, T = 25°C, unless otherwise noted. Bold indicates specifications apply over the full operating temperature range of 40°C to 85°C.  
DD  
EE  
A
Symbol  
Parameter  
Condition  
Min  
0.5  
Typ  
Max  
0.8  
Units  
VTHRESH(PG2) PGTIMER Threshold Voltage for  
PWRGD2 and /PWRGD2  
0.63  
V
VTHRESH(PG3) PGTIMER Threshold Voltage for  
PWRGD3 and /PWRGD3  
1.00  
1.15  
1.30  
V
RPGTIMER  
VOVH  
PGTIMER Discharge Resistance  
Voltage on PGTIMER = 0.5 V  
Low-to-High transition  
250  
500  
750  
OV Pin High Threshold Voltage  
(MIC2589 and 2589R parts only)  
1.198  
1.223  
1.247  
V
VOVL  
OV Pin Low threshold Voltage  
(MIC2589 and 2589R only)  
High-to-Low transition  
1.165  
1.203  
20  
1.232  
V
mV  
V
VOVHYS  
VUVL  
OV Pin Hysteresis  
(MIC2589 and 2589R only)  
UV Pin Low threshold Voltage  
(MIC2589 and 2589R only)  
High-to-Low transition  
Low-to-High transition  
1.198  
1.213  
1.223  
1.243  
20  
1.247  
1.272  
VUVH  
UV Pin High Threshold Voltage  
(MIC2589 and 2589R only)  
V
VUVHYS  
VONH  
UV Pin Hysteresis  
(MIC2589 and 2589R only)  
mV  
V
ON Pin High Threshold Voltage  
(MIC2595 and 2595R only)  
Low-to-High transition  
High-to-Low transition  
1.198  
1.198  
1.223  
1.223  
1.247  
1.247  
VOFFL  
OFF Pin Low Threshold Voltage  
(MIC2595 and 2595R only)  
V
ICNTRL  
VPGTH  
Input Current (OV, UV, ON, OFF Pins)  
Power-Good Threshold  
VUV = 1.25V  
0.5  
µA  
High-to-Low Transition  
(VDRAIN VEE  
1.1  
1.26  
1.40  
V
)
VOLPG  
PWRGD Output Voltage  
(relative to voltage at the DRAIN pin) 0mA IPG(LOW) 1mA  
VOLPG VDRAIN  
MIC25XX-1  
(VDRAIN VEE) > VPGTH  
(VDRAIN VEE) < VPGTH  
VPWRGD = VDD = 80 V  
–0.25  
–0.25  
0
0.8  
0.8  
1
V
V
MIC25XX-2  
ILKG(PG)  
PWRGD Output Leakage Current  
µA  
Note:  
6. Specification for packaged product only.  
M9999-031504  
6
March 2004  
MIC2589/2595  
Micrel  
AC Electrical Characteristics(7)  
Symbol  
Parameter  
Condition  
Min  
Typ  
Max  
Units  
tOCSENSE  
Overcurrent Sense to GATE Low  
Trip Time, Figure 2  
VSENSE VEE = 100mV(8)  
3.5  
µs  
tOVPHL  
tOVPLH  
tUVPHL  
tUVPLH  
tOFFPHL  
tONPLH  
tPGLH1  
tPGHL1  
tPGHL2  
tPGLH2  
OV High to GATE Low, Figure 3  
(MIC2589 and 2589R only)  
OV = 1.5V(8)  
OV = 1.0V(8)  
UV = 1.0V(8)  
UV = 1.5V(8)  
OFF = 1.0V(8)  
ON = 1.5V(8)  
1
1
1
1
1
1
3
5
5
3
µs  
µs  
µs  
µs  
µs  
µs  
µs  
µs  
µs  
µs  
OV Low to GATE High, Figure 3  
(MIC2589 and 2589R only)  
UV Low to GATE Low, Figure 4  
(MIC2589 and 2589R only)  
UV High to GATE High, Figure 4  
(MIC2589 and 2589R only)  
OFF Low to GATE Low, Figure 5  
(MIC2595 and 2595R only)  
ON High to GATE High, Figure 5  
(MIC2595 and 2595R only)  
DRAIN Low to PWRGD1 Output High  
(-1)  
CLOAD on PWRGDx = 50pF,  
RPULLUP = 100k(8)  
DRAIN High to all PWRGDx Outputs  
Low (-1)  
CLOAD on PWRGDx = 50pF,  
RPULLUP = 100k(8)  
DRAIN Low to /PWRGD1 Output Low  
(-2)  
CLOAD on /PWRGDx = 50pF,  
RPULLUP = 100k(8)  
DRAIN High to all /PWRGDx Outputs  
High (-2)  
CLOAD on /PWRGDx = 50pF,  
RPULLUP = 100k(8)  
Notes:  
7. Specification for packaged product only.  
8. Not 100% production tested. Parameters are guaranteed by design.  
Test Circuit  
[Section under construction]  
March 2004  
7
M9999-031504  
MIC2589/2595  
Micrel  
Timing Diagrams  
OVERCURRENT  
EVENT  
t < tFLT  
t tFLT  
ILIMIT  
ILOAD  
tNLD  
INLDTH  
0A  
Output OFF  
(at VDD  
Load current is regulated  
at ILIMIT = 50mV/RSENSE  
)
VDRAIN  
(at VEE  
)
(at VEE  
)
(at VEE)  
VUV or VOFF  
VUVL  
V
UVH —  
Reduction in VDRAIN to support  
ILIMIT = 50mV/RSENSE  
(VUV  
VEE)  
(VUV VEE  
)
(at VEE  
)
Figure 1. Overcurrent and Undercurrent (No Load) Response  
100mV  
VSENSE - VEE  
tOCSENSE  
VGATE  
1V  
Figure 2. SENSE to GATE LOW Timing Response  
1.223V  
1.203V  
VOV  
tOVPHL  
tOVPLH  
VGATE  
1V  
1V  
Figure 3. MIC2589/89R Overvoltage Response  
M9999-031504  
8
March 2004  
MIC2589/2595  
Micrel  
VUV  
1.223V  
1.243V  
tUVPHL  
tUVPLH  
VGATE  
1V  
1V  
Figure 4. MIC2589/89R Undervoltage Response  
VOFF  
1.223V  
tOFFHL  
VGATE  
1V  
Figure 5a. MIC2595/95R OFF to GATE Drive Response  
1.223V  
VON  
tONLH  
VGATE  
1V  
Figure 5b. MIC2595/95R ON to GATE Drive Response  
MIC2589/95-1  
VDRAIN  
VPGTH  
VPGTH  
VEE  
tPGLH1  
tPGHL1  
PWRGDx not asserted  
VPWRGD VDRAIN = 0V  
PWRGDx asserted - High Impedance  
PWRGDx not asserted  
VPWRGD VDRAIN = 0V  
PWRGD  
Outputs  
VEE  
PWRGD3  
PWRGD1  
PWRGD2  
MIC2589/95-2  
VDRAIN  
VPGTH  
VPGTH  
tPGLH2  
VEE  
tPGHL2  
/PWRGD  
Outputs  
VEE  
/PWRGD1  
/PWRGD2  
/PWRGD3  
Figure 6. DRAIN to Power-Good Response  
March 2004  
9
M9999-031504  
MIC2589/2595  
Micrel  
Functional Diagram  
VDD1  
Internal VDD  
and  
Reference  
Generator  
VDD1  
VREF  
VDD  
45µA  
GATE  
Error  
AMP  
+
SENSE  
100µA  
VEE  
VEE  
50mV  
VEE  
VDD1  
VDD1  
PWRGD1  
PWRGD2  
PWRGD3  
95µA  
+
CFILTER  
VCFILTER  
VEE  
4µA  
VREF  
/PWRGD1  
/PWRGD2  
/PWRGD3  
VEE  
Logic +  
Circuit  
Breaker  
EN  
VDD1  
25µA  
VEE  
6V  
+
CNLD  
DRAIN  
Clamp  
VCNLD  
+
VPGTH  
Internal  
PG  
VDD1  
45µA  
VEE  
UV  
PGTIMER  
+
+
VTH(PG2)  
VTH(UV/OV)  
+
+
VTH(PG3)  
OV  
VEE  
For Power-Good circuitry only  
denotes -2 option  
MIC2589 Block Diagram  
M9999-031504  
10  
March 2004  
MIC2589/2595  
Micrel  
The Power-Good Output Signals  
Functional Description  
Hot Swap Insertion  
For the MIC2589/95-1 and MIC2589R/95R-1, power-good  
output signal PWRGD1 will be high impedance when V  
DRAIN  
When circuit boards are inserted into systems carrying live  
supply voltages (hot swapped), high inrush currents often  
result due to the charging of bulk capacitance that resides  
across the circuit boards supply pins. These current spikes  
can cause the systems supply voltages to temporarily go out  
of regulation causing data loss or system lock-up. In more  
extreme cases, the transients occurring during a hot swap  
event may cause permanent damage to connectors or on-  
board components.  
drops below V  
, and will pull-down to V  
when  
PGTH  
DRAIN  
V
is above V  
. For the MIC2589/95-2 and the  
DRAIN  
PGTH  
MIC2589R/95R-2, power-good output signal /PWRGD1 will  
pull down to the potential of the V  
pin when V  
DRAIN  
DRAIN  
and will be high impedance when V  
DRAIN  
drops below V  
is above V  
PGTH  
. Hence, the -1 parts have an active-high  
PGTH  
PWRGD signalandthe-2partshaveanactive-low/PWRGD  
X
X
output. PWRGD (or /PWRGD ) may be used as an enable  
X
X
signal for one or more following DC/DC converter modules or  
for other system uses as desired. When used as an enable  
signal, the time necessary for the PWRGD (or /PWRGD)  
signal to pull-up (when in high impedance state) will depend  
upon the load (RC) that is present on this output.  
The MIC2589 and the MIC2595 are designed to address  
these issues by limiting the maximum current, which is  
allowed to flow during hot swap events. This is achieved by  
implementing a constant-current loop at turn-on. In addition  
to inrush current control, the MIC2589 and the MIC2595  
incorporate input voltage supervisory functions and user-  
programmable overcurrent protection, thereby providing ro-  
bust protection for both the system and the circuit board.  
Power-good output signals PWRGD2 (/PWRGD2) and  
PWRGD3 (/PWRGD3) follow the assertion of PWRGD1  
(/PWRGD1) with a sequencing delay set by an external  
capacitor (C ) from the controllers PGTIMER pin (Pin 2) to  
PG  
Start-Up Cycle  
V
. An expression for the sequencing delay between  
EE  
PWRGD2 and PWRGD1 is given by:  
WhentheinputvoltageistotheICisbetweentheovervoltage  
and undervoltage thresholds (MIC2589 and MIC2589R) or is  
V
THRESH(PG2) × CPG  
greater than V (MIC2595 and MIC2595R), a start cycle is  
tPGDLY21  
where V  
=
ON  
IPGTIMER  
initiated. When the IC is enabled, the GATE pin voltage rises  
from 0V with respect to V to approximately 10V above V  
.
EE  
EE  
(= 0.63V, typically) is the PWRGD2  
THRESH(PG2)  
This 10V gate drive is sufficient to fully enhance commonly  
availablepowerMOSFETsforthelowestpossibleDClosses.  
threshold voltage for PGTIMER and I  
(= 45µA, typi-  
PGTIMER  
cally) is the internal PGTIMER charge current. Similarly, an  
expression for the sequencing delay between PWRGD3 and  
PWRGD2 is given by:  
Capacitor C  
compensates circuitry internal to the IC,  
GATE  
while R4 minimizes the potential for high frequency parasitic  
oscillations from occurring in M1. The drain current of the  
MOSFET is regulated to ensure that it never exceeds the  
programmed threshold, as described in the Circuit Breaker  
Functionsection.  
V
V  
× C  
PG  
(
)
THRESH(PG3)  
THRESH(PG2)  
t
=
PGDLY32  
I
PGTIMER  
Capacitor C  
sets the value of overcurrent detector  
where V  
(= 1.15V, typically) is the PWRGD3  
FILTER  
THRESH(PG3)  
delay, t , which is the time for which an overcurrent event  
threshold voltage for PGTIMER. Therefore, power-good out-  
put signal PWRGD2 (/PWRGD2) will be delayed after the  
assertion of PWRGD1 (/PWRGD1) by:  
FLT  
must last to signal a fault condition and to cause an output  
latch-off. These devices will be driving a capacitive load in  
most applications, so a properly chosen value of C  
prevents false-, or nuisance-, tripping at turn-on as well as  
providing immunity to noise spikes after the start-up cycle is  
complete. The procedure for selecting a value for C  
FILTER  
t
(ms) 14 × C (µF) ms  
PG  
PGDLY2-1  
Power-good output signal PWRGD3 (/PWRGD3) follows the  
assertion of PWRGD2 by a delay:  
is  
FILTER  
t
(ms) 11.5 × C (µF) ms  
PG  
given in the Circuit Breaker Functionsection.  
PGDLY3-2  
For example, for a 10µF value for C , power-good output  
ResistorR4,inserieswiththepowerMOSFETsgate,maybe  
required in some layouts to minimize the potential for para-  
siticoscillationsoccurringinM1. Notethough, thatresistance  
in this device of the circuit has a slight destabilizing effect  
upon the MIC2589/95s current regulation loop. If possible,  
usehigh-frequencyPCBlayouttechniquesanduseadummy  
resistor, such that R4 = 0. If during prototyping an R4 is  
required, common values for R4 range between 4.7to 20Ω  
for various power MOSFETs.  
PG  
signal PWRGD2 will be asserted 140ms after PWRGD1.  
Power-good signal PWRGD3 will then be asserted 140ms  
after PWRGD2 and 255ms after the assertion of PWRGD1.  
The relationships between V  
, V  
, PWRGD1,  
DRAIN  
PGTH  
PWRGD2, and PWRGD3 are shown in Figure 6.  
March 2004  
11  
M9999-031504  
MIC2589/2595  
Micrel  
Circuit Breaker Function  
For example, in a system with a C  
= 150µF, a maximum  
LOAD  
(V V )=72V, andamaximumloadcurrentonanominal  
48V buss of 1.65A, the nominal circuit design equations  
steps are:  
The MIC2589/89R and the MIC2595/95R employ an elec-  
troniccircuitbreakerthatprotectstheexternalpowerMOSFET  
and other system components against large-scale faults,  
such as short circuits. The current-limit threshold is set via an  
DD  
EE  
1. Choose I  
= I  
(nom) = 2A (1.65A + 20%);  
LIMIT  
HOT_SWAP  
external resistor, R  
, connected between the V and  
SENSE  
EE  
38.8mV  
2A  
standard value is 19.6m);  
SENSE. For the MIC2589/89R and MIC2595/95R, a timer is  
set via capacitor C that determines the length of the  
R
=
= 19.4mΩ  
(closest 1%  
2. Select an  
SENSE  
FILTER  
time delay (t ) for which the device remains in current limit  
FLT  
3. Using I = I = 2A, the application circuit turn-  
before the circuit breaker is tripped. This programmable  
delay prevents tripping of the circuit breaker because of high  
inrush current charging bulk and distributed capacitive loads.  
Whenever the voltage across R  
things happen:  
CHARGE  
LIMIT  
on time is calculated:  
150µF × 72V  
(
)
= 5.4ms (use 6 ms)  
exceeds 50mV, two  
tTURN-ON  
=
SENSE  
2A  
Allowing for capacitor tolerances and a nominal 6ms turn-on  
time, an initial worst-case value for C is:  
1. A constant-current regulation loop is engaged which  
isdesignedtoholdthevoltageacrossR equal  
FILTER  
6  
SENSE  
to 50mV. This protects both the load and the  
MIC2589/95circuitsfromexcessivelyhighcurrents.  
This current-regulation loop will engage in less than  
1µs from the time at which the overvoltage condition  
C
= 6ms x (115.4 × 10 µF/sec) = 692nF  
FILTER(WORST-CASE)  
The closest standard ±5% tolerance capacitor value is 698nF  
and would be a good initial starting value for prototyping.  
Wheneverthehotswapcontrollerisnotincurrentlimit, C  
FILTER  
on R  
occurs.  
SENSE  
is discharged to V by an internal 4µA current source.  
EE  
2. Capacitor C  
is charged up to an internal  
FILTER  
For the MIC2589R/95R devices, the circuit breaker automati-  
V
threshold (= 1.25V) by an internal  
CFILTER(TRIP)  
cally resets after (20) t  
time constants (20 × t ). If the fault  
FLT  
FLT  
95µA current source. If the voltage across C  
FILTER  
condition still exists, capacitor C  
will again be charge up  
FILTER  
crosses this threshold, the circuit breaker trips and  
theGATEpinisimmediatelypulledlowbyaninternal  
current pull-down. This operation turns off the  
MOSFETquicklyanddisconnectstheinputfromthe  
to V  
C
where the circuit breaker is tripped. Capacitor  
will then be discharged by an internal 4µA current  
FILTER(TRIP)  
FILTER  
source until the voltage across C  
goes below  
FILTER  
V
, at which time another start cycle is initiated.  
FILTER(RETRY)  
load. The value of C  
should be selected to  
FILTER  
This will continue until the fault condition is removed or input  
power is removed/cycled. The duty cycle of the auto-restart  
function is therefore fixed at 5% and the period of the auto-  
restart cycle is given by:  
allow the circuits minimum regulated value of I  
OUT  
to equal I  
for somewhat longer than the time it  
TRIP  
takes to charge the total load capacitance.  
An initial value for C is found by calculating the time it  
FILTER  
will take for the MIC2589/95 to completely charge up the  
output capacitive load. Assuming the load is enabled by the  
PWRGD (or/PWRGD )signal(s)oftheIC,theturn-ondelay  
time is derived from the following expression,  
I = C × (dv/dt):  
C
× 1.25V 0.22V  
(
)
(
)
FILTER  
t
= 20 ×  
AUTO-RESTART  
95µA  
X
X
ms  
= C  
× 216.8  
FILTER  
µF  
C
× V V  
EE  
(
)
The auto-restart period for the example above where the  
LOAD  
DD  
t
=
TURN-ON  
worst-case C  
t
was determined to be 698nF is:  
= 151ms  
I
FILTER  
LIMIT  
AUTO-RESTART  
Using parametric values specific to the MIC2589/95, an  
expression relating a design nominal value for C  
Current Sensing  
to the  
FILTER  
circuits turn-on delay time is:  
Asmentionedbefore,theMIC2589/89RandtheMIC2595/95R  
use an external, low-value resistor in series with the source  
of the external MOSFET to measure the current flowing into  
t
×I  
(typ)  
(
)
TURN-ON  
CFILTER  
C
(nom) =  
FILTER  
the load. The V connection (Pin 7) to the IC is one input to  
V
(typ)  
EE  
CFILTER  
the devices internal current sensing circuits and the SENSE  
connection (Pin 9) is the other input.  
t
× 95µA  
µF  
TURN-ON  
6  
=
= t  
× 76 ×10  
TURN-ON  
1.25V  
sec  
The sense resistor is nominally valued at:  
Substituting the variables above with the specification limits  
oftheMIC2589/95,anexpressionfortheworst-casevaluefor  
VTRIP(typ)  
RSENSE(nom) =  
C
is given by:  
IHOT_SWAP(nom)  
FILTER  
135µA  
where V  
voltage (= 50mV) and I  
(typ) is the nominal circuit breaker threshold  
TRIP  
C
(max) = t  
×
TURN-ON  
FILTER  
(nom) is the nominal hot  
1.17V  
HOT_SWAP  
swaploadcurrentleveltotriptheinternalcircuitbreakerinthe  
application.  
µF  
6  
= t  
× 115.4 ×10  
TURN-ON  
sec  
M9999-031504  
12  
March 2004  
MIC2589/2595  
Micrel  
Toaccommodateworst-casetolerancesinthesenseresistor  
(for a ±1% initial tolerance, allow ±3% tolerance for variations  
over time and temperature) and circuit breaker threshold  
voltages, a slightly more detailed calculation must be used to  
determine the minimum and maximum hot swap load cur-  
rents.  
current, the controllers no-load detection loop is enabled. In  
this loop, an internal current source, I  
, will charge an  
CNLD  
external capacitor C  
. An expression for the controllers  
NLD  
no-load time-out delay is given by:  
C
NLD  
t
= V  
×
NLD  
CNLD  
I
As the MIC2589/95s minimum current-limit threshold volt-  
age is 40mV, the minimum hot swap load current is deter-  
mined where the sense resistor is 3% high:  
CNLD  
where V  
= 1.24V (typ); I  
= 25µA (typ); and C  
is  
CNLD  
CNLD  
NLD  
an external capacitor connected from Pin 6 to V . Once the  
EE  
40mV  
38.8mV  
voltageonC  
reachesitsno-loadthresholdvoltage,V  
,
NLD  
CNLD  
IHOT_SWAP(min) =  
=
the loop times out and the controller will shut down until it is  
resetmanually(MIC2589/95)oruntilitperformsanauto-retry  
operation (MIC2589R/95R).  
1.03 ×RSENSE(nom) RSENSE(nom)  
Keep in mind that the minimum hot swap load current should  
be greater than the application circuits upper steady-state  
load current boundary. Once the lower value of R  
Undervoltage/Overvoltage Detection (MIC2589 and  
MIC2589R)  
has  
SENSE  
beencalculated, itisgoodpracticetocheckthemaximumhot  
swaploadcurrent(I (max))whichthecircuitmaylet  
The MIC2589 and the MIC2589R have UVand OVinput  
pins that can be used to detect input supply rail undervoltage  
and overvoltage conditions. Undervoltage lockout prevents  
energizing the load until the supply input is stable and within  
tolerance. In a similar fashion, overvoltage turnoff prevents  
damage to sensitive circuit components should the input  
voltage exceed normal operational limits. Each of these pins  
is internally connected to analog comparators with 20mV of  
hysteresis. When the UV pin falls below its V  
the OV pin is above its V  
immediately pulled low. The GATE pin will be held low until  
the UV pin is above its V threshold or the OV pin is below  
HOT_SWAP  
pass in the case of tolerance build-up in the opposite direc-  
tion. Here, the worst-case maximum is found using a  
V
(max) of 60mV and a sense resistor 3% low in value:  
TRIP  
60mV  
0.97 ×R  
61.9mV  
R (nom)  
SENSE  
I
(max) =  
=
HOT_SWAP  
(nom)  
SENSE  
In this case, the application circuit must be sturdy enough to  
operate over an ~1.6-to-1 range in hot swap load currents.  
For example, if an MIC2595 circuit must pass a minimum hot  
threshold or  
UVL  
threshold, the GATE pin is  
OVH  
swap load current of 4A without nuisance trips, R  
SENSE  
UVH  
38.8mV  
its V  
threshold. The circuits UV and OV threshold voltage  
OVL  
= 9.7mΩ  
should be set to  
, and the nearest 1%  
4A  
standard value is 9.76m. At the other tolerance extremes,  
levels are programmed using the resistor divider R1, R2, and  
R3asshownintheTypicalApplicationwheretheequations  
to set the trip points are shown below. For the following  
I
(max) for the circuit in question is then simply:  
HOT_SWAP  
example,thecircuitsUVthresholdissettoV =37Vandthe  
UV  
61.9mV  
I
(max) =  
= 6.3A  
OV threshold is set at V = 72V, values commonly used in  
HOT_SWAP  
OV  
9.76mΩ  
Central Office power distribution applications.  
With a knowledge of the application circuits maximum hot  
swap load current, the power dissipation rating of the sense  
resistor can be determined using P = I × R. Here, The I is  
R1+R2 +R3  
(
)
V
= V  
(typ)×  
(typ)×  
2
UV  
UVL  
R2 +R3  
(
)
I
(max) = 6.3A and the R is R  
(min) =  
HOT_SWAP  
SENSE  
(0.97)(R  
(nom)) = 9.47m. Thus, the sense resistors  
SENSE  
R1+R2 +R3  
(
)
maximum power dissipation is:  
V
= V  
OVH  
OV  
R3  
2
P
= (6.3A) × (9.47m) = 0.376W  
MAX  
Given V , V , and any one resistor value, the remaining  
A 0.5sense resistor is a good choice in this application.  
UV  
OV  
two resistor values can be determined. A suggested value for  
R3 is that which will provide approximately 100µA of current  
throughthevoltagedividerchainatV =V .Thisyieldsthe  
No-Load Detection  
For those applications in which a minimum load current will  
always be present, the no-load detect capability of the  
MIC2589/89R/95/95R family offers system designer the abil-  
ity to perform a shutdown operation on such fault conditions,  
suchasanunscheduledorunexpectedremovalofPCboards  
from the system or on-board fuse failure.  
DD  
UV  
following as a starting point:  
VOVH(typ)  
1.223V  
R3 =  
=
= 12.23kΩ  
100µA  
100µA  
The closest standard 1% value for R3 = 12.4k. Solving for  
R2 and R1 yields:  
As long as the minimum current drawn by the load is at least  
V
TRIP  
20% of the maximum output current (defined by  
),  
R
SENSE  
the output of the hot swap controllers will remain enabled. If  
the output current falls below 12% of the maximum output  
March 2004  
13  
M9999-031504  
MIC2589/2595  
Micrel  
R1+R2 +R3  
(
(typ)×  
ONH  
)
V
V
= V  
OV  
ON  
R2 =R3 ×  
1  
R3  
V
UV  
R1+R2 +R3  
(
(typ)×  
OFFL  
)
V
= V  
OFF  
72V  
37V  
R2+R3  
R2 = 12.4kΩ ×  
1 = 11.73kΩ  
Given V  
, V , and any one resistor value, the remaining  
OFF ON  
two resistor values can be readily determined. A suggested  
value for R3 is that which will provide approximately 100µA of  
The closest standard 1% values for R2 = 11.8k. Lastly, the  
value for R1 is calculated:  
current through the voltage divider chain at V = V  
. This  
DD  
OFF  
yields the following as a starting point:  
V
1.223V  
(
)
R2  
OV  
R1=R3 ×  
V
(typ)  
1.223V  
OFFL  
1.223V  
R3 =  
=
= 12.23kΩ  
100µA  
100µA  
The closest standard 1% value for R3 = 12.4k. Solving for  
R2 and R1 yields:  
72V 1.223V  
(
)
R2  
R1=12.4kΩ ×  
R1= 705.81kΩ  
1.223V  
V
ON  
R2 =R3 ×  
1  
V
OFF  
The closest standard 1% value for R1 = 698k.  
Using standard 1% resistor values, the circuits nominal  
UV and OV thresholds are:  
40V  
R2 =12.4kΩ ×  
1 = 1.77kΩ  
35V  
V
V
= 36.5V  
= 71.2V  
UV  
OV  
The closest standard 1% value for R2 = 1.78 k. Lastly, the  
Programmable UVLO Hysteresis (MIC2595 and  
MIC2595R)  
value for R1 is calculated:  
V
1.223V  
(
)
R2  
The MIC2595 and the MIC2595R devices have user-pro-  
grammable hysteresis by means of the ON and OFF pins  
(Pins 4 and 3, respectively). This allows setting the  
MIC2595/95R to turn on at a voltage V1, and not turn off until  
a second voltage V2, where V2 < V1. This can significantly  
simplify dealing with source impedances in the supply buss  
while at the same time increasing the amount of available  
operating time from a loosely regulated power rail (for ex-  
ample, a battery supply). The MIC2595/95R holds the output  
ON  
R1=R3 ×  
1.223V  
40V 1.223V  
(
)
R2  
R1=12.4kΩ ×  
1.223V  
R1 = 391.38kΩ  
The closest standard 1% value for R1 = 392k.  
Using standard 1% resistor values, the circuits nominal  
ON and OFF thresholds are:  
off until the voltage at the ON pin is above its V  
threshold  
ONH  
value given in the Electrical Characteristicstable. Once the  
output has been enabled by the ON pin, it will remain on until  
V
V
= 40.1V  
= 35V  
ON  
OFF  
the voltage at the OFF pin falls below its respective V  
OFFL  
threshold value, or the part turns off due to an external fault  
condition. Should either event occur, the GATE pin is imme-  
diately pulled low and will remain low until the ON pin voltage  
once again above its V  
threshold. The circuits turn-on  
ONH  
and turn-off voltage levels are set using the resistor divider  
R1, R2, and R3 as shown in the Typical Applicationwhere  
the equations to set the trip points are shown below. For the  
following example, the circuits ON threshold is set to V  
=
ON  
40V and the circuits OFF threshold is set to  
= 35V.  
V
OFF  
M9999-031504  
14  
March 2004  
MIC2589/2595  
Micrel  
thiswilldamagethetransistor.However,theactual  
Applications Information  
4-Wire Kelvin Sensing  
avalanche voltage is unknown; all that can be  
guaranteed is that it will be greater than the V  
BD(D-  
Because of the low value typically required for the sense  
resistor,specialcaremustbeusedtomeasureaccuratelythe  
voltage drop across it. Specifically, the measurement tech-  
of the MOSFET. The drain of the transistor is  
S)  
connected to the DRAIN pin of the MIC2589/95,  
and the resulting transient does have enough  
voltage and energy and can damage this, or any,  
high-voltage hot swap controller.  
nique across R  
must employ 4-wire Kelvin sensing.  
SENSE  
This is simply a means of ensuring that any voltage drops in  
the power traces connected to the resistors are not picked up  
by the signal conductors measuring the voltages across the  
sense resistors.  
2. If the loads bypass capacitance (for example, the  
input filter capacitors for a set of DC-DC converter  
modules) are on a board from which the board with  
the MIC2589/95 and the MOSFET can be un-  
plugged, thesametypeofinductivetransientdam-  
age can occur to the MIC2589/95.  
Figure 7 illustrates how to implement 4-wire Kelvin sensing.  
Asthefigureshows,allthehighcurrentinthecircuit(fromV  
EE  
throughR  
andthentothesourceoftheoutputMOSFET)  
SENSE  
flows directly through the power PCB traces and through  
. The voltage drop across R is sampled in such  
a way that the high currents through the power traces will not  
introduce any parasitic voltage drops in the sense leads. It is  
recommended to connect the hot swap controllers sense  
leads directly to the sense resistors metalized contact pads.  
Protecting the controller and the power MOSFET from dam-  
age against these large-scale transients can take the forms  
shown in Figure 8. It is not mandatory that these techniques  
are used - the application environment will dictate suitability.  
As protection against sudden on-card load dumps at the  
DRAIN pin of the controller, a 2.2µF or larger capacitor  
directly from DRAIN to VEE of the controller can be used to  
serve as a charge reservoir. Alternatively, a 68V, 1W, 5%  
Zener diode clamp can be installed in a similar fashion. Note  
thattheclampdiodescathodeisconnectedtotheDRAINpin  
as shown in Figure 8. To protect the hot swap controller from  
large-scale transients at the card input, a 100V clamp diode  
(an SMAT70A or equivalent) can be used. In either case, the  
lead lengths should be short and the layout compact to  
prevent unwanted transients in the protection circuit.  
R
SENSE  
SENSE  
RSENSE metalized  
contact pads  
Power Trace  
From VEE  
Power Trace  
To MOSFET Source  
RSENSE  
PCB Track Width:  
0.03" per Ampere  
using 1oz. Cu  
Signal Trace  
to MIC2589/95 VEE Pin  
Signal Trace  
to MIC2589/95 SENSE Pin  
Note: Each SENSE lead trace shall be  
balanced for best performance equal  
length/equal aspect ratio.  
[Circuit drawing under construction]  
Figure 7. 4-Wire Kelvin Sense Connections for R  
Protection Against Voltage Transients  
SENSE  
Figure 8. Using Large-Scale Transient Protection  
Devices Around the MIC2589/95 and the  
MIC2589R/95R  
In many telecom applications, it is very common for circuit  
boards to encounter large-scale supply-voltage transients in  
backplane environments. Because backplanes present a  
compleximpedanceenvironment, thesetransientscanbeas  
high as 2.5 times steady-state levels, or 120V in worst-case  
situations. In addition, a sudden load dump anywhere on the  
circuitcardcangenerateaveryhighvoltagespikeatthedrain  
of the output MOSFET which, in turn, will appear at the  
DRAIN pin of the MIC2589/95. In both cases, it is good  
engineering practice to include protective measures to avoid  
damaging sensitive ICs or the hot swap controller from these  
large-scale transients. Two typical scenarios in which large-  
scale transients occur are described below:  
The same logic applies to the input of the MIC2589/95 circuit.  
Power bus inductance could easily result in localized high-  
voltage transients during a turn-off event. The potential for  
overstressing the part in such a case should be kept in check  
with a suitable input capacitor and/or transient clamping  
diode.  
Power MOSFET Selection  
[Section under construction]  
Power MOSFET Operating Voltage Requirements  
[Section under construction]  
1. Anoutputcurrentloaddumpwithnobypass(charge  
bucket or bulk) capacitance to V . For example,  
EE  
Power MOSFET Steady-State Thermal Issues  
if L  
= 5µH, V = 56V and t  
= 0.7µs, the  
LOAD  
IN  
OFF  
[Section under construction]  
resulting peak short-circuit current prior to the  
MOSFET turning off would reach:  
55V × 0.7µs  
(
)
= 7.7A  
Power MOSFET Transient Thermal Issues  
5µH  
[Section under construction]  
Ifthereisnootherpathforthiscurrenttotakewhen  
the MOSFET turns off, it will avalanche the drain-  
source junction of the MOSFET. Since the total  
energy represented is small relative to the sturdi-  
ness of modern power MOSFETs, its unlikely that  
PCB Layout Considerations  
[Section under construction]  
March 2004  
15  
M9999-031504  
MIC2589/2595  
Micrel  
Power MOSFET and Sense Resistor Vendors  
Table 1 shows some of the various sense resistor types  
available for use with the MIC2589/95 product family.  
Resistor Vendors  
Resistor Types  
WSLSeries  
Contact Data  
Vishay (Dale)  
www.vishay.com/docs/wsl_30100.pdf  
(203)452-5664  
IRC  
OARSSeries  
LRSeries  
(second source to WSL)  
www.irctt.com/pdf_files/OARS.pdf  
www.irctt.com/pdf_files/LRC.pdf  
(828) 264-8861  
Table 1. Suggested Sense Resistors  
M9999-031504  
16  
March 2004  
MIC2589/2595  
Micrel  
Package Information  
PIN 1  
DIMENSIONS:  
INCHES (MM)  
0.154 (3.90)  
0.026 (0.65)  
MAX)  
0.193 (4.90)  
0.050 (1.27) 0.016 (0.40)  
TYP TYP  
45°  
0.006 (0.15)  
3°6°  
0.244 (6.20)  
0.228 (5.80)  
0.344 (8.75)  
0.337 (8.55)  
SEATING  
PLANE  
0.057 (1.45)  
0.049 (1.25)  
14-Pin SOIC (M)  
MICREL, INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA  
TEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com  
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.  
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.  
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can  
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into  
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchasers  
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchasers own risk and Purchaser agrees to fully indemnify  
Micrel for any damages resulting from such use or sale.  
© 2004 Micrel, Incorporated.  
March 2004  
17  
M9999-031504  

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