MIC4807AJB [MICREL]
Addressable Latch Based Peripheral Driver, 8 Driver, 0.1A, MOS, CDIP18, CERAMIC, DIP-18;
| 型号： | MIC4807AJB |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | Addressable Latch Based Peripheral Driver, 8 Driver, 0.1A, MOS, CDIP18, CERAMIC, DIP-18 驱动器 |
| 文件： | 总8页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MIC4807
80V 8-Channel Addressable Low-Side Driver
General Description
Features
•
•
•
•
•
•
4.5V to 16V Operation
Eight 80V 100mA Outputs
Off-state Leakage less than 10µA at 25°C
Short-Circuit Proof
Thermal Shutdown with Hysteresis
DMOS Output Devices (RON ≤ 7Ω at 25°C)
The MIC4807 is an 80V, 8-channel, addressable low side
driver with latches and TTL/CMOS compatible logic inputs.
Each logic input is composed of a comparator with a 1.4V
bandgap-derived reference serving as the trip point. The
addresses (AIN, BIN, and CIN) and Data-in logic inputs have an
internal50µApull-upcurrentsource, whiletheOutputEnable
(OE), Chip Select (CS), and Clear logic inputs have an
internal75µApull-downsink. IfthelogiclinestotheMIC4807
are severed, these currents guarantee that the outputs will
turn OFF.
Applications
•
•
•
Lamp Drivers
Solenoid Drivers
Display Drivers
-Electroluminescent
-Vacuum Fluorescent
-Plasma
Relay Drivers
Print Head Drivers
Heater Drivers
Power Semiconductor Drivers
Security Systems
Environmental Controls
Process Controllers
Individual latches in the MIC4807 are selected by a binary
address presented at inputs AIN, BIN, and CIN. Data-in is
directed to the addressed latch while CS is held low, allowing
an individual output to be pulse-width modulated. When CS
issethighagain, thelastData-inisstoredinthelatch. IfData-
in="1",theaddressedoutputisturnedon,andifData-in="0",
the addressed output is turned off.
•
•
•
•
•
•
•
Information presented to Data-in and the address inputs is
transferred to the latches while CS is pulled low. For
application, where several outputs must be
(Continued)
Pin Diagram
Ordering Information
1
2
3
4
18
17
16
15
14
13
12
11
10
HVOUT1
HVOUT0
Data-in
AIN
HVOUT2
HVOUT3
VDD
Part
Number
Operating
Temperature-Range
Package
7
MIC4807BN
-40°C to 85°C
18-Pin Plastic DIP
MIC4807
OE
Ground
CS
5
6
7
8
9
BIN
CIN
Clear
VDD
HVOUT4
HVOUT5
HVOUT7
HVOUT6
Block Diagram
Thermal
Shutdown
Current
Limit
17 HVOUT0
V
DD 12
HVOUT1
HVOUT2
HVOUT3
HVOUT4
HVOUT5
18
1
AIN 15
BIN 14
CIN 13
Driver
•
2
8
9
•
•
•
•
•
Addressing
{
Address
Decoder
Latches
10 HVOUT6
11 HVOUT7
16
Driver
Data-in
Ground 5
6
7
4
CS
Clear
OE
October 1998
7-3
MIC4807
Micrel
When operated below current limit, the outputs appear as
small-valued resistors (typically 5.1Ω at 25°C) connected to
General Description (Continued)
turned on simultaneously, Gray Code address sequencing
can be applied to Ain, Bin, Cin, while Data-in is held high and
CS is held low. Data-in will be transferred to each address in
turn, without the need to toggle CS. Similarly, a set of outputs
could be simultaneously turned off by setting Data-in low.
Gray Code ensures that no intermediate addresses are
inadvertently accessed. A typical Gray Code is 0, 1, 3, 2, 6,
7, 5, 4.
ground. The "ON" resistance (R ) has a strong, positive
temperature coefficient (approximately 7500 ppm/°C) which
promotes current sharing if two or more outputs are paral-
ON
leled.
Absolute Maximum Ratings (Notes 1, 2 and 3)
Output Voltage (V
Supply Voltage (V
Logic Input Voltage (V )
Continuous Output Current (I
Power Dissipation (P , Note 2)
Ambient Temperature (T ):
A
Maximum Junction Temperature (T
Storage Temperature
, OFF)
100V
16.5V
+ 0.3
OUT
DD
)
Each output drive circuit has a high-voltage, power DMOS
device configured as a transconductance loop. This loop
limits the output current to typically 200mA. While current
limiting keeps the output device within its allowable safe-
operating area (SOA), the power dissipation may be exces-
sive. Long-term survival is guaranteed by thermal shutdown.
–0.3V TO V
DD
IN
)
Internally Limited
Internally Limited
–40°C to +85°C
) 150°C
–65°C to +150°C
130°C/W
OUT
D
JMAX
θ
- Plastic DIP
JA
Electrical Characteristics: (Note 6) MIC4807BN, T = 25°C, V = 15V unless otherwise specified (see
A
DD
Test Circuit).
Symbol
Parameter
Supply Voltage
Conditions
Min
Typ
Max
Units
V
DD
4.5
16
V
I
Supply Current
OE = L (Note 3)
OE = H (Note 4)
5.5
1.5
10
3
mA
mA
DD
V
V
(0)
Logic Input Voltage
4.5V ≤ V
≤ 16V
DD
0.8
V
V
IN
(1)
(0)
2.0
IN
I
I
I
Logic Input Current for A
,
IN
V
V
= 0V
–150
–70
130
–25
250
µA
IN
IN
IN
B , C , and Data-in
IN IN
(1)
Logic Input Current for CS,
OE, and Clear
= V
DD
25
µA
IN
Output Leakage Current
Output "ON" Resistance
Short Circuit Current
OE = 0V, V
OUT
= 80V
1
10
7
µA
Ω
OUT
R
Output is ON, V
OUT
= 0.7V,V
= 10V
DD
5.1
190
ON
I
Output is ON< V
OUT
= 50V
140
250
mA
SC
10V ≤ V
≤ 15V (Note 5)
DD
V
V
Output Voltage (OFF)
Output Voltage (ON)
80
V
OUT
I
I
= 50mA,V
DD
= 10V
= 10V
0.26
0.51
0.35
0.7
V
V
OUT
OUT
OUT
= 100mA, V
DD
Data and Address
Set-up Time
V
= 10V for all timing tests
400
50
ns
ns
DD
(A, see Timing Diagram)
Data and Address
Hold Time
(B)
CS Pulse Width
Turn-on Delay
(C)
(D)
500
ns
ns
2.5
7-4
October 1998
MIC4807
Micrel
Electrical Characteristics: (Note 6) T = 25°C, V = 15V unless otherwise specified (see Test Circuit).
A
DD
Symbol
Parameter
Conditions
Min
Typ
Max
2.5
2
Units
Turn-Off Delay
(E)
(F)
µs
µs
Output Disable
Response Time
Output Enable
Response Time
(G)
2
µs
Clear Response Time
Clear Pulse Width
(H)
(I)
2.5
µs
500
ns
Electrical Characteristics: (Note 6) T = –55°C to +125°C, V = 15V unless otherwise specified (see Test
A
DD
Circuit).
Symbol
Parameter
Supply Voltage
Conditions
Min
Typ
Max
Units
V
DD
4.5
16
V
I
Supply Current
OE = L (Note 3)
OE = H (Note 4)
15
4
mA
mA
DD
V
V
(0)
Logic Input Voltage
4.5V ≤ V
≤ 16V
DD
0.8
V
V
IN
(1)
(0)
2.0
IN
I
I
I
Logic Input Current for A
,
IN
V
V
= 0V
–250
–10
400
µA
IN
IN
IN
B , C , and Data-in
IN IN
7
(1)
Logic Input Current for CS,
OE, and Clear
= V
DD
25
µA
IN
Output Leakage Current
Output "ON" Resistance
Short Circuit Current
OE = 0V, V
OUT
= 80V
5.1
7
µA
Ω
OUT
R
Output is ON, V
OUT
=0.7V,V =10V
DD
12
ON
I
Output is ON< V
OUT
= 50V
100
300
mA
SC
10V ≤ V
≤ 15V (Note 5)
DD
V
V
Output Voltage (OFF)
Output Voltage (ON)
80
V
OUT
I
I
= 50mA,V
DD
= 10V
= 10V
0.6
1.2
V
V
OUT
OUT
OUT
= 100mA, V
DD
Data and Address
Set-up Time
V
= 10V for all timing tests
700
50
ns
ns
DD
(A, see Timing Diagram)
Data and Address
Hold Time
(B)
CS Pulse Width
Turn-on Delay
(C)
(D)
1000
ns
5
µs
October 1998
7-5
MIC4807
Micrel
Electrical Characteristics: (Note 6) T = 25°C, V = 15V unless otherwise specified (see Test Circuit).
A
DD
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Turn-Off Delay
(E)
(F)
5
µs
Output Disable
Response Time
4
µs
Output Enable
Response Time
(G)
4
5
µs
Clear Response Time
Clear Pulse Width
(H)
(I)
µs
1000
ns
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not
apply when operating the device beyond its specified operating ratings.
Note 2: The junction temperature is internally limited by a thermal shutdown circuit. The maximum power dissipation is a function of
T
, θ ,andT . ThemaximumallowablepowerdissipationatanyambienttemperatureisP =(T
- T )/θ . Ifthisdissipation
JA
JMAX JA
A
D
JMAX
A
is exceeded, the die temperature will rise above 150°C, and the MIC4807 will go into thermal shutdown.
Note 3: All outputs are off when OUTPUT ENABLE is pulled low.
Note 4: All outputs are turned on during this test.
Note 5: Pulse testing is used to avoid thermal shutown.
Note 6: Minimum and Maximum limits are tested and 100% guaranteed over the temperature range specified. Typicals are measured
at 25°C and represent the most likely parametric norm.
Timing Diagram
Logic "1"
CIN
BIN
Logic "0"
A
B
AIN
Data-in
CS
C
H
H
Clear
OE
G
OFF
ON
HVOUT
0
F
D
HVOUT
1
HVOUT
HVOUT
HVOUT
2
D
E
3
4
7-6
October 1998
MIC4807
Micrel
Test Circuit and AC Waveform Measurement Standards
V
V
OUT3
OUT2
18
17
16
15
14
13
12
11
10
V
V
OUT1
OUT0
1
2
3
4
VDD
VIN
R
R
C
C
R
R
C
C
R
R
C
C
R
R
C
C
VDD=10V
MIC4807
VIN
5
6
7
8
9
C = 35pF
R = 10kΩ
VIN
VOUT7
VOUT6
V
V
OUT5
OUT4
5V
VIN
0V
10V
VOUT
0V
All reference times are taken
from the 50% transition point.
tDelay
7
October 1998
7-7
MIC4807
Micrel
Equivalent Logic Diagram
V
DD
A
B
C
IN
IN
50µA
Drive
Circuit
+
-
HVOUT
0
IN
Data-in
1.4V
Address
Decoder
Total of
8 Channels
CS
+
-
Clear
OE
75µA
Drive
Circuit
HVOUT
7
OVER
TEMP
CIN
B
IN
A
IN
CS
Data-in
Clear
OE
Truth Table
CS Clear Data-In
C
B
A
OE HVOUT HVOUT HVOUT HVOUT HVOUT HVOUT HVOUT HVOUT
7
Functional Mode
Clear
IN IN IN
0
1
2
3
4
5
6
X
H
L
L
L
L
L
L
L
L
X
L
H
H
H
H
H
H
H
H
H
X
X
X
D
D
D
D
D
D
D
D
X
X
X
X
L
L
H
H
L
L
H
H
X
X
X
L
H
L
H
L
H
L
H
X
X
H
H
H
H
H
H
H
H
H
L
H
P
D
P
P
P
P
P
P
P
H
H
P
P
D
P
P
P
P
P
P
H
H
P
P
P
D
P
P
P
P
P
H
H
P
P
P
P
D
P
P
P
P
H
H
P
P
P
P
P
D
P
P
P
H
H
P
P
P
P
P
P
D
P
P
H
H
P
P
P
P
P
P
P
D
P
H
H
P
P
P
P
P
P
P
P
D
H
X
L
L
L
L
H
H
H
H
X
Memory
Address HVOUT
0
Address HVOUT
1
Address HVOUT
2
Address HVOUT
3
Address HVOUT
4
Address HVOUT
5
Address HVOUT
6
Address HVOUT
7
Blanking
L = Low Logic Level
H = High Logic Level
X = Don't Care
P = Previous State
D = Data (High or Low)
7-8
October 1998
MIC4807
Micrel
Typical DC Output Characteristics for the “On” State:
(VDD = 10V and TA = 25°C unless other wise specified)
VDD = 10V
VDD = 15V
EXPANDED VERSION OF SHORT
CIRCUIT CURRENT FOR LOW
OUTPUT VOLTAGE (VOUT)
SHORT CIRCUIT CURRENT
400
400
300
300
200
100
200
100
0
0
0
20
40
60
80
0
1
2
3
4
5
VOUT (V)
VOUT (V)
IOUT FOR SEPARATE VDD
I
AT 3 TEMPERATURES
OUT
120
100
120
100
T = –55°C
T = 25°C
80
60
40
80
60
40
T = 125°C
7
20
0
20
0
0
0.5
1.0
0.0
5.0
(V)
10.0
VOUT (V)
V
OUT
ON RESISTANCE (RON
)
SHORT CIRCUIT CURRENT LIMIT (I
200
)
SC
15.0
10.0
100
5.0
0.0
0
10.0
0.0
5.0
(V)
10.0
0.0
5.0
DD (V)
V
V
DD
October 1998
7-9
MIC4807
Micrel
Pin Description
Pin No.
Pin Name
Ground
VDD
Functional Description
Electrical ground to chip substrate.
Positive logic supply voltage (10V-15V).
5
12
1, 2, 8, HVOUT0 through HVOUT7
These are the high voltage (HV) open outputs, each of which is capable of
sinking 100mA when switched on, and standing off 80V when switched off.
In addition, each output channel is equipped with an analog current limiter
to protect it from shorts to the positive high voltage supply. When an output
is shorted (up to 80V), a maximum of 225mA (200mA nominal) will flow
through it to ground.
9,10, 11,
17,18
13, 14, 15
CIN, BIN, &AIN
WhentheseinputsarecombinedtogethertheyformtheBCDaddressused
to select the desired output. Each input is TTL compatible with an internal
pull-up current source of 50mA.
6
CS
When CS is at logic "0" the device is actively addressed, and when CS is
at logic "1" the decoded address and input Data are inhibited, making
the part unaddressable. CS is TTL compatible with an internal pull-down
current sink of 75µA.
7
Clear
Clear resets all the outputs to the off state when pulled to logic "0", and is
TTL compatible with an internal pull-down current sink of 75µA.
16
Data-in
Data-in determines the state of the output being addressed. When Data-
in is at logic "0" the addressed output is turned off, and when Data-in is at
logic "1" the addressed output is turned on. Data-in is TTL compatible with
an internal pull-up current source of 50µA.
4
OE
OE allows the bank of eight outputs to be duty cycled together. When OE
is at logic "1" the outputs are enabled to follow their respective latches, and
when OE is at logic "0" all the outputs are turned off. OE is TTL Compatible
with a pull-down current sink of 75µA.
7-10
October 1998
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